JP2010166012A - Ohmic electrode, semiconductor device, method for manufacturing ohmic electrode, and method for manufacturing semiconductor device - Google Patents

Abstract

An ohmic electrode, a semiconductor device, a method of manufacturing an ohmic electrode, and a method of manufacturing a semiconductor device capable of forming a low-resistance ohmic electrode on the back surface (N atomic surface) of an AlGaN layer are provided.
An ohmic electrode 16 has a front surface 13a and a back surface 12b opposite to the front surface 13a. The front surface 13a is a (0001) plane, and the back surface 12b of the AlGaN layer 11 is n-type conductivity. In the formed ohmic electrode 16, the region in contact with the back surface 12b in the ohmic electrode 16 includes W. The method for manufacturing the ohmic electrode 16 is characterized in that the ohmic electrode 16 including at least one of W and Mo is formed in a region in contact with the back surface 12b.
[Selection] Figure 1

Description

The present invention relates to an ohmic electrode, a semiconductor device, a method of manufacturing an ohmic electrode, and a method of manufacturing a semiconductor device. More specifically, the present invention has a surface and a back surface opposite to the surface, and the surface is a (0001) surface. In addition, the present invention relates to an ohmic electrode, a semiconductor device, a method for manufacturing an ohmic electrode, and a method for manufacturing a semiconductor device, which are formed on the back surface of an Al _x Ga _(1-x) N (0 ≦ x <1) layer having n-type conductivity .

Conventionally, a semiconductor device including an Al _x Ga _(1-x) N (0 ≦ x <1) (also referred to as aluminum gallium nitride or AlGaN) layer is known. In such a semiconductor device, for example, a vertical (0001) plane GaN (gallium nitride) substrate and a GaN epitaxial layer formed on the surface (Ga (gallium) atomic plane) of the GaN substrate are used as an AlGaN layer. Type semiconductor devices (for example, SBD (Schottky Barrier Diode), LED (Light Emitting Diode), etc.) have been proposed. In such a vertical semiconductor device, it is necessary to form an ohmic electrode having a low contact resistance (contact resistance) on the back surface (N (nitrogen) atomic surface) of the GaN substrate.

  Heretofore, it has been common to form a semiconductor device using a GaN layer epitaxially grown by CVD (Chemical Vapor Deposition) on a (0001) surface of a sapphire substrate, which is a different substrate. From this, the surface of this GaN layer is a (0001) plane, and an electrode is formed on this surface (Ga atom plane). For this reason, the characteristics of the electrode formed on the Ga atom plane have been clarified by many studies.

  On the other hand, there are few reports on the characteristics of the electrodes formed on the back surface (N atomic surface) of the GaN substrate. There is also a report that the characteristics of the electrodes formed are different between the Ga atom plane and the N atom plane of the GaN substrate (see, for example, Non-Patent Document 1). In Non-Patent Document 1, a conductor layer in which titanium (Ti) and aluminum (Al) are laminated is formed on the Ga atom plane and N atom plane of a GaN substrate, and an electrode is formed by heat-treating this conductor layer. The characteristics of these electrodes are compared. In FIG. 2 of Non-Patent Document 1, it is reported that the current formed in the electrode formed on the N atomic plane is less likely to flow than the electrode formed on the Ga atomic plane.

Joon Seop Kwak, et al., "Crystal-polarity dependence of Ti / Al contacts to freestanding n-GaN substrate", APPLIED PHYSICS LETTERS, 12 November 2001, Volume 79, Number 20, pp.3254-3256

  However, since the electrode formation on the back surface (N atomic surface) of the GaN layer has not been sufficiently studied, the electrode formed on the N atomic surface as disclosed in Non-Patent Document 1 above. The resistance is higher than the resistance of the electrode formed on the Ga atom plane. Thus, if the method and electrode material for forming an electrode with low contact resistance on the back surface (N atomic surface) of the AlGaN layer are clarified, the characteristics of the vertical semiconductor device using the AlGaN layer may be improved. There is also.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to form a low-resistance ohmic electrode on the back surface (N atomic surface) of the AlGaN layer. An ohmic electrode, a semiconductor device, a method for manufacturing an ohmic electrode, and a method for manufacturing a semiconductor device are provided.

  As a result of earnestly researching the material of the ohmic electrode formed on the back surface (N atomic surface) of the AlGaN layer, the present inventor can reduce the ohmic electrode by including at least one of tungsten (W) and molybdenum (Mo). I found out.

Therefore, the ohmic electrode of the present invention has a front surface and a back surface opposite to the front surface, the surface is a (0001) plane, and the conductivity type is n-type Al _x Ga _(1-x) N (0 ≦ x <1) In the ohmic electrode formed on the back surface of the layer, the region in contact with the back surface of the ohmic electrode includes at least one of W and Mo.

The ohmic electrode manufacturing method of the present invention has a front surface and a back surface opposite to the front surface, the surface is a (0001) plane, and the conductivity type is n-type Al _x Ga _(1-x) N ( In the method of manufacturing an ohmic electrode formed on the back surface of the 0 ≦ x <1) layer, an ohmic electrode including at least one of W and Mo is formed in a region in contact with the back surface.

  According to the ohmic electrode and the method of manufacturing the ohmic electrode of the present invention, at least one of W and Mo is included in the region in contact with the back surface of the ohmic electrode. Thereby, the contact resistance of the ohmic electrode formed on the back surface (N atomic surface) of the AlGaN layer can be sufficiently lowered.

In the ohmic electrode, the contact resistance of the ohmic electrode with respect to the AlGaN layer is preferably 1 mΩcm ² or less.

In the above ohmic electrode manufacturing method, preferably, an ohmic electrode having a contact resistance of 1 mΩcm ² or less with respect to the AlGaN layer is formed.

As a result of intensive studies, the inventor has found that the contact resistance of the ohmic electrode with respect to the AlGaN layer can be reduced to 1 mΩcm ² or less by including at least one of W and Mo in the region in contact with the back surface of the ohmic electrode. For this reason, an ohmic electrode having a very low contact resistance can be realized.

  In the ohmic electrode, preferably, the ohmic electrode includes a layer in contact with the back surface and a coating layer formed on the layer, and the outermost surface layer of the coating layer including one or more layers is gold (Au ).

  Preferably, in the above ohmic electrode manufacturing method, the outermost surface layer of the coating layer including one or more layers including a layer in contact with the back surface and a coating layer formed on this layer is made of gold. It is characterized by forming an ohmic electrode.

  Since the coating layer is made of stable Au atoms, oxidation of the ohmic electrode can be suppressed. For this reason, it is possible to suppress deterioration of characteristics due to oxidation of the ohmic electrode.

  Preferably, the ohmic electrode manufacturing method is characterized in that the ohmic electrode is formed without performing a heat treatment for making an ohmic contact with the AlGaN layer.

  The inventor has found that an ohmic electrode can be formed without performing a heat treatment for making an ohmic contact by including at least one of W and Mo in a region in contact with the back surface of the ohmic electrode. For this reason, deterioration of the surface can be suppressed.

The semiconductor device of the present invention has a front surface and a back surface opposite to the front surface, the surface is a (0001) plane, and the conductivity type is n-type Al _x Ga _(1-x) N (0 ≦ x <1) A layer, a surface electrode formed on the front surface, and the ohmic electrode according to any one of the above described formed on the back surface.

The method for manufacturing a semiconductor device of the present invention has a front surface and a back surface opposite to the front surface, the surface is a (0001) plane, and the conductivity type is n-type Al _x Ga _(1-x) N ( A step of preparing a layer of 0 ≦ x <1), a step of forming a surface electrode on the surface, and a step of forming an ohmic electrode on the back surface by the method for producing an ohmic electrode described above.

  According to the semiconductor device and the method for manufacturing a semiconductor device of the present invention, the ohmic electrode according to any one of the above is formed on the back surface (N atomic surface) of the AlGaN layer. For this reason, since the contact resistance with respect to the AlGaN layer of the ohmic electrode formed in the back surface is high, generation | occurrence | production of the problem that the electrical property of a semiconductor device deteriorates can be suppressed.

  In the semiconductor device manufacturing method, the surface electrode and the ohmic electrode are preferably the same material.

  Thereby, since a surface electrode and an ohmic electrode can be formed substantially simultaneously, manufacturing cost can be reduced.

  According to the ohmic electrode, the semiconductor device, the ohmic electrode manufacturing method, and the semiconductor device manufacturing method of the present invention, a low-resistance ohmic electrode can be formed on the back surface (N atomic surface) of the AlGaN layer.

It is a cross-sectional schematic diagram of the Schottky barrier diode in Embodiment 1 of this invention. It is a flowchart for demonstrating the manufacturing method of the Schottky barrier diode in Embodiment 1 of this invention. It is a cross-sectional schematic diagram of the Schottky barrier diode in Embodiment 2 of this invention. It is a graph which shows the relationship between the contact resistance in the GaN substrate of the electrode which consists of W, and the heat processing temperature of alloying. It is a graph which shows the relationship between the contact resistance in the GaN substrate of the electrode which consists of Mo, and the heat processing temperature of alloying.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following drawings, the same or corresponding parts are denoted by the same reference numerals, and description thereof will not be repeated. In the present specification, individual surfaces are indicated by (). As for the negative index, “−” (bar) is attached on the number in crystallography, but in this specification, a negative sign is attached before the number.

(Embodiment 1)
FIG. 1 is a schematic cross-sectional view of a Schottky barrier diode which is an embodiment of a semiconductor device according to the present invention. A Schottky barrier diode 10 according to the present embodiment will be described with reference to FIG.

As shown in FIG. 1, the Schottky barrier diode 10 includes an Al _x Ga _(1-x) N (0 ≦ x <1) layer 11, an ohmic electrode 16, an insulating layer 14, and a Schottky as a surface electrode. And an electrode 15.

AlGaN layer 11, the conductive type and n-type GaN substrate 12, n formed on the GaN substrate 12 ^- and a GaN epitaxial layer 13 - ⁿ as a drift layer. The surface 12a of the GaN substrate 12 is a (0001) plane, that is, a Ga atom plane. The back surface 12b of the GaN substrate 12 is a (000-1) plane, that is, an N atom plane. The surface 13a of the n ⁻ GaN epitaxial layer 13 is a (0001) plane, that is, a Ga atom plane. The back surface 13b of the n ⁻ GaN epitaxial layer 13 is a (000-1) plane, that is, an N atom plane. Therefore, the surface 13a of the AlGaN layer 11 is a (0001) plane, that is, a Ga plane. The back surface 12b of the AlGaN layer 11 is a (000-1) plane, that is, an N plane.

Note that an n ⁺ GaN epitaxial layer as a semiconductor layer may be formed between the n ⁻ GaN epitaxial layer 13 and the GaN substrate 12. At this time, the carrier concentration of the drift layer may be, for example, 1 × 10 ¹⁶ cm ⁻³ .

The ohmic electrode 16 is formed on the back surface 12 b opposite to the front surface 12 a on which the n ⁻ GaN epitaxial layer 13 is formed in the GaN substrate 12. In the ohmic electrode 16, a region in contact with the back surface 12b of the GaN substrate 12 (interface with the GaN substrate 12 in the present embodiment) includes at least one of W and Mo. The region in contact with the back surface 12b in the ohmic electrode 16 preferably contains W or Mo, more preferably W or Mo.

The ohmic electrode 16 has a thickness of 200 nm, for example. Also it is preferable that the contact resistance of the ohmic electrode 16 to the GaN substrate 12 is 1Emuomegacm ² or less, and more preferably 0.10Emuomegacm ² or less.

Insulating layer ^14, n - it is formed on the surface 13a of the GaN epitaxial layer 13. The insulating layer 14 can have an arbitrary thickness. In addition, an opening 17 having a circular planar shape is formed in the central portion of the insulating layer 14.

In the opening 17, the upper surface of the n ⁻ GaN epitaxial layer 13 is exposed. A Schottky electrode 15 extends from the inside of the opening 17 to the upper surface of the insulating layer 14 and is in contact with the upper surface of the n ⁻ GaN epitaxial layer 13 inside the opening 17. . The planar shape of the Schottky electrode 15 is circular. Further, the end portion of the insulating layer 14 constituting the side wall of the opening portion 17 has a tapered shape so that the thickness gradually decreases toward the bottom portion of the opening portion 17. That is, the side wall of the opening 17 is inclined with respect to the bottom wall of the opening 17. From a different point of view, the plane area of the opening 17 gradually increases from the bottom wall of the opening 17 toward the upper opening.

Schottky electrode ^15, n - consists of a lower electrode layer 15a in contact with the GaN epitaxial layer 13, an upper electrode layer 15b formed by stacking on the lower electrode layer 15a. The lower electrode layer 15a is made of, for example, nickel (Ni). The upper electrode layer 15b is made of, for example, Au. Note that a portion of the outer peripheral portion of the Schottky electrode 15 extending on the upper surface of the insulating layer 14 functions as a field plate (FP) electrode portion.

  FIG. 2 is a flowchart for explaining a method of manufacturing the Schottky barrier diode shown in FIG. Next, a manufacturing method of the Schottky barrier diode 10 shown in FIG. 1 will be described with reference to FIGS.

  As shown in FIG. 2, first, an AlGaN layer preparation step (S10) is performed. In this step (S10), an AlGaN layer 11 having a front surface 13a and a back surface 12b opposite to the front surface 13a, the front surface 13a having a (0001) plane, and an n-type conductivity type is prepared. In the step (S10) in the present embodiment, the following steps are performed.

Specifically, a substrate preparation step (S10) is performed. In this step (S10), a n-type GaN substrate 12 (see FIG. 1) is prepared. As this GaN substrate 12, a substrate formed by an arbitrary manufacturing method can be used. For example, a (0001) -plane GaN substrate 12 prepared by the HVPE method is prepared. The average dislocation density in the GaN substrate 12 is, for example, 1 × 10 ⁶ cm ⁻² or less. The dislocation density can be measured by, for example, a method of counting the number of pits formed by etching in molten KOH (potassium hydroxide) and dividing by the area of the etched substrate. The carrier concentration of the GaN substrate 12 is, for example, 3 × 10 ¹⁸ cm ⁻³ .

Thereafter, an epitaxial layer forming step (S12) is performed. Specifically, an n ⁻ GaN epitaxial layer 13 (see FIG. 1) is formed on the surface 12 a (Ga atomic plane) of the GaN substrate 12. Any method can be used as the method of forming the n ⁻ GaN epitaxial layer 13, for example, a sublimation method, HVPE (Hydride Vapor Phase Epitaxy) method, MBE (Molecular Beam Epitaxy) method. A vapor phase growth method such as MOCVD (Metal Organic Chemical Vapor Deposition) method, a liquid phase growth method such as a flux method, a high nitrogen pressure solution method, or the like can be used.

Next, an insulating layer forming step (S20) is performed. In this step (S20), the insulating layer 14 is formed on the n ⁻ GaN epitaxial layer 13. Any method can be used as a method of manufacturing the insulating layer 14. Any material can be used as the material constituting the insulating layer 14, for example, silicon nitride, silicon oxide, silicon oxynitride, hafnium oxide, aluminum nitride, aluminum oxide, gallium oxide, magnesium oxide, scandium oxide. Etc. can be used.

  Next, an ohmic electrode formation step (S30) is performed. In this step (S30), the ohmic electrode 16 including at least one of W and Mo is formed in a region in contact with the back surface 12b of the GaN substrate 12 (the back surface 12b of the AlGaN layer 11). In this step (S30), it is preferable to form the ohmic electrode 16 containing W or Mo, more preferably to form the ohmic electrode 16 made of W or to form the ohmic electrode 16 made of Mo.

Further, in the step (S30), preferably 1Emuomegacm ² or less with respect to the GaN substrate 12, and more preferably it is preferable to form an ohmic electrode 16 having a contact resistance of 0.10Emuomegacm ² below.

  As a method for forming the ohmic electrode 16, an arbitrary method such as an electron beam evaporation method (EB evaporation method) can be used. In this step (S30), for example, ohmic electrode 16 having a thickness of 200 nm is formed.

  Prior to the step of forming the ohmic electrode 16, it is preferable to clean at least the back surface 12b of the GaN substrate 12. As this cleaning method, for example, organic cleaning and hydrochloric acid cleaning may be combined.

  Further, a heat treatment step may be performed after the ohmic electrode 16 is formed, but it is preferable not to perform a heat treatment for making an ohmic contact with the GaN substrate 12. The ohmic electrode 16 in the present embodiment can make ohmic contact with the GaN substrate 12 without heat treatment. For this reason, when the heat treatment is omitted, the deterioration of the surface 13a of the AlGaN layer 11 can be prevented.

  The “heat treatment for making ohmic contact” does not include heat treatment for the purpose other than making ohmic contact. That is, the heat treatment other than the ohmic contact (for example, the heat treatment for forming the Schottky electrode 15) may be performed in at least one of steps (S10) to (S50).

  Next, a surface electrode forming step (S40) is performed as shown in FIG. In this step (S40), for example, the following steps are performed.

  Specifically, a resist film having a pattern is formed on the insulating layer 14 using a photolithography method. In the resist film, an opening pattern is formed on a region where the opening 17 where the Schottky electrode 15 (see FIG. 1) is to be formed is formed in the insulating layer 14.

  Then, using the resist film as a mask, the insulating layer 14 is partially removed by etching. As a result, an opening 17 is formed in the insulating layer 14. Here, as the etching for partially removing the insulating layer 14, dry etching may be used, or wet etching may be used. Thereafter, the resist film is removed.

  Then, a resist film having a pattern is formed again on the insulating layer 14 using a photolithography method. In the resist film, an opening pattern is formed on a region where the Schottky electrode 15 (see FIG. 1) is to be disposed. That is, an opening pattern in which the opening 17 of the insulating layer 14 is exposed inside is formed.

Thereafter, a metal film to be the lower electrode layer 15a and the upper electrode layer 15b of the Schottky electrode 15 (see FIG. 1) is laminated. As the metal film constituting the lower electrode layer 15a, a material having good Schottky characteristics such as Au other than Ni described above can be used. As a method for forming the metal film, any method can be used. For example, an EB vapor deposition method can be used. Prior to the above-described step of forming the metal film, the surface of the n ⁻ GaN epitaxial layer 13 exposed in the opening may be cleaned by a cleaning step using hydrochloric acid or the like.

  Next, by removing the resist film, the metal film formed on the resist film is simultaneously removed (lift-off). As a result, as shown in FIG. 1, the metal film remains so as to extend from the inside of the opening 17 to the upper surface of the insulating layer 14, and the Schottky electrode 15 made of this metal film is formed.

Next, a post-processing step (S50) is performed. In this post-processing step (S50), a dividing step for dividing the GaN substrate 12 on which the n ⁻ GaN epitaxial layer 13, the Schottky electrode 15, the ohmic electrode 16 and the like are formed into individual chips is performed. In this way, the Schottky barrier diode 10 shown in FIG. 1 can be obtained.

  As described above, the ohmic electrode 16 in the present embodiment has the surface 13a and the back surface 12b opposite to the surface 13a, the surface 13a is the (0001) plane, and the conductivity type is n-type. In the ohmic electrode 16 formed on the back surface 12b of the AlGaN layer 11, the region in contact with the back surface 12b in the ohmic electrode 16 includes at least one of W and Mo.

  The method for manufacturing the ohmic electrode 16 of the present invention has a front surface 13a and a back surface 12b opposite to the front surface 13a, the front surface 13a is a (0001) plane, and the back surface of the AlGaN layer 11 is n-type conductivity. In the method of manufacturing the ohmic electrode 16 formed on 12b, the ohmic electrode 16 including at least one of W and Mo is formed in a region in contact with the back surface 12b.

  According to the ohmic electrode 16 and the manufacturing method thereof of the present invention, at least one of W and Mo is included in the region in contact with the back surface 12 b of the AlGaN layer 11 in the ohmic electrode 16. Thereby, the contact resistance of the ohmic electrode 16 formed on the back surface 12b (N atomic surface) of the AlGaN layer 11 can be sufficiently lowered.

  In addition, the ohmic electrode 16 having a low contact resistance can be formed by a simple method in which the ohmic electrode 16 is formed of a material containing at least one of W and Mo described above. For this reason, manufacturing cost can be reduced compared with the case where the conductor of a laminated structure is formed in order to form the ohmic electrode 16.

  Furthermore, since W and Mo have high heat resistance, the heat resistance of the ohmic electrode 16 can be improved. For this reason, even if the Schottky barrier diode 10 becomes high temperature, deterioration of the characteristics of the ohmic electrode 16 can be suppressed. In addition, even when heat is applied after the ohmic electrode 16 is formed, deterioration of the characteristics of the ohmic electrode 16 can be suppressed.

The ohmic electrode 16 is preferably characterized in that the ohmic electrode 16 has a contact resistance of 1 mΩcm ² or less with respect to the AlGaN layer.

The method for manufacturing the ohmic electrode 16 is preferably characterized in that the ohmic electrode 16 having a contact resistance of 1 mΩcm ² or less with respect to the AlGaN layer is formed.

As a result of intensive studies, the inventor has found that the contact resistance of the ohmic electrode with respect to the AlGaN layer can be reduced to 1 mΩcm ² or less by including at least one of W and Mo in the region in contact with the back surface 12 b in the ohmic electrode 16. For this reason, the ohmic electrode 16 having a very low contact resistance can be realized. In this case, the electrical characteristics of the Schottky barrier diode 10 provided with the ohmic electrode 16 can be sufficiently improved.

  The ohmic electrode manufacturing method is preferably characterized in that the ohmic electrode 16 is formed without performing a heat treatment for making an ohmic contact with the AlGaN layer 11.

  The present inventor has found that the ohmic electrode 16 can be formed without performing heat treatment for making ohmic contact by including at least one of W and Mo in the region in contact with the back surface 12b in the ohmic electrode 16. For this reason, deterioration of the surface 13a of the AlGaN layer 11 can be suppressed.

  A Schottky barrier diode 10 as a semiconductor device in the present embodiment has a front surface 13a and a back surface 12b opposite to the front surface 13a. The front surface 13a is a (0001) plane and the conductivity type is n-type. An AlGaN layer 11, a Schottky electrode 15 as a front electrode formed on the front surface 13a, and an ohmic electrode 16 formed on the back surface 12b are provided.

  The manufacturing method of the Schottky barrier diode 10 as the semiconductor device of the present invention has a front surface 13a and a back surface 12b opposite to the front surface 13a. The front surface 13a is a (0001) plane and the conductivity type is n-type. An AlGaN layer preparation step (S10) for preparing an AlGaN layer 11, a surface electrode formation step (S40) for forming a Schottky electrode 15 as a surface electrode on the surface, and the ohmic electrode 16 on the back surface by the above-mentioned ohmic electrode manufacturing method And an ohmic electrode forming step (S30) formed in 12b.

  According to the Schottky barrier diode 10 and the manufacturing method thereof of the present invention, the ohmic electrode 16 is formed on the back surface 12b (N atomic surface) of the AlGaN layer 11. For this reason, since the contact resistance with respect to the AlGaN layer 11 of the ohmic electrode 16 formed in the back surface 12b is high, generation | occurrence | production of the problem that the electrical property of a semiconductor device deteriorates can be suppressed.

  In particular, when the ohmic electrode 16 is formed without performing the heat treatment for making an ohmic contact with the AlGaN layer 11 in the step (S30), the characteristics of the Schottky electrode 15 can be improved. The characteristics can be sufficiently improved. Hereinafter, this reason will be described. Conventionally, an ohmic electrode has been formed by forming a metal layer on the back surface of the AlGaN layer and then alloying it by heat treatment. When the Schottky electrode is formed after the heat treatment, the surface of the AlGaN layer is deteriorated by the heat treatment. For this reason, the characteristics of the Schottky electrode formed on the deteriorated surface deteriorate. Further, when the Schottky electrode is formed before the heat treatment, the Schottky electrode is deteriorated by the heat treatment at a temperature of about 600 ° C. to 800 ° C. for making ohmic contact. Thus, when heat treatment is performed, it is difficult to form a Schottky electrode with good characteristics. However, in this embodiment, since it is not necessary to perform heat treatment to form the ohmic electrode 16, the characteristics of the Schottky electrode 15 can be improved. Therefore, a Schottky barrier diode with sufficiently improved electrical characteristics can be realized.

  In the semiconductor device and the manufacturing method thereof, the AlGaN layer is preferably a GaN layer. Thereby, since GaN having an energy band gap of 3.4 eV and high thermal conductivity can be used, a semiconductor device having high characteristics can be realized.

(Embodiment 2)
FIG. 3 is a schematic cross-sectional view of a Schottky barrier diode which is an embodiment of a semiconductor device according to the present invention. Referring to FIG. 3, Schottky barrier diode 20 according to the present embodiment basically has the same configuration as Schottky barrier diode 10 in the first embodiment shown in FIG. Is different in that it includes multiple layers.

  Specifically, the ohmic electrode 16 includes a contact electrode layer 16a in contact with the back surface 12b of the GaN substrate 12, and a coating layer 16b formed on the contact electrode layer 16a. The contact electrode layer 16a contains at least one of W and Mo, preferably contains W or Mo, more preferably consists of W, or more preferably consists of Mo.

  The thickness of the contact electrode layer 16a is, for example, 1 nm or more. The coating layer 16b is composed of one or more layers, and the outermost surface layer of the coating layer 16b is preferably made of Au. That is, it is preferable that the uppermost part constituting the coating layer 16b is made of Au. The thickness of the coating layer 16b is, for example, 10 nm or more. Further, the coating layer 16b made of Au has a function as a layer for suppressing reaction, an electrode pad, and a protective layer.

  Another electrode layer (not shown) may be formed between the contact electrode layer 16a and the covering layer 16b. When another electrode layer is formed, the other electrode layer is made of, for example, titanium (Ti), platinum (Pt), or the like. Note that another electrode layer made of Ti and Pt functions as a diffusion preventing layer.

  Next, a method for manufacturing the Schottky barrier diode 20 in the present embodiment will be described. The manufacturing method of the Schottky barrier diode 20 in the present embodiment has basically the same configuration as the manufacturing method of the Schottky barrier diode 10 in the first embodiment, but an ohmic electrode including a plurality of layers is provided. It differs in the point to form.

  Specifically, in the back electrode forming step (S30), the contact electrode layer 16a and the coating layer 16b including at least one of W and Mo are sequentially formed on the back surface 12b (N atomic surface) of the GaN substrate 12. The contact electrode layer 16a preferably contains W or Mo, more preferably W or Mo. The covering layer 16b is preferably located in the uppermost layer. The outermost surface layer of the covering layer 16b composed of one or more layers is preferably made of Au.

  As described above, the ohmic electrode 16 in the present embodiment includes the contact electrode layer 16a that is a layer in contact with the back surface 12b and the covering layer 16b formed on the contact electrode layer 16a, and one or more. It is characterized in that the outermost surface layer of the coating layer 16b composed of the above layer is made of Au.

  Preferably, the method for manufacturing the ohmic electrode 16 in the present embodiment includes a contact electrode layer 16a which is a layer in contact with the back surface 12b, and a covering layer 16b formed on the contact electrode layer 16a. The outermost surface layer of the covering layer 16b composed of layers forms the ohmic electrode 16 made of Au.

  Thereby, since the coating layer 16b consists of stable Au atoms, the oxidation of the ohmic electrode 16 can be suppressed. For this reason, deterioration of characteristics due to oxidation of the ohmic electrode 16 can be suppressed.

  Here, in the first and second embodiments, the Schottky barrier diodes 10 and 20 are described as examples of the semiconductor device, but the semiconductor device is not limited to the Schottky barrier diode. The semiconductor device of the present invention can be applied to, for example, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), an LED (Light Emitting Diode), an LD (Laser Diode). Since power devices such as Schottky barrier diodes and MOSFETs have high temperatures, the ohmic electrode 16 containing at least one of W and Mo having high heat resistance according to the present invention is suitably used for this power device.

  Moreover, when forming an ohmic electrode in MOSFET, LED, LD, etc., the same material may be sufficient as a surface electrode and the ohmic electrode 16 in the said process (S30) and process (S40). Moreover, you may implement the said process (S30) and process (S40) substantially simultaneously. Thereby, manufacturing cost can be reduced.

  In this example, ohmic electrodes made of W or Mo were formed on the back surface (N atomic surface) and front surface (Ga atomic surface) of the GaN substrate, and the relationship between the heat treatment temperature and the contact resistance was measured for this ohmic electrode.

(sample)
First, as the AlGaN layer for measurement, a (0001) -plane GaN substrate prepared by the HVPE method was prepared. This GaN substrate had n-type conductivity, and the carrier concentration was 3 × 10 ¹⁸ cm ⁻³ . The average dislocation density of this GaN substrate was 1 × 10 ⁶ cm ⁻² . The thickness of this GaN substrate was 400 μm.

  Next, organic cleaning was performed on the GaN substrate. Thereafter, a circular electrode pattern (pattern for a circular TLM electrode) used for a TLM (Transmission Line Model) method was formed on the back surface (N atomic surface) of the GaN substrate by a photolithography method using a resist film. Specifically, in this resist film, a plurality of opening patterns for TLM electrodes having a circular planar shape were formed. The radius of this opening pattern was 100 μm. Moreover, each opening pattern was arrange | positioned so that the distance between a pair of opening patterns might be 10 micrometers, 20 micrometers, 40 micrometers, and 80 micrometers.

  Next, after cleaning the surface of each GaN substrate with hydrochloric acid, W or Mo was formed on the back surface of each GaN substrate by sputtering. The film thickness of the formed W film or Mo film was 200 nm. Thereafter, by removing the resist film, portions other than the W film or the Mo film to be the circular TLM electrode were removed (lift-off).

  As described above, a GaN substrate in which circular TLM electrodes made of W or Mo were formed on the back side of the GaN substrate was prepared. And it heat-processed for 2 minutes, respectively on three temperature conditions, 400 degreeC, 600 degreeC, and 800 degreeC. This heat treatment was performed in a nitrogen atmosphere. Thereby, the sample heat-processed on three temperature conditions, 400 degreeC, 600 degreeC, and 800 degreeC, was prepared, respectively.

  In addition, among the GaN substrates on which the circular TLM electrode was formed on the back side of the GaN substrate, the GaN substrate that was not subjected to the heat treatment was used as each sample when the heat treatment was not performed.

  For comparison, substrates each having a circular TLM electrode made of W or Mo were prepared on the surface (Ga atomic plane) of the GaN substrate by the same method as described above. Then, heat treatment was performed for 2 minutes under the three temperature conditions as described above. In addition, each GaN substrate that was not subjected to heat treatment was used as a sample when heat treatment was not performed.

(Measuring method)
The contact resistance was measured using the TLM method for each GaN substrate on which the circular TLM electrode was formed as described above. Specifically, regarding the circular TLM electrodes formed on the front surface or the back surface of the GaN substrate, the electrical resistance was measured for a plurality of electrode pairs having different intervals between the electrodes. And the measured electrical resistance was plotted on the coordinate which made the said electrode space | interval the horizontal axis and made the electrical resistance obtained as a result of the measurement the vertical axis | shaft. And the contact resistance of the said electrode was calculated | required from the inclination and intercept of the approximate linear straight line obtained from this plotted point.

The measurement results are shown in FIGS. 4 and 5 are graphs showing the relationship between the contact resistance of the electrode made of W or Mo on the GaN substrate and the heat treatment temperature for alloying. 4 and 5 show the relationship between the heat treatment temperature and the contact resistance for a sample in which a circular TLM electrode made of W or Mo is disposed on either the Ga atom plane or the N atom plane of the GaN substrate. In addition, about the sample which did not heat-process, heat processing temperature is described as 0 degreeC. 4 and 5, the horizontal axis indicates the heat treatment temperature (unit: ° C.), and the vertical axis indicates the contact resistance Rc (unit: mΩcm ² ). In the figure, the rhombus in the legend indicates data of a sample in which an electrode is formed on the N atomic plane of the GaN substrate, and the square in the legend indicates data on a sample in which an electrode is formed on the Ga atomic plane of the GaN substrate. .

(Measurement result)
As can be seen from FIGS. 4 and 5, the ohmic electrode formed on the N atomic plane had the same contact resistance as the ohmic electrode formed on the Ga atomic plane. From this, by forming an ohmic electrode including at least one of W and Mo in a region in contact with the N atomic surface which is the back surface, an ohmic having a contact resistance as low as that of the ohmic electrode formed on the Ga atomic surface It has been found that an electrode can be formed.

Further, a sample not subjected to heat treatment, by comparing the sample was subjected to heat treatment, with an ohmic electrode formed on the surface electrode and the N atomic plane formed Ga atomic plane, the contact resistance at 1Emuomegacm ² below, And it was almost the same low value. That is, an ohmic electrode having a low contact resistance could be formed regardless of the presence or absence of heat treatment. From this, by forming an ohmic electrode containing at least one of W and Mo in a region in contact with the N atomic plane which is the back surface, the ohmic electrode can be formed without performing a heat treatment for making an ohmic contact with the GaN substrate. I knew it was possible.

  As described above, according to the present example, it was confirmed that the region in contact with the back surface of the AlGaN layer in the ohmic electrode includes at least one of W and Mo, so that a low-resistance electrode can be formed.

  It should be understood that the embodiments and examples disclosed herein are illustrative and non-restrictive in every respect. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  The present invention is advantageously applied to a semiconductor device having an ohmic electrode having a low contact resistance on the back surface (N atomic surface) of the AlGaN layer, for example, a vertical semiconductor device such as a Schottky barrier diode or MOSFET using a GaN substrate. .

10, 20 Schottky barrier diode, 11 AlGaN layer, 12 GaN substrate, 12a, 13a front surface, 12b, 13b back surface, 13 n ^- GaN epitaxial layer, 14 insulating layer, 15 Schottky electrode, 15a lower electrode layer, 15b upper electrode Layer, 16 ohmic electrode, 16a contact electrode layer, 16b coating layer, 17 opening.

Claims (10)

The Al _x Ga _(1-x) N (0 ≦ x <1) layer having a front surface and a back surface opposite to the front surface, the front surface being a (0001) plane and an n-type conductivity. In the ohmic electrode formed on the back surface,
The ohmic electrode is characterized in that the region in contact with the back surface of the ohmic electrode contains at least one of tungsten and molybdenum. The ohmic electrode according to claim 1, wherein a contact resistance of the ohmic electrode with respect to the Al _x Ga _(1-x) N layer is 1 mΩcm ² or less. The ohmic electrode includes a layer in contact with the back surface, and a coating layer formed on the layer,
The ohmic electrode according to claim 1 or 2, wherein the outermost surface layer of the covering layer composed of one or more layers is made of gold. And the surface, and a back surface opposite to the surface, the surface is (0001) plane, and the _{Al x Ga (1-x)} N (0 ≦ x <1) layer is a conductivity type is n-type,
A surface electrode formed on the surface;
The semiconductor device provided with the ohmic electrode of any one of Claims 1-3 formed in the said back surface. The Al _x Ga _(1-x) N (0 ≦ x <1) layer having a front surface and a back surface opposite to the front surface, the front surface being a (0001) plane and an n-type conductivity. In the manufacturing method of the ohmic electrode formed on the back surface,
The method of manufacturing an ohmic electrode, wherein the ohmic electrode including at least one of tungsten and molybdenum is formed in a region in contact with the back surface. The method for producing an ohmic electrode according to claim 5, wherein the ohmic electrode having a contact resistance of ₁ mΩcm ² or less with respect to the Al _x Ga _(1-x) N layer is formed.   Forming the ohmic electrode, wherein the outermost surface layer of the coating layer including one or more layers includes a layer in contact with the back surface and a coating layer formed on the layer; The method for producing an ohmic electrode according to claim 5, wherein the method is characterized in that: Wherein the Al _x Ga _(1-x) comprising forming said ohmic electrode without a heat treatment for attaining ohmic contact with the N layer, ohmic according to any one of claims 5-7 Electrode manufacturing method. Preparation and surface, and a back surface opposite to the surface, the surface is (0001) plane, the _{Al x Ga (1-x)} N (0 ≦ x <1) layer is a conductivity type is n-type And a process of
Forming a surface electrode on the surface;
A method for manufacturing a semiconductor device, comprising: forming an ohmic electrode on the back surface by the method for manufacturing an ohmic electrode according to claim 5.   The method for manufacturing a semiconductor device according to claim 9, wherein the surface electrode and the ohmic electrode are made of the same material.

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