JP2010021775A - Audio circuit with pop noise reduction circuit - Google Patents

Abstract

An audio circuit including a pop sound reduction circuit capable of greatly reducing pop sound is obtained.
When the power supply is turned on or the like, the voltage VT2 forming the reference voltage input to the operational amplifier circuit 3 forming the power amplifier circuit is set to a voltage ½ of the first reference voltage Vref. Starting up with a completely symmetrical voltage waveform on the top and bottom, and having no inflection point in the middle of rising, unnecessary harmonic components can be reduced, pop noise can be greatly reduced, and the power is turned off. When the operation is stopped like the time, the pop noise reduction circuit 2 that outputs to the operational amplifier circuit 3 the voltage VT2 that is symmetrical with respect to the start time as a reference voltage is provided.
[Selection] Figure 1

Description

  The present invention relates to an audio circuit including a pop sound reduction circuit that reduces a pop sound generated when an audio power amplifier is started or stopped.

  In the audio power amplifier circuit, impact noise is generated from the speaker during the transition period until the voltage of each part rises when the power is turned on or standby mode is released and during the transition period until the voltage of each part falls when the power is turned off or in standby mode. It was. This abnormal sound is called “pop sound” or “bottom sound”, which is very annoying to the listener and causes great discomfort, and sometimes causes a problem in the speaker. As a method for reducing such a pop sound, it has been known that it can be reduced by starting up a reference voltage of an audio power amplifier with a raised cosine waveform at the time of start-up and operation stop.

FIG. 3 is a circuit diagram showing an example of such a conventional pop noise reduction circuit (see, for example, Patent Document 1), and FIG. 4 is a timing chart showing an operation example of the circuit of FIG. . FIG. 4 shows waveforms of voltages at points A to C in FIG. 3 and drain currents i101 and i102 of the NMOS transistors M103 and M104.
In FIG. 3, when the power supply is turned on and the power supply voltage Vdd is input, the capacitor C101 is charged through the resistor R101, so that the voltage at point A rises in a logarithmic curve. Since the voltage at the point A is input to the gates of the NMOS transistor M101 and the PMOS transistor M102, the drain current i101 varies depending on the voltage at the point A. That is, when the voltage at point A is low, the PMOS transistor M102 is on, but the NMOS transistor M101 is off, so that the drain current i101 hardly flows.

  When the voltage at the point A rises and the NMOS transistor M101 starts to turn on, the drain current i101 flows out and increases as the voltage at the point A increases. When the voltage at the point A is around ½ of the power supply voltage Vdd, the combined resistance of the NMOS transistor M101 and the PMOS transistor M102 becomes the smallest and the drain current i101 becomes the largest. When the voltage at point A further increases, the on-resistance of the NMOS transistor M101 further decreases, but the increase in the on-resistance of the PMOS transistor M102 exceeds the decrease in the on-resistance of the NMOS transistor M101, and the drain current i101 begins to decrease. When the voltage at point A further rises and becomes close to the power supply voltage Vdd, the PMOS transistor M102 is turned off, so that the drain current i101 does not flow.

  The drain current i101 is the drain current of the NMOS transistor M103, and the NMOS transistors M103 and M104 constitute a current mirror circuit. Therefore, the drain current i102 of the NMOS transistor M104 changes similarly to the drain current i101. . Since the capacitor C102 is charged with the drain current i102, the voltage of the capacitor C102 increases. When the output voltage from the audio reproduction circuit 101 is constant (for example, ground voltage), the output voltage of the operational amplifier 102 and the terminal voltage of the capacitor C102 are in a proportional relationship, so the voltage at the point B is the voltage of the capacitor C102. It rises with the same change as the terminal voltage. That is, the voltage at point B has a voltage waveform that rises slowly immediately after the power is turned on, rises fast halfway, and slowly rises last. As a result, the peak value of the voltage waveform at point C can be kept low, and pop noise can be reduced.

Further, a plurality of current sources for charging a capacitor corresponding to the capacitor C102 of FIG. 3 are provided, and the current waveform for charging the capacitor C102 is switched in accordance with the rise of the power source, so that a voltage waveform as shown by the B voltage in FIG. There was also a thing which produced | generated (for example, refer patent document 2).
JP 2004-304441 A JP 2005-109654 A

  However, in the case of FIG. 3, since the voltage at point A rises in a logarithmic curve, it immediately rises immediately after the power is turned on, and the rising speed becomes slower with time, so the on-time of the PMOS transistor M102 is short, Since the on-time of the NMOS transistor M101 becomes long, the waveform of the drain current i101 is not symmetrical as shown in FIG. Furthermore, since the value of the drain current i101 greatly depends on the threshold voltages of the NMOS transistor M101 and the PMOS transistor M102, the drain current i101 varies greatly depending on the transistor manufacturing conditions.

  Further, in the NMOS transistors M103 and M104 constituting the current mirror circuit, since the capacitor C102 is connected between the source of the NMOS transistor M104 and the ground voltage Vss, the NMOS is increased as the voltage of the capacitor C102 increases. The drain current of the transistor M104 is reduced, and an accurate mirror effect cannot be obtained. For this reason, the drain current i102 becomes considerably smaller than the drain current i101 with the passage of time, and the symmetry of the waveform of the drain current i102 as shown in FIG. 4 changes beyond the drain current i101. As a result, the change in the voltage at point B becomes very gradual in the second half, and it takes time to set the reference voltage. Moreover, many harmonics are generated in the voltage at point B, preventing the effect of reducing pop noise. There was a problem.

  In addition, when a plurality of current sources for charging a capacitor corresponding to the capacitor C102 of FIG. 3 are provided, the malfunction of the circuit of FIG. 3 can be improved, but the capacitor C102 is charged over time. Since the current source is switched, a large number of harmonics are generated at the time of switching, which causes a pop noise.

  The present invention has been made to solve such a problem, and can provide a rising characteristic closer to a raised cosine waveform and an audio equipped with a pop sound reduction circuit that can reduce the pop sound. The purpose is to obtain a circuit.

The audio circuit according to the present invention includes a differential amplifier circuit that receives a reference voltage at one input terminal and an audio signal at the other input terminal, amplifies the input audio signal, and outputs the amplified audio signal to a speaker. An audio circuit comprising: a power amplifier circuit; and a pop sound reduction circuit for reducing a pop sound generated from the speaker when the power amplifier circuit is started and stopped.
The pop noise reduction circuit is
In accordance with the input control signal, a triangular wave voltage generation circuit unit that generates and outputs a triangular wave voltage forming a predetermined triangular wave;
A voltage-current conversion circuit unit that generates a proportional current proportional to the triangular wave voltage generated by the triangular wave voltage generation circuit unit;
A capacitor charged and discharged by the output current of the voltage-current converter circuit unit;
A control circuit unit that controls the operation of the triangular wave voltage generation circuit unit and controls the output of the proportional current generated for the voltage-current conversion circuit unit;
With
The control circuit unit causes the triangular wave voltage generation circuit unit to output the triangular wave voltage when starting up the power amplifier circuit, and charges the capacitor with an output current of the voltage-current conversion circuit unit. The terminal voltage is supplied to the differential amplifier circuit as the reference voltage.

  Further, the control circuit unit outputs the triangular wave voltage to the triangular wave voltage generation circuit unit when the operation of the power amplifier circuit is stopped, and discharges the capacitor by the output current of the voltage-current conversion circuit unit. I made it.

  Specifically, when the power amplifier circuit is started up, the control circuit unit applies the first voltage to the terminal of the capacitor when the terminal voltage of the capacitor becomes equal to a first predetermined value in the vicinity of a predetermined first reference voltage. A reference voltage is output.

  Further, the control circuit unit connects the terminal of the capacitor to the ground voltage when the terminal voltage of the capacitor becomes equal to a second predetermined value near the ground voltage when the operation of the power amplifier circuit is stopped.

  According to the audio circuit of the present invention, when starting the power amplifier circuit, the triangular wave voltage generation circuit unit outputs the triangular wave voltage, and the capacitor is charged by the output current of the voltage-current conversion circuit unit. The capacitor supplies a terminal voltage to the differential amplifier circuit as the reference voltage. For this reason, the reference voltage at the start-up of the power amplifier circuit is supplied with a voltage that is very symmetrical, smoothly changes, and is close to a raised cosine waveform with respect to 1/2 of the reference voltage. The pop sound can be greatly reduced.

  In addition, when the operation of the power amplifier circuit is stopped, the triangular wave voltage generation circuit unit outputs the triangular wave voltage, and the capacitor is discharged by the output current of the voltage-current conversion circuit unit. For this reason, the reference voltage when the operation of the power amplifier circuit is stopped is supplied with a voltage that has a very good symmetry, smoothly changes, and is close to a raised cosine waveform with respect to a half of the reference voltage. The pop sound can be greatly reduced.

  In addition, when starting the power amplifier circuit, when the terminal voltage of the capacitor becomes equal to a first predetermined value near a predetermined first reference voltage, the first reference voltage is output to the terminal of the capacitor. Thus, the reference voltage of the power amplifier circuit can be accurately set to the first reference voltage.

  Further, when the operation of the power amplifier circuit is stopped, the electric charge of the capacitor is completely discharged, so that the pop noise reduction circuit at the next startup of the power amplifier circuit can be operated reliably.

Next, the present invention will be described in detail based on the embodiments shown in the drawings.
First embodiment.
FIG. 1 is a diagram illustrating a circuit example of an audio circuit according to the first embodiment of the present invention.
In FIG. 1, an audio circuit 1 includes a pop sound reduction circuit 2, an operational amplifier circuit 3, resistors R6 and R7, a capacitor C3, and a speaker SP. The pop sound reduction circuit 2 includes a triangular wave voltage generation circuit 11, a voltage-current converter. The circuit 12 includes a control circuit 13, a reference voltage generation circuit 14 that generates and outputs a predetermined first reference voltage Vref, a capacitor C2, switches SW5 and SW6, and resistors R2 to R5. The triangular wave voltage generation circuit 11 is a triangular wave voltage generation circuit unit, the voltage / current conversion circuit 12 is a voltage / current conversion circuit unit, the control circuit 13, the reference voltage generation circuit 14, the switches SW5 and SW6, and the resistors R2 to R5 are control circuits. Each part.

The operational amplifier circuit 3, the resistors R6 and R7, and the capacitor C3 form a power amplifier circuit, which amplifies the audio signal input to the input terminal IN and generates sound corresponding to the audio signal from the speaker SP. Since the configuration of the power amplifier circuit is general, its description is omitted.
The triangular wave voltage generation circuit 11 includes PMOS transistors M1 to M3, NMOS transistors M4 and M5, a constant current source 21 that supplies a predetermined constant current i1, switches SW1 and SW2, and a capacitor C1. The PMOS transistors M1 to M3 form a current mirror circuit, each source is connected to the power supply voltage Vdd, each gate is connected, and the connection is connected to the drain of the PMOS transistor M1. A current source 21 is connected between the drain of the PMOS transistor M1 and the ground voltage Vss, and the drain of the PMOS transistor M2 is connected to the drain of the NMOS transistor M4.

  The NMOS transistors M4 and M5 form a current mirror circuit, each source is connected to the ground voltage Vss, each gate is connected, and the connection is connected to the drain of the NMOS transistor M4. Switches SW1 and SW2 are connected in series between the drain of the PMOS transistor M3 and the drain of the NMOS transistor M5, and the connection between the switches SW1 and SW2 is connected to the output terminal T1 of the triangular wave voltage generation circuit 11, and the connection is made. A capacitor C1 is connected between the capacitor and the ground voltage Vss. The switches SW1 and SW2 perform a switching operation according to control signals SC1 and SC2 from the control circuit 13. Note that the output voltage output from the output terminal T1 is VT1.

  The voltage-current converter circuit 12 includes an operational amplifier circuit 22, PMOS transistors M6 to M9, NMOS transistors M10 to M12, switches SW3 and SW4, and a resistor R1. The inverting input terminal of the operational amplifier circuit 22 is connected to the output terminal T1, and the output terminal of the operational amplifier circuit 22 is connected to the gates of the PMOS transistors M6 and M7. The source of the PMOS transistor M6 is connected to the power supply voltage Vdd, and a resistor R1 is connected between the drain of the PMOS transistor M6 and the ground voltage Vss. A connection portion between the PMOS transistor M6 and the resistor R1 is connected to a non-inverting input terminal of the operational amplifier circuit 22. The source of the PMOS transistor M7 is connected to the power supply voltage Vdd, and the drain of the PMOS transistor M7 is connected to the drain of the NMOS transistor M10.

  The NMOS transistors M10 to M12 form a current mirror circuit, each source is connected to the ground voltage Vss, each gate is connected, and the connection is connected to the drain of the NMOS transistor M10. The PMOS transistors M8 and M9 form a current mirror circuit, each source is connected to the power supply voltage Vdd, each gate is connected, and the connection is connected to the drain of the PMOS transistor M8. The drain of the PMOS transistor M8 is connected to the drain of the NMOS transistor M11, and switches SW3 and SW4 are connected in series between the drain of the PMOS transistor M9 and the drain of the NMOS transistor M12. A connection portion between the switches SW3 and SW4 is connected to the output terminal T2 of the voltage-current conversion circuit 12, and the switches SW3 and SW4 perform a switching operation according to the control signals SC3 and SC4 from the control circuit 13. Note that the output voltage output from the output terminal T2 is VT2.

  A resistor R2 and a switch SW5 are connected in series between the output terminal T2 and the first reference voltage Vref, and a resistor R3 and a switch SW6 are connected in series between the output terminal T2 and the ground voltage Vss. A capacitor C2 is connected. The switches SW5 and SW6 perform a switching operation in accordance with control signals SC5 and SC6 from the control circuit 13. Resistors R4 and R5 are connected in series between the first reference voltage Vref and the ground voltage Vss, and a connection portion between the resistors R4 and R5 is connected to the control circuit 13. The first reference voltage Vref is divided to Vref / 2 by the resistors R4 and R5 and input to the control circuit 13. The control circuit 13 is supplied with a bias control signal BCNT from the outside.

The output terminal T2 is connected to the non-inverting input terminal of the operational amplifier circuit 3, and a resistor R6 is connected between the input terminal IN and the inverting input terminal of the operational amplifier circuit 3. A resistor R7 is connected between the inverting input terminal and the output terminal of the operational amplifier circuit 3, one end of the capacitor C3 is connected to the output terminal of the operational amplifier circuit 3, and the other end of the capacitor C3 and the ground voltage Vss. Is connected to a speaker SP.
In such a configuration, the configuration of the power amplifier circuit including the operational amplifier circuit 3, the resistors R6 and R7, and the capacitor C3 is a general configuration, and thus the description thereof is omitted.

FIG. 2 is a timing chart showing examples of waveforms of signals and voltages of the pop noise reduction circuit 2 of FIG. 1, and is a diagram showing an operation example of the pop noise reduction circuit 2 of FIG. The operation of the pop noise reduction circuit 2 of FIG. 1 will be described with reference to FIG.
When the audio circuit 1 is activated, the bias control signal BCNT rises to a high level at time t1. Before time t1, the switches SW1 to SW5 are turned off and the switch SW6 is turned on. At the same time when the bias control signal BCNT changes from the low level to the high level, the switch SW6 is turned off. At a later time t2, the switches SW1 and SW3 are turned on to bring them into conduction.

  Since the constant current source 21 is connected to the drain of the PMOS transistor M1, the drain current id1 of the PMOS transistor M1 is the same as the constant current i1 supplied from the constant current source 21. Since the PMOS transistors M1 to M3 form a current mirror circuit, the drain currents id2 and id3 of the PMOS transistors M2 and M3 are proportional to the constant current i1, respectively. Further, the drain current id2 of the PMOS transistor M2 becomes the drain current id4 of the NMOS transistor M4. Since the NMOS transistors M4 and M5 also form a current mirror circuit, the drain current id5 of the NMOS transistor M5 is also proportional to the constant current i1. When transistors having the same characteristics are used as the PMOS transistors M2 and M3 and the NMOS transistors M4 and M5, the drain currents id3 and id5 of the PMOS transistor M3 and the NMOS transistor M5 are equal.

  Here, when the switch SW1 is turned on and becomes conductive, the drain current id3 of the PMOS transistor M3 is all supplied to the capacitor C1, and the output voltage VT1, which is the terminal voltage of the capacitor C1, is linearly shown in FIG. The voltage rises and is input to the voltage-current conversion circuit 12. The output voltage VT1 is input to the inverting input terminal of the operational amplifier circuit 22, and the operational amplifier circuit 22 has a PMOS transistor so that the voltage drop due to the resistor R1 connected to the non-inverting input terminal becomes equal to the output voltage VT1. Control the gate voltage of M6. That is, the drain current id6 of the PMOS transistor M6 becomes a current proportional to the output voltage VT1. Since the gate of the PMOS transistor M7 is also connected to the output terminal of the operational amplifier circuit 22, the drain current id7 of the PMOS transistor M7 is also a current proportional to the output voltage VT1.

  Since the drain current id7 of the PMOS transistor M7 becomes the drain current id10 of the NMOS transistor M10 and the NMOS transistors M10 to M12 form a current mirror circuit, the drain currents id11 and id12 of the NMOS transistors M11 and M12 are also output voltage VT1. The current is proportional to. Further, the drain current id11 of the NMOS transistor M11 becomes the drain current id8 of the PMOS transistor M8, and the PMOS transistors M8 and M9 also form a current mirror circuit. Therefore, the drain current id9 of the PMOS transistor M9 also becomes the output voltage VT1. Proportional current.

  When transistors having the same characteristics are used as the NMOS transistors M11 and M12 and the PMOS transistors M8 and M9, the drain currents id9 and id12 of the PMOS transistor M9 and the NMOS transistor M12 are equal. Here, when the switch SW3 is turned on, the drain current id9 of the PMOS transistor M9 is all supplied to the capacitor C2, and the output voltage VT2, which is the terminal voltage of the capacitor C2, rises slowly as shown in FIG. Creates a waveform that increases the ascending speed.

  The control circuit 13 receives the output voltage VT2 of the voltage-current conversion circuit 12 and the divided voltage Vref / 2 generated by dividing the first reference voltage Vref by the resistors R4 and R5. When the control circuit 13 detects that the output voltage VT2 has reached the divided voltage Vref / 2 at time t3, the control circuit 13 turns off the switch SW1 and turns on the switch SW2. Then, the electric charge stored in the capacitor C1 is discharged through the switch SW2 and the NMOS transistor M5. Since the drain current id5 of the NMOS transistor M5 is the same as the drain current id3 of the PMOS transistor M3 as described above, the voltage decrease rate of the capacitor C1 is the same as the increase rate during charging. Therefore, as shown in FIG. 2, the output voltage VT1 of the triangular wave voltage generation circuit 11 decreases linearly with the same slope as that when rising, and the charging speed of the capacitor C2 by the voltage-current conversion circuit 12 is turned on by the switch SW1. Contrary to the time when I was doing, it becomes slower with the passage of time.

  The peak voltage of the output voltage VT1 forming the triangular wave voltage is a voltage when the output voltage VT2 of the voltage-current conversion circuit 12 reaches the divided voltage Vref / 2, and therefore when the output voltage VT1 returns to the ground voltage Vss. The output voltage VT2 of the voltage-current conversion circuit 12 reaches the first predetermined value in the vicinity of the first reference voltage Vref. In this state, discharging of the capacitor C1 and charging of the capacitor C2 are stopped. For this reason, the control circuit 13 switches the switch SW2 and the switch SW3 at the time t4 when the discharge of the capacitor C1 and the charging of the capacitor C2 are considered to have stopped after the switch SW2 is turned on, or at the time t4 slightly after the time Are turned off and the switch SW5 is turned on.

When the switch SW2 is turned off, the discharging path to the capacitor C1 by the NMOS transistor M5 is cut off, and when the switch SW3 is turned off, the charging path to the capacitor C2 by the PMOS transistor M9 is cut off. When the switch SW5 is turned on, the capacitor C2 is connected to the first reference voltage Vref via the resistor R2. Therefore, even if the voltage of the capacitor C2 is slightly deviated from the first reference voltage Vref at time t4, the switch By turning on SW5, the voltage of the capacitor C2 becomes equal to the first reference voltage Vref. Therefore, when the audio circuit 1 is operating, the non-inverting input terminal of the operational amplifier circuit 3 is always at the first reference voltage Vref.
As described above, when the power supply is started up by turning on the power supply, the reference voltage of the power amplifier circuit may be raised with a voltage waveform that is ½ of the first reference voltage Vref and a vertically symmetrical voltage waveform. In addition, since there is no inflection point in the middle of rising, unnecessary harmonic components can be reduced and pop noise can be greatly reduced.

Next, a case where the operation of the audio circuit 1 is stopped will be described.
When the audio circuit 1 stops operating, the bias control signal BCNT becomes a low level at time t5. Then, the control circuit 13 turns off the switch SW5 and turns on the switches SW1 and SW4 at time t6 after a predetermined time has elapsed. When the switch SW5 is turned off, the charging of the capacitor C2 by the first reference voltage Vref is stopped. Since the operation of the triangular wave voltage generation circuit 11 when the switch SW1 is turned on is exactly the same as that when the audio circuit 1 is activated, the description thereof is omitted.

When the switch SW4 is turned on, the charge of the capacitor C2 is discharged via the switch SW4 and the NMOS transistor M12. For this reason, the output voltage VT2 of the voltage-current conversion circuit 12 gradually decreases at the beginning as shown in FIG. 2, and gradually decreases.
When the output voltage VT2 reaches half the first reference voltage Vref at time t7, the control circuit 13 turns off the switch SW1 and turns on the switch SW2. Then, since the output voltage VT1 starts to decrease as in the case of power-on, the rate of decrease of the output voltage VT2 becomes gradually slower. When all the discharge of the capacitor C1 is finished, the discharge of the capacitor C2 is also finished.

  The control circuit 13 turns off the switch SW2 and the switch SW4 and turns on the switch SW6 at time t8 when the discharge of the capacitor C1 is completed or slightly longer than that after the switch SW2 is turned on. Let When the switch SW2 is turned off, the discharge path of the capacitor C1 by the NMOS transistor M5 is cut off, and when the switch SW4 is turned off, the discharge path of the capacitor C2 by the NMOS transistor M12 is cut off. When the switch SW6 is turned on, the capacitor C2 is connected to the ground voltage Vss via the resistor R3, and the voltage of the capacitor C2 becomes completely 0V even if some charge remains in the capacitor C2 at time t8.

  As described above, when the operation is stopped like when the power is turned off, the pop noise reduction circuit capable of using the reference voltage symmetrical to the start-up as the power amplifier circuit output is provided. The pop sound can be greatly reduced.

In the above description, the time t4 and the time t8 are set by the time after the switch SW2 is turned on. However, the determination of the time t4 and the time t8 is performed by the control circuit 13 to the output of the triangular wave voltage generation circuit 11. The voltage VT1 is input, and the control circuit 13 monitors the output voltage VT1 when the capacitor C1 is discharged, and detects that the output voltage VT1 has reached a second predetermined value near the ground voltage Vss at time t4. Alternatively, it may be time t8.
Furthermore, the first reference voltage Vref may be input to the control circuit 13, and the time point when the output voltage VT2 when the capacitor C2 is charged becomes the first predetermined value near the first reference voltage Vref may be set as time t4.

1 is a diagram illustrating a circuit example of an audio circuit according to a first embodiment of the present invention. 3 is a timing chart showing waveform examples of signals and voltages of the pop noise reduction circuit 2 of FIG. 1. It is the circuit diagram which showed the example of the conventional pop sound reduction circuit. 4 is a timing chart showing an operation example of the circuit of FIG. 3.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Audio circuit 2 Pop sound reduction circuit 3,22 Operational amplifier circuit 11 Triangular wave voltage generation circuit 12 Voltage-current conversion circuit 13 Control circuit 14 Reference voltage generation circuit 21 Constant current source C1-C3 Capacitor SW1-SW6 Switch R1-R7 Resistance M1- M3, M6 to M9 PMOS transistor M4, M5, M10 to M12 NMOS transistor SP Speaker

Claims (4)

A reference voltage is input to one input terminal and an audio signal is input to the other input terminal, and a power amplifier circuit configured by a differential amplifier circuit that amplifies the input audio signal and outputs the amplified audio signal to a speaker; In an audio circuit comprising a pop sound reduction circuit that reduces pop sound generated from the speaker when the amplifier circuit is activated and stopped,
The pop noise reduction circuit is
In accordance with the input control signal, a triangular wave voltage generation circuit unit that generates and outputs a triangular wave voltage forming a predetermined triangular wave;
A voltage-current conversion circuit unit that generates a proportional current proportional to the triangular wave voltage generated by the triangular wave voltage generation circuit unit;
A capacitor charged and discharged by the output current of the voltage-current converter circuit unit;
A control circuit unit that controls the operation of the triangular wave voltage generation circuit unit and controls the output of the proportional current generated for the voltage-current conversion circuit unit;
With
The control circuit unit causes the triangular wave voltage generation circuit unit to output the triangular wave voltage when starting up the power amplifier circuit, and charges the capacitor with an output current of the voltage-current conversion circuit unit. An audio circuit, wherein a terminal voltage is supplied to the differential amplifier circuit as the reference voltage.   The control circuit unit outputs the triangular wave voltage to the triangular wave voltage generation circuit unit and discharges the capacitor by the output current of the voltage-current conversion circuit unit when the operation of the power amplifier circuit is stopped. The audio circuit according to claim 1.   The control circuit unit outputs the first reference voltage to the terminal of the capacitor when the terminal voltage of the capacitor becomes equal to a first predetermined value in the vicinity of the predetermined first reference voltage when the power amplifier circuit is activated. The audio circuit according to claim 1 or 2, wherein   The control circuit unit connects the terminal of the capacitor to the ground voltage when the terminal voltage of the capacitor becomes equal to a second predetermined value near the ground voltage when the operation of the power amplifier circuit is stopped. Item 4. The audio circuit according to item 1, 2 or 3.

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