JP2010016640A - Image processor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image processor for obtaining a high-quality image while suppressing the increase of a circuit scale. <P>SOLUTION: An image feature extraction circuit 11 collects input image data IN from the latter half of the period of a frame N-1 to the first half of the period of the next frame N, and extracts features of the image data IN, a compensation factor calculation circuit 20 calculates a compensation factor to be set in the period of a frame N+1 in accordance with the extracted features after the end of the first half of the frame N, and an image compensation calculation circuit 30 reflects the compensation factor on image data of the frame N+1. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an image processing apparatus having an image correction arithmetic circuit that corrects image data input in each of a plurality of frame periods divided by a blanking period in accordance with a correction condition set for each frame period. About.

  Conventionally, an image display device including the above-described image processing device is known. In recent years, as such an image display device, a flat panel display has been rapidly spread, and a liquid crystal display has become a mainstream among them.

  However, compared with other displays such as a cathode ray tube (CRT) display, the liquid crystal display is a ratio between the highest displayable luminance and the luminance when the lowest gradation is displayed in a dark place. "Is low. Therefore, in order to improve that the “dark place contrast” is low, the above-described image processing apparatus extracts features in each frame (input frame) period of the input image data, and according to the extracted features. Thus, a gamma correction curve is changed in each frame (output frame) period of output image data, and gain adjustment and backlight brightness control are performed.

  FIG. 3 is a block diagram showing a configuration of a conventional image processing apparatus.

  The image processing apparatus 100 shown in FIG. 3 includes an image feature extraction circuit 110, a correction coefficient calculation circuit 120, and an image correction calculation circuit 130.

  Image feature extraction circuit 110 receives image data IN, vertical synchronization signal VSYNC, and data valid signal DE. The image represented by the image data IN is composed of a plurality of frames, and each frame is composed of a plurality of lines. The vertical synchronization signal VSYNC is input in synchronization with each frame. Further, the data valid signal DE is a signal that becomes an effective level for each line constituting the frame, and the image data IN is sent to the image feature extraction circuit 110 during a period in which the data valid signal DE is at an effective level. Collected.

  The image feature extraction circuit 110 calculates the maximum value, minimum value, average luminance level (APL: Average Picture Level), and histogram distribution of the collected image data IN to extract and extract the features of the image data IN. A signal representing the feature is output to the correction coefficient calculation circuit 120.

  The correction coefficient calculation circuit 120 receives a signal representing the feature output from the image feature extraction circuit 110, and performs correction coefficient calculation based on this signal. Specifically, a lookup table (LUT) for creating a curve for correcting image data is calculated and set.

  The image correction arithmetic circuit 130 corrects the input image data IN using the look-up table (LUT) set by the correction coefficient arithmetic circuit 120 and outputs it as image data OUT.

  FIG. 4 is a timing chart of the image processing apparatus shown in FIG.

  FIG. 4 shows the vertical synchronization signal VSYNC and the image data IN. The image represented by the image data IN is composed of a plurality of frames N-1, N, N + 1,. The vertical synchronization signal VSYNC is input in synchronization with each frame N-1, N, N + 1,. FIG. 4 shows a vertical blanking period which is a period between the end point of one frame (for example, frame N-1) constituting the image represented by the image data IN and the head of the next one frame (for example, frame N). A is shown.

  In the image processing apparatus 100, when the head line constituting the frame N-1 (input frame) is input, feature extraction in the frame N-1 is started. Further, when the input of the last line constituting the frame N-1 is completed, the feature extraction in the frame N-1 is completed. Next, in the vertical blanking period A, a correction coefficient is calculated (abbreviated as coefficient calculation) based on the extracted features. Here, B is a period required for coefficient calculation. Next, the result of the coefficient calculation is reflected in the next frame N (output frame). In the following, also in the frame N, the frame N + 1,..., The coefficient calculation (period B) is performed in the vertical blanking period A in the same manner as the frame N-1, and the result of these coefficient calculations is the frame N + 1,. It is reflected in.

Here, it is necessary to finish the calculation of the correction coefficient within the vertical blanking period A for the reason described below.
(1) The image processing apparatus 100 may receive image data IN representing a moving image. In a moving image, since the image continues to change, it is necessary to advance the timing for reflecting the feature extraction result in the output frame.
(2) When the correction coefficient is switched in the middle of the output frame, image quality degradation such as flickering occurs on the screen.

Therefore, a measure for reducing the time required for calculating the correction coefficient and terminating the calculation of the correction coefficient within the vertical blanking period A has been proposed. As one of them, a technique has been proposed in which an analysis window is provided on a screen and a correction coefficient is calculated based on image data in the analysis window (see Patent Document 1).
JP 2005-509340 A

  However, in the technique proposed in Patent Document 1 in which an analysis window is provided on the screen, if there is a feature in a portion of the screen other than the analysis window, the feature is not extracted. Therefore, a correction coefficient calculation process corresponding to the feature is not performed. Will not be done. Therefore, it is difficult to obtain a high-quality image.

  Here, in order to shorten the time required to calculate the correction condition including the correction coefficient, it is conceivable to use a parallel processing circuit for high-speed calculation. However, the use of such a parallel processing circuit causes a problem that the circuit scale increases.

  In view of the above circumstances, an object of the present invention is to provide an image processing apparatus capable of obtaining a high-quality image while suppressing an increase in circuit scale.

An image processing apparatus of the present invention that achieves the above object corrects image data input in each of a plurality of frame periods divided by a blanking period in accordance with a correction condition set for each frame period. In an image processing apparatus having an image correction arithmetic circuit,
An image feature extraction circuit that collects input image data from the second half of the first frame period to the first half of the second frame period following the first frame period and extracts the characteristics of the collected image data When,
And a correction condition calculation circuit that calculates the correction condition according to the feature extracted by the image feature quantity extraction circuit after the end of the first half of the second frame period.

  The image processing apparatus of the present invention collects input image data from the second half of the first frame period to the first half of the next second frame period, extracts the characteristics of the image data, and extracts the second frame period. After the end of the first half, the correction condition set for each frame period is calculated according to the extracted features. In this configuration, since the correction condition is calculated after the first half of the second frame period, the time (period) required to calculate the correction condition can be secured longer than the blanking period. Therefore, a high-quality image can be obtained as compared with the conventional technique in which an analysis window is provided on the screen in order to finish the calculation of the correction coefficient within the vertical blanking period. Further, in order to shorten the time required to calculate the correction condition, it is not necessary to use a parallel processing circuit for high-speed computation, and an increase in circuit scale can be suppressed.

  Here, the length of the blanking period is measured, and the correction condition is calculated by the correction condition calculation circuit in accordance with the measured blanking period, after the second frame period. It is preferable to further include a blanking period measuring circuit that sets a start time in the second half of the first frame period so that the period ends before the start of the first frame period.

  In this way, it is possible to flexibly cope with the case where the length of the blanking period changes variously.

  It is also a preferable aspect that the latter half of the first frame period and the first half of the second frame period are periods in which image data for one frame is input together.

  In this way, it is possible to extract the features of the entire frame, and calculate the correction conditions for the image data according to the features.

  According to the present invention, it is possible to provide an image processing apparatus capable of obtaining a high-quality image while suppressing an increase in circuit scale.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a block diagram showing a configuration of an image processing apparatus according to an embodiment of the present invention, and FIG. 2 is a timing chart of the image processing apparatus shown in FIG.

  The image processing apparatus 1 shown in FIG. 1 includes an image feature extraction unit 10, a correction coefficient calculation circuit 20, and an image correction calculation circuit 30.

  The image feature extraction unit 10 includes an image feature extraction circuit 11, an extraction start signal generation circuit 12, and a vertical blanking period measurement circuit 13. The extraction start signal generation circuit 12 includes a register 12a.

  Image feature extraction circuit 11 receives image data IN, vertical synchronization signal VSYNC, and data valid signal DE. As shown in FIG. 2, the image represented by the image data IN is composed of a plurality of frames N-1, N, N + 1,..., And each of the frames N-1, N, N + 1,. It consists of a line. The vertical synchronization signal VSYNC is input in synchronization with each frame. Further, the data valid signal DE is a signal that becomes an effective level (“H” level) for each line constituting the frame, and the image feature extraction circuit 11 performs the following during the period of the “H” level. In this way, the image data IN is collected, and the characteristics of the collected image data IN are extracted.

  As shown in FIG. 2, the image feature extraction circuit 11 receives the input image data IN from the second half of the period of the frame N-1 (corresponding to the second half of the first frame period in the present invention). Collected over the first half of the period of the next frame N after the N-1 period (corresponding to the first half of the second frame period in the present invention). In the present embodiment, the second half of the period of frame N-1 and the first half of the period of frame N are periods in which image data for one frame is input together. Specifically, the period during which the image feature extraction circuit 11 collects the image data IN is from the M line, which is the first line in the second half of the frame N-1, to the first half of the frame N period, as shown in FIG. This is a region (feature extraction region (frames N-1, N)) for one frame to which image data IN for one frame up to the last line M-1 is input.

  Further, the image feature extraction circuit 11 extracts features of the image data IN collected during a period of one frame. More specifically, in response to an extraction start signal from an extraction start signal generation circuit 12 to be described later, an area for one frame from the M line of frame N-1 to the M-1 line of frame N (feature extraction area (frame N The features of the image data IN are extracted by calculating the maximum value, the minimum value, the average luminance level (APL: Average Picture Level), the histogram distribution, and the like of the image data IN in (−1, N)). A signal representing the extracted feature is output to the correction coefficient calculation circuit 20.

  The correction coefficient calculation circuit 20 corresponds to an example of the correction condition calculation circuit according to the present invention, and after the completion of the M-1 line of the frame N, the correction coefficient calculation circuit 20 is based on the signal representing the feature from the image feature amount extraction circuit 11. Correction coefficient calculation (abbreviated as coefficient calculation) corresponding to an example of calculation of correction conditions is performed. Specifically, for example, a lookup table (LUT) for creating a curve for correcting image data is calculated and set. The period required for coefficient calculation is B. In the example shown in the figure, this period B is longer than the vertical blanking period A. In other words, the vertical blanking period A is shorter than the period B required for coefficient calculation.

  The image correction arithmetic circuit 30 corrects the input image data IN using the look-up table (LUT) set by the correction coefficient arithmetic circuit 20 and outputs it as image data OUT. Specifically, the correction coefficient calculation circuit 20 performs image data IN in an area corresponding to one frame from the M line of the frame N-1 to the M-1 line of the frame N (feature extraction area (frames N-1, N)). The image data IN in the period of the frame N + 1 is corrected and output to the outside as the image data OUT using the look-up table (LUT) set by extracting the features and calculating the coefficient (period B).

  Hereinafter, in the same way, the feature of the image data IN in the region for one frame from the M line of the frame N to the M-1 line of the frame N + 1 (feature extraction region (frame N, N + 1)) is extracted to perform coefficient calculation ( Period B), and using the look-up table (LUT) set thereby, the image data IN in the period of frame N + 2 is corrected and output to the outside as image data OUT.

  Here, the extraction start signal output from the extraction start signal generation circuit 12 described above is generated as follows.

  A signal from the vertical blanking period measurement circuit 13 or an external setting signal EXT described later is input to the register 12 a included in the extraction start signal generation circuit 12.

  The vertical blanking period measurement circuit 13 corresponds to an example of a blanking period measurement circuit according to the present invention, and measures the length of the vertical blanking period A by measuring a period during which the data valid signal DE is invalid between frames. Measure. Further, the coefficient calculation performed by the correction coefficient calculation circuit 20 is the frame N + 1 next to the period of the frame N according to the measured length of the vertical blanking period A and the length of the period B required for the coefficient calculation by the correction coefficient calculation circuit 20. The start time of the second half of the period of the frame N-1 is set in the register 12a so as to end by the start of the period (corresponding to the third frame period in the present invention). Here, it is preferable to set the start time of the second half of the period of the frame N-1 at the start of the M line and collect image data from the beginning of the M line. For this purpose, it is preferable that the vertical blanking period measurement circuit 13 has a function of measuring the start timing of each line by measuring the timing at which the data valid signal DE becomes valid corresponding to each line.

  The extraction start signal generation circuit 12 outputs a signal representing the start time (M line start time) in the second half of the period of the frame N-1 set in the register 12a to the image feature extraction circuit 11 as an extraction start signal. In this way, the extraction start signal generation circuit 12 generates an extraction start signal for setting the feature extraction region (frames N−1 and N).

  Although the example in which the start time of the second half of the period of the frame N-1 is set by the signal from the vertical blanking period measurement circuit 13 is set in the register 12a, the external setting signal EXT from the outside is described. Can also be set. For example, when applied to an apparatus to which image data having various blanking periods is input, such as a computer monitor apparatus, a vertical blanking period measuring circuit 13 is provided, and the blanking period of the input image data is determined. It is preferable that the start time in the second half of the period of the frame N-1 can be set flexibly according to the length. On the other hand, when applied to an apparatus to which image data with a fixed blanking period length is input, such as a television receiver, the vertical blanking period measuring circuit 13 is not required by setting from the outside. It is preferable that

  As shown in FIG. 2, the image processing apparatus 1 according to the present embodiment converts the input image data IN from the second half of the period of the frame N-1 (M line) to the first half of the next frame N (M-1). Line), the features of the image data IN are extracted, and after the first half of the period of the frame N, the correction coefficient set in the period of the frame N + 1 is calculated according to the extracted features. In this configuration, calculation of the correction coefficient is performed after the end of the first half of the period of the frame N, so that a period B required for calculation of the correction coefficient is secured longer than the vertical blanking period A as shown in FIG. be able to. Therefore, a high-quality image can be obtained as compared with the conventional technique of providing an analysis window on the screen in order to finish the calculation of the correction coefficient within the vertical blanking period A. Further, in order to shorten the time required for calculating the correction coefficient, it is not necessary to use a parallel processing circuit for high-speed calculation, and an increase in circuit scale can be suppressed.

1 is a block diagram illustrating a configuration of an image processing apparatus according to an embodiment of the present invention. 2 is a timing chart of the image processing apparatus shown in FIG. It is a block diagram which shows the structure of the conventional image processing apparatus. 4 is a timing chart of the image processing apparatus shown in FIG. 3.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Image processing apparatus 10 Image feature extraction part 11 Image feature extraction circuit 12 Extraction start signal generation circuit 12a Register 13 Vertical blanking period measurement circuit 20 Correction coefficient calculation circuit 30 Image correction calculation circuit

Claims (3)

In an image processing apparatus having an image correction arithmetic circuit that corrects image data input in each of a plurality of frame periods divided by a blanking period in accordance with a correction condition set for each of the frame periods.
An image feature extraction circuit that collects input image data from the second half of the first frame period to the first half of the second frame period following the first frame period, and extracts the characteristics of the collected image data When,
An image processing apparatus comprising: a correction condition calculation circuit that calculates the correction condition according to the feature extracted by the image feature amount extraction circuit after the end of the first half of the second frame period.   The length of the blanking period is measured, and the correction condition is calculated by the correction condition calculation circuit in accordance with the measured blanking period, and the third frame period after the second frame period is calculated. The image processing apparatus according to claim 1, further comprising a blanking period measurement circuit that sets a start time in the second half of the first frame period so as to end before the start of the first frame period.   The second half of the first frame period and the first half of the second frame period are periods in which image data for one frame is input together. Image processing device.

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