JP2010003846A - Method and device for manufacturing semiconductor wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method and a device for manufacturing a semiconductor wafer, and the semiconductor wafer, in which a roll-off of an edge portion is reduced while an increase of manufacturing processes of the semiconductor wafer is suppressed. <P>SOLUTION: The method of manufacturing the semiconductor wafer includes: a single-wafer etching step of etching the upper surface and lower surface of the wafer while injecting an etchant thereto; and a mirror surface polishing step of polishing and finishing the upper surface into a mirror surface with a polishing pad while applying the polishing pad to the upper surface of the wafer and applying pressure from the lower surface of the wafer, wherein the edge portion of the lower surface of the wafer is subjected to roll-off processing before the mirror surface polishing process. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a semiconductor wafer manufacturing method and apparatus for manufacturing a semiconductor wafer by surface processing a wafer obtained by slicing a semiconductor single crystal ingot.

Generally, a silicon wafer (semiconductor wafer) is manufactured by flattening the surface of a wafer obtained by slicing a silicon single crystal ingot through a slicing process through a grinding process, an etching process, and a polishing process with high accuracy. (See, for example, Patent Document 1).
With the recent reduction in design rules associated with higher integration of semiconductor devices, the flatness required for such silicon wafers has become increasingly severe, and it is hoped to obtain as many devices as possible from a single wafer. Rarely, along with the increase in the diameter of silicon wafers, there is a demand for a flat shape up to the entire surface of the wafer, particularly the edge (outer peripheral edge).

In particular, the measurement exclusion range (Edge Exclusion) of the flatness (flatness) of the wafer surface is 3 mm from the peripheral edge of the wafer, but now it has been reduced to 2 mm, and further reduced to 1 mm. There is also a need to make it easier.
However, since a polishing cloth is used in the mirror polishing process of a silicon wafer, the corners of the edge portion are usually rounded as shown in FIG. 13, so-called “edge roll-off (hereinafter also simply referred to as roll-off)” or “ It becomes a shape called "Fuchidare". 13A shows an enlarged cross section of the edge portion of the wafer [an enlarged view of the A portion of FIG. 13B], and FIG. 13B shows a cross section of the wafer. At the edge portion of the wafer, Edge roll-off occurs where the surface profile gradually falls from a reference line (a plane that can be used as a device). Of course, the smaller the roll-off amount of the edge portion, the more efficiently the wafer can be used for the device. Therefore, the roll-off amount is being reduced.

As a technique for reducing such a roll-off amount, in Patent Document 2, after a double-side polishing step, a resin protective film that suppresses polishing is formed (coated) on the front surface or both front and back surfaces of the wafer. Scratches occurred in the double-side polishing process without deteriorating the high-precision wafer shape obtained by double-side polishing by performing a mirror chamfering process to mirror-polish the edge, and then removing the resin protective film Technology that can easily remove indentations and indentations, and suppresses excessive polishing caused by the polishing pad entering the edge of the main surface of the wafer in the mirror chamfering process, thereby preventing deterioration of the wafer outer peripheral shape, particularly edge roll-off. Has been proposed.
JP 2006-1000079 A JP 2006-237055 A

However, in the case of the technique described in Patent Document 2, in order to reduce the roll-off of the edge portion of the wafer, a step of forming (applying) a resin protective film, and then removing the resin protective film. It is necessary to add a process, the manufacturing process of the silicon wafer becomes complicated, and the manufacturing time and manufacturing cost increase.
Further, the roll-off amount itself generated in the mirror polishing process cannot be reduced.

Therefore, the inventors of the present application are mirror polishing, which is a major factor for increasing the roll-off amount of the edge portion of the wafer so that the roll-off of the edge portion can be reduced while suppressing an increase in the manufacturing process of the silicon wafer. We studied the situation where the polishing pad enters the main surface of the semiconductor wafer in the process.
In the mirror polishing process, as shown in FIG. 14A, the polishing pad 3 is applied to the main surface 1a of the wafer 1 to be mirror-polished, while the back pad 4 is applied to the back surface 1b of the wafer 1. Then, the plate 5 is pressed and a processing pressure is applied to rotate the polishing pad 3 so that the main surface 1a of the wafer 1 is mirror-polished. A retainer 6 is provided on the outer periphery of the wafer 1 to support the wafer 1 from the outer periphery. At this time, as shown in the upper diagram of FIG. 14B, the polishing pad 3 wraps around the edge of the main surface 1a of the wafer 1, and the pressure distribution on the main surface 1a is as shown in FIG. 14B. As shown in the following figure, it becomes extremely large in the vicinity of the end of the main surface 1a. Since a large pressure is applied to the end portion in this way, it is considered that roll-off proceeds.

Therefore, it has been found that if the pressure distribution that increases at the end of the main surface 1a can be made to be close to the uniform distribution, the progress of roll-off can be suppressed.
The present invention has been devised in view of such problems, and pays attention to the pressure distribution applied from the polishing pad to the wafer surface in the mirror polishing process, and this pressure distribution is a problem in the vicinity of the surface edge of the wafer. An object of the present invention is to provide a semiconductor wafer manufacturing method and apparatus capable of suppressing the roll-off of the edge portion while suppressing an increase in the manufacturing process of the semiconductor wafer.

  In order to achieve the above goal, a semiconductor wafer manufacturing method of the present invention includes a single wafer etching process in which etching is performed by injecting an etching solution onto the front and back surfaces of a wafer obtained by slicing a single crystal ingot, respectively. And a mirror polishing step of polishing the surface to a mirror surface with the polishing pad while applying a pressure from the back surface of the wafer by applying a polishing pad to the surface of the wafer, and before the mirror polishing step The edge portion of the back surface of the wafer is roll-off processed (Claim 1).

The roll-off process is preferably performed in the etching step (claim 2).
The etching step is preferably a single wafer etching step in which etching is performed by spraying an etching solution while rotating the wafer with respect to the front surface and the back surface of the wafer.

In this case, in the single wafer etching process, etching is performed while rotating the wafer and moving the nozzle for injecting the etching solution in the radial direction, and moving the nozzle and / or the etching solution from the nozzle. It is preferable to perform the roll-off processing of the back edge portion of the wafer by adjusting the injection amount.
Alternatively, in the single wafer etching step, it is preferable to perform the roll-off processing of the back edge portion of the wafer by suppressing the treatment that promotes the reaction of the etching solution at the edge portion of the back surface of the wafer. (Claim 5).

Furthermore, the etching amount for the roll-off processing is the roll-off amount formed at the edge portion of the surface of the wafer by the polishing pad when the mirror polishing process is performed without performing the roll-off processing. It is preferable to set based on (Claim 6).
In addition, the semiconductor wafer manufacturing apparatus of the present invention includes a rotation driving device that rotationally drives a wafer obtained by slicing a single crystal ingot, an etching solution injection device that injects an etching solution onto the front or back surface of the wafer, And a control device for controlling the rotation driving device and the etching solution injection device, and the rotation driving device and the etching solution injection device spray the etching solution on the front or back surface of the wafer while rotating the wafer. A single wafer etching apparatus that performs etching, a mirror polishing apparatus that applies a polishing pad to the surface of the wafer and applies a pressure from the back surface of the wafer while polishing the surface to a mirror surface by the polishing pad, and the rotational drive A control device for controlling the apparatus, the etching solution injection device, and the mirror polishing device. By controlling the grayed liquid ejecting apparatus, it is characterized in that the edge portion of the back surface of the wafer processed roll off by the etching (claim 7).

  According to the method for manufacturing a semiconductor wafer of the present invention (Claim 1), the edge portion on the back surface of the wafer is rolled off before the mirror polishing process, for example, as in the etching process (Claim 2). In the polishing process, when the polishing pad is applied to the surface of the wafer and pressure is applied from the back surface of the wafer while the surface is polished to a mirror surface by the polishing pad, the back surface is rolled off at the edge portion of the wafer surface. Therefore, the reaction force from the back surface side of the wafer is reduced, the pressure of the polishing pad against the wafer surface is suppressed at the edge portion, and the roll-off of the surface edge portion of the wafer due to polishing of the polishing pad is suppressed. Therefore, the roll-off amount can be reduced, and more devices can be obtained from one wafer.

  Further, according to the semiconductor wafer manufacturing method (claim 3) and the semiconductor wafer manufacturing apparatus (claim 7) of the present invention, etching is performed by spraying an etching solution onto the front or back surface of the wafer while rotating the wafer. By using single-wafer etching, etching in the etching process can be performed with a high degree of freedom, and it is easy to roll off the edge portion on the back surface of the wafer by an appropriate amount. For this reason, roll-off processing is applied to the edge part on the backside of the wafer by an appropriate amount to equalize the pressure distribution on the wafer surface of the polishing pad, and roll-off of the wafer edge part by polishing the polishing pad is highly accurate. Can be suppressed.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[First Embodiment]
First, a first embodiment of the present invention will be described based on the drawings.
1 to 8 show a semiconductor wafer manufacturing method and related apparatus according to a first embodiment of the present invention, and FIG. 1 is a main part for explaining mirror polishing of an edge portion of the wafer surface (main surface). 2 is a schematic cross-sectional view, FIG. 2 is a flowchart of the manufacturing process, FIG. 3 is a schematic view of a single wafer etching apparatus used in the manufacturing process, and FIG. 4 is a schematic cross-sectional view of a single-side polishing apparatus used in the manufacturing process. 5 and 6 are diagrams for explaining the characteristics of the correspondence relationship between the stock removal distribution due to the etching of the single wafer etching apparatus and the residence time of the etching solution injection nozzle, and FIG. 7 is the etching of the single wafer etching apparatus according to the present embodiment. FIG. 8 is a diagram for explaining the effect according to the present embodiment.

In the present embodiment, an example of manufacturing a silicon wafer as a semiconductor wafer will be described.
In this embodiment, as shown in FIG. 2A, the silicon wafer (semiconductor wafer) includes a slicing step (step S10) for slicing the wafer from the silicon single crystal ingot, and a wafer sliced in the slicing step S10. A single-wafer etching process (step S20) for leaf etching and a single-side polishing process (mirror polishing process) (step S30) for polishing the wafer on one side and mirror-finishing the wafer obtained in the single-wafer etching process S20 are manufactured in this order. It has become so.
Each of the above steps will be described in detail below.

《Slicing process》
In the slicing step S10, a wafer having a predetermined thickness is sliced from the silicon single crystal ingot by a known slicing device (slicing means) such as a wire saw or an inner peripheral blade.
<< Etching process >>
The etching step S20 is performed by a single wafer etching apparatus 2 as shown in FIG. As shown in FIGS. 3A and 3C, the single wafer etching apparatus 2 includes a wafer rotating device (wafer rotating means) 10, a wafer temperature adjusting device (wafer temperature adjusting means) 20, and an etching solution. Supply device (etching solution supply means) 30, rinse solution supply device (rinse solution supply means) 40, wafer surface shape measurement device (wafer surface shape measurement means) 50, and these devices 10, 20, 30, 40 , 50, and a control device (control means) 60 for controlling.

  As shown in FIG. 3A, the wafer rotating device 10 includes a disk-shaped chuck (support means) 11 that supports the wafer, a rotating shaft 12 connected to the central portion of the chuck 11, and a rotating shaft 12. And a drive device 13 such as a motor which is connected and rotates and drives the chuck 11 via the rotation shaft 12. Here, the chuck 11 is formed in a disc shape along the shape of the wafer, but may be other than the disc shape, but is preferably a plate shape. However, the chuck 11 is not particularly limited as long as it can stably support the wafer.

  In the case of the present embodiment, the wafer temperature setting device 20 has a plurality of temperature control elements 21a and 21b provided on the surface side of the chuck 11, as shown in FIGS. The temperature control elements 21a and 21b are controlled by the control device 60, and can control the etching reaction rate at each point on the wafer surface by changing the temperature at each point on the wafer surface. Specifically, each of the temperature control elements 21a and 21b has a circular center region 11a concentric with the wafer rotation center on the upper surface of the chuck 11 and corresponding to the wafer center side position, and a peripheral portion from the outside of the center region 11a. Are arranged corresponding to the positions of the outer region 11b which is an annular shape. The temperature control elements 21a and 21b are configured to set the heat generation amount for each of the regions 11a and 11b by the control device 60.

As shown in FIG. 3A, the etching solution supply device 30 faces the wafer supported by the chuck 11, and a nozzle 31 that jets the etching solution toward the wafer, stores the etching solution, and stores the etching solution in the nozzle 31. An etchant supply unit 32 for supplying an etchant, a nozzle moving device (nozzle moving means) 33 for moving the position of the nozzle 31, and a nozzle injection state adjusting device (nozzle injection state adjusting means) for adjusting the injection state of the nozzle 31 34. As an etching solution, a mixed acid solution in which HF (hydrofluoric acid), HNO ₃ (nitric acid), and H ₃ PO ₄ (phosphoric acid) are mixed at a predetermined ratio is used.

  The nozzle moving device 33 includes a nozzle base portion 33a that supports the nozzle 31 and a guide portion 33b that guides the nozzle base portion 33a so as to be movable and restricts the position and movement of the nozzle base portion 33a in the in-plane direction. . Specifically, the guide portion 33b guides the nozzle base portion 33a so that the nozzle 31 moves in the radial direction of the wafer through the rotation center of the wafer. The guide portion 33b is supported by a support portion (not shown) so as to be rotatable in the wafer surface direction around the wafer rotation center, and the guide member 33b is rotated in the wafer surface direction, whereby the nozzle 31 is rotated. Can be moved in the wafer plane direction.

  The nozzle injection state adjusting device 34 is provided in the nozzle base 33a, and although not shown in detail, an angle adjusting device (angle adjusting means) for adjusting the angle of the nozzle 31 with respect to the nozzle base 33a and a wafer at the nozzle tip portion. A height adjusting device (height adjusting means) for adjusting the height position from the nozzle and an injection switching device (injection switching means) for switching between injection and non-injection of the etching solution from the nozzle 31.

  As shown in FIG. 3A, the rinsing liquid supply device 40 faces the wafer supported by the chuck 11, and stores a nozzle 41 for injecting a rinsing liquid such as pure water toward the wafer, and storing the rinsing liquid. The rinsing liquid supply unit 42 supplies the rinsing liquid to the nozzle 41, and an unillustrated injection switching device (injection switching means) that switches between injection and non-injection of the rinsing liquid from the nozzle 41.

The wafer surface shape measuring device 50 measures the surface shape of the wafer by a non-contact type laser reflection method, a capacitance method or the like.
As shown in FIG. 3C, the control device 60 includes a storage unit 61, a calculation unit 62, and a command unit 63, and controls the rotation speed of the rotation drive mechanism 12 of the wafer rotation device 10. The wafer rotation speed is set, the temperature control elements 21a and 21b of the wafer temperature setting device 20 are controlled to set the wafer temperature for each of the regions 11a and 11b, and the etching liquid supply unit 32 is controlled to control the etching liquid. In addition, the nozzle moving device 33 and the nozzle injection state adjusting device 34 are controlled to set the position and the injection state of the nozzle 31. Further, when the control device 60 performs etching so as to be in a predetermined state, the control device 60 stops the supply of the etching solution and supplies the rinsing solution to clean the etching solution on the wafer surface. The injection switching device and the injection switching device of the rinse liquid supply device 40 are controlled.

  Specifically, the storage unit 61 stores a first storage unit 61a that stores a concavo-convex shape (reference concavo-convex shape) on the wafer surface that is a reference after the etching process, and a second storage unit that stores a correspondence relationship between the wafer rotation speed and the etching state. A storage unit 61b, a third storage unit 61c that stores the correspondence between the wafer temperature and the etching state, a fourth storage unit 61d that stores a correspondence between the etching solution supply amount and the etching state, the position of the nozzle 31 and the etching It has a fifth storage unit 61e for storing the correspondence relationship with the state, and a sixth storage unit 61f for storing the correspondence relationship between the nozzle 31 injection angle and the etching state. These correspondences are obtained in advance by measurement.

  Here, as the reference uneven shape, the wafer surface shape before the single-side polishing step S30 defined by the processing characteristics in the single-side polishing step S30 is set with respect to the surface shape of the semiconductor wafer to be finally manufactured. Yes. Specifically, in the single-side polishing step S30, sagging is likely to occur at the peripheral portion, so that the reference uneven shape is set so that the center portion becomes concave by compensating for the sagging that occurs, In order to prevent sagging, the reference uneven shape is set so that the peripheral edge is raised.

  The computing unit 62 is input with the concavo-convex shape of the wafer surface immediately before the etching process measured by the wafer surface shape measuring device 50, and reads the reference concavo-convex shape from the first storage unit 61a. And the surface uneven | corrugated shape before an etching process and a reference | standard uneven | corrugated shape are compared, and the etching amount (in-plane machining allowance distribution) in each point of a wafer is calculated. Further, the etching state for each parameter (wafer rotation speed, wafer temperature, etching solution supply amount, nozzle position, nozzle movement pattern, spray angle) is read from the second storage unit 61b to the sixth storage unit 61f, and the read data is based on the read data. The parameters are set such that the above in-plane machining allowance distribution is obtained, and the settings are output to the command unit 63.

  The command unit 63 controls each device 10, 20, 30, 40 by sending a command to each device 10, 20, 30, 40 based on the setting of each parameter input from the calculation unit 62. Yes. For example, a command to set the wafer rotation speed to 600 rpm is sent to the wafer rotation device 10, and the nozzle position is 0, 15, 35, 60, 90, 120 from the wafer center to the nozzle moving device 33 of the etching solution supply device 30. , 135, 150 mm, and a command to move is sent.

<< Mirror polishing process (single-side polishing process) >>
Next, the mirror polishing step S30 will be described. The mirror polishing step S30 is performed by a mirror polishing apparatus 7 as shown in FIG. This single-side polishing apparatus 7 is equipped with a back pad 74 and a plate 75 in order from the surface, a polishing head 72 having a retainer 76 on the outer periphery of the back pad 74, and a polishing constant having a polishing pad (polishing cloth) 73a attached thereto. The polishing head 72 is placed in the retainer 76 and the polishing head 72 mounted on the back pad 74 by vacuum suction is pressed against the polishing surface plate 73 so that at least one of the polishing head 72 and the polishing surface plate 73 is provided. By rotating this, a polishing agent is supplied from a nozzle (not shown) and the polishing pad 73 is slid on one surface (main surface) of the wafer 1 until the surface (main surface) of the wafer 1 becomes a mirror surface. It is designed to polish chemically.

Although the case where the wafer 1 is mirror-polished while being held by the polishing head 72 by vacuum suction has been described here, a configuration may be adopted in which the polishing plate to which the wafer 1 is wax-bonded is held by the polishing head 72. Further, the number of wafers 1 to be processed may be a single wafer processing method for processing one wafer at a time or a multiple processing method simultaneously.
In the single-side polishing step S30, the allowance for the single-sided surface is set to about 0.3 μm to 2.0 μm. If the machining allowance is smaller than 0.3 μm, the roughness of the wafer surface may not be sufficiently improved. If the machining allowance is larger than 2.0 μm, the wafer shape itself will be destroyed. there is a possibility.

<Roll-off processing of wafer back edge>
By the way, in this method, it sets so that the edge part of the back surface 1b of the wafer 1 may be roll-off processed in etching process S20. That is, in the etching step S20, as shown in FIG. 2B, the back surface 1b and the front surface (main surface) 1a of the wafer 1 are etched by the back surface etching step S22 and the front surface (main surface) etching step S24, respectively. When etching the back surface 1b, the edge part of the back surface 1b is roll-off processed.

  The meaning of this roll-off process will be described. In this method, after the etching step S20, in the mirror polishing step S30, as shown in FIG. 1B, the polishing pad 73 is pressed against the main surface 1a of the wafer 1 to mirror polish the main surface 1a of the wafer 1. However, at this time, the back surface 1b of the wafer 1 is supported by the back pad 74, the plate 75, and the like, thereby generating a pressing pressure of the polishing pad 73 against the main surface 1a of the wafer 1.

  When the edge portion of the back surface 1b of the wafer 1 is processed so as to be rolled off as shown in FIG. 1A, the polishing pad 73 is removed from the wafer as shown in FIG. When pressed against one main surface 1a, the reaction force from the back surface is reduced by the amount of roll-off at the edge portion. In FIGS. 1A to 1C, the roll-off amount of the edge portion is exaggerated so that the roll-off can be clearly grasped. When the polishing pad 73 is pressed against the main surface 1a of the wafer 1, the edge portion of the roll-off processed wafer 1 is elastically deformed as shown in FIG. The edge portion of this is pressed against the polishing pad 73 by its elastic force.

  Therefore, as shown in FIG. 1D, the polishing pad 73 that has been rapidly increased in the edge portion due to the wraparound of the polishing pad 73 to the edge portion as shown in FIG. It is possible to apply the pressing pressure to the main surface 1a of the wafer 1 almost uniformly on the entire main surface 1a of the wafer 1 without increasing at the edge portion. As a result, excessive mirror polishing at the edge portion of the main surface 1a of the wafer 1 is prevented, and as shown in FIG. 1C, the main surface 1a of the wafer 1 is formed in a planar shape in a wide range close to the edge portion. Will be.

  When the roll-off processing of the edge portion of the back surface 1b of the wafer 1 is performed by an etching process, it can be performed by adjusting a machining allowance by etching. In the case of the present embodiment, since single-wafer etching is used, the machining allowance can be adjusted with a high degree of freedom. For example, as shown in FIG. 5 and FIG. 6, if the residence time (which is also considered as the reciprocal of the moving speed) when moving the nozzle 31 for injecting the etching solution in the radial direction of the wafer 1 is manipulated, the machining allowance distribution is obtained. Can be adjusted.

  The example shown in FIG. 5 shows the residence time characteristic [see FIG. 5 (b)] of the nozzle 31 in which the allowance distribution is substantially constant [see FIG. 5 (a)]. In the case of single-wafer etching, the wafer 1 is rotated around its center while jetting an etching solution, so that the jetted etching solution receives a centrifugal force on the surface of the wafer 1 and spreads outward from the jetted portion. Therefore, the etching solution sprayed near the center of the wafer 1 spreads over the entire wafer 1, but the etching solution sprayed to a location away from the center of the wafer 1 spreads only in the outer peripheral direction.

Of course, the thickness of the liquid film is the largest at the point where the etchant is sprayed, and the etching effect is correspondingly large.However, as the film spreads, the thickness of the liquid film decreases and the etching effect decreases. If the residence time of the nozzle 31 is constant, the margin distribution near the center of the wafer 1 is small and the outer periphery is larger. Therefore, when the radial position from the center of the wafer 1 at the injection point is r, as shown in FIG. 5B, the residence time T of the nozzle 31 is long near the center (r ≦ r ₁ ), ( T ₁₎ by _{(r 1 <r ≦ r 2} ) in short (T ₂₎ to be set from the outer periphery, a substantially constant as shown in FIG. 5 (a), allowance distribution R a (x) [R (x) = C (constant)].

On the other hand, the example shown in FIG. 6 shows the residence time characteristic [see FIG. 6 (b)] of the nozzle 31 as a characteristic [see FIG. 6 (a)] in which the machining allowance distribution R (x) increases toward the outer periphery. It is. As described above, when the residence time of the nozzle 31 is made constant, the machining allowance distribution is small near the center of the wafer 1 and larger than the outer periphery. It is effective to set short (T ₁ ′) near the center (r ≦ r ₁ ) and long (T ₂ ′) outside the outer periphery (r ₁ <r ≦ r ₂ ).

In order to perform roll-off processing of the edge portion of the back surface 1b of the wafer 1 using such characteristics using an etching process, in the residence time characteristics of the nozzle 31 in which the machining allowance distribution shown in FIG. It is only necessary to partially increase the residence time T of the nozzle 31 only at the edge portion. That is, as shown in FIG. 7B, the residence time T of the nozzle 31 is long in the vicinity of the center portion (r ≦ r ₁ ) and reaches the edge portion from the outer periphery of (T ₁ ) (r ₁ <r ≦ r). r ₃ ) is short (T ₂ ), and near the edge (r ₃ <r ≦ r ₃ ) is long again (T ₃ ). By setting, as shown in FIG. The machining allowance distribution R (x) is substantially constant [R (x) = C (constant)], and the machining allowance distribution R (x) can be gradually increased only at the edge portion.

Since the semiconductor wafer manufacturing method and the apparatus applicable to the manufacturing method according to the first embodiment of the present invention are configured as described above, the following operations and effects can be obtained.
Since the back surface 1b of the edge portion of the front surface 1a of the wafer 1 is roll-off processed, the polishing pad 73 is applied to the main surface 1a of the wafer 1 by applying the pressure from the back surface 1b of the wafer 1 and applying the pressure from the back surface 1b of the wafer 1. When polishing the surface 1a to a mirror surface, the reaction force from the back surface 1b side of the wafer is reduced, the pressure of the polishing pad 73 against the surface of the wafer 1 is suppressed at the edge portion, and the wafer 1 is polished by polishing the polishing pad 73. Roll-off of the surface edge portion is suppressed.

  That is, normally, as shown in FIG. 8A, in each step before the mirror polishing step, the front surface of the wafer 1 is formed substantially flat even in the vicinity of the edge portion of both the front surface 1a and the back surface 1b. For this reason, in the mirror polishing process, the polishing pad 73 wraps around the edge portion of the surface 1a of the wafer 1, and a larger pressure is applied from the polishing pad 73 to the other portion at the edge portion, and extra polishing is performed accordingly. As a result, as shown in FIG. 8B, roll-off (surface outermost circumference sagging) of the edge portion of the surface 1a of the wafer 1 occurs.

  On the other hand, according to this method, as shown in FIG. 8C, in each step before the mirror polishing step, the wafer 1 is subjected to roll-off processing in the vicinity of the edge portion of the back surface 1b. Therefore, even in the mirror polishing process, even if the polishing pad 73 wraps around the edge portion of the surface 1a of the wafer 1, the edge roll-off processed portion releases the applied pressure of the polishing pad 73, and the edge portion is also polished. The pressure can be made equal to the other portions from the pad 73, and as shown in FIG. 8 (d), roll-off (surface outermost peripheral sagging) of the edge portion of the wafer 1 surface 1a is prevented and flat (surface It can be processed into an outermost flat).

If the roll-off amount can be reduced in this way, more devices can be obtained from one wafer, and the use efficiency of the wafer can be improved.
In particular, in the case of the present embodiment, by using single-wafer etching in which etching is performed by spraying an etchant on the front or back surface of the wafer while rotating the wafer, the wafer is utilized by utilizing the high degree of freedom of single-wafer etching. Since the vicinity of the edge portion of the back surface 1b of 1 is roll-off processed, the edge portion of the back surface 1b of the wafer is rolled off by an appropriate amount so that the pressure distribution on the surface 1a of the wafer 1 of the polishing pad 73 is equalized. Roll-off of the surface edge portion of the wafer 1 due to polishing of the polishing pad 73 can be suppressed with high accuracy.

[Second Embodiment]
Next, a second embodiment of the present invention will be described with reference to FIGS.
9 and 10 show a semiconductor wafer manufacturing method according to the second embodiment of the present invention. FIG. 9 is a flowchart of the manufacturing process, and FIG. 10 is a schematic diagram of a double-side polishing apparatus used in the manufacturing process. It is. The same members and the like as those in the first embodiment will be described with the same reference numerals as those in the first embodiment.
In the second embodiment, as shown in FIG. 9, the semiconductor wafer is manufactured in a process in which a double-side polishing process S25 is added to the manufacturing process of the first embodiment. That is, a slicing step S10 for slicing a wafer from a single crystal ingot, a single wafer etching step S20 for etching the wafer sliced in the slicing step S10, and double-side polishing for the wafer etched in the single wafer etching step S20. It is manufactured through a polishing step S25 and a single-side polishing step S30 for single-side polishing the wafer polished on both sides in the double-side polishing step S25.
The apparatus used in the slicing step S10, the single wafer etching step S20, and the single-side polishing step S30 is the same as that in the first embodiment.

《Double-sided polishing process》
The newly added double-side polishing step S25 will be described. The double-side polishing step S25 is performed by a double-side polishing apparatus 8 as shown in FIG. The double-side polishing apparatus 8 is engaged with a sun gear 81 and an internal gear 82, a carrier plate 83 in which a wafer is set in the holder, an upper surface plate 84 to which a first polishing cloth 84a is attached, and a second polishing cloth. It has a lower surface plate 85 to which 85a is attached and an abrasive nozzle 86 for supplying an abrasive.

  The double-side polishing apparatus 8 holds the wafer set in the holder so as to be sandwiched between the upper surface plate 84 and the lower surface plate 85, supplies the abrasive from the abrasive nozzle 86, and the sun gear 81 and the internal gear 82. Thus, the carrier plate 83 is caused to perform a planetary motion, and the upper surface plate 84 and the lower surface plate 85 are simultaneously rotated in a relative direction, whereby both surfaces of the wafer are simultaneously mirror-polished.

In the double-side polishing step S25, it is necessary to perform mirror polishing to such an extent that the roll-off shape of the wafer back surface formed in the single wafer etching step S20 does not collapse significantly, and it is desirable to set the allowance for one surface of the surface to 10 μm or less.
Note that the double-side polishing apparatus 8 shown in FIG. 10 is an example, and the apparatus used in the double-side polishing step S25 is, for example, that the carrier plate has an upper surface plate and a lower surface plate so that the carrier plate moves circularly without rotation. A double-side polishing apparatus that always maintains and rotates a state eccentric from the rotation axis by a predetermined distance may be used. The number of wafer holding holes formed in the carrier plate may be one (single wafer type) or plural. The size of the wafer holding hole is arbitrarily changed according to the size of the semiconductor wafer to be polished. Further, using the single-side polishing apparatus as shown in FIG. 3 described above, the front and back surfaces of the wafer may be mirror-polished one side at a time. In this case, it is more preferable that the back side of the wafer is polished on one side and then the front side is polished on one side, so that the back side is processed into a roll-off shape and the front side is polished on one side.

  Since the manufacturing method of the semiconductor wafer concerning 2nd Embodiment of this invention is comprised as mentioned above, there exists an effect similar to 1st Embodiment. In addition, the double-side polishing step can improve the quality by mirror polishing of the back surface of the wafer, and can reduce the machining allowance in the subsequent single-side polishing step S30.

[Third Embodiment]
Next, with reference to FIG.11 and FIG.12, 3rd Embodiment of this invention is described.
11 and 12 show a semiconductor wafer manufacturing method according to the third embodiment of the present invention. FIG. 11 is a flowchart of the manufacturing process, and FIG. 12 is a schematic diagram of a double-side grinding apparatus used in the manufacturing process. It is. The same members and the like as those in the second embodiment will be described with the same reference numerals as those in the second embodiment.

In the third embodiment, as shown in FIG. 11, the semiconductor wafer is manufactured by a process in which a double-side grinding process S15 is further added to the manufacturing process of the second embodiment. That is, a slicing step S10 for slicing a wafer from a single crystal ingot, a double-sided grinding step (flattening step) S15 for grinding and flattening both surfaces of the wafer sliced in the slicing step S10, and a double-side grinding step S15 Single wafer etching step S20 for single wafer etching, double side polishing step S25 for double side polishing of the wafer etched in single wafer etching step S20, and single side polishing for one side of the wafer polished on both sides in double side polishing step S25 It is manufactured through the polishing step S30.
The apparatuses used in the slicing step S10, the single wafer etching step S20, the double-side polishing step S25, and the single-side polishing step S30 are the same as those in the first embodiment and the second embodiment.

《Double-sided grinding process》
The newly added double-side grinding step S15 will be described. The double-side grinding step S15 is performed by a double-side grinding apparatus 9 as shown in FIG.
The double-sided grinding device 9 meshes with the sun gear 91 and the internal gear 92, supplies a carrier plate 93 on which a wafer is set in the holder, an upper surface plate 94 and a lower surface plate 95 to which grinding wheels are attached, and abrasive grains. And a nozzle 96. Then, the double-side grinding apparatus 9 holds both surfaces of the wafer set in the holder so as to be sandwiched between the upper surface plate 94 and the lower surface plate 95, supplies abrasive grains from the nozzle 96, the sun gear 91, the internal gear 92, Thus, the carrier plate 93 is caused to perform a planetary motion, and at the same time, the upper surface plate 94 and the lower surface plate 95 are rotated in a relative direction to mechanically grind both surfaces of the wafer. As a grinding wheel to be used, a resinoid grinding wheel or a metal bond grinding wheel is desirable, and for example, it is desirable to use a grinding wheel of # 1000 to # 8000.

  In the double-side grinding step S15, when the thickness of the processing damage layer remaining on the wafer surface after double-side grinding is large, the amount of wafer etching in the subsequent etching step and the amount of wafer polishing in the double-side polishing step increase. As a result, productivity is lowered and manufacturing costs are increased. For this reason, it is effective to perform double-side grinding so that the thickness of the processing damage layer on the wafer surface during double-side grinding is 2 μm or less.

Note that the double-side grinding apparatus 9 shown in FIG. 12 is an example, and the front and back surfaces of the wafer may be ground using a single-side grinding apparatus, or after the front and back surfaces of the wafer are ground using a double-side grinding apparatus. The wafer surface side may be finish-ground with a single-side grinding apparatus.
Since the semiconductor wafer manufacturing method according to the third embodiment of the present invention is configured as described above, the same operations and effects as those of the first embodiment are achieved. In addition, the double-side grinding process can reduce the amount of processing damage that occurs when slicing a single crystal ingot, and the total etching amount itself in the single wafer etching process necessary to remove the processing damage can be reduced.

[Others]
As mentioned above, although embodiment of this invention was described, this invention is not limited to the said embodiment, A various deformation | transformation is possible in the range which does not deviate from the meaning of this invention.
For example, in the first embodiment, the residence time of the nozzle 31 in single wafer etching is manipulated to perform roll-off processing of the edge portion of the wafer. This is because the etching amount of the etching solution from the nozzle 31 (per unit time) The amount of jetting of the etching solution from the nozzle 31 is not the dwell time of the nozzle 31, but the roll even if the injection amount of the etching solution from the nozzle 31 is increased only in the vicinity of the edge portion (r ₃ <r ≦ r ₃ ). Off processing is possible. In this case, the residence time of the nozzle 31 may be constant, or both the residence time of the nozzle 31 and the injection amount of the etching solution may be used.

Further, the wafer temperature setting device 20 can be operated also in the vicinity of the edge portion, and by increasing the temperature of the wafer surface in the vicinity of the edge portion to increase the etching reaction rate, the residence time of the nozzle 31 and the jetting of the etching liquid from the nozzle 31 are performed. It is also possible to perform the roll-off processing of the edge portion without manipulating the amount.
Also in this case, it is possible to perform roll-off processing in cooperation with either or both of the residence time of the nozzle 31 and the injection amount of the etching solution from the nozzle 31.

Of course, the roll-off processing of the edge portion may use not only single-wafer etching but also a general etching process, and a combination of any or all of the etching process, the grinding process, and the double-side polishing process. You may do it.
In each of the above embodiments, the wafer temperature setting device 20 has a plurality of temperature control elements 21a and 21b provided on the surface side of the chuck 11, but the configuration is not limited thereto. Any material can be used as long as the temperature distribution in the wafer surface can be set to a desired state. For example, a wafer temperature setting device is a wafer irradiation device (wafer irradiation means) such as an infrared lamp or a laser oscillator that irradiates the wafer to set the wafer temperature, and the irradiation from the wafer irradiation device is applied to a predetermined area on the wafer. A wafer irradiation position setting device (wafer irradiation position setting means) for setting may be included. These wafer irradiating means and wafer irradiation position setting device are connected to a control device 60 to control on / off and region setting. When the wafer irradiation means is an infrared lamp, the wafer irradiation position setting device stage can be positioned between the lamp and the wafer to limit the irradiation area and the irradiation time. When the wafer irradiation means is a laser oscillator, the wafer irradiation position setting means can be a control provided in the oscillator so as to control the laser irradiation position.

  In each of the above embodiments, in addition to the wafer temperature setting device 20, an etching solution temperature setting device (etching solution temperature setting means) that sets the temperature of the etching solution, and an etching solution mixture ratio changing device that changes the mixing ratio of the etching solution. (Etching liquid mixing ratio changing means) may be provided, or only the etching liquid temperature setting device and the etching liquid mixing ratio changing device may be provided without the wafer temperature setting device 20.

  In each of the above embodiments, only a predetermined number of semiconductor wafers are sliced from the silicon single crystal ingot in the slicing step S10. However, the entire ingot may be sliced into a wafer.

It is principal part typical sectional drawing explaining the mirror polishing of the edge part of the wafer surface (main surface) which concerns on 1st Embodiment of this invention, (a) shows the state before mirror polishing, (b) is a mirror surface. The state during polishing is shown, (c) shows the state after mirror polishing, and (d) shows the pressure distribution state during mirror polishing. It is a flowchart which shows the manufacturing method of the semiconductor wafer which concerns on 1st Embodiment of this invention, Comprising: (a) shows the main flow, (b) shows the flow of the etching process. It is a schematic diagram which shows the single wafer etching apparatus used with the manufacturing method of the semiconductor wafer which concerns on 1st Embodiment of this invention. It is a typical sectional view showing the single-side polish device used with the manufacturing method of the semiconductor wafer concerning a 1st embodiment of the present invention. Explaining the characteristics of the correspondence relationship between the removal allowance distribution by etching using the single wafer etching apparatus according to the first embodiment of the present invention [FIG. 5A] and the etchant spray nozzle residence time [FIG. 5B]. It is a figure to do. Explaining the characteristics of the correspondence between the removal allowance distribution by etching using the single-wafer etching apparatus according to the first embodiment of the present invention [FIG. 6A] and the etchant spray nozzle residence time [FIG. 6B]. It is a figure to do. It is a figure explaining the etching liquid injection nozzle residence time [FIG.7 (b)] of the single wafer etching apparatus which concerns on 1st Embodiment of this invention, and the allowance distribution [FIG.7 (a)] by the etching. It is a figure explaining the effect which concerns on 1st Embodiment of this invention compared with a prior art, Comprising: (a), (b) is related with a prior art, (c), (d) is related with this embodiment. It is a flowchart which shows the manufacturing method of the semiconductor wafer which concerns on 2nd Embodiment of this invention. It is a schematic diagram which shows the double-side polish apparatus used with the manufacturing method of the semiconductor wafer which concerns on 2nd Embodiment of this invention. It is a flowchart which shows the manufacturing method of the semiconductor wafer which concerns on 3rd Embodiment of this invention. It is a schematic diagram which shows the double-sided grinding apparatus used with the manufacturing method of the semiconductor wafer which concerns on 3rd Embodiment of this invention. It is a figure explaining edge roll-off of a wafer, (a) is the profile figure which expanded the edge part of the wafer [A part enlarged view of (b)], (b) is typical sectional drawing of a wafer. It is a figure explaining the subject of this invention, (a) is a schematic diagram which shows the condition of a mirror polishing process, (b) shows the pressure distribution state of the edge part of the wafer at the time of mirror polishing.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Wafer 2 Single wafer etching apparatus 7 Single-side polishing apparatus 8 Double-side polishing apparatus

Claims (7)

A single wafer etching process in which etching is performed by spraying an etching solution onto each of the front and back surfaces of the wafer obtained by slicing the single crystal ingot, and then a polishing pad is applied to the surface of the wafer to A mirror polishing step of polishing the surface to a mirror surface with the polishing pad while applying pressure from the back surface,
A method of manufacturing a semiconductor wafer, comprising: rolling off an edge portion of the back surface of the wafer before the mirror polishing step. The method of manufacturing a semiconductor wafer according to claim 1, wherein the roll-off processing is performed in the etching step. 3. The semiconductor wafer according to claim 2, wherein the etching step is a single wafer etching step in which etching is performed by spraying an etching solution while rotating the wafer with respect to the front surface and the back surface of the wafer. Production method. In the single wafer etching step, etching is performed while rotating the wafer and moving the nozzle for injecting the etching solution in the radial direction, and the moving speed of the nozzle and / or the injection amount of the etching solution from the nozzle are set. 4. The method of manufacturing a semiconductor wafer according to claim 3, wherein the roll-off processing of the back edge portion of the wafer is performed by adjusting. In the single wafer etching step, the roll-off processing of the back edge portion of the wafer is performed by suppressing the processing for promoting the reaction of the etching solution at the edge portion of the back surface of the wafer. A method for producing a semiconductor wafer according to claim 3 or 4. The etching amount for the roll-off processing is based on the roll-off amount formed on the edge portion of the surface of the wafer by the polishing pad when the mirror polishing step is performed without performing the roll-off processing. The semiconductor wafer manufacturing method according to claim 1, wherein the semiconductor wafer manufacturing method is set. Rotation drive device that rotationally drives a wafer obtained by slicing a single crystal ingot, etching solution injection device that injects an etchant onto the front or back surface of the wafer, and controls the rotation drive device and the etchant injection device A single-wafer etching apparatus that performs etching by injecting an etching liquid onto the front or back surface of the wafer while rotating the wafer by the rotation driving apparatus and the etching liquid injection apparatus.
A mirror polishing apparatus that applies a polishing pad to the surface of the wafer and polishes the surface to a mirror surface with the polishing pad while applying pressure from the back surface of the wafer;
A control device for controlling the rotation driving device, the etching solution spraying device and the mirror polishing device;
The control apparatus rolls off the edge portion of the back surface of the wafer by the etching by controlling the etching solution spraying apparatus.

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