JP2010098907A - Overcurrent protection circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an overcurrent protection circuit capable of efficiently protecting damages of a power driver due to an overcurrent while effectively utilizing the current-resistance capability of the power driver to regulate energization of the power driver. <P>SOLUTION: The overcurrent protection circuit 11 includes a current-value decision circuit 10 capable of determining a magnitude between the overcurrent Iv running through a low-side FET 2 and a current threshold, when the time set in a timer elapses since the overcurrent Iv is generated in the low-side FET 2. The overcurrent protection circuit stops the on/off operation of the low-side FET 2 when the overcurrent Iv exceeds the current threshold. Further, the overcurrent protection circuit includes a resistor 12 for measuring the temperature rise at the low-side FET 2 to shorten the time in the timer as the temperature rises higher when the over current Iv at the low-side FET 2 detected by the resistor 12 for measuring the temperature rise. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an overcurrent protection circuit, and more particularly, to an overcurrent protection circuit that detects an overcurrent flowing in a power driver such as an FET that adjusts energization to an actuator and prevents the power driver from being damaged by heat.

  Conventionally, for vehicles such as automobiles, the angle of the side mirror is changed by using an electric motor as an actuator and a motor drive circuit that controls the rotation of the electric motor through on / off control of a power driver such as a plurality of FETs. In addition, there is known a technique for engaging a lock bar with a steering shaft when the vehicle is stopped to prevent the vehicle from being stolen. Such a motor drive circuit is provided with a gate drive circuit that controls on / off of each power driver.

  As shown in FIG. 4, the motor drive circuit 102 detects an overcurrent Iv (A) flowing through the low-side FET 2 as a power driver due to an abnormality such as a load short circuit of the electric motor (DC motor) M1. An overcurrent detection circuit 111 and an overcurrent that is detected by the overcurrent detection circuit 111 and flows through the FET 2 when a timer time as a predetermined determination time has elapsed since the occurrence of the overcurrent Iv and a preset current threshold value And a current value determination circuit 110 for determining the magnitude relationship between the current value determination circuit 110 and an oscillation circuit 113 for inputting a clock signal (CLK) to the current value determination circuit 110. Here, the overcurrent detection circuit 111 and the current value determination circuit 110 are electrically connected to the motor drive circuit 102. In FIG. 4, the high-side FET 1 and the low-side FET 2 constitute a forward rotation drive circuit (reverse drive circuit is not shown) of a bridge circuit that performs forward / reverse drive of the electric motor M1 with a single power source (Vcc). ing.

In FIG. 4, the overcurrent protection circuit 101 includes the overcurrent detection circuit 111, the current value determination circuit 110, and the oscillation circuit 113. The overcurrent protection circuit 101 forcibly stops the on / off operation of the FET 2 via the motor driving circuit 102 when overcurrent> current threshold (Iv> I _th ), and supplies the FET 2 with power. Is stopped to prevent destruction of the FET 2 due to heat (see, for example, Patent Document 1). The internal resistance R of the electric motor M1 shown in FIG. 4 is generated when the load of the electric motor M1 is short-circuited, and power is supplied to the overcurrent detection circuit 11 from the power supply (Vcc).

  As shown in FIG. 5A, in the overcurrent protection circuit 101, the overcurrent characteristic curve A rises with the occurrence of the overcurrent Iv (elapsed time t = 0 ms) in the low-side FET 2, and with the elapsed time t. , T = ta (ms) monotonously decreasing. And after t = ta, it is a constant value. In the state where the overcurrent Iv is energized (elapsed time t = 0 to ta (ms)), the temperature T (deg) of the FET 2 increases according to the temperature increase curve B. Note that the overcurrent characteristic curve A shown in FIG. 5A is predicted to gradually decrease during the elapsed time t = 0 to ta (ms), because the temperature T (deg) of the low-side FET 2 is predicted. This is because the on-resistance of the FET 2 gradually increases as the temperature rises according to the temperature rise curve B, and the overcurrent characteristic curve A has a constant value after the elapsed time t = ta. This is because the increase in on-resistance is saturated at the elapsed time t = ta.

In addition, as shown in FIG. 5B, in the current value determination circuit 110, the timer time t0 (ms) is set in advance so that the optimum value is obtained based on the overcurrent characteristic curve A. Is set using a clock signal from Then, the current value determination circuit 110 determines that the current I (A) to the low-side FET 2 exceeds the set threshold value I _th0 (A) and is determined as an overcurrent by the overcurrent detection circuit 111 (the overcurrent Iv is generated). When the timer time t0 has elapsed from the time (elapsed time t = 0 ms), the magnitude relationship between the overcurrent Iv (A) flowing through the FET 2 and the preset current threshold I _th (A) is determined. It has become. It should be noted that the timer time t0 is set in the determination of whether or not the overcurrent Iv is generated in this way because the operation of the electric motor M1 is erroneously caused when an instantaneous noise current is generated in the low-side FET 2 for some reason. It is because it is made not to stop.
JP 2004-282920 A

  However, in such an overcurrent protection circuit 101, the temperature of the low-side FET 2 rises higher than expected, so that the on-resistance of the FET 2 becomes larger than expected and a phenomenon occurs in which the overcurrent Iv is lower than the overcurrent characteristic curve A. There are things to do.

  That is, the overcurrent characteristic curve A1 shown in FIG. 5 (b) is tb <ta and is located below the overcurrent characteristic curve A, and the elapsed time t = 0 to tb (ms). It gradually decreases and becomes a constant value after the elapsed time t = tb. Therefore, when the timer time t0 has elapsed (time up) from the occurrence of the overcurrent Iv, Iv <Ith has already been established, and in this state, the operation of the FET 2 is not stopped via the motor drive circuit 102. .

  As a result, the energization of the low-side FET 2 is continued, the semiconductor element destruction promoting action due to the temperature rise is added, the energization amount to the FET 2 exceeds an allowable level, and the FET 2 is destroyed by heat. I received it.

  On the other hand, if the timer time t0 is simply shortened, even when the temperature of the low-side FET 2 changes below the predicted value (when the overcurrent Iv becomes equal to or higher than the overcurrent characteristic curve A), the FET2 The on / off operation of the electric motor M1 is forcibly stopped, the current resistance capability of the FET 2 cannot be fully exhibited, and the operation becomes inefficient, and the operation of the electric motor M1 becomes unstable.

  The present invention has been made to solve the above-described problems, and its purpose is to effectively utilize the current-proof capability of the power driver that adjusts the energization of the actuator, and to An object of the present invention is to provide an overcurrent protection circuit that can effectively prevent breakdown.

  In order to solve the above problem, the invention according to claim 1 is provided in a drive circuit that controls energization to an actuator via a power driver, and the power driver energization current flowing through the power driver has a set threshold value. Overcurrent detection means for determining that an overcurrent has occurred and a magnitude relationship between an overcurrent flowing through the power driver and a preset current threshold when a determination time has elapsed since the time when the overcurrent occurred. A current value determination means for determining, in an overcurrent protection circuit configured to stop the operation of the power driver or limit the power driver energization current when the overcurrent is greater than the current threshold, the temperature of the power driver A temperature detecting means for detecting the power driver, whether the power driver detected by the temperature detecting means is an overcurrent occurrence or an overcurrent occurrence. Higher the temperature during a predetermined time has elapsed becomes high, it has to reduce the determination time, and the gist.

  According to this configuration, the determination time of the current value determination unit is shortened by increasing the temperature when the overcurrent of the power driver detected by the temperature detection unit is increased. Further, the degree of shortening of the determination time can be changed as appropriate according to the current resistance capability of the power driver. As a result, when the temperature of the power driver rises more than expected and the on-resistance increases, the operation of the power driver is stopped reliably or the current applied to the power driver is limited. By stopping energization or reducing the energization amount, destruction by heat can be effectively prevented, but when the temperature is not rising as expected and it is not necessary to stop the operation of the power driver The current resistance capability of the power driver can be used effectively, and the inefficiency caused by stopping the operation of the power driver early is eliminated. As a result, the actuator can be stably driven by the drive circuit, and the reliability of the drive circuit can be improved.

  According to a second aspect of the present invention, in the overcurrent protection circuit according to the first aspect of the present invention, the overcurrent protection circuit includes a plurality of current value determination means having different determination times depending on a temperature range detected by the temperature detection means. The gist is that the determination time is shortened as the temperature at the time of occurrence of the overcurrent of the power driver is increased by switching the judgment means based on the temperature at the time of occurrence of the overcurrent of the power driver. To do.

  According to this configuration, by switching the current value determination means having a plurality of different determination times based on the temperature when the overcurrent of the power driver occurs, the temperature of the power driver detected by the temperature detection means is higher than expected. When the subsequent temperature transition also exceeds the prediction, the determination time can be easily and reliably shortened, and the power driver can be effectively prevented from being destroyed by heat.

  According to a third aspect of the present invention, in the overcurrent protection circuit according to the first or second aspect, the temperature detecting means is a single IC chip together with the power driver so as to detect the temperature of the power driver. The gist of the invention is that it is a temperature sensor disposed inside.

  According to this configuration, since the temperature sensor arranged with the power driver in a single IC chip is used as temperature detecting means for detecting the temperature of the power driver, it is not necessary to provide the temperature sensor as an independent component. The number of parts is reduced.

  According to a fourth aspect of the present invention, in the overcurrent protection circuit according to any one of the first to third aspects, the actuator is an electric motor, the power driver is an FET, and the drive circuit is The gist of the present invention is a motor drive circuit including a gate drive circuit that controls on / off of the FET and controls energization of the actuator.

  According to this configuration, since the actuator is an electric motor, the power driver is an FET, the drive circuit is a motor drive circuit including a gate drive circuit that controls on / off of the FET and controls energization to the actuator. While fully utilizing the current withstanding capability, the FET can be prevented from being destroyed by heat and the electric motor can be driven stably by the motor driving circuit, and the reliability of the motor driving circuit can be improved.

  According to the present invention, there is provided an overcurrent protection circuit capable of effectively suppressing destruction of the power driver due to overcurrent while effectively utilizing the current-proof capability of the power driver that adjusts the energization to the actuator. .

DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, embodiments of the invention will be described with reference to the drawings.
As shown in FIG. 1, the electric motor drive system according to the present embodiment is electrically connected to an electric motor (DC motor) M1 that changes the inclination angle of the side mirror of the vehicle, and the electric motor M1. A motor drive circuit 2 including a gate drive circuit that controls on / off of the high-side FET 1 and the low-side FET 2 that are power drivers by a drive signal and controls energization to the electric motor M1 is provided. In FIG. 1, the high-side FET 1 and the low-side FET 2 constitute a forward rotation drive circuit (reverse drive circuit is not shown) of a bridge circuit that performs forward / reverse drive of the electric motor M1 with a single power source (Vcc). ing. Here, both the high-side FET 1 and the low-side FET 2 are N-channel MOSFETs.

  The motor drive circuit 2 detects overcurrent Iv that flows through the low-side FET 2 due to an abnormality such as a load short circuit of the electric motor M1 and outputs an overcurrent detection signal as overcurrent detection means. The circuit 11 is electrically connected. The overcurrent detection circuit 11 is connected to an energization path between the output terminal of the electric motor M1 and the drain of the FET2.

The overcurrent detection circuit 11 has a preset threshold value I _th0 (A) set in advance, and the energization current I (A) as the power driver energization current to the low-side FET 2 exceeds the set threshold value I _th0 (A). As a result, it is determined that the overcurrent Iv has occurred in the energization current I and the overcurrent detection signal is output as an analog signal including information on the level (A) of the overcurrent Iv. The internal resistance R of the electric motor M1 shown in FIG. 1 is generated when the load of the electric motor M1 is short-circuited, and the overcurrent detection circuit 11 is supplied with electric power from the power source (Vcc).

  The overcurrent detection circuit 11 determines a magnitude value between the overcurrent Iv (A) flowing through the FET 2 and a preset current threshold Ith (A) based on the overcurrent detection signal. The determination circuit 10 is electrically connected. An oscillation circuit 13 is connected to the current value determination circuit 10 so as to output a clock signal (CLK) to the current value determination circuit 10.

  In addition, the electric motor drive system shown in FIG. 1 detects the temperature of the low-side FET 2 and outputs the current value determination circuit 10 to the current value determination circuit 10 in order to continuously output a temperature detection signal as a current value. A temperature measurement resistor 12 is provided as an electrically connected temperature sensor. The temperature measuring resistor 12 is a resistance thermometer that detects a temperature based on a change in resistance value (current value change) due to temperature, and in a single IC chip 3 together with the bridge circuit including the FET1 and FET2. It is arranged.

As shown in FIG. 2, the overcurrent protection circuit 1 according to this embodiment includes the current value determination circuit 10, an overcurrent detection circuit 11, a temperature measurement resistor 12, and an oscillation circuit 13.
The current value determination circuit 10 includes the switches 10s1, 10s2, and 10s3 for turning on / off (connecting / disconnecting) the energization path, and the overcurrent detection signal input from the overcurrent detection circuit 11 is turned on / off, respectively. A timer circuit as a current value judging means having an input terminal connected to the overcurrent detection circuit 11 via the switches 10s1, 10s2, and 10s3 and an input terminal connected to the oscillation circuit so that a clock signal is inputted. 10a, 10b, and 10c, and an OR circuit 10r that is a logic operation circuit are included as constituent elements. In each of these timer circuits 10a to 10c, timer times t1, t2, and t3 (ms) are set as determination times, respectively, and after each timer time t1, t2, and t3 has elapsed, the overcurrent Iv (A) And the current threshold value I _th (A) are determined. Each timer circuit 10a~10c, while over-current Iv is the larger than the current threshold Ith _{(Iv> I th),} from the timer circuit 10a~10c binarized signal "1" is output, over When the current Iv is equal to or less than the current threshold Ith (Iv ≦ Ith), the binarized signal “0” is output from each of the timer circuits 10a to 10c. In the timer circuits 10a, 10b, and 10c, the current threshold Ith is set, and the timer times t1, t2, and t3 are set to satisfy t1 <t2 <t3.

  Furthermore, the output terminals of the timer circuits 10a to 10c are all electrically connected to the input terminal of the OR circuit 10r, and the OR circuit 10r responds to the logical operation (OR operation) result of the input signal. An overcurrent protection signal that is a binarized signal (“1” or “0”) is output to the motor drive circuit 2. When the binarized signal “1” is input as the overcurrent protection signal, the motor drive circuit 2 outputs a stop signal to the gates of the high-side FET 1 and the low-side FET 2 and interrupts the drive signal. While these on / off operations are stopped, on the other hand, when a binary signal “0” is input as an overcurrent protection signal, the on / off control of the FET 1 and FET 2 is continued as it is.

  Each of the switches 10s1 to 10s3 includes a decoder circuit 10e, an A / D conversion circuit 10d, and a latch circuit 10f connected to the overcurrent detection circuit 11 and the oscillation circuit 13, which are components of the current value determination circuit 10. The temperature measurement resistor 12 is connected to the temperature measurement resistor 12. The temperature detection signal from the temperature measurement resistor 12 is updated and held in the latch circuit 10f for each clock cycle, and held immediately after the overcurrent detection signal is input to the latch circuit 10f. Is output from the latch circuit 10f to the A / D conversion circuit 10d. Then, the analog signal is converted into a digital signal by the A / D conversion circuit 10d, and a set of binary signals (“0, 0,. 1 ”etc.). The binarized signals are output from the output terminals p, q, r of the decoder circuit 10e to the switches 10s1 to 10s3, and the switches 10s1 to 10s3 are turned on / off. Each of these switches 10s1 to 10s3 is turned on when the binarized signal “1” is input, and is connected to the energizing path, and is turned off when the binarized signal “0” is input. It is comprised so that it may cut | disconnect, for example, can be comprised by switching elements, such as MOSFET, a transistor, and an electromagnetic relay.

  The overcurrent protection circuit 1 according to the present embodiment is configured as described above, and when any one of the predetermined timer times t1 to t3 has elapsed by the current value determination circuit 10, the overcurrent Iv becomes the current threshold value. When it is determined that it is larger than Ith (Iv> Ith), the on / off operation of the FET 2 is forcibly stopped via the motor drive circuit 102. As a result, the energization of the FET 2 is stopped and the IC chip 3 (FET 2) is prevented from being destroyed by heat.

  As shown in FIG. 3, in the overcurrent protection circuit 1, the timer time t1, t2, t3 (ms) is based on the clock signal (CLK) input from the oscillation circuit 13 in the current value determination circuit 10. Is set. Here, the overcurrent characteristic curve A shown in FIG. 3 is the same as that shown in FIG.

The current value determination circuit 10 determines that an overcurrent I (A) to the low-side FET 2 exceeds the set threshold value Ith0 (A) and is determined as an overcurrent by the overcurrent detection circuit 11 (the overcurrent Iv is generated). ) The magnitude relationship between the overcurrent Iv (A) flowing through the FET 2 and a preset current threshold value I _th (A) when any one of the timer times t1 to t3 has elapsed from the time (elapsed time t = 0 ms). It comes to judge.

  Specifically, the temperature detection signal output from the temperature measurement resistor 12 is input to the A / D conversion circuit 10d via the latch circuit 10f, and converted into a digital signal by the A / D conversion circuit 10d. The The digital signal is converted by the decoder circuit 10e into a set of binarized signals corresponding to the temperature range detected by the FET 2 by the temperature measuring resistor 12. Further, one of the timer circuits 10a, 10b, and 10c is selected according to the set of the binarized signals, and the overcurrent Iv (A) is selected in the selected timer circuits 10a, 10b, and 10c. And a preset current threshold value Ith (A).

  In the present embodiment, since the temperature detection signal output from the temperature measurement resistor 12 is input to the A / D conversion circuit 10d via the latch circuit 10f immediately after the occurrence of the overcurrent Iv, the decoder circuit 10e. The pair of binarized signals converted in step 1 corresponds to the temperature T (deg) of the FET 2 immediately after the occurrence of the overcurrent Iv, in other words, at the time of occurrence of the overcurrent Iv.

  That is, when the temperature T (deg) of the FET 2 immediately after the occurrence of the overcurrent Iv is equal to or higher than Ta (deg) and lower than Tb (deg) (Ta <Tb), the decoder circuit 10e outputs the binarized signal “1”. ”,“ 0 ”, and“ 0 ”are output from the output terminals p, q, and r to the switches 10s1, 10s2, and 10s3, respectively. Then, the switch 10s1 is turned on, the switches 10s2 and 10s3 are turned off, and the overcurrent detection signal is input to the timer circuit 10a. The magnitude relationship between the overcurrent Iv (A) flowing through the FET 2 and the preset current threshold value Ith (A) when the timer time t1 has elapsed from the time when the overcurrent Iv occurs (elapsed time t = 0 ms). Is determined.

  The decoder circuit 10e determines that the binarized signal “0” when the temperature T (deg) of the FET 2 immediately after the occurrence of the overcurrent Iv is Tb (deg) or more and less than Tc (deg) (Tb <Tc). ”,“ 1 ”, and“ 0 ”are output from the output terminals p, q, and r to the switches 10s1, 10s2, and 10s3, respectively. Then, the switch 10s2 is turned on, the switches 10s1 and 10s3 are turned off, and the overcurrent detection signal is input to the timer circuit 10b. The magnitude relationship between the overcurrent Iv (A) flowing through the FET 2 and the preset current threshold value Ith (A) when the timer time t2 has elapsed from the time when the overcurrent Iv occurs (elapsed time t = 0 ms). Is determined.

  Further, when the temperature T (deg) of the FET 2 immediately after the occurrence of the overcurrent Iv is equal to or higher than Tc (deg) and lower than Td (deg) (Tc <Td), the decoder circuit 10e outputs a binary signal “0”. ”,“ 1 ”, and“ 0 ”are output from the output terminals p, q, and r to the switches 10s1, 10s2, and 10s3, respectively. Then, the switch 10s3 is turned on, the switches 10s1 and 10s2 are turned off, and the overcurrent detection signal is input to the timer circuit 10c. The magnitude relationship between the overcurrent Iv (A) flowing through the FET 2 and the preset current threshold value Ith (A) when the timer time t3 has elapsed from the time when the overcurrent Iv occurs (elapsed time t = 0 ms). Is determined.

  Each timer circuit 10a to 10c outputs a binarized signal “1” to the OR circuit 10r when Iv> Ith at the elapse of each timer time t1 to t3, while Iv ≦ Ith. In the case of Ith, the binarized signal “0” is output to the OR circuit 10r. When the binary signal “1” is input from at least one of the timer circuits 10a to 10c, the OR circuit 10r generates an overcurrent from the binary signal “1” by OR operation. It outputs to the said motor drive circuit 2 as a protection signal. Then, the motor drive circuit 2 interrupts and outputs a stop signal to the gates of the high-side FET 1 and the low-side FET 2 and stops their on / off operations.

  As described above, the overcurrent protection circuit 1 according to the present embodiment has Iv when any one of the timer times t1 to t3 selected according to the temperature T (deg) of the FET 2 immediately after the occurrence of the overcurrent Iv has elapsed. When> Ith, the on / off operation of the FET1 and FET2 is stopped via the motor drive circuit 2. Then, after the abnormality such as the load short circuit of the electric motor M1 is resolved and the temperature T (deg) of the FET 2 falls to a steady value, or after a predetermined time has passed since the operation of the FET 1 and the FET 2 is stopped, the motor drive circuit 102 Output of stop signals to FET1 and FET2 is stopped, their on / off operations are restarted, and the original state is restored.

According to this embodiment, the following operations and effects can be obtained.
(1) The timer times t1 to t3 (ms) of the current value determination circuit 10 (timer circuits 10a to 10c) are temperatures T (deg) when the overcurrent Iv is generated in the low-side FET 2 detected by the temperature detection means. It is shortened by increasing. Further, the degree of shortening of the timer times t1 to t3 (each timer time t1 to t3) can be appropriately changed according to the current withstand capability of the FET2. As a result, when the temperature T (deg) of the FET 2 rises more than expected and the on-resistance increases, the on / off operation of the FET 2 is surely stopped, the energization to the FET 2 is stopped, and the heat is destroyed. In the case where the temperature T (deg) does not rise as much as expected and it is not necessary to stop the on / off operation of the FET 2, the current withstand capability of the FET 2 should be effectively utilized. The inefficiency caused by stopping the on / off operation of the FET 2 early is eliminated. As a result, the electric motor M1 can be stably driven by the motor drive circuit 2, and the reliability of the motor drive circuit 2 can be improved.

  (2) By switching the timer circuits 10a to 10c having a plurality of different timer times t1 to t3 (ms) based on the temperature T (deg) when the overcurrent Iv is generated in the low-side FET 2, the temperature of the FET 2 When T (deg) is higher than expected and the subsequent temperature transition also exceeds the prediction, the timer times t1 to t3 (ms) can be easily and reliably shortened, and the FET2 is effectively prevented from being destroyed by heat. be able to.

  (3) Since the temperature measuring resistor 12 disposed together with the low-side FET 2 in the single IC chip 3 is used as a temperature detecting means for detecting the temperature T (deg) of the FET 2, the temperature detecting means is independent. There is no need to provide the parts, and the number of parts is reduced.

  (4) While fully utilizing the withstand current capability of the low-side FET 2, the FET 2 can be prevented from being destroyed by heat, and the motor drive circuit 2 can stably drive the electric motor M 1. 2 reliability is improved.

(5) The reliability of the motor drive circuit 2 provided in the tilt angle varying device that varies the tilt angle of the side mirror provided in the vehicle is improved.
The above embodiment may be modified as follows.

  In the above embodiment, the high-side FET 1 (N-channel MOSFET) and the low-side FET 2 (N-channel MOSFET) are applied as power drivers that adjust the energization to the electric motor M1 by the on / off operation. However, the present invention is not limited to this, and as the power driver, a bipolar transistor such as a P-channel MOSFET, an NPN transistor, or an IGBT can be applied, and an electromagnetic relay or the like may be used.

  In the above embodiment, the electric motor (DC motor) M1 is applied as an actuator whose energization is controlled by the drive circuit via the power driver, and the high-side FET 1 and the low-side FET 2 are controlled to be turned on and off as the drive circuit. A motor drive circuit 2 including a gate drive circuit for controlling energization to the motor M1 was used. However, the present invention is not limited to this, and as the actuator, for example, a stepping motor, an electric solenoid, or the like can be applied, and a drive circuit that controls driving of these actuators can also be applied.

  In the embodiment described above, the high-side FET 1 and the low-side FET 2 constitute a forward rotation driving circuit of a bridge circuit that performs forward / reverse driving of the electric motor M1 with a single power source (Vcc). However, the present invention is not limited to this, and the high-side FET 1 and the low-side FET 2 can constitute a forward drive circuit of an H bridge circuit that performs PWM (Pulse Width Modulation) drive of the electric motor M 1 with a single power supply (Vcc). is there. In the case where an FET that may be destroyed due to overcurrent is PWM-controlled, it is possible to reduce the duty ratio and limit the power driver energization current. Also by this, the energization amount of the FET is reduced, and it is possible to effectively prevent the destruction due to the heat.

  In the above embodiment, the electric motor M1 is driven by the motor drive circuit 2 so that the inclination angle of the side mirror provided in the vehicle can be changed. However, the present invention is not limited to this, and the electric motor M1 may be driven by the motor drive circuit 2 in order to engage the lock bar with the steering shaft when the vehicle is stopped and to prevent the vehicle from being stolen.

  In the above embodiment, three timer circuits 10a to 10c are provided as current value determination means each having different timer times t1 to t3 (ms) (determination time) for each temperature range detected by the FET 2 by the temperature measuring resistor 12. By switching the timer circuits 10a to 10c according to the temperature T (deg) of the FET 2, the timer time (t1 to t3) increases as the temperature T (deg) of the FET 2 detected by the temperature measuring resistor 12 increases. Was shortened. However, the present invention is not limited to this. As the temperature T (deg) of the FET 2 detected by the temperature measurement resistor 12 increases, the timer circuits 10a to 10c are two, or four or more, as long as the timer time is shortened. May be.

  In the above embodiment, in order to detect the temperature T (deg) of the low-side FET 2, the temperature measurement resistor 12 that is built in the IC chip 3 and has temperature characteristics is used. However, instead of this, for example, a diode having a temperature characteristic built in the IC chip 3 may be used. Further, such temperature detection means of the FET 2 is not necessarily built in the IC chip 3.

  In the above embodiment, the timer circuits 10a to 10c having a plurality of different timer times t1 to t3 (ms) are set to be switched based on the temperature T (deg) when the overcurrent Iv occurs in the low-side FET 2 . However, the present invention is not limited to this, and the switching is set based on the temperature T (deg) when a predetermined time has elapsed since the occurrence of overcurrent in the low-side FET 2.

Further, technical ideas that can be grasped from the above-described embodiments and modifications will be described below.
The overcurrent protection circuit according to claim 4, wherein the electric motor is driven by the motor drive circuit so that a tilt angle of a side mirror provided in the vehicle is variable.

  According to this configuration, the reliability of the motor drive circuit provided in the tilt angle varying device that varies the tilt angle of the side mirror provided in the vehicle is improved.

The block diagram which shows the electric constitution of the electric motor drive system which concerns on embodiment of this invention. The detailed block diagram of the overcurrent protection circuit which concerns on embodiment of this invention. The time chart explaining the overcurrent determination method of the overcurrent protection circuit which concerns on embodiment of this invention. The block diagram which shows the electric constitution of the electric motor drive system which concerns on a prior art example. (A) is a graph showing the relationship between the elapsed time and the overcurrent characteristic curve and the temperature rise curve in the low-side FET, and (b) is a time for explaining the overcurrent determination method of the overcurrent protection circuit according to the conventional example. Chart diagram.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1,101 ... Overcurrent protection circuit, 2,102 ... Motor drive circuit, 3 ... IC chip, M1 ... Electric motor.

Claims (4)

An overcurrent detection means disposed in a drive circuit that controls energization to an actuator via a power driver, and that determines that an overcurrent has occurred when a power driver energization current flowing through the power driver exceeds a set threshold; Current value determination means for determining a magnitude relationship between an overcurrent flowing through the power driver and a preset current threshold when a determination time has elapsed from the time when the overcurrent has occurred, the overcurrent being greater than the current threshold In the overcurrent protection circuit that stops the operation of the power driver or restricts the power driver energization current when large,
The apparatus further comprises temperature detection means for detecting the temperature of the power driver, and the determination time is shortened as the temperature at the occurrence of overcurrent of the power driver detected by the temperature detection means increases. Overcurrent protection circuit. The overcurrent protection circuit according to claim 1,
A plurality of current value determination means having different determination times according to the temperature range detected by the temperature detection means, and switching the current value determination means based on the temperature at the time of overcurrent occurrence of the power driver, An overcurrent protection circuit in which the determination time is shortened as the temperature at the time of occurrence of overcurrent of the power driver or when a predetermined time elapses from the occurrence of overcurrent is increased. In the overcurrent protection circuit according to claim 1 or 2,
The temperature detection means is an overcurrent protection circuit which is a temperature sensor disposed in a single IC chip together with the power driver in order to detect the temperature of the power driver. In the overcurrent protection circuit according to any one of claims 1 to 3,
An overcurrent protection circuit, wherein the actuator is an electric motor, the power driver is an FET, and the drive circuit is a motor drive circuit including a gate drive circuit that controls on / off of the FET and controls energization to the actuator.

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