JP2010067927A - Nitride semiconductor light emitting element - Google Patents

Abstract

In a nitride semiconductor light emitting device, a nitride semiconductor light emitting device having high reliability and high light output is realized by suppressing the occurrence of dislocations and defects at the interface between a quantum well layer and a barrier layer constituting an active layer.
In a nitride semiconductor light emitting device in which an active layer having a single or multiple quantum well structure is sandwiched between a pair of clad layers of p-type and n-type on a substrate, the active layer includes a barrier layer and a quantum well layer The barrier layer is doped with n-type impurities, the first doped layer having an n-type impurity doping concentration of n1, and the second doped layer having an n-type impurity doping concentration of n2. And the third doped layer having an n-type impurity doping concentration of n1, a relationship of 0 <n1 / n2 ≦ 0.8 is satisfied, and the thickness of the barrier layer is bnm, The thickness of one doped layer is 0.25 nm or more and less than b / 2 nm.
[Selection] Figure 2

Description

  The present invention relates to a light emitting element such as a light emitting diode or a laser diode, and more particularly to a nitride semiconductor light emitting element.

  A nitride-based III-V compound semiconductor such as gallium nitride (GaN) is a semiconductor having a wide band gap. Taking advantage of this feature, high-intensity ultraviolet to blue / green light-emitting diodes (LEDs) and blue-violet to blue laser diodes (LDs) are being researched and developed.

  In order to achieve high light output of blue LEDs or blue-violet LDs, improvement of crystal quality and promotion of electron-hole recombination in the active layer are important issues. In order to promote the supply of electrons from the n-type layer, a method of doping an n-type impurity in a part of the n-side active layer has been proposed (see Patent Document 1).

However, even if this method is used, the demand for higher light output cannot be satisfied, and further higher light output is required.
Japanese Patent No. 3719047

  In a semiconductor light emitting device having a single or multiple quantum well active layer composed of a quantum well layer and a barrier layer, when the light output of the light emitting device is promoted by doping the barrier layer with an n-type impurity, the quantum well depends on the doping amount. There is a problem in that dislocations and defects occur at the interface between the layer and the barrier layer, resulting in a decrease in light output. The present invention suppresses the generation of dislocations and defects at the interface between the quantum well layer and the barrier layer, and realizes a nitride semiconductor light emitting device with high reliability and high light output.

  In order to solve the above problems, one embodiment of the present invention is a nitride-based semiconductor light-emitting device in which an active layer having a single or multiple quantum well structure is sandwiched between a pair of p-type and n-type cladding layers on a substrate. The active layer has a structure in which a barrier layer and this quantum well layer are alternately stacked, and the barrier layer is doped with an n-type impurity, an n-type impurity doping concentration is n1, and an n-type A layered structure comprising a second doped layer having an impurity doping concentration of n2 and a third doped layer having an n-type impurity doping concentration of n1, satisfying a relationship of 0 <n1 / n2 ≦ 0.8, When the film thickness of the layer is b nm, the film thickness of the first doped layer is 0.25 nm or more and less than b / 2 nm.

  According to an example of the present invention, the generation of dislocations and defects at the interface between the quantum well layer and the barrier layer can be suppressed, and the internal electric field applied to the active layer can be reduced. An output nitride semiconductor light emitting device can be provided.

  As a result of various experiments, the inventor of the present application promotes an increase in light output of the light-emitting element by doping the barrier layer with an n-type impurity. However, when the doping amount to the barrier layer is excessively increased, the quantum well layer and the barrier layer are particularly increased. It has been found that dislocations and defects are generated from the interface of the layers, and the semiconductor element deteriorates. The present invention provides a nitride semiconductor light emitting device with high reliability and high light output, which suppresses deterioration at the interface between the quantum well layer and the barrier layer while increasing the amount of n-type impurity doping to the barrier layer. is there.

  Hereinafter, embodiments of the present invention will be described.

(First embodiment)
FIG. 1 is a sectional view of a nitride semiconductor light emitting device according to the first embodiment of the present invention, and more specifically shows a sectional structure of a light emitting diode. 1 includes a sapphire substrate 1, an n-type GaN layer 2, an n-type GaN guide layer 3, an active layer 4, a p-type GaN first guide layer 5, a p-type GaAlN layer (electron overflow prevention layer 6), The p-type GaN second guide layer 7 and the p-type GaN contact layer 8 are sequentially stacked. Further, an n-electrode 12 is formed on the n-type GaN layer 2 and a p-electrode 11 is formed on the p-type GaN contact layer 8.

First, after forming the buffer layer 1a on the sapphire substrate 1, the n-type GaN layer 2 doped with n-type impurities is crystal-grown. For the crystal growth, for example, metal organic chemical vapor deposition (MOCVD) is used. In addition, crystal growth may be performed by molecular beam epitaxy (MBE: Molecular Beam Epitaxy). Various elements such as Si, Ge, and Sn can be used for the n-type impurity, but Si is used here. The doping amount of Si may be about 2 × 10 ¹⁸ cm ⁻³ . Although sapphire is used for the substrate 1, various materials such as GaN, SiC, Si, and GaAs can be used without being limited thereto.

Next, on the n-type GaN layer 2, an n-type guide layer 3 made of GaN having a thickness of about 0.1 μm and doped with n-type impurities of about 1 × 10 ¹⁸ cm ⁻³ is crystal-grown. The growth temperatures for growing the n-type GaN layer 2 and the n-type guide layer 3 are both 1000 to 1100 ° C. Further, as the n-type guide layer, In _0.01 Ga _0.99 N having a thickness of about 0.1 μm may be used instead of the GaN layer. The growth temperature when In _0.01 Ga _0.99 N is used is 700 to 800 ° C.

Next, on the n-type guide layer 3, a quantum well layer 4a made of undoped In _0.2 Ga _0.8 N having a thickness of about 3.5 nm and a film thickness on both sides of the quantum well are sandwiched. An active layer 4 having a multiple quantum well (MQW) structure in which barrier layers 4b made of In _0.01 Ga _0.99 N of about 7 nm are alternately stacked is formed. The growth temperature in this case is 700 to 800 ° C. Here, the wavelength of photoluminescence at room temperature was designed to be 430 nm. For example, as shown in FIG. 2, the barrier layer 4b is in contact with the quantum well layer with a thickness of 1 nm, and the first doped layer (In _0.01 Ga _0.99 N layer having an n-type impurity doping concentration of n1). 4b1), a second doped layer (In _0.01 Ga _0.99 N layer 4b2) having a thickness of 5 nm and not in contact with the quantum well layer and having an n-type impurity doping concentration of n2, a thickness of 1 nm, a quantum A stacked structure such as a third doped layer (In _0.01 Ga _0.99 N layer 4b3) in contact with the well layer and having an n-type impurity doping concentration of n1 may be used. n1 and n2 satisfy the relationship 0 <n1 / n2 ≦ 0.8. The reason will be described with reference to FIG. In the case of 0 <n1 / n2 ≦ 0.8, there is no dislocation or defect at the interface between the quantum well layer and the barrier layer, an appropriate amount of n-type impurities, and electron-hole recombination Promote and keep internal quantum efficiency high. On the other hand, when n1 / n2> 0.8, the barrier layer in contact with the quantum well layer has excessive n-type impurities, which causes dislocations and defects and prevents electron-hole recombination, Quantum efficiency decreases. The film thicknesses of 4b1 and 4b3 may be 0.25 nm or more and less than b / 2 nm, preferably 0.50 nm or more and b / 4 nm or less, when the thickness of the barrier layer 4b is b nm. When the thickness of the region of low n-type impurity concentration, that is, the In _0.01 Ga _0.99 N layer where the n-type impurity doping concentration is n1, the electron injection efficiency into the quantum well layer deteriorates, and the optical output This is to prevent improvement. FIG. 4 is a schematic diagram in which the secondary ion intensity and Si concentration of In are plotted by secondary ion mass spectrometry (SIMS: Secondary Ion Mass Spectrometry). When the In secondary ion intensity and Si concentration of the produced wafer were measured, the Si concentration of the barrier layer in contact with the quantum well layer was low.

Further, as shown in FIG. 7, the barrier layer has a film thickness of 1 nm, a first doped layer with an n-type impurity concentration of n1, a film thickness of 2 nm, a second doped layer with an n-type impurity concentration of n2, and a film thickness of 1 nm. A first doped layer having an n-type impurity concentration of n1, a second doped layer having a thickness of 2 nm, an n-type impurity concentration of n2, and a first doped layer having a thickness of 1 nm and an n-type impurity concentration of n1. In addition, layers having different n-type impurity concentrations may be alternately formed. Similar to the description of FIG. 3, in the case of 0 <n1 / n2 ≦ 0.8, the n-type impurity is in an appropriate amount without causing dislocations or defects at the interface between the quantum well layer and the barrier layer, The electron-hole recombination is promoted, and the internal quantum efficiency can be kept high. On the other hand, when n1 / n2> 0.8, the barrier layer in contact with the quantum well layer has excessive n-type impurities, which causes dislocations and defects and prevents electron-hole recombination, Quantum efficiency decreases. By setting an appropriate n-type impurity concentration, the internal quantum efficiency is improved.

Next, a p-type first guide layer 5 made of GaN is grown on the active layer 4. The film thickness may be about 30 nm. The temperature for growing GaN is 1000 to 1100 ° C. As the p-type impurity, various elements such as Mg and Zn can be used, but here, Mg is used. The Mg doping amount may be about 4 × 10 ¹⁸ cm ⁻³ . Further, the p-type first guide layer, may be used having a thickness of about 30nm _In 0.01 _{Ga 0.99} N. The growth temperature when In _0.01 Ga _0.99 N is used is 700 to 800 ° C.

Next, on the p-type first guide layer 5, Ga _0.8 Al _0.2 N having a thickness of about 10 nm doped with p-type impurities is grown as the electron overflow prevention layer 6. The Mg doping amount may be about 4 × 10 ¹⁸ cm ⁻³ . The growth temperature of Ga _0.8 Al _0.2 N is 1000 to 1100 ° C.

Next, a p-type GaN second guide layer 7 doped with about 1 × 10 ¹⁹ cm ^{−3 of} Mg is grown on the electron overflow prevention layer 6. The film thickness may be about 50 nm. The temperature for growing GaN is 1000 to 1100 ° C.

Finally, a p-type GaN contact layer 8 having a film thickness of about 60 nm and doped with about 1 × 10 ²⁰ cm ^{−3 of} Mg is grown.

  A light emitting diode is finally produced by performing the following device process on the wafer on which the crystal has been grown.

  On the p-type GaN contact layer 8, a p-type electrode 11 made of a composite film of palladium-platinum-gold (Pd / Pt / Au), for example, is formed. For example, Pd has a thickness of 0.05 μm, Pt has a thickness of 0.05 μm, and Au has a thickness of 0.05 μm.

  After the formation of the p-type electrode 11, a part is dry-etched to expose the n-type GaN layer 2 and form the n-type electrode 12. The n-type electrode 12 is made of, for example, a titanium-platinum-gold (Ti / Pt / Au) composite film. The film thickness is, for example, a Ti film having a thickness of about 0.05 μm, a Pt film having a thickness of about 0.05 μm, and an Au film having a thickness of about 1.0 μm.

  The characteristics of the blue LED fabricated in this embodiment and a normal LED (the barrier layer 4b with Si uniformly doped) were compared. In a normal LED, the operating voltage at an operating current of 20 mA was 3.2 V, and the light output was 15 mW. The operating voltage of the LED of this example under the same conditions was 3.2 V, and the light output reached 20 mW. The light output was improved because the crystal quality of the active layer was improved by selectively doping Si into the barrier layer as in this example, and defects and dislocations were reduced. .

(Second Embodiment)
FIG. 5 is a sectional view of a nitride semiconductor light emitting device according to the second embodiment of the present invention, and more specifically shows a sectional structure of a laser diode. 5 includes an n-type GaN substrate 101, an n-type GaN layer 102, an n-type GaAlN cladding layer 103, an n-type GaN guide layer 104, an active layer 105, a p-type GaN first guide layer 106, and a p-type GaAlN layer. (Electron overflow prevention layer 107), a p-type GaN second guide layer 108, a p-type GaAlN cladding layer 109, and a p-type GaN contact layer 110 are stacked in this order. The upper portion of the p-type GaAlN cladding layer 109 is a ridge portion 130, and the p-type GaN contact layer 110 is also substantially the same width as the ridge portion 130. A current blocking layer 131 is formed on the side surfaces of the ridge portion 130 and the p-type GaN contact layer 110 and on the surface of the p-type GaAlN cladding serving as a non-ridge portion. A p-side electrode 121 is formed above the p-type GaN contact layer 110, and an n-side electrode 122 is formed on the back surface of the n-type GaN substrate 101.

First, an n-type GaN layer 102 doped with n-type impurities is crystal-grown on an n-type GaN substrate 101. Here, Si was used as the n-type impurity. The doping amount of Si may be about 2 × 10 ¹⁸ cm ⁻³ . In addition to n-type GaN, various selections such as sapphire, SiC, Si, and GaAs can be used for the substrate.

Next, on the n-type GaN layer 102, an n-type cladding layer made of Ga _0.95 Al _0.05 N having a thickness of about 1.5 μm and doped with n-type impurities about 1 × 10 ¹⁸ cm ^−3. 103 is crystal-grown.

Next, on the n-type Ga _0.95 Al _0.05 N cladding layer 103, an n-type guide made of GaN having a thickness of about 0.1 μm, doped with an n-type impurity of about 1 × 10 ¹⁸ cm ^−3. The layer 104 is crystal grown. The growth temperatures for growing the n-type GaN layer 102, the n-type Ga _0.95 Al _0.05 N cladding layer 103, and the n-type guide layer 104 are all 1000 to 1100 ° C. Further, as the n-type guide layer, In _0.01 Ga _0.99 N having a thickness of about 0.1 μm may be used instead of the GaN layer. The growth temperature when In _0.01 Ga _0.99 N is used is 700 to 800 ° C.

Next, on the n-type guide layer 104, a quantum well layer 105a made of undoped In _0.1 Ga _0.9 N having a thickness of about 3.5 nm and a film thickness on both sides of the quantum well are sandwiched. An active layer 105 having an MQW structure in which barrier layers 105b made of In _0.01 Ga _0.99 N of about 7 nm are alternately stacked is formed. The growth temperature in this case is 700 to 800 ° C. Here, the wavelength of photoluminescence at room temperature was designed to be 405 nm. For example, as shown in FIG. 6, the barrier layer 105 b is a first doped layer (In _0.01 Ga _0.99 N layer 105 b 1) having a thickness of 1 nm and being in contact with the quantum well layer and having an n-type impurity doping concentration of n 1. A second doped layer (In _0.01 Ga _0.99 N layer 105b2) having an n-type impurity doping concentration of n2, a thickness of 1 nm, and a quantum well layer. And a laminated structure such as a third doped layer (In _0.01 Ga _0.99 N layer 105b3) in contact with the n-type impurity and having an n-type impurity doping concentration of n1. n1 and n2 satisfy the relationship 0 <n1 / n2 ≦ 0.8. The thicknesses of 105b1 and 105b3 may be 0.25 nm or more and less than b / 2 nm, preferably 0.50 nm or more and b / 4 nm or less, when the thickness of the barrier layer 105b is b nm. When the thickness of the region of low n-type impurity concentration, that is, the In _0.01 Ga _0.99 N layer where the n-type impurity doping concentration is n1, the electron injection efficiency into the quantum well layer deteriorates, and the optical output This is to prevent improvement.

Next, a p-type first guide layer 106 made of GaN is grown on the active layer 105. The film thickness may be about 90 nm. The temperature for growing GaN is 1000 to 1100 ° C. Here, Mg is used as the p-type impurity. The Mg doping amount may be about 4 × 10 ¹⁸ cm ⁻³ . Further, as the p-type first guide layer, In _0.01 Ga _0.99 N having a film thickness of about 0.1 μm may be used. The growth temperature when In _0.01 Ga _0.99 N is used is 700 to 800 ° C.

Next, on the p-type first guide layer 106, Ga _0.8 Al _0.2 N having a thickness of about 10 nm doped with a p-type impurity is grown as the electron overflow prevention layer 107. The Mg doping amount may be about 4 × 10 ¹⁸ cm ⁻³ . The growth temperature of Ga _0.8 Al _0.2 N is 1000 to 1100 ° C., but it may be set to 700 to 800 ° C.

Next, a p-type GaN second guide layer 108 doped with about 1 × 10 ¹⁹ cm ^{−3 of} Mg is grown on the electron overflow prevention layer 107. The film thickness may be about 50 nm. The temperature for growing GaN is 1000 to 1100 ° C.

Next, the p-type second guide layer 108 is doped with p-type impurities of about 1 × 10 ¹⁹ cm ⁻³ and made of Ga _0.95 Al _0.05 N with a thickness of about 0.6 μm. The cladding layer 109 is crystal-grown.

Finally, a p-type GaN contact layer 110 having a film thickness of about 60 nm and grown with about 1 × 10 ²⁰ cm ^{−3 of} Mg is grown.

  By performing the following device process on the wafer on which the crystal has been grown, a laser diode is finally manufactured.

  As shown in FIG. 5, the stacked structure of the p-type cladding layer 109 and the p-type contact layer 110 has a ridge portion 130 composed of the p-type cladding layer 109 and the p-type contact layer 110 at the center. The laminated structure formed by the p-type cladding layer 109 and the p-type contact layer 110 extends in the direction perpendicular to the paper surface and constitutes a resonator. As shown in FIG. 1, the ridge structure is not limited to a rectangle having a vertical side wall in cross section, and may be trapezoidal with a mesa-shaped slope. The width of the p-type contact layer 110, that is, the width of the ridge portion 130 is about 2 μm. Here, the resonator direction (perpendicular to the paper surface) is aligned with the <1-100> direction of the nitride III-V compound semiconductor.

A current blocking layer made of an insulating film is formed on the side surfaces of the ridge portion 130 and the p-type GaN contact layer 110 and on the surface of the p-type GaAlN cladding serving as a non-ridge portion, and the transverse mode is controlled by the current blocking layer. The thickness of the current blocking layer can be arbitrarily selected by design, but it may be set to a value of about 0.3 μm to 0.6 μm, for example, about 0.5 μm. Here, the current blocking layer 131 may be a high resistivity semiconductor film such as an AlN film, a Ga _0.8 Al _0.2 N film, a semiconductor film irradiated with protons, a silicon oxide film (SiO ₂ film). , Etc. can be used. Furthermore, for example, a mixed film of a SiO ₂ film and a ZrO ₂ film may be used. That is, as the current blocking layer, various materials can be used as long as the refractive index is lower than that of the nitride-based III-V compound semiconductor used for the active layer 105. That is, since the refractive index at a wavelength of 405 nm of the quantum well layer made of In _0.1 Ga _0.9 N in the active layer 105 is 2.60, a material having a refractive index lower than this may be used. Since the refractive index of the SiO ₂ film at a wavelength of 405 nm is 1.49, the refractive index of the AlN film is 2.16, and the refractive index of the Ga _0.8 Al _0.2 N film is 2.44, the conditions are satisfied. . In addition to the ridge waveguide laser structure of the present embodiment, an n-type semiconductor layer such as n-type GaN or n-type GaAlN is used instead of the insulating film, and the pn junction is separated to function as a current blocking layer. An embedded laser structure may be used. Here, SiO ₂ was used as the low refractive index current blocking layer 131.

  On the p-type GaN contact layer 110, for example, a p-side electrode 121 made of a composite film (laminated film) of palladium / platinum / gold (Pd / Pt / Au) is disposed. For example, the Pd film has a thickness of 0.05 μm, the Pt film has a thickness of 0.05 μm, and the Au film has a thickness of 1.0 μm.

  By the polishing, the thickness is reduced from the back side of the GaN substrate 101 to about 150 μm. An n-side electrode 122 made of a composite film (laminated film) of titanium / platinum / gold (Ti / Pt / Au) or the like is provided on the back surface of the n-type GaN substrate 101. The n-side electrode 122 can be composed of, for example, a Ti film having a thickness of 0.05 μm, a Pt film having a thickness of 0.05 μm, and an Au film having a thickness of 1.0 μm.

  The resonator is formed using cleavage. That is, the cleaved end faces are on both sides of the resonator end, and function as a laser reflecting mirror. Here, the cleavage plane is the {1-100} plane of the nitride III-V compound semiconductor. For example, the resonator length may be 600 μm.

  Further, a protective film made of a dielectric was formed on the end face, and the reflectance of the light exit end face was set to 10%, and the reflectivity of the rear end face was set to 95%.

  When the end-coated bar is made into a chip, it may be 200 to 600 μm, and here it is 400 μm. Further, the LD chip was mounted on a 5.6 mmφ can package.

  The characteristics of the LD produced in this embodiment and the normal ridge type LD were compared. Current-light output characteristics were measured at 25 ° C. and evaluated with a pulse current of 50 ns. In a normal ridge type LD, the threshold current was 30 mA. On the other hand, in the ridge type LD produced in the present embodiment, the threshold current was as low as 20 mA. This is presumably because the crystal quality of the active layer is improved by selectively doping Si into the barrier layer 105b, the gain fluctuation is reduced, and the threshold current is reduced.

  Note that the present invention is not limited to the above-described embodiment as it is, and can be embodied by modifying the constituent elements without departing from the scope of the invention in the implementation stage. In addition, various inventions can be formed by appropriately combining a plurality of components disclosed in the embodiment. In addition, the composition and film thickness described in the above embodiment are examples, and various selections are possible.

1 is a cross-sectional view of a semiconductor light emitting element according to a first embodiment of the present invention. The schematic diagram of the active layer in the semiconductor light-emitting device concerning the 1st Embodiment of the present invention. The figure which plotted the relationship of the internal quantum efficiency of a light emitting element with respect to the n-type impurity concentration n1 of a 1st doped layer, and the n-type impurity concentration n2 of a 2nd doped layer in the active layer of this invention. The schematic diagram which plotted the secondary ion intensity and Si density | concentration of In in the active layer of this invention. Sectional drawing of the semiconductor light-emitting device which concerns on the 2nd Embodiment of this invention. The schematic diagram of the active layer in the semiconductor light-emitting device concerning the 2nd Embodiment of this invention. The schematic diagram of the active layer in the semiconductor light-emitting device which concerns on the modification of the 1st Embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Sapphire substrate 1a Buffer layer 2 n-type GaN layer 3 n-type GaN guide layer 4 Active layer 5 p-type GaN first guide layer 6 p-type GaAlN electron overflow prevention layer 7 p-type GaN second guide layer 8 p-type GaN contact layer 11 p-type electrode 12 n-type electrode 4a quantum well layer 4b barrier layer 4b1 first doped layer 4b2 second doped layer 4b3 third doped layer 101 n-type GaN substrate 102 n-type GaN layer 103 n-type GaAlN cladding layer 104 n-type GaN Guide layer 105 Active layer 106 p-type GaN first guide layer 107 p-type GaAlN electron overflow prevention layer 108 p-type GaN second guide layer 109 p-type GaAlN cladding layer 110 p-type GaN contact layer 121 p-type electrode 122 n-type electrode 130 Ridge portion 131 Current blocking layer 105a Quantum well layer 105b Barrier 105b1 first doped layer 105b2 second doped layer 105b3 third doped layer

Claims (3)

In a nitride semiconductor light emitting device in which an active layer having a single or multiple quantum well structure is sandwiched between a pair of clad layers of p-type and n-type on a substrate,
The active layer has a structure in which a quantum well layer and a barrier layer having a larger band gap energy than the quantum well layer are alternately stacked,
The barrier layer is doped with n-type impurities, the first doped layer having an n-type impurity doping concentration of n1, the second doped layer having an n-type impurity doping concentration of n2, and the n-type impurity doping concentration of n1. Having a laminated structure composed of a third doped layer, satisfying a relationship of 0 <n1 / n2 ≦ 0.8,
The nitride semiconductor light emitting device, wherein the thickness of the barrier layer is bnm, and the thickness of the first doped layer is 0.25 nm or more and less than b / 2 nm.   2. The nitride semiconductor light emitting device according to claim 1, wherein in the barrier layer, the first doped layer and the second doped layer are alternately provided, and a doping concentration of the barrier layer in contact with the quantum well layer is n <b> 1.   3. The nitride semiconductor light emitting device according to claim 1, wherein the n-type impurity is at least one of Si, Ge, and Sn.

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