JP2010066546A - Wiring board manufacturing equipment, method of determining correction of deficiency of insulating film on wiring board, program for determining correction of deficiency of insulating film, and recording medium with the program recorded thereon - Google Patents

Abstract

A wiring board manufacturing apparatus for improving the production yield and productivity of a wiring board is provided.
A defect detection unit 110 in a wiring board manufacturing apparatus 1 according to the present invention detects a defect in an insulating film. Subsequently, the defect number calculation unit 120 calculates the number of defects at the intersection among the detected defects in the insulating film. And the correction instruction | indication part 130 judges that the defect | deletion in a cross | intersection part should be corrected, when the calculated number of defect | deletions is more than 0 and less than predetermined threshold value Th1.
[Selection] Figure 1

Description

  The present invention relates to a wiring board manufacturing apparatus used for a liquid crystal panel and the like, and a defect correction determination method for determining whether or not a defect of an insulating film in the wiring board is corrected.

  As a wiring board used for a liquid crystal panel or the like, a wiring board in which conductive wirings are formed in two upper and lower layers with an insulating film interposed is widely used. A method for manufacturing such a wiring board will be described below.

  First, a metal conductor layer is formed on the entire surface of an insulating substrate such as a glass substrate by using a sputtering technique. Next, the first conductor wiring pattern is patterned by patterning the metal conductor layer using a photolithography technique and a dry etching technique using a CF4 gas. Next, an insulating film such as SiN is formed on the entire surface of the substrate on which the first conductor wiring pattern is formed, using a chemical vapor deposition technique. At this time, if necessary, insulating film openings such as lead terminal portion forming portions and conductor wiring interlayer connection vias (contact holes) are formed using photolithography technology and dry etching technology using chlorine-based gas. At this time, an insulating film at the intersection of the first conductor wiring pattern and the second conductor wiring pattern is secured. Finally, the second conductor wiring pattern is patterned by the same means as the first conductor wiring pattern. As a result, a wiring board having conductor wiring patterns formed in two upper and lower layers can be manufactured via the insulating film.

  However, the wiring board manufactured as described above has a problem of a decrease in productivity due to a defect in the insulating film. This is due to the occurrence of film formation failure or patterning failure due to dust adhesion or the like in each step in the method of manufacturing a wiring board.

  In particular, when the wiring substrate is a TFT array substrate used for a liquid crystal panel or the like, an insulating film forming process using a chemical vapor deposition technique, more specifically, a gate after patterning a gate wiring of a bottom gate type TFT array substrate. Insulating film formation defects frequently occur in the insulating film forming process.

  Defects in film formation in the gate insulating film of the bottom gate type TFT array substrate (especially when there is a defect in the insulating film on the lower layer wiring including the auxiliary capacitance wiring), the gate wiring formed through the insulating film (lower layer wiring) Current leakage between the wiring between the source wiring (upper layer wiring) and the gate wiring (lower layer wiring) and between the auxiliary capacitance wiring (lower layer wiring) and the drain wiring (upper layer wiring), or gate wiring (lower layer wiring) ) And the source wiring (upper layer wiring) cause a wiring short circuit at the wiring crossing portion.

  As a result, optical characteristic deterioration in the TFT liquid crystal panel and a line defect defect in which the pixels cannot be controlled linearly due to a gate / source short circuit occur. This is a fatal defect for a liquid crystal panel. For this reason, the current gate insulating film forming technique has a problem that the productivity of the TFT array substrate is lowered due to an insulating film forming defect.

  As a method for solving such a problem, for example, there is a technique described in Patent Document 1 or 2. In Patent Document 1, a gate insulating film is formed so as to cover the entire area of the substrate in order to reduce the frequency of occurrence of defects in the insulating film in the wiring cross part, and then an insulating material having a low dielectric constant is applied only to the wiring cross part. A technique for forming another insulating film by dropping and applying using an inkjet method is disclosed.

Patent Document 2 discloses a color filter defect including a visual inspection device that detects a defect of a color filter pixel and a defect correction device that corrects the defect when there is a defect in a method for manufacturing a color filter substrate of a liquid crystal panel. A consistent line to make corrections is disclosed. Specifically, in the technique described in Patent Document 2, when the appearance inspection apparatus determines that the color filter substrate has a white defect or a black defect, the defect correction apparatus irradiates the defect with a laser for removing the defect. Or apply ink and color.
JP 2007-171314 A (publication date: July 5, 2007) JP 2003-315227 A (publication date: November 6, 2003)

  However, even when the techniques described in Patent Document 1 and Patent Document 2 are used, the following problems still occur.

  First, in the technique described in Patent Document 1 for reducing the frequency of occurrence of defects in the insulating film, since two types of insulating films are formed in the wiring cross portion, the film thickness in the wiring cross portion of the TFT array substrate is locally increased in all pixels. Becomes thicker. In addition, since one of the two types of insulating film forming methods is an ink jet method, the application position control of the insulating material and the film thickness control of the insulating film to be formed can be performed particularly in a large mother substrate after the sixth generation. It becomes difficult. For this reason, the film thickness of the insulating film between the pixels of the TFT array substrate tends to be non-uniform.

  Therefore, in the liquid crystal panel using the TFT array substrate manufactured by such a manufacturing method, there is a problem that optical characteristics are likely to deteriorate due to an insulating film having a non-uniform film thickness.

  Further, with the technique described in Patent Document 2, it is possible to determine whether or not a defect has occurred, but it is not possible to determine whether or not the defect is to be corrected. That is, when the concept of the color filter defect correction consistent line described in Patent Document 2 is applied to the correction of the defect of the gate insulating film of the TFT array substrate manufacturing line, the defect of the insulating film is corrected for all the detected defects. There is a problem that the efficiency is low because it is corrected.

  Specifically, the technique described in Patent Document 2 corrects defects that do not affect the functional degradation of the liquid crystal panel, in other words, defects in the insulating film that are not functionally defective with respect to the TFT array substrate. In addition, because abnormal patterns are detected using a pattern inspection device that detects the difference between the gate wiring and insulating film that have already been patterned and their design patterns, foreign substances other than insulating film defects, patterning defects, etc. are detected abnormally. There is a risk that the insulating film material may be applied to an abnormal pattern other than the defect of the insulating film that is detected as a pattern.

  As described above, in the consistent correction line of the color filter substrate in Patent Document 2, the step of determining whether or not the correction is effective for the detected abnormal pattern, and the productivity is reversed by correcting the defect determined to be effective. The process of determining whether there is no reduction is not disclosed. That is, even if it is applied to a TFT array substrate production line, the productivity of the TFT array substrate may be reduced.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a wiring board manufacturing apparatus that realizes improving the production yield and productivity of a wiring board.

  In order to solve the above problems, the wiring board manufacturing apparatus according to the present invention includes a first wiring pattern and a second wiring pattern formed on a substrate, and the first wiring pattern and the first wiring pattern. A wiring board manufacturing apparatus for manufacturing a wiring board in which an insulating film is formed so as to insulate the first wiring pattern and the second wiring pattern at an intersection where the second wiring pattern intersects. A defect detecting means for detecting a defect in the formed insulating film based on captured image data obtained by imaging the substrate on which the insulating film is formed on the first wiring pattern; and information on the position of the detected defect; Based on the information on the position where the second wiring pattern is formed, out of the detected defects, a defect number calculating means for calculating the number of defects at the intersection, and the number of defects at the intersection, More, and, if it is less than the first threshold, it is characterized in that it comprises a and a correction instruction means for instructing a correction of the defect in the intersection.

  In the wiring board manufacturing apparatus according to the present invention, the defect detecting means detects defects in the insulating film, and calculates the number of defects at the intersection among the defects in the insulating film detected by the defect number calculating means. Then, the correction instruction means determines that the defect at the intersection should be corrected when the number of defects at the intersection is greater than 0 and less than a predetermined threshold.

  As described above, in the wiring board manufacturing apparatus according to the present invention, in the manufactured wiring board, the insulating film defect is corrected only when the insulating film defect at the intersection that becomes a fatal defect is less than a predetermined threshold. Execute. In other words, the wiring board manufacturing apparatus according to the present invention does not correct defects in a wiring board that has a defect in an insulating film, which may cause a decrease in production yield and productivity.

  Therefore, in the wiring board manufacturing apparatus according to the present invention, the production yield and productivity of the wiring board can be improved.

  In the wiring board manufacturing apparatus according to the present invention, the wiring board is a TFT array substrate, and the defect number calculating means calculates the number of defects at the intersection and at each pixel in the TFT array substrate. , Calculating the consecutive number of pixels having the intersection where the defect is detected, and the correction instruction means, while the number of defects in the intersection is greater than 0 and less than a first threshold, When the number of consecutive pixels having the intersection where the defect is detected is less than a second threshold, it is preferable to instruct the correction of the defect at the intersection.

  According to the above configuration, the correction instruction means corrects the defect in the insulating film based on the number of detected defects at the intersection and the consecutive number of defective pixels in each pixel in the TFT array substrate. Judgment is necessary. That is, even in the case of a TFT array substrate, a defect in the insulating film is not corrected for a substrate that can cause a reduction in production yield and productivity.

  As a result, the insulating film can be efficiently corrected even in the TFT array substrate, and the production yield and productivity of the TFT array substrate can be improved.

  In the wiring board manufacturing apparatus according to the present invention, the defect detection means further includes a region on the substrate corresponding to a region where the luminance in the captured image data is within a predetermined range, and the defect of the insulating film on the substrate. It is preferable to detect as

  According to said structure, the defect | deletion detection means can selectively detect only the defect | deletion of an insulating film. Thereby, it is possible to prevent an abnormal pattern other than the defect of the insulating film (for example, adhesion of foreign matter and patterning abnormality in the first wiring pattern) from being detected as a defect of the insulating film.

  For this reason, the production yield and productivity of the wiring board can be suppressed by suppressing the reduction in the production yield and productivity of the wiring board caused by correcting the defect of the insulating film that does not become a fatal defect in the product using the wiring board. There is an effect that it can be further improved.

  In addition, since it is possible to prevent an abnormal pattern other than the defect of the insulating film at the crossing portion from being corrected, there is also an effect that it is possible to suppress the deterioration of the optical characteristics in the liquid crystal panel using the wiring board in which the defect is corrected. Play.

  The wiring board manufacturing apparatus according to the present invention further includes an ink jet head for discharging ink onto the wiring board, and the ink jet head has the defect based on an instruction from the correction instruction means. It is preferable to eject ink containing an insulating material at the intersection.

  According to the above configuration, since the ink jet head ejects ink containing an insulating material at the intersecting portion having a defect based on an instruction from the correction instruction unit, the defect of the insulating film can be corrected efficiently. There is an effect.

  In the wiring board manufacturing apparatus according to the present invention, the insulating material is preferably a spin-on-glass material.

  Since spin-on-glass materials have many inorganic components such as silica, they exhibit superior insulating properties as compared to organic insulating materials such as resins. Therefore, sufficient insulation can be secured even when the insulating material is thinly applied. As a result, it is possible to prevent a local increase in film thickness due to the outflow of ink or the correction of defects in pixels.

  Therefore, there is an effect that it is possible to reduce deterioration of the visual characteristics of the liquid crystal panel caused by a local increase in film thickness.

  In order to solve the above problem, the defect correction determination method according to the present invention includes a first wiring pattern and a second wiring pattern formed on a substrate, and the first wiring pattern and the first wiring pattern. Insulation in a wiring board manufacturing apparatus for manufacturing a wiring board in which an insulating film is formed so as to insulate the first wiring pattern and the second wiring pattern at the intersection where the two wiring patterns intersect A method for determining a defect in a film, comprising: a defect detection step for detecting a defect in the formed insulating film based on captured image data obtained by imaging a substrate having an insulating film formed on the first wiring pattern; A defect number calculating step of calculating the number of defects at the intersection based on the information on the position of the defect and the information on the position where the second wiring pattern is formed; and a defect at the intersection Number, greater than 0, and, if it is less than the first threshold, is characterized in that it comprises a correction instruction step of instructing a correction of the defect in the intersection.

  According to said structure, there exists an effect similar to the wiring board manufacturing apparatus which concerns on this invention.

  A program for operating the wiring board manufacturing apparatus according to the present invention, which is characterized in that the computer is driven as each of the above-described means, and a computer-readable recording medium on which the program is recorded are also included in the present invention. Included in the category.

  As described above, the wiring board manufacturing apparatus according to the present invention includes a defect detection unit that detects a defect in an insulating film, a defect number calculation unit that calculates the number of defects in the intersection among the detected defects, Correction instruction means for instructing correction of the defect in the intersection when the number of defects in the part is greater than 0 and less than the first threshold value.

  In the wiring board manufacturing apparatus according to the present invention, with the above configuration, among the wiring boards having defects in the insulating film, the defects that do not cause a reduction in production yield and productivity are not corrected. . Therefore, the wiring board manufacturing apparatus according to the present invention has an effect that the production yield and productivity of the wiring board can be improved.

[Embodiment 1]
An embodiment of a wiring board manufacturing apparatus according to the present invention will be described below with reference to FIGS.

  In the present embodiment, prior to the description of the wiring board manufacturing apparatus according to the present invention, a wiring board used in the wiring board manufacturing apparatus according to the present invention and a method of manufacturing the wiring board will be briefly described.

  The wiring board used in the wiring board manufacturing apparatus according to the present invention has the lower layer wiring (first wiring pattern) and the upper layer wiring (second wiring pattern) formed on the insulating substrate, and the lower layer wiring and the upper layer. An insulating film is formed at the intersection where the wiring intersects so as to insulate each wiring.

  A method for manufacturing such a wiring board will be briefly described below. Here, a case where a TFT array substrate is manufactured as a wiring substrate will be described as an example.

  The TFT array substrate manufacturing process includes a gate wiring film forming process, a gate wiring patterning process, a gate insulating film forming process, an insulating film patterning process, a semiconductor layer film forming process, a semiconductor layer patterning process, a source / drain wiring film forming process, It comprises a source / drain wiring patterning step, a TFT channel portion semiconductor layer processing step, a protective film forming step, a protective film processing step, a pixel electrode film forming step, and a pixel electrode patterning step. Each of these steps may be executed by a conventionally known method.

  Here, a process for insulatingly intersecting the gate wiring and the source wiring by forming an insulating film between the gate wiring (lower wiring) and the source wiring (upper wiring) relating to the feature of the present invention is shown in FIG. A description will be given with reference to a) to (d). 2A to 2D are views showing the manufacture of a TFT array substrate as an example of a wiring substrate, FIG. 2A is a top view showing the manufactured TFT array substrate, and FIG. It is AA sectional drawing which showed the state which patterned the gate wiring 46 on the board | substrate 44, (c) is AA sectional drawing which showed the state which patterned the insulating film 48 in (b), (d) is (a). It is AA sectional drawing which showed the state which patterned the source wiring 50 further to c).

  First, as shown in FIG. 2B, a Ti film, an Al film, and a TiN film are formed in this order on the entire surface of the insulating substrate 44 using a sputtering apparatus (not shown) to form a gate wiring film. . Then, the gate wiring 46 is patterned on the insulating substrate 44 by subjecting the formed gate wiring film to a photolithography process and an etching process using a mask. Next, as shown in FIG. 2C, a SiN film is formed on the entire surface of the substrate on which the gate wiring 46 is formed using a chemical vapor deposition apparatus (not shown). Then, the insulating film 48 is patterned by subjecting the formed SiN film to photolithography processing and etching processing using a mask. Finally, as shown in FIG. 2D, by using a sputtering apparatus (not shown), a Mo (molybdenum) film, an Al film, and a Mo film are formed in this order on the substrate on which the insulating film 48 is formed. Source wiring 50 is formed. Then, the formed source wiring 50 is processed in the same manner as the patterning of the gate wiring 46, that is, the photolithography processing and the etching processing are performed using the mask, thereby patterning the source wiring 50 on the insulating substrate 44. . Thus, a TFT array substrate in which an insulating film 48 is formed between the gate wiring 46 and the source wiring 50 as shown in FIG. 2D can be formed.

  However, in the manufacture of the TFT array substrate described above, the insulating film 48 may be damaged. Deletion of the insulating film 48 in the TFT array substrate will be described below with reference to FIGS. FIGS. 3A to 3C are views showing the occurrence of defects in the insulating film in the manufacturing process of the TFT array substrate, and FIG. 3A is a cross section showing a state in which the gate wiring 46 is patterned on the insulating substrate 44. FIG. 4B is a cross-sectional view showing a state where a defect has occurred in the insulating film 48. (C) is a view showing a state in which the source wiring 50 is formed on the TFT array substrate in which the defect of the insulating film 48 shown in (b) occurs.

  FIG. 3A shows a state similar to that in FIG. That is, the gate wiring 46 is patterned on the insulating substrate 44. When the insulating film 48 is formed on the substrate in the state shown in FIG. 3A, for example, if foreign matter such as dust adheres to the gate wiring 46, the insulating film 48 is formed at the place where the foreign matter has adhered. Since no film is formed, a defect 52 is generated in the insulating film 48 as shown in FIG.

  When the defect 52 as shown in FIG. 3B is formed at the intersection of the gate wiring 46 and the source wiring 50 or when the gate wiring 46 is patterned, the auxiliary capacitance wiring 56 (FIG. 2A )) And the source wiring 50, as shown in FIG. 3C, a short circuit portion 54 is formed in which the gate wiring 46 and the source wiring 50 are in direct contact with each other.

  Then, a data signal, a TFT drive pulse, and the like are transmitted to the liquid crystal panel using the TFT array substrate 42 in which the short circuit portion 54 as shown in FIG. 3C is generated, and the TFT portion 60 (FIG. 2A). When the reference) is driven, a current drop in the short circuit portion 54 causes a voltage drop or the like. As a result, the TFT array is not driven normally. That is, a line defect that is fatal for the liquid crystal panel is caused.

  The wiring board manufacturing apparatus according to the present invention is an apparatus for correcting a defect in an insulating intersection between a lower layer wiring and an upper layer wiring in such a wiring board. Hereinafter, the wiring board manufacturing apparatus according to the present invention will be described in detail.

(Configuration of wiring board manufacturing apparatus 1)
The configuration of the wiring board manufacturing apparatus according to the present invention will be described with reference to FIG. FIG. 1 is a diagram showing a configuration of a wiring board manufacturing apparatus 1 according to the present invention. The wiring board manufacturing apparatus 1 is an apparatus that corrects defects in the insulating film on the wiring board, and includes a stage 2, an alignment camera 4, a board observation camera 6, a gantry 8, a head unit 10, an inkjet head 12, and a control unit 100. ing. Details of these members will be described below.

(Stage 2)
The stage 2 is a mounting table on which the wiring board 42 is mounted.

(Alignment camera 4 and substrate observation camera 6)
The alignment camera 4 is a camera for detecting position information of alignment marks (not shown) on the wiring board 42. The board observation camera 6 images the wiring board 42 and is attached to the side surface of the head unit 10.

(Gantry 8)
The gantry 8 is for attaching the head unit 10. The gantry 8 is movable in the Y direction full width shown in the figure.

(Head unit 10, inkjet head 12)
The inkjet head 12 is for ejecting ink as droplets, and a plurality of nozzles for ejecting droplets are provided at the tip thereof.

  The inkjet head 12 is attached to the head unit 10. The head unit 10 to which the inkjet head 12 is attached can be moved to the full width in the X direction shown in the figure using a slider mechanism on the gantry 8.

  As described above, since the gantry 8 to which the head unit 10 is attached is movable in the full width in the Y direction, the substrate observation camera 6 and the inkjet head 12 attached to the head unit 10 are connected to the wiring board 42. On the other hand, it becomes relatively movable in both the X direction and the Y direction.

  Note that a more detailed structure of the inkjet head 12 will be described in detail below, and the description thereof is omitted here.

(Control unit 100)
The control unit 100 includes a defect detection unit 110, a defect number calculation unit 120, and a correction instruction unit 130. Details of these members will be described below.

(Defect detection unit 110)
The defect detection unit 110 detects a defect in the insulating film based on a captured image obtained by capturing an image of a substrate on which an insulating film is formed on a lower layer wiring. Details of detection of defects in the insulating film in the defect detection unit 110 will be described in detail below.

(Deficit number calculation unit 120)
The defect number calculation unit 120, based on the information on the position of the defect in the detected insulating film and the information on the position where the upper layer wiring is formed, of the detected defects in the insulating film, the intersection of the upper layer wiring and the lower layer wiring Calculate the number of defects in.

(Correction instruction unit 130)
The correction instructing unit 130 instructs the inkjet head 12 to correct the defect at the intersection when the calculated number of defects at the intersection is greater than 0 and less than the threshold Th1.

(Defect correcting operation in wiring board manufacturing apparatus 1)
Next, a correction operation for correcting a defect in the insulating film in the wiring board manufacturing apparatus 1 will be described below with reference to FIG. FIG. 4 is a flowchart showing a defect correcting operation in the insulating film of the wiring board manufacturing apparatus 1.

  First, after the wiring board manufacturing apparatus 1 forms an insulating film on the substrate on which the lower layer wiring is formed, the defect detection unit 110 determines whether or not the defect is generated in the formed insulating film (step S1). ). When the defect detection unit 110 determines that a defect has occurred in the formed insulating film (Yes in step S1), the defect number calculation unit 120 calculates the number of defects at the intersection among the detected defects in the insulating film. Calculate (step S2). On the other hand, when the defect detection unit 110 determines that no defect has occurred in the formed insulating film (No in step S1), the wiring board manufacturing apparatus 1 ends the defect correction process.

  Subsequently, the correction instruction unit 130 determines whether or not the number of deficits calculated by the deficiency number calculation unit 120 is less than a predetermined threshold value Th1 (step S3). If the calculated number of defects is less than the predetermined threshold Th1 (Yes in step S3), the correction instruction unit 130 determines that the defect correction in the insulating film is effective, and the inkjet head 12 corrects the defect in the insulating film. A correction instruction is sent (step S4).

  The inkjet head 12 that has received an instruction to correct a defect in the insulating film from the correction instruction unit 130 discharges ink containing an insulating material at the intersection where the defect occurs in the insulating film based on the instruction from the correction instruction unit 130. Thus, the defect of the insulating film is corrected (step S6).

  On the other hand, when the number of defects calculated by the defect number calculation unit 120 is equal to or greater than the predetermined threshold Th1 (No in step S3), the correction instruction unit 130 determines that the correction of the defect in the formed insulating film is not effective, The defect in the insulating film is not corrected (step S5).

(Advantages of the wiring board manufacturing apparatus 1)
As described above, in the wiring board manufacturing apparatus 1, the defect detection unit 110 detects defects in the insulating film, and calculates the number of defects at the intersection among the defects in the insulating film detected by the defect number calculation unit 120. . Then, when the calculated number of defects is less than a predetermined threshold Th1, the correction instruction unit 130 determines that the correction of the defect is effective and instructs the correction.

  That is, the wiring board manufacturing apparatus 1 corrects the defect of the insulating film only when the defect of the insulating film at the intersecting portion that becomes a fatal defect is less than the predetermined threshold Th1 in the manufactured wiring board. . In other words, in the wiring board manufacturing apparatus 1, among the wiring boards having defects in the insulating film, for the boards that can cause a reduction in production yield and productivity, the insulating film in the intersections is defective. But don't fix the deficit. Therefore, in the wiring board manufacturing apparatus 1, the production yield and productivity of the wiring board can be improved.

(Details of defect detection processing in insulating film)
Next, details of the defect detection process in the insulating film will be described below.

  First, an insulating substrate (for example, a glass substrate) in which patterning of the lower layer wiring and the insulating film is completed is placed on the stage 2 of the wiring board manufacturing apparatus 1. At this time, the operator of the wiring board manufacturing apparatus 1 aligns the placed insulating substrate based on the alignment mark on the insulating substrate detected using the alignment camera 4.

  Next, the defect detection unit 110 scans the substrate observation camera 6 to acquire captured image data of the insulating substrate. Subsequently, the defect detection unit 110 compares the acquired captured image data with the mask data of the lower wiring and the mask data of the insulating film recorded as mask design data in the wiring board manufacturing apparatus 1. That is, the defect detection unit 110 detects an area in which the luminance value in the captured image data and the luminance value in the mask data recorded in advance do not match as an abnormal pattern.

  The abnormal pattern detected in this way includes defects in the lower wiring itself (for example, thinning of the wiring, disconnection, etching residue, etc.) and adhesion of foreign matters in addition to the loss of the insulating film. Therefore, the defect detection unit 110 detects the defect of the insulating film based on the luminance value in the captured image data captured by the substrate observation camera 6, that is, the light amount value of reflected light (hereinafter simply referred to as the light amount value). The details of the process of detecting the defect of the insulating film based on the light amount value will be described below.

  The defect detection unit 110 compares the detected light amount value with preset threshold values Th2, Th3, and Th4. In the present embodiment, for convenience, the threshold value Th2, the threshold value Th3, and the threshold value Th4 are set in order from the smallest value.

  The defect detection unit 110 recognizes that the detected light amount value is equal to or less than the threshold value Th2 as foreign matter attached to the substrate. In addition, a portion where the detected light amount value is larger than the threshold value Th2 and equal to or smaller than the threshold value Th3 is recognized as a portion where the insulating film is missing and the insulating substrate is exposed. A portion where the detected light amount value is larger than the threshold value Th3 and equal to or smaller than the threshold value Th4 is recognized as a lower layer wiring. Further, the portion where the detected light amount value is larger than the threshold Th4 is recognized as the formed insulating film.

  In this manner, the defect detection unit 110 abnormally detects a portion where the ideal light amount value recorded in advance (the light amount value on the substrate on which the lower layer wiring and the insulating film are patterned without defect) does not match the detected light amount value. Detect as a pattern. Then, the defect detection unit 110 detects a portion of the detected abnormal pattern whose light amount value is larger than the threshold Th2 and equal to or less than the threshold Th3 as a defect in the insulating film.

  As described above, the defect detection unit 110 can extract only the abnormal pattern due to the defect of the insulating film from the detected abnormal pattern based on the light amount value of the reflected light in the captured image data.

  Therefore, even when an abnormal pattern is detected, the wiring board manufacturing apparatus 1 does not detect a defect in the insulating film, that is, when only foreign matter adhesion and abnormality in the lower wiring are detected. It is possible to prevent the insulating film from being corrected. That is, in the wiring board manufacturing apparatus 1, it is possible not to correct defects other than the insulating intersection. Therefore, since the wiring board manufacturing apparatus 1 can efficiently correct defects in the insulating film, it is possible to suppress a decrease in throughput during manufacturing of the wiring board.

  Even if the insulation film other than the intersection between the lower layer wiring and the upper layer wiring is missing, the defect of the insulation film is not corrected except for the defect at the intersection. This is because it does not become a fatal defect.

  Further, by setting the threshold value in more detail, that is, by further subdividing the range of the light amount value, the defect detection unit 110 can detect an abnormality in the film thickness variation of the insulating film. Variation in film thickness is the difference between the amount of reflected light from the surface of the insulating film due to the variation in film thickness and the amount of reflected light from the insulating substrate, or the difference in reflectance due to the inclination of the film surface due to the variation in thickness. Can be detected from.

  Note that a color image is preferably used for detecting a defect in the insulating film, and an image in which a change in color is detected using an imaging camera equipped with a differential interference optical system is more preferable.

(Details of processing for calculating the number of defects at intersections)
Next, details of the missing number calculation processing at the intersection will be described below.

  The defect number calculation unit 120 is based on the mask design data of the upper layer wiring recorded in advance in the wiring board manufacturing apparatus 1 and is a defect at the intersection between the upper layer wiring and the lower layer wiring among the defects detected by the defect detection unit 110. Is detected. In addition, the defect number calculation unit 120 calculates the number of defects in the insulating film at the intersection when a defect occurs at the intersection where the lower layer wiring and the upper layer wiring intersect.

(Details of determination of necessity of correction in correction instruction unit 130)
The correction instructing unit 130 corrects the defect at the detected intersection when the number of defects at the intersection calculated by the defect number calculation unit 120 is greater than 0 and less than the predetermined threshold Th1. An instruction is output to the wiring board manufacturing apparatus 1.

  At this time, it is preferable that the predetermined threshold Th1 is set to a value of 1% at all the intersections in the wiring board. For example, when the wiring board has 1000 intersections, the threshold value Th1 is “10”.

  If the number of defects at the intersections is 1% or less of all the intersections, the reduction in the production yield of the wiring board can be kept within an allowable range even if the defects are corrected. Of course, when a higher quality wiring board is manufactured, the threshold value Th1 can be set lower.

(When the wiring board is a TFT array board)
Here, the determination of whether or not the correction instruction unit 130 needs to be corrected when the wiring board is a TFT array substrate will be described below.

  When the wiring substrate is a TFT array substrate, the gate wiring 46 and the auxiliary capacitance line 56 are lower layer wirings, and the source wiring 50 is an upper layer wiring. Therefore, the insulating film 48 is formed at the intersection where the gate wiring 46 and the source wiring 50 intersect and at the intersection where the auxiliary capacitance line 56 and the source wiring 50 intersect. In the present embodiment, when the intersection where the gate wiring 46 and the source wiring 50 intersect and the intersection where the auxiliary capacitance line 56 and the source wiring 50 intersect are not clearly distinguished, they are simply referred to as “intersection”. write.

  The defect of the insulating film at the intersection between the gate wiring and the source wiring in the TFT array substrate is corrected by attaching a liquid insulating material using an ink jet technique or the like. At this time, the insulating material may leak and adhere to the transistor portion arranged in the vicinity of the intersection where the defect is corrected. When the insulating material adheres to the transistor portion, the transistor portion to which the insulating material adheres does not operate normally, so that the pixel including the transistor portion has a point defect (black spot).

  However, the loss of the insulating film at the intersection causes a short circuit or current leakage between the gate wiring and the source wiring, and in the TFT liquid crystal panel manufactured by interposing liquid crystal in the gap between the TFT array substrate and the color filter substrate, This causes a line defect in which the pixels cannot be controlled linearly. Therefore, in order to prevent a line defect that is a fatal defect in the TFT liquid crystal panel, it is desirable to correct the defect of the insulating film even if a point defect (black spot) occurs.

  Needless to say, when a large number of defects are corrected, a large number of point defects (black spots) generated by correcting the defects cause a significant deterioration of optical characteristics in the liquid crystal panel. Also, when a large number of point defects (black spots) are continuously distributed in pixel units, the optical characteristics of the liquid crystal panel are significantly deteriorated. Therefore, in the TFT array substrate, it is necessary to determine whether or not correction is possible in consideration of the transistor characteristics of the TFT provided on the substrate and the optical characteristics of the liquid crystal panel in addition to the electrical characteristics and the electrical insulation characteristics.

  Therefore, in determining whether or not defects in the insulating film on the TFT array substrate need to be corrected, the defect number calculation unit 120 continues the number of pixels in which defects are detected in addition to the number of defects at the intersection as in the case of the wiring substrate. Calculate the number. Then, the correction instruction unit 130 determines whether the correction of the defect is effective from both the number of defects and the consecutive number of pixels in which the defect is detected.

  As described above, the correction instruction unit 130 determines whether or not the defect in the insulating film needs to be corrected based on the number of defects and the consecutive number of pixels in which defects are detected. That is, the wiring board manufacturing apparatus 1 identifies a TFT array substrate whose function may not be restored even if the defect is corrected, such as a TFT array substrate in which the defect is generated at a high density in one place. Such defects in the insulating film in the TFT array substrate are not corrected. As a result, the wiring board manufacturing apparatus 1 can execute an efficient correction on the TFT array substrate, so that the production yield and productivity of the TFT array substrate can be improved.

  For example, in the case of manufacturing eight TFT array substrates (40-inch type panels) on an eighth generation mother glass substrate, the correction instruction unit 130 provides a missing insulation film for each of the eight TFT array substrates. It is determined whether or not to correct.

(Details of determining whether a TFT array substrate needs correction)
Next, details of determination of necessity of correction in the correction instruction unit 130 when a TFT array substrate is used as the wiring substrate will be described.

  The correction instruction unit 130 is a case where the number of defects at the intersection calculated by the defect number calculation unit 120 is greater than 0 and less than the threshold Th5, and at the same time, pixels with defects are consecutive. When the number is less than the threshold Th6, an instruction to correct the defect is output to the wiring board manufacturing apparatus 1.

  At this time, the threshold Th5 is preferably set to a value of 0.01% at all intersections in the TFT array substrate. For example, when there are 10,000 intersections on the TFT array substrate, the threshold value Th5 is “1”. The threshold Th6 is preferably set to “9”.

  As described above, by setting the threshold value Th5 and the threshold value Th6 in the above numerical range, even if the TFT array substrate has a defect in the insulating film, the TFT array substrate may cause a reduction in production yield and productivity. May not fix the deficiency. That is, it is possible to prevent the defect of the insulating film from being corrected for the TFT array substrate that is assumed to have a very poor visual characteristic when the liquid crystal panel is incorporated. As a result, the TFT array substrate can be manufactured more efficiently.

  Further, by setting the threshold value Th5 and the threshold value Th6 in the above numerical range, even if a point defect occurs in the process of correcting the insulating film in order to prevent the line defect in the liquid crystal panel using the TFT array substrate, it is corrected. The visual recognition characteristics when the TFT array substrate panel is a liquid crystal panel can be maintained at a practically sufficient level. That is, it is possible to prevent the visual characteristics of the liquid crystal panel from being significantly deteriorated, and it is possible to prevent the liquid crystal panel including the TFT array substrate in which a defect in the insulating film is corrected from becoming a defective product.

  Of course, when manufacturing a higher quality TFT array substrate, the value of the threshold Th5 can be set lower and the value of the threshold Th6 can be set lower. That is, the above numerical values are merely examples, and the values of the threshold Th5 and the threshold Th6 can be changed as appropriate according to the TFT array substrate to be manufactured.

(Insulation film defect correction processing)
Next, a correction process for correcting a defect in the insulating film will be described below with reference to FIGS. In this section, a case where the wiring substrate is a TFT array substrate will be described as an example. 5A to 5D are views showing a process for correcting the defect 52 of the insulating film 48 in the manufacturing process of the TFT array substrate, and FIG. 5A is a TFT array in which the defect is generated in the insulating film 48. It is a top view of a board | substrate, (b) is BB sectional drawing which shows the state which the defect | deletion 52 of the insulating film 48 generate | occur | produced, (c) is insulating material with respect to the defect | deletion 52 of the insulating film 48 shown in (b). It is BB sectional drawing which shows the state which applied the ink 62, (d) is BB sectional drawing which shows the state which formed the source wiring 50 after correcting the defect | deletion 52 of the insulating film 48 in (c).

  As shown in FIG. 5A, two defects (defect portion 52a and defect portion 52b) are generated in the insulating film 48 of the TFT array substrate. The defective portion 52 a is a defect generated in the insulating film 48 on the intersection between the gate wiring 46 and the source wiring 50, and the defective portion 52 b is the insulating film 48 other than the intersection between the gate wiring 46 and the source wiring 50. Deficiency.

  That is, the defective portion 52 a includes a portion where the gate wiring 46 and the source wiring 50 intersect with each other via the insulating film 48. Therefore, when the source wiring 50 is patterned without correcting the defect, as shown in FIG. 3C, a short circuit between the gate wiring 46 and the source wiring 50 occurs, and a fatal line defect in the liquid crystal panel occurs. Will occur. On the other hand, the missing portion 52b does not include an intersecting portion. This is detected as a defect in the insulating film 48 in the defect detection unit 110, but is not a defect that causes a malfunction when the TFT function and the liquid crystal panel are used, and it is determined that no correction is necessary. Insulating film defects.

  When the correction instruction unit 130 determines that the defect correction is effective, the correction instruction unit 130 outputs an instruction signal instructing the wiring board manufacturing apparatus 1 to correct the defect. When receiving the instruction signal, the wiring board manufacturing apparatus 1 drives the ink jet head 12 to correct the defect. At this time, it is preferable that the correction instruction unit 130 also outputs information such as the coordinate position of the defect to be corrected and the amount of the insulating material used for correction to the wiring board manufacturing apparatus 1.

  As shown in FIG. 5C, the inkjet head 12 corrects the defect 52 by applying the insulating material ink 62 filled in the shear mode type inkjet head 12 to the defect 52. In this way, the wiring board manufacturing apparatus 1 corrects the defect of the insulating film 48 at the intersection between the gate wiring 46 and the source wiring 50.

  As a result, the wiring board manufacturing apparatus 1 can pattern the source wiring 50 on the insulating material ink 62 cured by baking, as shown in FIG. Insulating properties can be ensured at the intersection with 50. Therefore, it is possible to prevent a line defect that becomes a fatal defect in the liquid crystal panel.

  In FIG. 5A, the insulating film defect 52a region extends in the direction of the drain line 58, but only the intersection between the gate wiring 46 and the source wiring 50 is corrected locally, so that the correction is required. The amount of the insulating material ink 62 can be reduced, and the number of steps required for correction can be reduced. Further, it is possible to prevent the performance of the TFT unit 60 in the adjacent image from being deteriorated by spreading the insulating material ink 62 on the TFT unit 60 in the adjacent pixel.

  In the correction method described above, the insulating material is not adhered to all the pixels of the TFT array substrate. Therefore, the optical characteristics and visual characteristics of the entire liquid crystal panel can be favorably maintained as compared with a liquid crystal panel in which an insulating material is attached to the wiring intersections of all pixels using an ink jet technique.

(Modification of wiring board manufacturing apparatus 1)
In the wiring board manufacturing apparatus 1 described above, the determination of whether or not defects need to be corrected and the correction of defects are performed in the same apparatus, but the present invention is not limited to this. In other words, the necessity of correcting the defect and the actual defect correction may be performed in separate devices. In other words, the wiring board manufacturing apparatus 1 may be configured as a wiring board manufacturing system including a defect correction necessity unit (for example, a pattern inspection apparatus) and a defect correction unit (for example, a wiring board manufacturing apparatus). .

  The substrate manufacturing system will be described in more detail. First, the defect correction necessity unit acquires the abnormal pattern detection, the abnormal pattern image information, and the position information in advance. Subsequently, the defect correction necessity unit refers to the mask design data in the subsequent process to determine whether or not the series of insulating film correction is possible, and then the defect correction necessity unit includes the glass substrate including the panel on which the insulation film correction is effective. Select only to transport to the defect correction unit. That is, the defect correction unit is a unit specialized for the above-described insulating film correction process.

  As a result, a relatively time-consuming pattern inspection and determination of whether or not to modify the insulating film can be performed in parallel by a plurality of apparatuses, so that the manufacturing throughput of the wiring board can be further improved.

(Details of insulating material ink)
Next, details of the insulating material ink used for correcting defects in the wiring board manufacturing apparatus 1 will be described below. As the insulating material ink, for example, SOG material ink can be used.

  The SOG material ink is preferably a liquid in which organic components having a silicon skeleton such as silica fine particles and organosilicate hydrolyzate are dispersed. As the SOG material-containing ink, for example, CERAMATE-CIP and CERAMATE-LNT (both manufactured by Catalyst Kasei Kogyo Co., Ltd.) and OCD TYPE-12 (manufactured by Tokyo Ohka Kogyo Co., Ltd.) can be used.

  The SOG material-containing ink is a vitrified insulating material having a silicon skeleton because the organic hydrocarbon component is decomposed when fired. That is, since the SOG material-containing ink has a large amount of inorganic components such as silica, the ink exhibits superior insulating properties as compared with organic insulating materials such as resins. Note that organic components that remain slightly in the fired SOG material-containing ink also have insulating properties.

  Next, the electrical insulation characteristics of the SOG material ink will be described in more detail. Table 1 is a table comparing the electrical insulation characteristics of the SOG material ink and the acrylic resin ink.

  Prior to describing the electrical insulation characteristics between the SOG material ink and the acrylic resin ink, a calculation method for evaluating the electrical insulation characteristics of the SOG material ink shown in Table 1 will be described.

  First, an SOG material ink is applied to a wiring on a glass substrate on which a 2 μm wide wiring is formed, using an inkjet head. Subsequently, after baking the SOG material ink, the SOG material ink is applied to the glass substrate so as to have a desired film thickness. Subsequently, in the insulating film forming portion in the glass substrate, a 2 μm wide wiring is further formed so that the upper wiring intersects. At this time, the presence or absence of breakdown of the insulating film when various DC voltages are applied between the upper and lower layer wirings, and the amount of leakage current at the wiring crossing part of 2 μm square by the insulation meter SM-15E (manufactured by Toa Denki Kogyo Co., Ltd.) Perform an evaluation. Table 1 shows values measured by the insulation meter SM-15E.

  As shown in Table 1, when the acrylic resin ink is applied to the insulating intersection between the gate wiring 46 and the source wiring 50 with a film thickness of 1 μm, the acrylic resin insulating film is destroyed when 25 V is applied. Since the maximum voltage difference applied between the gate wiring 46 and the source wiring 50 may be 50 V or more, it is practical to modify the insulating film using an organic insulating film such as acrylic resin with a film thickness of 2 μm or less. Have difficulty.

  On the other hand, the electrical insulation characteristics of the baked and cured product of the SOG material ink are very excellent compared to the acrylic resin ink. That is, even with a film thickness of 1 μm, it has a withstand voltage of 20 V or more. The amount of leakage current at the intersection of the insulating film between the gate line 46 and the source line 50 when a voltage of 100 V is applied is also 1 × 10 −14 A or less. For this reason, the voltage drop of the TFT drive pulse due to current leakage is not caused.

  Therefore, by modifying the insulating film using the SOG material ink having characteristics close to those of the inorganic insulating film, the gate wiring 46 and the source wiring 50 can be formed even if the film thickness is 0.6 to 1.5 μm or less. The insulating film can be reliably corrected at the intersection of the insulating films. Furthermore, by utilizing the characteristic that insulation can be ensured even if the SOG material ink is thinly applied, and the ink jet technology that can apply fine ink droplets, the SOG material is formed at the insulating intersection between the gate wiring 46 and the source wiring 50. The ink can be applied locally in a thin and small area. Thereby, it is possible to suppress the spread of ink wetting to the wiring intersection on the substrate due to the application of the SOG material ink. Accordingly, it is possible to prevent ink from flowing out to the adjacent normal TFT portion 60. In addition, it is possible to reduce the deterioration in the visual characteristics of the liquid crystal panel due to the uneven thickness of the liquid crystal layer due to the local increase in the film thickness in the insulating film correction pixel.

  In the present embodiment, the insulating intersection between the gate wiring 46 and the source wiring 50 has been mainly described as a portion to be corrected for the insulating film. However, depending on the case, the auxiliary capacitance line 56, the source wiring 50, the drain wiring 58, and the gate wiring 46 are insulated. Insulating intersections between wirings that need to be secured can also be targeted for insulation film correction.

(Details of structure of inkjet head 12)
Next, details of the structure of the inkjet head 12 will be described below with reference to FIG. FIG. 6 is a cross-sectional view schematically showing a cross section of the inkjet head 12.

  The inkjet head 12 ejects ink by utilizing shear deformation of the piezoelectric material. As shown in FIG. 6, the inkjet head 12 includes a base member 18, a cover member 24, and a nozzle plate 28.

  A through hole is formed in the cover member 24, and the formed through hole is used as the ink supply port 20 and the common ink chamber 22. A plurality of grooves are formed in the base member 18, and the plurality of grooves are separated from the common ink chamber 22 by a partition wall (ink chamber channel wall 14) made of a piezoelectric material. As a result, the ink chamber channel 16 is formed in the base member 18.

  The ink chamber channel wall 14 is provided with an electrode 30 for applying an electric field in a direction orthogonal to the polarization direction of the piezoelectric material, and the nozzle 26 is formed on the nozzle plate 28.

  Further, a protective film (not shown) is formed on the inner wall of the ink chamber channel 16 in order to avoid contact between the electrode 30 and other components and the ink.

  The rear end portion 32 of the ink channel 16 is processed into an R shape corresponding to the diameter of a dicing blade used at the time of grooving, and further, a flat portion electrode 34 as an electrode lead-out portion for energization with the outside. Is formed. The flat portion electrode 34 is electrically connected to the electrode 38 of the inkjet head driving IC 36 via an Al wire 40. The flat portion electrode 34 and the electrode 38 are preferably connected by a wire bonding technique.

  The ink chamber channel wall 14 in the inkjet head 12 is sheared and deformed into a “<” shape when energized. As a result, the volume of the ink chamber channel 16 varies. The ink jet head 12 controls the ink pressure in the ink chamber channel 16 using the pressure wave generated by the volume fluctuation of the ink chamber channel 16 and discharges ink.

(Wiring board)
The wiring board that can be used in the wiring board manufacturing apparatus 1 according to the present invention is not limited to a wiring circuit board such as a TFT array substrate and a glass epoxy printed wiring board, and two or more conductor layers are provided with interlayer insulation. Any substrate other than the TFT array substrate and the printed wiring substrate can be used as long as the substrate includes wirings stacked via a film. Moreover, the wiring board which can be used for the wiring board manufacturing apparatus 1 which concerns on this invention can be used suitably also as a board | substrate for organic EL, and a board | substrate for PDP.

(Program and recording medium)
The control unit 100 included in the wiring board manufacturing apparatus 1 may be configured by hardware logic. Alternatively, it may be realized by software using a CPU (Central Processing Unit) as follows.

  That is, the control unit 100 includes a CPU that executes instructions of a program that realizes each function, a ROM (Read Only Memory) that stores the program, a RAM (Random Access Memory) that expands the program into an executable format, and And a storage device (recording medium) such as a memory for storing the program and various data. With this configuration, the object of the present invention can be achieved by a predetermined recording medium.

  The recording medium only needs to record the program code (execution format program, intermediate code program, source program) of the program of the control unit 100, which is software that realizes the above-described functions, in a computer-readable manner. The recording medium is supplied to the control unit 100. Thereby, the control unit 100 (or CPU or MPU) as a computer may read and execute the program code recorded on the supplied recording medium.

  The recording medium that supplies the program code to the control unit 100 is not limited to a specific structure or type. That is, the recording medium includes, for example, a tape system such as a magnetic tape and a cassette tape, a magnetic disk such as a floppy (registered trademark) disk / hard disk, and an optical disk such as a CD-ROM / MO / MD / DVD / CD-R. System, a card system such as an IC card (including a memory card) / optical card, or a semiconductor memory system such as a mask ROM / EPROM / EEPROM / flash ROM.

  Further, the object of the present invention can be achieved even if the control unit 100 is configured to be connectable to a communication network. In this case, the program code is supplied to the content reproduction apparatus 1 via the communication network. The communication network is not limited to a specific type or form as long as it can supply the program code to the control unit 100. For example, it may be the Internet, intranet, extranet, LAN, ISDN, VAN, CATV communication network, virtual private network, telephone line network, mobile communication network, satellite communication network, and the like.

  The transmission medium constituting the communication network may be any medium that can transmit the program code, and is not limited to a specific configuration or type. For example, even in the case of wired lines such as IEEE 1394, USB (Universal Serial Bus), power line carrier, cable TV line, telephone line, ADSL (Asymmetric Digital Subscriber Line) line, infrared rays such as IrDA and remote control, Bluetooth (registered trademark), 802.11 It can also be used by radio such as radio, HDR, mobile phone network, satellite line, terrestrial digital network. The present invention can also be realized in the form of a computer data signal embedded in a carrier wave in which the program code is embodied by electronic transmission.

  The present invention has been specifically described above based on the embodiments. However, the present invention is not limited to the above-described embodiments, and various modifications are possible within the scope of the claims and are different. Embodiments obtained by appropriately combining technical means disclosed in the respective embodiments are also included in the technical scope of the present invention.

(Additional notes)
In addition to the glass substrate, a ceramic substrate, a glass epoxy substrate, or the like can be used as the insulating substrate. In addition to the sputtering technique, a technique that can be used for forming the conductor wiring pattern may be a printing technique for metal particle-containing ink, a technique for forming a copper foil by bonding, a plating technique, and the like. In addition to chemical vapor deposition technology, technologies that can be used to form insulating films include insulating material vapor deposition technology, insulating material ink printing technology, and technology for attaching and forming insulating material sheets. Can also be used.

  Moreover, the wiring board manufacturing method which concerns on this invention can also be described as follows.

  1. A wiring board comprising a step of forming a first wiring pattern on an insulating substrate, a step of forming an insulating film pattern on at least a part of the first wiring pattern, and a step of forming a second wiring pattern In this manufacturing method, after the step of forming the insulating film pattern, a step of detecting an abnormal pattern and obtaining captured image information, a step of classifying the abnormal pattern based on the captured image information of the abnormal pattern, and the classification Extracting the defect of the insulation film from the abnormal pattern, and detecting the insulation film defect according to the position of the insulation film defect on the wiring board based on the captured image information of the insulation film defect and the second wiring pattern information. Classifying and determining whether or not the correction of the insulation film defect is effective; and determining whether or not the correction in the unit wiring board is effective according to the number of the insulation film defects in which the correction in the unit wiring board is effective; Osamu Method for manufacturing a wiring board, which comprises a step of modifying the insulating film defects into the defect of the insulating film of the wiring substrate becomes soluble to impart an insulating material.

  2. Whether or not the insulation film defect correction is effective by classifying the insulation film defect according to the position of the insulation film defect on the wiring board based on the captured image information of the insulation film defect and the second wiring pattern information. Determining the second wiring pattern information by aligning the second wiring pattern information with the first wiring pattern information included in the captured image information of the insulating film defect and the second wiring pattern information. A step of identifying a portion where the conductor layer of the wiring pattern intersects the insulating layer of the insulating film pattern via the interlayer, and the identified first wiring pattern conductor layer and the second wiring pattern conductor layer include the insulating film. The method of manufacturing a wiring board according to claim 1, further comprising a step of determining that the correction is effective when there is an insulating film defect at a position including at least a part of a portion that intersects between layers.

  3. The step of determining whether or not correction can be made in units of wiring boards in accordance with the number of insulation film defects that are effective in correction in the unit wiring board is the first wiring pattern in the unit wiring board in which the number of insulation film defects that are effective in correction is When the conductor layer of the second wiring pattern and the conductor layer of the second wiring pattern are 1% or more of all the locations where the insulating layer of the insulating film pattern intersects with the interlayer interposed therebetween, it is determined that correction is not possible on a wiring board basis. The manufacturing method of the wiring board of 1 to do.

  4). The step of determining whether or not correction is possible in units of wiring boards according to the number of insulation film defects that are effective in correction in the unit wiring board is the correction in the unit wiring board when the target wiring board is the TFT array substrate 42. 2 is a step of determining whether or not correction is possible for each wiring board in accordance with the distribution in the unit wiring board of the insulating film deficient portion whose correction is effective in addition to the number of effective insulating film defects. A method for manufacturing a wiring board.

  The step of determining whether or not correction is possible in units of wiring boards according to the number of insulating film defects effective in correction in the unit wiring board described in 5.4 and the distribution in the unit wiring board of insulating film defects effective in correction, A step of counting the number of insulation film defects that can be corrected effectively in units of pixels of the unit TFT array panel substrate and determining that correction is not possible in units of TFT array panels when the number is 0.01% or more of all pixels, and unit TFT array And a step of determining that correction is not possible in units of TFT array panels when nine or more pixels are connected in units of pixels of the panel substrate and an effective correction is distributed. A method for manufacturing a wiring board.

  The step of applying an insulating material to the defect portion of the insulating film of the wiring board that can be corrected as described in 6.1 to correct the defect of the insulating film is performed using an SOG (spin-on-glass) material ink using an inkjet head. A method of manufacturing a wiring board, comprising attaching to the wiring board.

  The wiring board manufacturing apparatus of the present invention can be widely applied to general manufacturing of wiring boards, and can be applied to the manufacture of TFT array substrates.

It is a figure which shows the structure of the wiring board manufacturing apparatus which concerns on this invention. It is a figure explaining manufacture of the TFT array substrate which is an example of a wiring board, (a) is a top view which shows the manufactured TFT array substrate, (b) is the state which patterned the gate wiring on the insulating substrate. It is AA sectional drawing shown, (c) is AA sectional drawing which showed the state which patterned the insulating film further in (b), (d) showed the state which patterned the source wiring further in (c) It is AA sectional drawing. It is a figure which shows generation | occurrence | production of the defect | deletion of the insulating film in the manufacturing process of a TFT array substrate, (a) is sectional drawing which showed the state which patterned the gate wiring on the insulating substrate, (b) is a figure where a defect | deletion exists in an insulating film It is sectional drawing which shows the state which generate | occur | produced, (c) is a figure which shows the state which formed the source wiring in the TFT array substrate in which the defect | deletion of the insulating film shown to (b) generate | occur | produced. It is a flowchart which shows the operation | movement which corrects the defect | deletion of the insulating film in the wiring board manufacturing apparatus which concerns on this invention. It is a figure which shows the process which corrects the defect | deletion of the insulating film in the manufacturing process of a TFT array substrate, (a) is a top view of the TFT array substrate which the defect | deletion generate | occur | produced in the insulating film, (b) is a defect | deletion of an insulating film It is BB sectional drawing which shows the state which generate | occur | produced, (c) is BB sectional drawing which shows the state which applied the insulating material ink with respect to the defect | deletion of the insulating film shown in (b), (d) is (c). 5 is a BB cross-sectional view showing a state in which a source wiring is formed after correcting a defect in the insulating film in FIG. 1 is a cross-sectional view illustrating a configuration of an inkjet head according to an embodiment of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Wiring board manufacturing apparatus 4 Alignment camera 6 Board observation camera 8 Gantry 10 Head unit 12 Inkjet head 42 Wiring board, TFT array board 44 Insulating board 46 Gate wiring (first wiring pattern)
48 Insulating film 50 Source wiring (second wiring pattern)
52a, 52b missing part 54 short circuit part 56 auxiliary capacity line (first wiring pattern)
58 Drain wiring (second wiring pattern)
60 TFT section 62 Insulating material ink 110 Defect detection section 120 Defect count calculation section 130 Correction instruction section

Claims (8)

The first wiring pattern and the second wiring pattern are formed on the substrate, and the first wiring pattern is crossed at the intersection of the first wiring pattern and the second wiring pattern. A wiring board manufacturing apparatus for manufacturing a wiring board on which an insulating film is formed so as to insulate a pattern from the second wiring pattern,
Defect detection means for detecting defects in the formed insulating film based on imaged image data obtained by imaging a substrate having an insulating film formed on the first wiring pattern;
Based on the information on the position of the detected defect and the information on the position where the second wiring pattern is formed, a defect number calculating means for calculating the number of defects in the intersection among the detected defects.
Correction instruction means for instructing correction of a defect in the intersection when the number of defects in the intersection is greater than 0 and less than a first threshold;
An apparatus for manufacturing a wiring board, comprising: The wiring substrate is a TFT array substrate,
The defect number calculating means calculates the number of defects at the intersection, and calculates the number of consecutive pixels having the intersection where the defect is detected in each pixel of the TFT array substrate,
In the correction instruction means, the number of defects at the intersection is greater than 0 and less than a first threshold, and at the same time, the number of consecutive pixels having the intersection where the defect is detected is a second threshold. The wiring board manufacturing apparatus according to claim 1, wherein if it is less than, the correction of a defect at the intersection is instructed.   The defect detection means detects a region on the substrate corresponding to a region where the luminance in the captured image data is within a predetermined range as a defect of the insulating film on the substrate. The wiring board manufacturing apparatus according to 2. An ink-jet head for discharging ink onto the wiring board;
4. The ink jet head ejects ink including an insulating material to the intersecting portion having the defect based on an instruction from the correction instruction unit. 5. Wiring board manufacturing equipment.   The wiring board manufacturing apparatus according to claim 4, wherein the insulating material is a spin-on-glass material. The first wiring pattern and the second wiring pattern are formed on the substrate, and the first wiring pattern is crossed at the intersection of the first wiring pattern and the second wiring pattern. An insulating film defect correction determination method in a wiring board manufacturing apparatus for manufacturing a wiring board in which an insulating film is formed so as to insulate a pattern from the second wiring pattern,
A defect detection step for detecting defects in the formed insulating film based on imaged image data obtained by imaging a substrate having an insulating film formed on the first wiring pattern;
A defect number calculating step for calculating the number of defects at the intersection based on the information on the position of the detected defect and the information on the position where the second wiring pattern is formed,
A correction instruction step for instructing correction of a defect in the intersection when the number of defects in the intersection is greater than 0 and less than a first threshold;
A defect correction determination method characterized by comprising:   A program for operating a computer included in the wiring board manufacturing apparatus according to any one of claims 1 to 5, wherein the program causes the computer to function as each of the means.   A computer-readable recording medium in which the program according to claim 7 is recorded.

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