JP2010060464A

JP2010060464A - Physical quantity sensor

Info

Publication number: JP2010060464A
Application number: JP2008227441A
Authority: JP
Inventors: Yutaka Takashima; 裕高島; Daigo Aoki; 大悟青木; Hideyuki Hashimoto; 秀幸橋本
Original assignee: Alps Electric Co Ltd
Current assignee: Alps Alpine Co Ltd
Priority date: 2008-09-04
Filing date: 2008-09-04
Publication date: 2010-03-18

Abstract

【課題】特に、シリコン基板に作用する応力を緩和できる物理量センサを提供することを目的としている。
【解決手段】シリコン基板２，３と、シリコン基板３に形成されたダイアフラムと、ピエゾ素子Ｂ〜Ｅと、シリコン基板３と接合されるインターポーザ１５と、を有する。インターポーザ１５は、支持基板１７と、支持基板１７の上面から下面にかけて形成される導通部１８と、を有する。インターポーザ１５とシリコン基板３間の接続領域４７には、第１有機絶縁膜４８と接続経路５０が設けられる。接続経路５０は平面方向に延びる延出部４３と、延出部４３と配線層１０間を高さ方向に繋ぐ第１接続端部５２と、延出部４３と導通部１８間を高さ方向に繋ぐ第２接続端部４６とを有する。延出部４３の導通部側接続位置αと、第１接続端部５２の素子側接続位置βとが、平面方向にずらされている。
【選択図】図２In particular, an object of the present invention is to provide a physical quantity sensor that can relieve stress acting on a silicon substrate.
SOLUTION: Silicon substrates 2 and 3, a diaphragm formed on the silicon substrate 3, piezo elements B to E, and an interposer 15 joined to the silicon substrate 3 are provided. The interposer 15 includes a support substrate 17 and a conductive portion 18 formed from the upper surface to the lower surface of the support substrate 17. A first organic insulating film 48 and a connection path 50 are provided in the connection region 47 between the interposer 15 and the silicon substrate 3. The connection path 50 includes an extension part 43 extending in the plane direction, a first connection end part 52 that connects the extension part 43 and the wiring layer 10 in the height direction, and a height direction between the extension part 43 and the conduction part 18. And a second connection end 46 connected to the. The conduction part side connection position α of the extension part 43 and the element side connection position β of the first connection end part 52 are shifted in the planar direction.
[Selection] Figure 2

Description

本発明は、特に、ＭＥＭＳ技術を用いて形成された物理量センサ関する。 The present invention particularly relates to a physical quantity sensor formed using MEMS technology.

ＭＥＭＳ（微小電気機械システム：Micro Electro Mechanical System）技術を用いて形成された圧力センサＳは、図１２に示すようにシリコン基板１００に形成されたダイアフラム１０１と、ダイアフラム１０１の変位量を検出するための検出素子１０２等を有して構成される。図１２（ａ）は圧力センサの断面図、（ｂ）はシリコン基板の平面図である。 A pressure sensor S formed using MEMS (Micro Electro Mechanical System) technology detects a diaphragm 101 formed on a silicon substrate 100 and a displacement amount of the diaphragm 101 as shown in FIG. The detecting element 102 and the like are configured. 12A is a sectional view of the pressure sensor, and FIG. 12B is a plan view of the silicon substrate.

検出素子１０２に電気的に接続される接続パッド１０３はシリコン基板表面１００ａに形成されている。 The connection pads 103 that are electrically connected to the detection elements 102 are formed on the silicon substrate surface 100a.

図１２に示す構造では、シリコン基板１００の接続パッド１０３側にインターポーザ１０５が取り付けられている。 In the structure shown in FIG. 12, an interposer 105 is attached to the connection pad 103 side of the silicon substrate 100.

インターポーザ１０５は、支持基板１０６と、支持基板１０６の厚さ（高さ）方向に貫通する導通部１０７と、回路基板に接続する導通パッド１０８とを備えて構成される。 The interposer 105 includes a support substrate 106, a conduction portion 107 that penetrates in the thickness (height) direction of the support substrate 106, and a conduction pad 108 that is connected to the circuit board.

図１２（ａ）に示すように、接続パッド１０３と導通部１０７とが接続されることで、インターポーザ１０５がシリコン基板１００と接合される。
特開２００７−１９８８２０号公報特開２００７−１９４５７４号公報 As shown in FIG. 12A, the interposer 105 is bonded to the silicon substrate 100 by connecting the connection pad 103 and the conductive portion 107.
JP 2007-198820 A JP 2007-194574 A

図１２に示す構造のようにインターポーザ１０５を備えた構造では、インターポーザ１０５とシリコン基板１００との材質の違いから、熱膨張差により、シリコン基板１００に応力が作用する問題があった。 In the structure including the interposer 105 as shown in FIG. 12, there is a problem that stress acts on the silicon substrate 100 due to a difference in thermal expansion due to a difference in material between the interposer 105 and the silicon substrate 100.

このため、図１２に示す従来構造では、圧力センサの検出精度が低下したり、ばらつきが生じた。 For this reason, in the conventional structure shown in FIG. 12, the detection accuracy of the pressure sensor is reduced or varies.

特許文献１，２に記載された発明には上記した従来の課題についての認識はなく、当然に、上記課題を解決する手段が示されていない。 The inventions described in Patent Documents 1 and 2 do not recognize the above-described conventional problems, and naturally, means for solving the above problems is not shown.

そこで本発明は上記従来の課題を解決するためのものであり、特に、シリコン基板に作用する応力を緩和できる物理量センサを提供することを目的としている。 Accordingly, the present invention is to solve the above-described conventional problems, and in particular, an object of the present invention is to provide a physical quantity sensor that can relieve stress acting on a silicon substrate.

本発明における物理量センサは、
シリコン基板と、前記シリコン基板に形成され、物理量の変化に応じて変位する変位部と、前記変位部の変位量を検出するための検出素子と、前記シリコン基板と接合されるインターポーザと、を有し、
前記インターポーザは、支持基板と、前記支持基板の上面から下面にかけて形成される導通部と、を有し、
前記検出素子側と、前記導通部との間が前記インターポーザと前記シリコン基板間の接続領域にて電気的に接続されており、
前記接続領域には、少なくとも、前記接続領域内を平面方向に向けて延出する延出部と、前記延出部と前記検出素子側間を高さ方向に繋ぐ第１接続端部とを有する接続経路と、前記接続経路に接する第１有機絶縁膜とが設けられ、前記延出部の導通部側接続位置αと、前記第１接続端部の素子側接続位置βとが、平面方向にずらされていることを特徴とするものである。 The physical quantity sensor in the present invention is
A silicon substrate; a displacement portion formed on the silicon substrate and displaced in accordance with a change in physical quantity; a detection element for detecting a displacement amount of the displacement portion; and an interposer bonded to the silicon substrate. And
The interposer includes a support substrate and a conductive portion formed from the upper surface to the lower surface of the support substrate,
The detection element side and the conductive portion are electrically connected in a connection region between the interposer and the silicon substrate,
The connection region has at least an extension portion extending in the plane direction in the connection region, and a first connection end portion connecting the extension portion and the detection element side in the height direction. A connection path and a first organic insulating film in contact with the connection path are provided, and a conduction part side connection position α of the extension part and an element side connection position β of the first connection end part are in a planar direction. It is characterized by being shifted.

上記のように、接続領域には軟質な第１有機絶縁膜が設けられている。そして、導通部側接続位置αと、素子側接続位置βとが平面方向にずらされているため、効果的に、シリコン基板とインターポーザとの熱膨張差に起因した、シリコン基板に作用する応力を従来に比べて緩和できる。これにより、シリコン基板に設けられた検出素子に作用する応力が低減され、特性低下を抑制することが出来る。 As described above, the soft first organic insulating film is provided in the connection region. Since the conduction portion side connection position α and the element side connection position β are shifted in the plane direction, the stress acting on the silicon substrate due to the difference in thermal expansion between the silicon substrate and the interposer is effectively reduced. It can be relaxed compared to the past. Thereby, the stress which acts on the detection element provided in the silicon substrate is reduced, and deterioration of characteristics can be suppressed.

本発明では、前記接続経路は、前記延出部と、前記第１接続端部と、前記延出部と前記導通部間とを高さ方向に繋ぐ第２接続端部と、を有して形成され、前記導通部側接続位置αが、前記延出部と前記第２接続端部との接続位置で規定されることが好ましい。これにより、より効果的に、シリコン基板に作用する応力を緩和できる。 In the present invention, the connection path includes the extension part, the first connection end part, and a second connection end part that connects the extension part and the conduction part in a height direction. Preferably, the conductive portion side connection position α is defined by a connection position between the extension portion and the second connection end portion. Thereby, the stress which acts on a silicon substrate can be relieved more effectively.

または本発明では、前記接続経路は、前記第１接続端部と、前記導通部から高さ方向に形成された第２接続端部と、前記第１接続端部から屈曲して前記接続領域内を平面方向に向けて延出する第１延出部と、前記第２接続端部から屈曲して前記接続領域内を平面方向に向けて延出する第２延出部と、を有し、前記導通部側接続位置αが、前記第１延出部と前記第２延出部との接続位置で規定される形態を提示できる。これにより、従来に比べて、より効果的に、シリコン基板に作用する応力を緩和できる。 Alternatively, in the present invention, the connection path includes the first connection end, the second connection end formed in the height direction from the conduction portion, and the first connection end bent in the connection region. A first extension portion extending in the plane direction, and a second extension portion bent from the second connection end portion and extending in the plane direction in the connection region, The form which the said conduction | electrical_connection part side connection position (alpha) is prescribed | regulated by the connection position of the said 1st extension part and the said 2nd extension part can be shown. Thereby, compared with the past, the stress which acts on a silicon substrate can be relieved more effectively.

また本発明では、前記変位部は、前記シリコン基板の中央領域に形成され、前記検出素子は、前記変位部の側縁部の略中央に配置されており、前記第１有機絶縁膜は、前記シリコン基板の隅領域にのみ設けられていることが好ましい。第１有機絶縁膜とシリコン基板との間でも熱膨張差により、多少、応力を生じる。よって、上記のように配置することで、第１有機絶縁膜を検出素子から効果的に離すことができ、検出素子に作用する応力を効果的に低減できる。 Further, in the present invention, the displacement part is formed in a central region of the silicon substrate, the detection element is disposed substantially at the center of a side edge of the displacement part, and the first organic insulating film is It is preferably provided only in the corner region of the silicon substrate. Some stress is also generated between the first organic insulating film and the silicon substrate due to the difference in thermal expansion. Therefore, by arranging as described above, the first organic insulating film can be effectively separated from the detection element, and the stress acting on the detection element can be effectively reduced.

また本発明では、前記導通部側接続位置αは、前記素子側接続位置βよりも、前記シリコン基板の外周側に位置しており、前記導通部が、前記インターポーザの隅部に形成されていることが好ましい。これにより、より簡単且つ適切に導通部側接続位置αと素子側接続位置βとを、ずらして配置できる。 In the present invention, the conduction part side connection position α is located on the outer peripheral side of the silicon substrate with respect to the element side connection position β, and the conduction part is formed at a corner of the interposer. It is preferable. Thereby, the conduction part side connection position α and the element side connection position β can be shifted and arranged more simply and appropriately.

また本発明では、前記インターポーザの前記シリコン基板との反対面側に第２有機絶縁膜及び、前記導通部と前記第２有機絶縁膜の表面に現れて回路基板との間を電気的に接続するための接続経路が設けられており、導通部側接続位置Ｘと、回路側接続位置Ｙとが平面方向に、ずらされていることが好ましい。上記構成により、インターポーザを回路基板と電気的に接続したときに、インターポーザと回路基板間での熱膨張差に起因した応力を緩和でき、ひいては、シリコン基板に作用する応力を、より効果的に低減することができる。 In the present invention, the interposer is electrically connected between the second organic insulating film on the side opposite to the silicon substrate and the conductive substrate and the surface of the second organic insulating film. For this reason, it is preferable that the conduction portion side connection position X and the circuit side connection position Y are shifted in the planar direction. With the above configuration, when the interposer is electrically connected to the circuit board, the stress caused by the difference in thermal expansion between the interposer and the circuit board can be relieved, and the stress acting on the silicon substrate can be reduced more effectively. can do.

また本発明では、前記有機絶縁膜は、ポリイミド樹脂であることが好ましい。ポリイミド樹脂を用いることで、より効果的に応力緩和を図ることが出来る。 In the present invention, the organic insulating film is preferably a polyimide resin. By using a polyimide resin, stress relaxation can be achieved more effectively.

本発明の物理量センサによれば、シリコン基板とインターポーザとの熱膨張差等に起因した、シリコン基板に作用する応力を従来に比べて効果的に緩和できる。これにより、シリコン基板に設けられた検出素子に作用する応力を低減でき、特性低下を抑制することが出来る。 According to the physical quantity sensor of the present invention, the stress acting on the silicon substrate due to the difference in thermal expansion between the silicon substrate and the interposer can be effectively reduced as compared with the conventional case. Thereby, the stress which acts on the detection element provided in the silicon substrate can be reduced, and the characteristic deterioration can be suppressed.

図１は、本実施形態における圧力センサ（物理量センサ）の斜視図、図２は、図１に示す圧力センサをＡ−Ａ線に沿って高さ方向（厚さ方向）から切断した切断面を示す断面図、図３は、本実施形態の圧力センサと回路基板との実装構造を示す断面図、図４、図６、図７は、図２とは異なる本実施形態の圧力センサの断面図、図５は、図２とは異なる接続構造を示す部分拡大断面図、図８（ａ）及び図９（ａ）はシリコン基板表面の平面図、図８（ｂ）及び図９（ｂ）は、Ｆ−Ｆ線に沿って高さ方向（厚さ方向）から切断した切断面を示す部分断面図、である。 FIG. 1 is a perspective view of a pressure sensor (physical quantity sensor) in the present embodiment, and FIG. 2 is a cut surface of the pressure sensor shown in FIG. 1 cut along a line AA from the height direction (thickness direction). FIG. 3 is a cross-sectional view showing a mounting structure of the pressure sensor and the circuit board according to the present embodiment, and FIGS. 4, 6, and 7 are cross-sectional views of the pressure sensor according to the present embodiment different from FIG. 5 is a partially enlarged cross-sectional view showing a connection structure different from FIG. 2, FIGS. 8A and 9A are plan views of the silicon substrate surface, and FIGS. 8B and 9B are FIG. It is a fragmentary sectional view which shows the cut surface cut | disconnected from the height direction (thickness direction) along the FF line.

図１，図２に示すピエゾ抵抗型圧力センサ１は、例えば、絶対圧検知用（すなわちキャビティ内が真空である）である。 The piezoresistive pressure sensor 1 shown in FIGS. 1 and 2 is, for example, for absolute pressure detection (that is, the inside of the cavity is vacuum).

図１，図２に示すピエゾ抵抗型圧力センサ１は、第１シリコン基板２と、第２シリコン基板３とを有して構成される。例えば第１シリコン基板２及び第２シリコン基板３の間には、酸化絶縁層（ＳｉＯ₂層）が介在し、３層のＳＯＩ基板を構成している。 The piezoresistive pressure sensor 1 shown in FIGS. 1 and 2 includes a first silicon substrate 2 and a second silicon substrate 3. For example, an oxide insulating layer (SiO ₂ layer) is interposed between the first silicon substrate 2 and the second silicon substrate 3 to constitute a three-layer SOI substrate.

図２に示すように、第１シリコン基板２の上面には、キャビティ（凹部）７が形成される。図２及び図８（ａ）に示すように、キャビティ７の上側に位置する第２シリコン基板３によりダイアフラム８が形成されている。図８（ａ）に示すように、キャビティ７及びダイアフラム８は平面視にてピエゾ抵抗型圧力センサ１の略中央位置に形成され、キャビティ７及びダイアフラム８の平面視形状は略矩形状である。 As shown in FIG. 2, a cavity (concave portion) 7 is formed on the upper surface of the first silicon substrate 2. As shown in FIGS. 2 and 8A, a diaphragm 8 is formed by the second silicon substrate 3 located above the cavity 7. As shown in FIG. 8A, the cavity 7 and the diaphragm 8 are formed at a substantially central position of the piezoresistive pressure sensor 1 in a plan view, and the plan view shape of the cavity 7 and the diaphragm 8 is a substantially rectangular shape.

図８（ａ）に示すように、ダイアフラム８の周囲は第２シリコン基板３に圧力が作用しても歪みが生じない固定領域９である。 As shown in FIG. 8A, the periphery of the diaphragm 8 is a fixed region 9 in which no distortion occurs even when pressure is applied to the second silicon substrate 3.

図８（ａ）に示すように、ダイアフラム８の４辺の各側縁部の略中央には、ピエゾ素子Ｂ〜Ｅが夫々形成される。第１ピエゾ素子Ｂと第２ピエゾ素子Ｃとが第１の出力パッド１１を介して直列接続される。また、第３ピエゾ素子Ｄと第４ピエゾ素子Ｅとが第２の出力パッド１２を介して直列接続される。 As shown in FIG. 8A, piezo elements B to E are formed at substantially the center of each side edge of the four sides of the diaphragm 8, respectively. The first piezo element B and the second piezo element C are connected in series via the first output pad 11. Further, the third piezo element D and the fourth piezo element E are connected in series via the second output pad 12.

第１ピエゾ素子Ｂと第３ピエゾ素子Ｄは入力パッド１３を介して、及び、第２ピエゾ素子Ｃと第４ピエゾ素子Ｅはグランドパッド１４を介して、夫々接続される。以下、出力パッド１１，１２、入力パッド１３及びグランドパッド１４をまとめて、接続パッド１１〜１４と記載する。各ピエゾ素子Ｂ〜Ｅに接続される配線層１０（図８（ｂ）参照）は固定領域９上に延出形成され、各接続パッド１１〜１４は固定領域９の四隅近傍に設けられている。配線層１０や各接続パッド１１〜１４はスパッタやメッキによりＡｕやＡｌ等の良導体で形成される。 The first piezo element B and the third piezo element D are connected via the input pad 13, and the second piezo element C and the fourth piezo element E are connected via the ground pad 14, respectively. Hereinafter, the output pads 11 and 12, the input pad 13, and the ground pad 14 are collectively referred to as connection pads 11 to 14. The wiring layer 10 (see FIG. 8B) connected to each of the piezo elements B to E extends on the fixed region 9, and the connection pads 11 to 14 are provided near the four corners of the fixed region 9. . The wiring layer 10 and the connection pads 11 to 14 are formed of a good conductor such as Au or Al by sputtering or plating.

ダイアフラム８が圧力を受けて歪んだときに、第２ピエゾ素子Ｃ及び前記第３ピエゾ素子Ｄの抵抗値の増減傾向と、第１ピエゾ素子Ｂ及び前記第４ピエゾ素子Ｅの抵抗値の増減傾向とが逆傾向となるように、各ピエゾ素子Ｂ〜Ｅが配置されている。図８（ａ）では各ピエゾ素子Ｂ〜Ｅの平面視形状が略矩形状となっているが実際には、ミアンダ形状で形成される。 When the diaphragm 8 is distorted due to pressure, the resistance value of the second piezo element C and the third piezo element D increases and decreases, and the resistance value of the first piezo element B and the fourth piezo element E increases and decreases. Each of the piezo elements B to E is arranged so as to have a reverse tendency. In FIG. 8A, each of the piezo elements B to E has a substantially rectangular shape in plan view, but is actually formed in a meander shape.

図１，図２に示すように、第２シリコン基板３側に、インターポーザ１５が接合されている。例えば、インターポーザ１５の略中央部には、上面から下面に向けて貫通する通気口（図示せず）が形成されている。 As shown in FIGS. 1 and 2, an interposer 15 is bonded to the second silicon substrate 3 side. For example, a vent hole (not shown) penetrating from the upper surface to the lower surface is formed in a substantially central portion of the interposer 15.

インターポーザ１５は、支持基板１７と、支持基板１７に支持された導通部１８とを有して構成される。支持基板１７は例えばガラス（例えばパイレックス（登録商標））で形成される、また導通部１８は例えばシリコンで形成される。 The interposer 15 includes a support substrate 17 and a conductive portion 18 supported by the support substrate 17. The support substrate 17 is made of, for example, glass (for example, Pyrex (registered trademark)), and the conductive portion 18 is made of, for example, silicon.

図１に示すように支持基板１７は、所定の厚みがあり、平面が略矩形状の（直方体状の）基板の四隅を上面１７ｅから下面１７ｆに向けて凹形状に切り欠いた形状である。 As shown in FIG. 1, the support substrate 17 has a predetermined thickness and has a shape in which the four corners of a substantially rectangular (cuboid) substrate are cut out in a concave shape from the upper surface 17e toward the lower surface 17f.

支持基板１７に形成された凹部２６内にそれぞれ、導通部１８が設けられる。
よって、各導通部１８は、支持基板１７の上面１７ｅから下面１７ｆにかけて形成され、上面１７ｅ及び下面１７ｆで露出している。またこの実施形態では、インターポーザ１５の四隅に形成された各凹部２６内に各導通部１８が設けられるため、各導通部１８の側面の一部も外周に露出している。この実施形態では、各導通部１８は直方体状であり、各導通部１８の露出した側面は、支持基板１７の側面１７ｇと同一面で形成されている。ただし導通部１８の形状は直方体に限定されない。例えば、導通部１８は、円柱形状を１／４にカットした形状であってもよい。 Conductive portions 18 are respectively provided in the recesses 26 formed in the support substrate 17.
Therefore, each conduction | electrical_connection part 18 is formed from the upper surface 17e of the support substrate 17 to the lower surface 17f, and is exposed in the upper surface 17e and the lower surface 17f. Moreover, in this embodiment, since each conduction | electrical_connection part 18 is provided in each recessed part 26 formed in the four corners of the interposer 15, a part of side surface of each conduction | electrical_connection part 18 is exposed to the outer periphery. In this embodiment, each conducting portion 18 has a rectangular parallelepiped shape, and the exposed side surface of each conducting portion 18 is formed in the same plane as the side surface 17 g of the support substrate 17. However, the shape of the conducting portion 18 is not limited to a rectangular parallelepiped. For example, the conducting part 18 may have a shape obtained by cutting a cylindrical shape into ¼.

ここで、導通部１８の形成位置は、後述する変形例にも示すようにインターポーザ１５の隅部に限定されない。例えば、支持基板１７の側面１７ｇの略中央位置に凹形状に切欠いて、その凹部内に導通部１８が形成される形態でもよい。特に、インターポーザ１５が円形等の多角形状でない場合、インターポーザ１５の任意の側面位置に導通部１８を設けるようにすることが好適である。ただしインターポーザ１５が多角形状である場合、導通部１８をインターポーザ１５の隅部に形成することが好適である。 Here, the formation position of the conducting portion 18 is not limited to the corner portion of the interposer 15 as shown in a modified example described later. For example, a configuration in which a concave shape is cut out at a substantially central position of the side surface 17g of the support substrate 17 and the conductive portion 18 is formed in the concave portion may be employed. In particular, when the interposer 15 is not a polygonal shape such as a circle, it is preferable to provide the conducting portion 18 at an arbitrary side surface position of the interposer 15. However, when the interposer 15 has a polygonal shape, it is preferable to form the conducting portion 18 at the corner of the interposer 15.

図２、図８（ｂ）に示すように、第２シリコン基板３の上面３ａに各ピエゾ素子Ｂ〜Ｅと接続される配線層１０が形成され、配線層１０上から第２シリコン基板３の上面３ａにかけて無機絶縁材料による保護膜３６が形成される。保護膜３６はＴｉＮ、Ａｌ₂Ｏ₃、ＳｉＯ₂等で形成される。保護膜３６の平均膜厚は、０．８〜１．８μｍ程度である。 As shown in FIGS. 2 and 8B, a wiring layer 10 connected to each of the piezoelectric elements B to E is formed on the upper surface 3a of the second silicon substrate 3, and the second silicon substrate 3 is formed on the wiring layer 10 from above. A protective film 36 made of an inorganic insulating material is formed over the upper surface 3a. The protective film 36 is made of TiN, Al ₂ O ₃ , SiO ₂ or the like. The average film thickness of the protective film 36 is about 0.8 to 1.8 μm.

図２に示すように、インターポーザ１５と、第２シリコン基板３の間には、ダイアフラム８やピエゾ素子Ｂ〜Ｅを除く位置に、接続領域４７が設けられる。接続領域４７は、第１有機絶縁膜４８と第１有機絶縁膜４８に埋設された接続経路５０を備えて構成される。 As shown in FIG. 2, a connection region 47 is provided between the interposer 15 and the second silicon substrate 3 at a position excluding the diaphragm 8 and the piezoelectric elements B to E. The connection region 47 includes a first organic insulating film 48 and a connection path 50 embedded in the first organic insulating film 48.

以下、接続領域４７の構造について説明する。この実施形態では、第１有機絶縁膜４８は、下側有機絶縁膜３７と上側有機絶縁膜４４の積層構造である。 Hereinafter, the structure of the connection region 47 will be described. In this embodiment, the first organic insulating film 48 has a laminated structure of a lower organic insulating film 37 and an upper organic insulating film 44.

図２に示すように、保護膜３６上には下側有機絶縁膜３７が形成されている。下側有機絶縁膜３７の平均膜厚は、４．０〜１０．０μｍ程度である。この下側有機絶縁膜３７は、ダイアフラム８やピエゾ素子Ｂ〜Ｅと重ならないように第２シリコン基板３の固定領域９の上方に形成されている。図８（ａ）に示すように、下側有機絶縁膜３７は、第２シリコン基板３の四隅のみに形成されることが好適である。 As shown in FIG. 2, a lower organic insulating film 37 is formed on the protective film 36. The average film thickness of the lower organic insulating film 37 is about 4.0 to 10.0 μm. The lower organic insulating film 37 is formed above the fixed region 9 of the second silicon substrate 3 so as not to overlap with the diaphragm 8 and the piezoelectric elements B to E. As shown in FIG. 8A, the lower organic insulating film 37 is preferably formed only at the four corners of the second silicon substrate 3.

図２、図８（ａ）に示すように、下側有機絶縁膜３７及び保護膜３６には貫通孔３８が形成され、この貫通孔３８の底面に配線層１０の表面が露出している。 As shown in FIGS. 2 and 8A, a through hole 38 is formed in the lower organic insulating film 37 and the protective film 36, and the surface of the wiring layer 10 is exposed at the bottom surface of the through hole 38.

図２、図８（ａ）に示すように、貫通孔３８から下側有機絶縁膜３７の表面３７ａにかけて各接続パッド１１〜１４が形成される。各接続パッド１１〜１４は、下側有機絶縁膜３７の表面に延出する延出部４３を備える。 As shown in FIGS. 2 and 8A, the connection pads 11 to 14 are formed from the through hole 38 to the surface 37 a of the lower organic insulating film 37. Each of the connection pads 11 to 14 includes an extending portion 43 that extends to the surface of the lower organic insulating film 37.

図２に示すようにインターポーザ１５と、下側有機絶縁膜３７及び各接続パッド１１〜１４の間には上側有機絶縁膜４４が設けられる。上側有機絶縁膜４４は下側有機絶縁膜３７と同領域に形成される。よって上側有機絶縁膜４４は、インターポーザ１５の下面１７ｆの四隅領域のみに設けられることが好適である。 As shown in FIG. 2, an upper organic insulating film 44 is provided between the interposer 15, the lower organic insulating film 37, and the connection pads 11 to 14. The upper organic insulating film 44 is formed in the same region as the lower organic insulating film 37. Therefore, the upper organic insulating film 44 is preferably provided only in the four corner regions of the lower surface 17f of the interposer 15.

図２に示すように、各上側有機絶縁膜４４には貫通孔４５が形成され、接続部（第２接続端部）４６が、各貫通孔４５内に形成される。各第２接続端部４６は各導通部１８及び各接続パッド１１〜１４の延出部４３と電気的に接続されている。 As shown in FIG. 2, a through hole 45 is formed in each upper organic insulating film 44, and a connection portion (second connection end portion) 46 is formed in each through hole 45. Each second connection end portion 46 is electrically connected to each conduction portion 18 and the extension portion 43 of each connection pad 11-14.

図２に示すように、各接続パッド１１〜１４から第２接続端部４６に至る接続経路５０は、平面方向に向けて延出する延出部４３と、延出部４３の内周側の端部にて配線層１０に至る第１接続端部５２と、延出部４３の外周側の端部にて導通部１８に至る第２接続端部４６とを有して形成される。 As shown in FIG. 2, the connection path 50 from each connection pad 11 to 14 to the second connection end portion 46 includes an extension portion 43 extending in the plane direction and an inner peripheral side of the extension portion 43. The first connection end portion 52 that reaches the wiring layer 10 at the end portion and the second connection end portion 46 that reaches the conduction portion 18 at the end portion on the outer peripheral side of the extension portion 43 are formed.

したがって図２に示すように、第１有機絶縁膜４８内に埋設された延出部４３の導通部側接続位置αと、第１接続端部５２の素子側接続位置βとは、面方向にずれて配置されている。 Therefore, as shown in FIG. 2, the conduction part side connection position α of the extension part 43 embedded in the first organic insulating film 48 and the element side connection position β of the first connection end part 52 are in the plane direction. They are offset.

図１，図２に示すようにインターポーザ１５の上面１７ｅには、第２有機絶縁膜４９が設けられる。第２有機絶縁膜４９は次に説明する貫通孔６５の形成位置や上記した通気口を形成する場合には、その部分も除いて、インターポーザ１５の上面１７ｅ全域に形成できる。 As shown in FIGS. 1 and 2, a second organic insulating film 49 is provided on the upper surface 17 e of the interposer 15. The second organic insulating film 49 can be formed over the entire upper surface 17e of the interposer 15 except for the formation position of the through hole 65 described below and the vent hole described above.

図２に示すように、第２有機絶縁膜４９には各導通部１８と対向する位置に夫々、貫通孔６５が形成される。そして、各導通部１８が各貫通孔６５の底面に露出している。図２に示すように、各導通パッド（接続経路）６６が各貫通孔６５から第２有機絶縁膜４９の表面４９ａにかけて形成される。図２に示すように、各導通パッド６６は第２有機絶縁膜４９の表面４９ａに延出した延出部６７を備える。導通パッド６６は、半田濡れ性に優れたＮｉ，Ｃｕ等を有する材質で形成されることが好適である。 As shown in FIG. 2, a through hole 65 is formed in the second organic insulating film 49 at a position facing each conducting portion 18. Each conductive portion 18 is exposed on the bottom surface of each through hole 65. As shown in FIG. 2, each conductive pad (connection path) 66 is formed from each through hole 65 to the surface 49 a of the second organic insulating film 49. As shown in FIG. 2, each conductive pad 66 includes an extending portion 67 that extends to the surface 49 a of the second organic insulating film 49. The conductive pad 66 is preferably formed of a material having Ni, Cu or the like excellent in solder wettability.

図１，図２に示すように、各半田ボール２０が各延出部６７上に設けられる。ここで、図２に示すように、導通パッド（接続経路）６６の導通部側接続位置Ｘと、回路基板（図３に図示する）との接続位置（回路側接続位置）Ｙとが、平面（Ｘ−Ｙ面）方向に、ずれて配置されている。ここで回路側接続位置Ｙは、延出部６７、あるいは半田ボール２０の設置位置である。 As shown in FIGS. 1 and 2, each solder ball 20 is provided on each extending portion 67. Here, as shown in FIG. 2, the conductive portion side connection position X of the conductive pad (connection path) 66 and the connection position (circuit side connection position) Y with the circuit board (shown in FIG. 3) are planar. They are displaced in the (XY plane) direction. Here, the circuit side connection position Y is an installation position of the extending portion 67 or the solder ball 20.

図１，図２に示す圧力センサ１を回路基板３０上に実装した図が図３である。図３に示すように圧力センサ１を図１，図２の状態から反転させて、インターポーザ１５を回路基板３０上に対向させる。そして、インターポーザ１５に形成された各導通パッド６６（の延出部６７）と回路基板３０の各半田ランド部３１との間が半田層２１にて接合される。 FIG. 3 is a diagram in which the pressure sensor 1 shown in FIGS. 1 and 2 is mounted on a circuit board 30. As shown in FIG. 3, the pressure sensor 1 is reversed from the state shown in FIGS. 1 and 2, and the interposer 15 is opposed to the circuit board 30. The conductive pads 66 (extension portions 67) formed on the interposer 15 and the solder land portions 31 of the circuit board 30 are joined by the solder layer 21.

本実施形態の圧力センサ１では、図２を用いて説明したように、第２シリコン基板３とインターポーザ１５との間の接続領域４７には軟質な第１有機絶縁膜４８が介在している。また配線層１０と導通部１８の間を電気的に接続する接続経路５０が第１有機絶縁膜４８に埋設される。そして本実施形態では、延出部４３の導通部側接続位置αと、第１接続端部５２の素子側接続位置βとが、平面方向に、ずれて配置されている。このため応力が作用したときに接続経路５０が変形し、またこのとき、第１有機絶縁膜４８がクッション的役割を果している。したがって、シリコン基板２，３とインターポーザ１５との熱膨張差等に起因した、シリコン基板２，３に作用する応力を第１有機絶縁膜４８と接続位置をずらした接続経路５０を備える接続領域４７の部分で、効果的に緩和できる。これにより、第２シリコン基板３に設けられたピエゾ素子Ｂ〜Ｅに作用する応力が低減され、特性低下を抑制することが出来る。 In the pressure sensor 1 of the present embodiment, as described with reference to FIG. 2, the soft first organic insulating film 48 is interposed in the connection region 47 between the second silicon substrate 3 and the interposer 15. In addition, a connection path 50 that electrically connects the wiring layer 10 and the conductive portion 18 is embedded in the first organic insulating film 48. And in this embodiment, the conduction | electrical_connection part side connection position (alpha) of the extension part 43 and the element side connection position (beta) of the 1st connection edge part 52 are shifted | deviated and arrange | positioned in the plane direction. Therefore, the connection path 50 is deformed when stress is applied, and at this time, the first organic insulating film 48 plays a cushioning role. Accordingly, the connection region 47 including the connection path 50 in which the stress acting on the silicon substrates 2 and 3 due to the difference in thermal expansion between the silicon substrates 2 and 3 and the interposer 15 is shifted from the first organic insulating film 48 is connected. This part can be effectively relieved. Thereby, the stress which acts on the piezo elements B to E provided on the second silicon substrate 3 is reduced, and deterioration in characteristics can be suppressed.

本実施形態では、第１有機絶縁膜４８は接続経路５０に接していることが必要であるが、好ましくは図２等に示すように、接続経路５０が第１有機絶縁膜４８に埋設された形態である。ただし埋設される形態であっても、接続経路５０の一部が第１有機絶縁膜４８から露出した状態であってもよい。 In the present embodiment, the first organic insulating film 48 needs to be in contact with the connection path 50, but preferably the connection path 50 is embedded in the first organic insulating film 48 as shown in FIG. It is a form. However, even if it is embedded, a part of the connection path 50 may be exposed from the first organic insulating film 48.

次に、図８に示すように、ダイアフラム（変位部）８は、第２シリコン基板３の中央領域に形成され、ピエゾ素子Ｂ〜Ｅは、ダイアフラム８の側縁部の略中央に設けられる。そして、各接続パッド１１〜１４及び各下側有機絶縁膜３７は、第２シリコン基板３の四隅領域にのみ設けられる。なお上側有機絶縁膜４４は、下側有機絶縁膜３７とほぼ同じ領域に形成されるので、上側有機絶縁膜４４も四隅領域にのみ設けられる。これに対して図９に示す形態では、下側有機絶縁膜３７が第２シリコン基板３の四隅領域のみならず、各隅領域から第２シリコン基板３の側部領域に沿って延出して形成される。図９では下側有機絶縁膜３７が第２シリコン基板３の固定領域９のほぼ全域に形成されている。また下側有機絶縁膜３７上に形成される各接続パッド１１〜１４には、下側有機絶縁膜３７上に長く延出する２本の腕部（メタル接合部）７０が形成されている。腕部７０は、その下側に形成されている配線層１０とほぼ同様のパターンで形成されている。 Next, as shown in FIG. 8, the diaphragm (displacement portion) 8 is formed in the central region of the second silicon substrate 3, and the piezo elements B to E are provided in the approximate center of the side edge portion of the diaphragm 8. The connection pads 11 to 14 and the lower organic insulating films 37 are provided only in the four corner regions of the second silicon substrate 3. Since the upper organic insulating film 44 is formed in substantially the same region as the lower organic insulating film 37, the upper organic insulating film 44 is also provided only in the four corner regions. On the other hand, in the embodiment shown in FIG. 9, the lower organic insulating film 37 is formed so as to extend not only from the four corner regions of the second silicon substrate 3 but also from the corner regions along the side regions of the second silicon substrate 3. Is done. In FIG. 9, the lower organic insulating film 37 is formed over almost the entire fixed region 9 of the second silicon substrate 3. Each connection pad 11 to 14 formed on the lower organic insulating film 37 is formed with two arm portions (metal bonding portions) 70 extending long on the lower organic insulating film 37. The arm portion 70 is formed in a pattern substantially the same as that of the wiring layer 10 formed below the arm portion 70.

図９に示す構造では、腕部７０の部分をインターポーザ１５とのメタル接合領域に使用でき、インターポーザ１５と第２シリコン基板３間の接合強度を向上できるといった利点がある。その一方で、各下側有機絶縁膜３７が各ピエゾ素子Ｂ〜Ｅに近接配置される。下側有機絶縁膜３７とシリコン基板３の間でも熱膨張差により多少、応力が生じるので、図９の配置であると、ピエゾ素子Ｂ〜Ｅに対する応力の影響が大きくなってしまう。したがって、図８に示すように、下側有機絶縁膜３７を第２シリコン基板３の四隅領域のみに設けることで、下側有機絶縁膜３７を、ピエゾ素子Ｂ〜Ｅから遠ざけることができ、ピエゾ素子Ｂ〜Ｅに対する応力の影響を小さくできる。したがって、より効果的に、特性劣化を抑制することが出来る。 The structure shown in FIG. 9 has an advantage that the arm portion 70 can be used as a metal bonding region with the interposer 15 and the bonding strength between the interposer 15 and the second silicon substrate 3 can be improved. On the other hand, each lower organic insulating film 37 is disposed close to each piezoelectric element B to E. Since some stress is also generated between the lower organic insulating film 37 and the silicon substrate 3 due to the difference in thermal expansion, the influence of the stress on the piezoelectric elements B to E becomes large in the arrangement shown in FIG. Therefore, as shown in FIG. 8, by providing the lower organic insulating film 37 only in the four corner regions of the second silicon substrate 3, the lower organic insulating film 37 can be moved away from the piezoelectric elements B to E. The influence of stress on the elements B to E can be reduced. Therefore, it is possible to more effectively suppress characteristic deterioration.

本実施形態では、導通部側接続位置αと、素子側接続位置βとを、平面方向に、ずらして配置するが、このとき、中央領域に形成されたダイアフラム８を避けるように第１有機絶縁膜４８及び接続経路５０を設けないといけない。 In the present embodiment, the conduction portion side connection position α and the element side connection position β are shifted from each other in the plane direction. At this time, the first organic insulation is avoided so as to avoid the diaphragm 8 formed in the central region. The membrane 48 and the connection path 50 must be provided.

そこで、図２に示すように、導通部側接続位置αを、素子側接続位置βよりもシリコン基板２，３の外周側に位置させ、しかも、図１，図２に示すように、導通部１８を、インターポーザ１５の四隅に形成した。導通部１８をインターポーザ１５の隅部に形成することで、各導通部１８をインターポーザ１５の２つの側面に露出する位置まで最大限に大きく形成できる。これにより、ダイアフラム８の周囲の固定領域９（図８参照）の幅が狭くても、ダイアフラム８を避けた位置で、より簡単且つ適切に、導通部側接続位置αと、素子側接続位置βとをずらして配置できる。また、導通部１８の平面方向での断面を大きくでき、導通部１８の電気抵抗値を低減できる。 Therefore, as shown in FIG. 2, the conduction part side connection position α is positioned on the outer peripheral side of the silicon substrates 2 and 3 with respect to the element side connection position β, and as shown in FIGS. 18 were formed at the four corners of the interposer 15. By forming the conductive portions 18 at the corners of the interposer 15, each conductive portion 18 can be formed to a maximum size up to a position exposed on the two side surfaces of the interposer 15. As a result, even if the width of the fixed region 9 (see FIG. 8) around the diaphragm 8 is narrow, the conduction part side connection position α and the element side connection position β can be more easily and appropriately at a position avoiding the diaphragm 8. And can be shifted. Moreover, the cross section in the planar direction of the conduction | electrical_connection part 18 can be enlarged, and the electrical resistance value of the conduction | electrical_connection part 18 can be reduced.

導通部１８を、インターポーザ１５の四隅に形成するには、例えば図１０に示すように、１つの基板から多数の圧力センサに切り出す際、縦横方向（Ｘ方向及びＹ方向）に所定間隔で並んだ各導通部５１の中央位置で、ダイシング方向を直交させて導通部５１を分断する。これにより、インターポーザ１５の４隅に導通部１８が形成された図１に示す圧力センサを複数個、同じ基板から得ることが出来る。図１０に示す導通部５１を円柱状で形成して図１０に示すように切断すれば、圧力センサのインターポーザ１５の四隅に円柱を１／４にカットした導通部１８を形成することができる。 In order to form the conductive portions 18 at the four corners of the interposer 15, for example, as shown in FIG. 10, when cutting out from a single substrate into a large number of pressure sensors, they are arranged at predetermined intervals in the vertical and horizontal directions (X direction and Y direction). At the center position of each conduction part 51, the dicing direction is orthogonalized and the conduction part 51 is divided. Thereby, a plurality of pressure sensors shown in FIG. 1 in which the conducting portions 18 are formed at the four corners of the interposer 15 can be obtained from the same substrate. If the conduction | electrical_connection part 51 shown in FIG. 10 is formed in a column shape, and it cut | disconnects as shown in FIG. 10, the conduction | electrical_connection part 18 which cut the cylinder into 1/4 at the four corners of the interposer 15 of a pressure sensor can be formed.

本実施形態では、接続経路５０は、第１有機絶縁膜４８の内部にて、平面方向に向けて延出する延出部４３と、延出部４３の一方の端部側と、導通部１８との間を高さ方向（厚さ方向）に向けて繋ぐ第２接続端部４６と、延出部４３の他方の端部側と、配線層１０間を高さ方向（厚さ方向）に向けて繋ぐ第１接続端部５２とを有して構成される。このような構成により、応力が作用したときに接続経路５０をより変形させやすく、シリコン基板２，３に作用する応力を、より効果的に緩和することが出来る。 In the present embodiment, the connection path 50 includes an extension part 43 extending in the plane direction inside the first organic insulating film 48, one end side of the extension part 43, and the conduction part 18. In the height direction (thickness direction) between the second connection end portion 46, which is connected in the height direction (thickness direction), the other end side of the extension portion 43, and the wiring layer 10. It has the 1st connection end part 52 connected toward, and is comprised. With such a configuration, the connection path 50 can be more easily deformed when stress is applied, and the stress acting on the silicon substrates 2 and 3 can be more effectively reduced.

また接続領域４７の構造としては、図２の形態に限定されない。例えば図２に示す上側有機絶縁膜４４及び第２接続端部４６を除き、第１有機絶縁膜４８を下側有機絶縁膜３７の１層で構成し、接続経路を接続パッド１１〜１４のみで構成し、接続パッド１１〜１４と導通部１８とを直接接続した構造であってもよい。このとき、導通部側接続位置αは、導通部１８と延出部４３との接続位置で規定される。 Further, the structure of the connection region 47 is not limited to the form shown in FIG. For example, except for the upper organic insulating film 44 and the second connection end portion 46 shown in FIG. 2, the first organic insulating film 48 is constituted by one layer of the lower organic insulating film 37, and the connection path is composed of only the connection pads 11 to 14. The structure which comprised and connected the connection pads 11-14 and the conduction | electrical_connection part 18 directly may be sufficient. At this time, the conduction part side connection position α is defined by the connection position between the conduction part 18 and the extension part 43.

次に、図１，図２に示す実施形態では、インターポーザ１５の上面１７ｅに第２有機絶縁膜４９が形成されている。そして導通パッド（接続経路）６６が第２有機絶縁膜４９の表面４９ａにまで延出しており、導通パッド６６の導通部側接続位置Ｘと、回路基板３０との回路側接続位置Ｙとが、平面方向に、ずれて配置されている。これにより、図３のように、インターポーザ１５の導通パッド６６（の延出部６７）と、回路基板３０の半田ランド部３１間を半田層２１にて半田接合したとき、インターポーザ１５と回路基板３０との間での熱膨張差に起因する応力を効果的に緩和でき、ひいては、シリコン基板２，３に作用する応力をより効果的に緩和できる。したがって、より効果的に特性劣化を抑えることが出来る。 Next, in the embodiment shown in FIGS. 1 and 2, a second organic insulating film 49 is formed on the upper surface 17 e of the interposer 15. And the conduction pad (connection path) 66 extends to the surface 49a of the second organic insulating film 49, and the conduction part side connection position X of the conduction pad 66 and the circuit side connection position Y with the circuit board 30 are: They are displaced in the plane direction. Thus, as shown in FIG. 3, when the conductive pad 66 (extension portion 67) of the interposer 15 and the solder land portion 31 of the circuit board 30 are soldered together by the solder layer 21, the interposer 15 and the circuit board 30 are connected. The stress caused by the difference in thermal expansion between the first and second substrates can be effectively relieved, and consequently the stress acting on the silicon substrates 2 and 3 can be more effectively relieved. Therefore, it is possible to more effectively suppress characteristic deterioration.

本実施形態では、下側有機絶縁膜３７、上側有機絶縁膜４４、及び第２有機絶縁膜４９は、夫々、ポリイミド樹脂で形成されることが好適である。ポリイミド樹脂を用いることで、より効果的に、応力緩和を図ることが可能になる。 In this embodiment, it is preferable that the lower organic insulating film 37, the upper organic insulating film 44, and the second organic insulating film 49 are each formed of a polyimide resin. By using the polyimide resin, it becomes possible to relieve stress more effectively.

図４に示す実施形態では、導通部１８が、支持基板１７の四隅に形成されず、支持基板１７の内部位置に形成される。よって導通部１８は、上面と下面だけが支持基板１７から露出している。 In the embodiment shown in FIG. 4, the conductive portions 18 are not formed at the four corners of the support substrate 17 but are formed at internal positions of the support substrate 17. Therefore, only the upper and lower surfaces of the conductive portion 18 are exposed from the support substrate 17.

図５に示す実施形態では、導通部１８と、検出側接続位置βとが膜厚方向に対向している。図５では、配線層１０に電気的に接続される第１接続端部７０から屈曲して第１延出部７１が平面方向に延出して形成される。また導通部１８に電気的に接続される第２接続端部７２から屈曲して第２延出部７３が平面方向に延出して形成される。そして第１延出部７１と第２延出部７３とが接続されている。 In the embodiment shown in FIG. 5, the conduction portion 18 and the detection side connection position β are opposed to each other in the film thickness direction. In FIG. 5, the first extending portion 71 is formed to bend from the first connecting end portion 70 electrically connected to the wiring layer 10 and extend in the planar direction. A second extension 73 is formed by bending from the second connection end 72 that is electrically connected to the conducting portion 18 and extending in the plane direction. And the 1st extension part 71 and the 2nd extension part 73 are connected.

導通部側接続位置αは、第１延出部７１と第２延出部７３との接続位置で規定される。
この実施形態でも、導通部側接続位置αと、素子側接続位置βとが平面方向にずれている。 The conduction part side connection position α is defined by the connection position between the first extension part 71 and the second extension part 73.
Also in this embodiment, the conduction part side connection position α and the element side connection position β are shifted in the planar direction.

特に、この実施形態では、第１延出部７１と第２延出部７３との接続位置（導通部側接続位置α）が、第１接続端部７０及び第２接続端部７２の双方に対して平面方向にずれているので、より効果的に、シリコン基板２，３に作用するインターポーザ１５との熱膨張差等に起因した応力を緩和できる。 In particular, in this embodiment, the connection position (conduction part side connection position α) between the first extension part 71 and the second extension part 73 is in both the first connection end part 70 and the second connection end part 72. On the other hand, since it is displaced in the plane direction, it is possible to more effectively relieve stress due to a difference in thermal expansion from the interposer 15 acting on the silicon substrates 2 and 3.

上記したようにインターポーザ１５を構成する支持基板１７はガラス、導通部１８はシリコンで形成されるが、本実施形態では、他の材質でも適用できる。例えば支持基板１７はガラス以外の絶縁材料で形成できる。また導通部１８は、ＡｕやＣｕといった金属材料で形成できる。 As described above, the support substrate 17 constituting the interposer 15 is formed of glass, and the conductive portion 18 is formed of silicon. However, in the present embodiment, other materials can be applied. For example, the support substrate 17 can be formed of an insulating material other than glass. The conducting portion 18 can be formed of a metal material such as Au or Cu.

また図６のように、導通部１８と支持基板１７の間が絶縁層３３により絶縁された形態でもよい。 Further, as shown in FIG. 6, the conductive portion 18 and the support substrate 17 may be insulated from each other by the insulating layer 33.

次に図７に示す実施形態では、図２等と異なって、インターポーザ１５の上面（第２面）１７ｅに第２有機絶縁膜４９が形成されていない。しかしながら図７の形態でも、インターポーザ１５と第２シリコン基板３の接続領域４７には、第１有機絶縁膜４８と、第１有機絶縁膜４８に埋設された接続経路５０とが設けられる。そして接続経路５０の導通部側接続位置αと、素子側接続位置βとが、平面方向に、ずれて配置されている。これにより、シリコン基板２，３とインターポーザ１５との熱膨張差に起因した、シリコン基板２，３に作用する応力を従来に比べて効果的に緩和できる。したがって、第２シリコン基板３に設けられたピエゾ素子Ｂ〜Ｅに作用する応力を低減でき、特性低下を抑制することが出来る。 Next, in the embodiment shown in FIG. 7, unlike FIG. 2 and the like, the second organic insulating film 49 is not formed on the upper surface (second surface) 17e of the interposer 15. However, also in the form of FIG. 7, the first organic insulating film 48 and the connection path 50 embedded in the first organic insulating film 48 are provided in the connection region 47 between the interposer 15 and the second silicon substrate 3. And the conduction | electrical_connection part side connection position (alpha) and the element side connection position (beta) of the connection path | route 50 are shifted | deviated and arrange | positioned in the plane direction. Thereby, the stress which acts on the silicon substrate 2 and 3 resulting from the thermal expansion difference of the silicon substrate 2 and 3 and the interposer 15 can be relieved effectively compared with the past. Therefore, the stress acting on the piezoelectric elements B to E provided on the second silicon substrate 3 can be reduced, and the characteristic deterioration can be suppressed.

本実施形態では、圧力センサを用いて説明したが、圧力センサに限定されるものではない。本実施形態は、加速度センサや角速度センサ等の「物理量センサ」に適用できる。 Although this embodiment has been described using a pressure sensor, it is not limited to a pressure sensor. This embodiment can be applied to a “physical quantity sensor” such as an acceleration sensor or an angular velocity sensor.

次の圧力センサを作製した。
（サンプル１）
図１２の形態
（サンプル２）
図７の形態
（サンプル３）
図２の形態 The following pressure sensor was produced.
(Sample 1)
Form of FIG. 12 (Sample 2)
Form of FIG. 7 (Sample 3)
The form of FIG.

有機絶縁膜をポリイミドで形成した。またインターポーザ１５を構成する支持基板１７をガラスで形成し、導通部１８をシリコンで形成した。また、接続経路５０及び接続パッド１０３をＡｌで形成し、導通パッド６６，１０８をＡｕで形成した。 The organic insulating film was formed with polyimide. Moreover, the support substrate 17 which comprises the interposer 15 was formed with glass, and the conduction | electrical_connection part 18 was formed with the silicon | silicone. Further, the connection path 50 and the connection pad 103 are made of Al, and the conduction pads 66 and 108 are made of Au.

実験では図３のように圧力センサを回路基板上に半田付けし、各試料における２５℃の時の出力を基準にして、温度を変化させたときの出力変化を調べた。その実験結果が図１１に示されている。 In the experiment, as shown in FIG. 3, the pressure sensor was soldered on the circuit board, and the output change when the temperature was changed was examined with reference to the output at 25 ° C. in each sample. The experimental results are shown in FIG.

図１１に示すように、サンプル１、すなわち従来構造では、温度変化による出力変化が他のサンプルに比して大きくなった。 As shown in FIG. 11, in the sample 1, that is, the conventional structure, the output change due to the temperature change is larger than the other samples.

この実験結果により、シリコン基板３とインターポーザ１５の間の接続領域４７に、第１有機絶縁膜（ポリイミド樹脂）４８と、接続経路５０を設け、接続経路５０を構成する延出部４３の導通部側接続位置αと、第１接続端部５２の素子側接続位置βとを平面方向にずらして配置した、サンプル２，サンプル３を本実施例とした。 As a result of this experiment, the first organic insulating film (polyimide resin) 48 and the connection path 50 are provided in the connection region 47 between the silicon substrate 3 and the interposer 15, and the conducting part of the extension part 43 constituting the connection path 50 is provided. Sample 2 and sample 3 in which the side connection position α and the element side connection position β of the first connection end portion 52 are shifted in the plane direction were used as this example.

本実施形態における圧力センサ（物理量センサ）の斜視図、The perspective view of the pressure sensor (physical quantity sensor) in this embodiment, 図１に示す圧力センサをＡ−Ａ線に沿って高さ方向（厚さ方向）から切断した切断面を示す断面図、Sectional drawing which shows the cut surface which cut | disconnected the pressure sensor shown in FIG. 1 from the height direction (thickness direction) along the AA line, 本実施形態の圧力センサと回路基板との実装構造を示す断面図、Sectional drawing which shows the mounting structure of the pressure sensor and circuit board of this embodiment, 図２とは異なる本実施形態の圧力センサの断面図、Sectional drawing of the pressure sensor of this embodiment different from FIG. 図２とは異なる接続構造を示す部分拡大断面図、The partial expanded sectional view which shows the connection structure different from FIG. 図２とは異なる本実施形態の圧力センサの断面図、Sectional drawing of the pressure sensor of this embodiment different from FIG. 図２とは異なる本実施形態の圧力センサの断面図、Sectional drawing of the pressure sensor of this embodiment different from FIG. （ａ）はシリコン基板表面の平面図、（ｂ）は、Ｆ−Ｆ線に沿って高さ方向（厚さ方向）から切断した切断面を示す部分断面図、(A) is a plan view of the silicon substrate surface, (b) is a partial cross-sectional view showing a cut surface cut from the height direction (thickness direction) along the line FF, 図８と異なる形態であり、（ａ）はシリコン基板表面の平面図、（ｂ）は、Ｆ−Ｆ線に沿って高さ方向（厚さ方向）から切断した切断面を示す部分断面図、8 is a different form from FIG. 8, (a) is a plan view of the silicon substrate surface, (b) is a partial cross-sectional view showing a cut surface cut from the height direction (thickness direction) along the FF line, 圧力センサの製造工程を示す一工程図（部分斜視図）、One process diagram (partial perspective view) showing the manufacturing process of the pressure sensor, 図２、図７及び図１２の各形態の圧力センサを用いて行った温度と出力との関係を示すグラフ、FIG. 2 is a graph showing the relationship between temperature and output performed using the pressure sensor of each embodiment of FIG. 2, FIG. 7 and FIG. 従来例における圧力センサ（物理量センサ）の斜視図、The perspective view of the pressure sensor (physical quantity sensor) in a prior art example,

Explanation of symbols

Ｂ〜Ｅピエゾ素子
１圧力センサ
２、３シリコン基板
８ダイアフラム
９固定領域
１０配線層
１１〜１４接続パッド
１５インターポーザ
１７支持基板
１８、５１導通部
３０回路基板
３６保護膜
３７下側有機絶縁膜
４３、６７、７１、７３延出部
４４上側有機絶縁膜
４６、７２第２接続端部
４７接続領域
４８第１有機絶縁膜
４９第２有機絶縁膜
５０接続経路
５２、７０第１接続端部
６６導通パッド（接続経路） B to E Piezoelectric element 1 Pressure sensor 2 and 3 Silicon substrate 8 Diaphragm 9 Fixed region 10 Wiring layers 11 to 14 Connection pad 15 Interposer 17 Support substrate 18 and 51 Conducting portion 30 Circuit substrate 36 Protective film 37 Lower organic insulating film 43, 67, 71, 73 Extension portion 44 Upper organic insulating films 46, 72 Second connection end portion 47 Connection region 48 First organic insulation film 49 Second organic insulation film 50 Connection paths 52, 70 First connection end portion 66 Conduction pad (Connection route)

Claims

A silicon substrate; a displacement portion formed on the silicon substrate and displaced in accordance with a change in physical quantity; a detection element for detecting a displacement amount of the displacement portion; and an interposer bonded to the silicon substrate. And
The interposer includes a support substrate and a conductive portion formed from the upper surface to the lower surface of the support substrate,
The detection element side and the conductive portion are electrically connected in a connection region between the interposer and the silicon substrate,
The connection region has at least an extension portion extending in the plane direction in the connection region, and a first connection end portion connecting the extension portion and the detection element side in the height direction. A connection path and a first organic insulating film in contact with the connection path are provided, and a conduction part side connection position α of the extension part and an element side connection position β of the first connection end part are in a planar direction. A physical quantity sensor characterized by being shifted.

The connection path is formed to include the extension part, the first connection end part, and a second connection end part that connects the extension part and the conduction part in a height direction, The physical quantity sensor according to claim 1, wherein a conduction part side connection position α is defined by a connection position between the extension part and the second connection end part.

The connection path is bent from the first connection end, a second connection end formed in a height direction from the conducting portion, and the first connection end toward the plane direction in the connection region. A first extension part extending in a direction and a second extension part bent from the second connection end part and extending in the plane direction in the connection region, and connected to the conduction part side The physical quantity sensor according to claim 1, wherein the position α is defined by a connection position between the first extension portion and the second extension portion.

The displacement part is formed in a central region of the silicon substrate, the detection element is disposed substantially in the center of a side edge of the displacement part, and the first organic insulating film is formed in a corner region of the silicon substrate. The physical quantity sensor according to claim 1, wherein only the physical quantity sensor is provided.

5. The conductive portion side connection position α is located closer to the outer peripheral side of the silicon substrate than the element side connection position β, and the conductive portion is formed at a corner of the interposer. The physical quantity sensor according to any one of the above.

A connection path for electrically connecting the second organic insulating film on the side opposite to the silicon substrate of the interposer and the circuit board that appears on the surface of the conductive portion and the second organic insulating film. The physical quantity sensor according to claim 1, wherein the physical quantity sensor is provided and the conduction portion side connection position X and the circuit side connection position Y are shifted in a planar direction.

The physical quantity sensor according to claim 1, wherein the organic insulating film is a polyimide resin.