JP2010050780A - Radio communication terminal and method of controlling radio communication - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress influence on a receiving signal of harmonics of a clock signal without a considerable change in the frequency of the clock signal. <P>SOLUTION: A frequency dividing ratio of a PLL circuit 16A is controlled with a control part 13 to adjust a clock frequency from a view of controlling a harmonic frequency of the harmonic 17S of the clock signal 16S giving influence on the receiving signal to coincide with a receiving carrier frequency. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a radio communication technique, and more particularly to a technique for suppressing influence on reception characteristics due to harmonics of a clock signal.

  In addition to basic wireless communication functions, wireless communication terminals such as mobile phone terminals are equipped with various additional functions such as a camera function and a terrestrial digital TV broadcast reception function. Since these additional functions operate using clock signals of individual frequencies, when the harmonics of these clock signals are included in the desired wave frequency band of the received signal used in wireless communication, the reception sensitivity is reduced, etc. Deterioration of reception characteristics will occur.

  As a technique for suppressing the influence of the harmonics of the clock signal on the reception characteristics, when the harmonics of these clock signals match the reception carrier frequency of the reception signal used in wireless communication, the frequency of the harmonics is the reception carrier. Techniques have been proposed for adjusting the frequency of a clock signal using a PLL circuit so as not to match the frequency (see, for example, Patent Documents 1 and 2).

JP 2004-179861 A JP 2006-246301 A

When a digital modulation method is used in wireless communication, the received signal has a desired wave frequency band centered on the received carrier frequency. Therefore, in order to suppress the influence of the harmonics of the clock signal on the reception characteristics using the related technology described above, it is necessary to prevent the harmonics of the clock signal from being included in the desired wave frequency band of the received signal. There is.
In this case, according to the related art described above, the harmonic frequency is changed from the desired wave frequency band of the received signal by changing the frequency of the clock signal by switching the frequency division ratio of the PLL circuit to a preset fixed value. Excluded. For this reason, when the desired signal frequency band of the received signal is wide, the division ratio is set with a margin.

It is necessary to increase the frequency adjustment range of the clock signal.

However, when the frequency adjustment width of the clock signal is large, the lock time required for the clock signal to change to the desired frequency after changing the frequency division ratio of the PLL circuit becomes long. The time required until the harmonics are excluded also becomes longer, during which time the received signal is affected, and the received signal may become unstable at the start of communication.
Further, in order to shorten the lock time, it is necessary to increase the cutoff frequency of the loop filter used in the PLL circuit. As a result, the influence of the phase comparison frequency component used in the PLL circuit on the received signal due to the spurious increases. .

  The present invention is for solving such problems, and provides a wireless communication terminal and a wireless communication control method capable of suppressing the influence of the harmonics of the clock signal on the received signal without greatly changing the frequency of the clock signal. It is intended to provide.

  In order to achieve such an object, the wireless communication terminal according to the present invention wirelessly outputs a received baseband signal by down-converting a received signal received during wireless communication based on a local transmission signal of the received carrier frequency. The processing unit, the reference signal generation unit that generates the reference signal of the reference frequency, the phase of the reference signal and the phase of the generated clock signal divided by an arbitrary division ratio, and the clock frequency according to the comparison result The frequency division ratio is controlled so that the harmonic frequency of the clock signal generator including the PLL circuit that generates the clock signal having the same frequency and the harmonic frequency of the harmonics of the clock signal that affect the received signal match the received carrier frequency. And a controller for adjusting the clock frequency.

  The wireless communication control method according to the present invention includes a wireless processing step of outputting a received baseband signal by down-converting a received signal received during wireless communication based on a local transmission signal of the received carrier frequency, and a reference frequency A reference signal generating step for generating a reference signal, and a clock having a clock frequency according to the comparison result by comparing the phase of the reference signal with the phase obtained by dividing the generated clock signal by an arbitrary division ratio by the PLL circuit. Clock signal generation step that generates a signal and control that adjusts the clock frequency by controlling the frequency division ratio so that the harmonic frequency of the harmonics of the clock signal that affects the received signal matches the received carrier frequency And steps.

  According to the present invention, there is a tendency that the adjustment range of the clock frequency can be reduced as compared with the case where the harmonic frequency is excluded from the desired wave frequency band. For this reason, the lock time required to adjust the clock signal to the reception carrier frequency by the PLL circuit for adjusting the clock frequency is short, and the influence on the reception signal at the start of communication can be suppressed. In addition, in order to shorten the lock time of the PLL circuit, it is not necessary to increase the cutoff frequency of the loop filter used in the PLL circuit, and as a result, the influence of the phase comparison frequency component used in the PLL circuit on the received signal due to the spurious. Can also be suppressed.

Next, embodiments of the present invention will be described with reference to the drawings.
[First Embodiment]
First, a wireless communication terminal according to the first embodiment of the present invention will be described with reference to FIG. FIG. 1 is a block diagram showing a configuration of a wireless communication terminal according to the first embodiment of the present invention.

This wireless communication terminal 10 is composed of a terminal device having a wireless communication function such as a mobile phone or a PDA. In addition to a basic wireless communication function, various additional functions such as a camera function and a terrestrial digital TV broadcast receiving function are installed. is doing.
The wireless communication terminal 10 includes a wireless processing unit 12, a control unit 13, a storage unit, a reference signal generation unit 15, a clock signal generation unit 16, and a function unit 17 as main functional units.

The wireless processing unit 12 has a function of performing wireless communication by transmitting and receiving wireless radio waves in accordance with control from the control unit 13, and in particular, as a reception processing function, a received signal received during wireless communication is used as the received carrier wave. It has a function of outputting a received baseband signal by down-conversion based on a local oscillation signal of frequency Frx.
FIG. 2 is a configuration example showing a main part related to the reception processing function of the wireless processing unit. Here, the reception processing function of the phase modulation method (PSK: Phase-shift keying) used in the cellular phone terminal is shown, but the radio processing unit 12 of the present invention is limited to the phase modulation method. Instead of this, other phase modulation methods may be used.

Received signal 11R received by antenna 11 is input to multipliers 12A and 12B. One of the received signals 11R is multiplied by a local oscillation signal (cosω _rx t) 12S having a carrier frequency Frx of the received signal 11R output from the local oscillation circuit 12C and detected by the multiplier 12A, and the low pass filter is detected. It becomes an in-phase system I component signal 12I through (LPF) 12E. The other received signal 11R is multiplied by the local oscillation signal of local oscillation circuit 12C in the multiplier 12B (cosω _rx t) a 12S with phase shifter 12D [pi / 2 phase-shifted by the local oscillation signal (-sinω _rx t) Then, a quadrature Q component signal 12Q is obtained via a low-pass filter (LPF) 12F. The reception signal generation unit 12G generates a reception baseband signal 12R from the I component signal 12I and the Q component signal 12Q, and outputs the reception baseband signal 12R to the control unit 13.

In FIG. 1, the control unit 13 includes a CPU and its peripheral circuits. The control unit 13 controls the wireless processing unit 12 to perform wireless communication, and controls the clock signal generation unit 16 by using the division ratio signal 13S. It has a function of setting the clock frequency Fclk so that the frequency of the high frequency 17S of the signal 16S, that is, the harmonic frequency that is an integral multiple of the clock frequency Fclk, matches the reception carrier frequency Frx.
The storage unit 14 includes a memory circuit and has a function of storing various processing information and programs used for processing in the control unit 13. In the storage unit 14, among the harmonic frequencies corresponding to integer multiples of the clock frequency Fclk of the clock signal 16 </ b> S, harmonic frequencies that can be generated in the reception frequency range used in wireless communication in the wireless processing unit 12, and wireless communication The reception carrier frequency and the desired wave frequency band of the reception signal are stored for each reception channel used in FIG.

The reference signal generation unit 15 includes an oscillation circuit and has a function of generating a reference signal 15S at a constant reference frequency Fs.
The clock signal generation unit 16 includes a PLL circuit and a frequency dividing circuit, and has a function of generating a clock signal 16S having an arbitrary clock frequency Fclk based on the inputted reference signal 15S.

  FIG. 3 is a configuration example of the clock signal generation unit. Here, it is composed of a PLL circuit 16A and a frequency dividing circuit 16E. The PLL circuit 16A compares the phase of the input reference signal 15S with the phase obtained by dividing the clock signal 16S by a predetermined frequency dividing ratio by the frequency dividing circuit 16E by the phase shift comparator 16B, and compares the comparison result. The result signal is stabilized by a loop filter 16C, and a clock signal 16S having a clock frequency Fclk corresponding to the obtained voltage value is generated by a voltage controlled oscillator (VCO) 16D. The frequency dividing circuit 16E divides the clock signal 16S by a frequency dividing ratio according to the frequency dividing ratio signal 13S from the control unit 13 and feeds back to the phase shift comparator 16B.

  In FIG. 1, a function unit 17 is a circuit unit that implements various additional functions such as a camera function and a digital terrestrial TV broadcast reception function, and operates based on a clock signal 16 </ b> S generated by the clock signal generation unit 16.

[Operation of First Embodiment]
Next, the operation of the wireless communication terminal according to the first embodiment of the present invention will be described with reference to FIG. FIG. 4 is a flowchart showing clock frequency adjustment processing of the wireless communication terminal according to the first embodiment of the present invention.
The control unit 13 of the wireless communication terminal 10 performs the clock frequency adjustment process of FIG. 4 when performing new wireless communication.

First, the control unit 13 reads out the received carrier frequency Frx and the desired wave frequency band BW used in the reception channel of the wireless communication from the storage unit 14 (step 100), and outputs the harmonic 17S of the clock signal 16S composed of the clock frequency Fclk. The indicated harmonic frequency N × Fclk (N is an integer) is read from the storage unit 14 (step 101), and the harmonic frequency N × Fclk is compared with the desired wave frequency band BW (step 102).
Here, if none of the harmonic frequencies N × Fclk is present in the desired wave frequency band BW (step 103: NO), there is no influence of the harmonic frequency N × Fclk on the received signal, and no clock frequency adjustment is required. Therefore, a series of clock frequency adjustment processing is completed.

On the other hand, when any one of the harmonic frequencies N × Fclk exists in the desired wave frequency band BW (step 103: YES), the control unit 13 determines that the harmonic frequency N × Fclk present in the desired wave frequency band BW. And the received carrier frequency Frx are compared (step 104).
Here, when the harmonic frequency N × Fclk matches the received carrier frequency Frx (step 105: NO), there is no influence of the harmonic frequency N × Fclk on the received signal, and the clock frequency adjustment is unnecessary. Then, a series of clock frequency adjustment processing is completed.

On the other hand, when the harmonic frequency N × Fclk does not match the received carrier frequency Frx (step 105: YES), the control unit 13 matches the harmonic frequency of the high frequency 17S of the clock signal 16S with the received carrier frequency Frx. A frequency division ratio M for this is calculated (step 106). In this case, since Fclk = M × Fs and Frx = N × Fclk, M = Frx / (N × Fs).
The control unit 13 obtains the frequency division ratio M in this way, outputs the frequency division ratio signal 13S indicating the frequency division ratio M to the clock signal generation unit 16, and ends the series of clock frequency adjustment processes.

As a result, the clock signal generator 16 outputs a clock signal 16S having a frequency M × Fs obtained by multiplying the input reference signal 15S. For this reason, the harmonic frequency of the clock signal 16S matches the reception carrier frequency Frx.
Therefore, when the radio processing unit 12 removes the signal component of the reception carrier frequency Frx, harmonics of the clock signal 16S are removed by the radio processing unit 12, so that the reception baseband due to the harmonics of the clock signal 16S is removed. The influence on the signal can be suppressed.

  FIG. 5 is an explanatory diagram showing the relationship between the received signal and the harmonics of the clock signal before the clock frequency adjustment, FIG. 5 (a) is a frequency band diagram, and FIG. 5 (b) is a frequency spectrum diagram. 6A and 6B are explanatory diagrams showing the relationship between the received signal and the harmonics of the clock signal after adjusting the clock frequency. FIG. 6A is a frequency band diagram, and FIG. 6B is a frequency spectrum diagram.

As shown in FIG. 5, before the clock frequency adjustment, the harmonics SP1 and SP2 of the clock signal appear as the harmonics of the clock signal 16S, and of these, the harmonic SP1 having the frequency Fsp1 = N × Fclk is received. The received desired wave frequency band BW centered on the carrier frequency Frx exists, and the harmonic SP2 of the frequency Fsp2 exists outside the received desired wave frequency band BW.
In such a situation, when the received signal is down-converted by the wireless processing unit 12, a spectrum composed of the frequency Fbsp1 as a spectrum caused by the harmonic SP1 near the frequency Fb of the received baseband signal obtained from the received signal. SP1b occurs. Therefore, this spectrum SP1b causes an error in the received baseband signal.

  On the other hand, as shown in FIG. 6, after the clock frequency adjustment, since the harmonic SP1 of the clock signal matches the received carrier frequency Frx, the harmonic SP1 is removed in the same manner as the received carrier component. The spectrum SP1b composed of the frequency Fbsp1 is not generated near the frequency Fb of the received baseband signal. Therefore, the influence on the received baseband signal by the harmonic SP1 is suppressed.

[Effect of the first embodiment]
As described above, in this embodiment, the control unit controls the frequency division ratio of the PLL circuit so that the harmonic frequency of the harmonics of the clock signal that affects the received signal matches the received carrier frequency. Since the clock frequency is adjusted, there is a tendency that the adjustment range of the clock frequency can be reduced by switching the frequency division ratio to a predetermined fixed value as compared with the case where the harmonics are excluded from the desired wave frequency band.

  For this reason, the lock time required to adjust the clock signal to the reception carrier frequency by the PLL circuit for adjusting the clock frequency is short, and the influence on the reception signal at the start of communication can be suppressed. In addition, in order to shorten the lock time of the PLL circuit, it is not necessary to increase the cutoff frequency of the loop filter used in the PLL circuit, and as a result, the influence of the phase comparison frequency component used in the PLL circuit on the received signal due to the spurious. Can also be suppressed.

  In the present embodiment, the control unit sets a value obtained by dividing the reception carrier frequency by the reference frequency and the harmonic order N (N is an integer of 2 or more) as the frequency division ratio. Therefore, the harmonic frequency of the clock frequency can be matched with the reception carrier frequency very easily without requiring complicated calculation and control.

  In this embodiment, since the harmonic frequency of the clock signal is set in the storage unit in advance, even if the received carrier frequency or the desired wave frequency band is changed, the harmonics within the desired wave frequency band are changed. The clock frequency adjustment process can be started by immediately determining the presence or absence of the clock.

  Further, according to the present invention, it is determined whether or not a harmonic frequency that is N (N is an integer of 2 or more) times the reference signal is included in the desired wave frequency band of the received signal, and the harmonic wave is included in the desired wave frequency band. The clock frequency is adjusted when the wave frequency is included, and the clock frequency is not adjusted when the harmonic frequency is not included in the desired wave frequency band. Can be omitted.

[Second Embodiment]
Next, with reference to FIG. 7, the radio | wireless communication terminal concerning the 2nd Embodiment of this invention is demonstrated. FIG. 1 is a block diagram showing a configuration of a wireless communication terminal according to the second embodiment of the present invention.

In the present embodiment, a clock frequency adjustment method in the case where a local oscillation signal (received carrier frequency) when the received signal is down-converted by the wireless processing unit 12 is generated from the reference signal 15S by a PLL circuit will be described.
In the present embodiment, although the local transmission signal generation method in the wireless processing unit 12 and the clock frequency adjustment method in the control unit 13 are different, other configurations are the same as those in the first embodiment. The detailed description of is omitted.

The wireless processing unit 12 according to the present embodiment includes the PLL circuit 16A and the frequency dividing circuit 16E as shown in FIG. 3 described above as the local oscillation circuit 12C of FIG. 2, and receives the reference signal 15S. The local oscillation signal 12S shown in FIG.
When performing new wireless communication, the control unit 13 of the wireless communication terminal 10 executes the above-described clock frequency adjustment process of FIG. In step 106 of the clock frequency adjustment process, when calculating the frequency division ratio M in the clock signal generation unit 16, the control unit 13 calculates the frequency division ratio M as follows.

When the reception carrier frequency used in wireless communication is Frx, the reference frequency of the reference signal 15S is Fs, and the frequency division ratio used when the local oscillation signal 12 equal to the reception carrier frequency Frx is generated by the PLL circuit is P, Frx = P × Fs is established.
On the other hand, when the frequency of the harmonic of the clock signal 16S existing in the desired wave frequency band BW is Fsp = N × Fclk and the frequency division ratio used when the clock signal 16S is generated by the PLL circuit is Q, Fsp = N × Q × Fs holds.

Therefore, Q = P / N is derived as the frequency division ratio Q for making the harmonic frequency Fsp equal to the reception carrier frequency Frx.
Therefore, in step 106, the control unit 13 can easily obtain the frequency division ratio Q from the frequency division ratio P stored in the storage unit 14 and the integer N obtained in step 102.

[Effects of Second Embodiment]
As described above, in the present embodiment, the control unit uses the multiplication number P (P is an integer of 2 or more) when generating the local transmission signal from the reference signal to the harmonic order N (N is an integer of 2 or more). Since the value divided by is set as the frequency division ratio of the PLL circuit, even when the local signal is generated by multiplying the reference frequency of the reference signal by P in the wireless processing unit, complicated calculation is required. The frequency division ratio Q for making the harmonic frequency coincide with the received carrier frequency can be obtained very easily.

It is a block diagram which shows the structure of the radio | wireless communication terminal concerning the 1st Embodiment of this invention. It is a structural example which shows the principal part regarding the reception processing function of a radio | wireless processing part. It is an example of a structure of a clock signal generation part. It is a flowchart which shows the clock frequency adjustment process of the radio | wireless communication terminal concerning the 1st Embodiment of this invention. It is explanatory drawing which shows the relationship between the received signal before a clock frequency adjustment, and the harmonics of a clock signal. It is explanatory drawing which shows the relationship between the received signal after clock frequency adjustment, and the harmonics of a clock signal. It is a block diagram which shows the structure of the radio | wireless communication terminal concerning the 2nd Embodiment of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Wireless communication terminal, 11 ... Antenna, 11R ... Receive signal, 12 ... Wireless processing part, 12A, 12B ... Multiplier, 12C ... Local oscillation circuit, 12S ... Local oscillation signal, 12D ... Phase shifter, 12E, 12F ... Low-pass filter, 12I ... I component signal, 12Q ... Q component signal, 12G ... received signal generator, 12R ... received baseband signal, 13 ... control unit, 13S ... frequency division ratio signal, 14 ... storage unit, 15 ... reference signal Generating unit, 15S ... reference signal, 16 ... clock signal generating unit, 16A ... PLL circuit, 16B ... phase comparator, 16C ... loop filter, 16D ... voltage controlled oscillator, 16E ... frequency divider, 16S ... clock signal, 17 ... Function unit, 17S: harmonic, Fs: reference frequency, Fclk: clock frequency, Frx: received carrier frequency, BW: desired wave frequency band, Fsp: harmonic frequency Number.

Claims (6)

A radio processing unit that outputs a received baseband signal by down-converting a received signal received during wireless communication based on a local transmission signal of the received carrier frequency;
A reference signal generator for generating a reference signal of a reference frequency;
A clock signal generation unit including a PLL circuit that compares the phase of the reference signal with a phase obtained by dividing the generated clock signal by an arbitrary division ratio and generates the clock signal having a clock frequency according to the comparison result; ,
A controller that controls the frequency division ratio and adjusts the clock frequency so that a harmonic frequency of a harmonic of the clock signal that affects the received signal matches the received carrier frequency. A wireless communication terminal characterized by the above. The wireless communication terminal according to claim 1,
The wireless communication terminal, wherein the control unit sets a value obtained by dividing the received carrier frequency by the reference frequency and the harmonic order N (N is an integer of 2 or more) as the division ratio. The wireless communication terminal according to claim 1,
A storage unit that stores each harmonic frequency of the harmonics that can be generated within a frequency range of a reception signal used in the wireless communication;
The control unit determines the presence or absence of a harmonic frequency that affects the received signal by comparing each harmonic frequency read from the storage unit with the desired wave frequency band. Communication terminal. The wireless communication terminal according to claim 1,
The control unit determines whether or not the harmonic frequency is included in a desired wave frequency band of the received signal. If the harmonic frequency is included in the desired wave frequency band, the control unit adjusts the clock frequency. And the clock frequency is not adjusted when the harmonic frequency is not included in the desired wave frequency band. The wireless communication terminal according to claim 1,
The wireless processing unit includes a local transmission circuit that generates the local transmission signal by multiplying a reference frequency of the reference signal by P (P is an integer of 2 or more),
The said control part sets the value which divided | segmented the said P by the harmonic order N (N is an integer greater than or equal to 2) as said frequency division ratio. The radio | wireless communication terminal characterized by the above-mentioned. A radio processing step of outputting a received baseband signal by down-converting a received signal received during wireless communication based on a local transmission signal of the received carrier frequency;
A reference signal generating step for generating a reference signal of a reference frequency;
A clock signal generation step in which a PLL circuit compares the phase of the reference signal with a phase obtained by dividing the generated clock signal by an arbitrary division ratio, and generates the clock signal having a clock frequency according to the comparison result; ,
A control step of adjusting the clock frequency by controlling the division ratio so that the harmonic frequency of the harmonics of the clock signal affecting the received signal matches the received carrier frequency. A wireless communication control method.

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