JP2010050560A - Defective pixel detection circuit, imaging device, and defective pixel detection method - Google Patents

Abstract

A defective pixel is detected without using a frame memory.
A defective pixel detection unit 11 includes a memory 12 that stores a pixel value of a digital image signal output for each pixel of a predetermined number or more lines included in an image sensor for each specified range. The digital image signal pixel value read from the memory 12 and the digital image signal pixel value output from the image sensor are also provided with an adder 21 that synchronously adds line by line. In addition, a detection unit 24 that detects a defect of a pixel included in the image sensor as a defective pixel based on the pixel value of the digital image signal that is synchronously added for each line is provided. Further, when the memory 12 is used in a predetermined processing circuit, the processing performed by the two-dimensional filter 23 and the detection unit 24 is stopped, and when the memory 12 is not used in the predetermined processing circuit, the two-dimensional filter 23 and detection are performed. And a control unit 8 that performs control to execute processing by the unit 24.
[Selection] Figure 4

Description

  The present invention relates to a defective pixel detection circuit, an imaging apparatus, and a defective pixel detection method that detect, for example, a defective pixel included in an imaging element.

  An imaging device such as a CCD (Charge Coupled Device) or a CMOS (Complementary Metal Oxide Semiconductor) sensor has a defective pixel, and a digital video camera or a digital still camera using the imaging device (hereinafter collectively referred to as “imaging device”). ) Detects and corrects defective pixels. A “defective pixel” refers to a pixel that cannot normally generate an image signal due to a defect. If a defective pixel exists, for example, a bright spot occurs in an image captured in a light-shielded state, or a dark spot occurs in an image captured on a white background. Since an image obtained when there is a defective pixel deteriorates, it is necessary for the imaging apparatus to remove the influence of the detected defective pixel.

Here, a configuration example of the conventional imaging apparatus 100 will be described with reference to FIG.
The imaging apparatus 100 includes an imaging unit 102 that outputs an image light imaged on an imaging surface via an optical system 101 including a lens, a shutter, and the like as an analog image signal, and an analog / digital signal that converts the analog image signal into a digital image signal. A conversion unit 103 is provided. The imaging apparatus 100 also includes an image correction unit 104 that performs various corrections on the digital image signal, an image processing unit 105 that performs various processes on the corrected image, and a display unit 106 that displays the processed image. And a recording unit 107 for recording the processed image. In addition, the imaging apparatus 100 includes a frame memory 108 that stores image data processed by the image correction unit 104 and the image processing unit 105 for each of a plurality of frames.

The image correction unit 104 includes a detection unit (not shown) that detects defective pixels.
The frame memory 108 holds and stores all pixel values for one frame. The frame memory 108 is used for extracting information necessary for processing from the correlation (difference) between frames in image correction and various image processing. In general, the frame memory 108 is used so as to hold image data for one frame for each frame. Further, there may be a case where a plurality of frame memories 108 are mounted on the imaging apparatus 100, such as one for image correction and one for another image processing.

  Conventionally, when the imaging apparatus 100 detects a defective pixel, the frame memory 108 is used to perform synchronous addition over a plurality of frames. Synchronous addition is a process of integrating pixel values at the same position over a plurality of frames based on an image signal obtained by imaging in a light-shielded state. If synchronous addition is performed using the frame memory 108, it is possible to suppress the random noise superimposed on the digital image signal and detect defective pixels with a good signal-to-noise ratio (SN ratio). Further, by inputting all the pixel values for each frame stored in the frame memory 108 to a circuit such as a filter, the entire image sensor can be detected as a defective pixel by a single detection operation. A defective pixel in the frame can be detected.

Patent Document 1 discloses a technique for reducing noise using a two-dimensional filter by sharing a line memory between a noise reduction circuit and a resolution conversion circuit.
JP 2006-2050 A

  By the way, the frame memory 108 is generally expensive, and the area required for mounting on the imaging apparatus tends to be large. For this reason, the frame memory 108 cannot often be mounted on the imaging apparatus. If the frame memory 108 could not be mounted on the imaging device, the defective pixel could not be detected using synchronous addition.

  When a defective pixel is detected without using the frame memory 108, the image signal output from the imaging unit 102 is directly input to a defective pixel detection circuit configured by a filter or the like, and the possibility of a defect is high while being affected by noise. Extract pixels. Thereafter, only a detected pixel is synchronously added over a plurality of frames, and a very time-consuming method is employed in which it is confirmed whether or not the detected pixel is a defective pixel. In addition, since the digital image signal is affected by noise, it may be erroneously detected as a defective pixel even though it is a normal pixel.

  SUMMARY An advantage of some aspects of the invention is that a defective pixel is detected using a memory used in a predetermined processing circuit included in an imaging apparatus.

According to the present invention, pixel values of a digital image signal output from a predetermined number or more of lines included in an image sensor are stored in a memory for each line.
Next, the adder synchronously adds the pixel value of the digital image signal read from the memory and the pixel value of the digital image signal output from the image sensor for each line, and stores the result in the memory again.
Next, the detection unit detects a defect of a pixel included in the image sensor as a defective pixel based on the pixel value of the digital image signal that is synchronously added for each line.
The control unit stops processing performed by the adding unit and the detecting unit when the memory is used in the predetermined processing circuit, and performs processing by the adding unit and the detecting unit when the memory is not used in the predetermined processing circuit. The control to execute is performed.

  By doing in this way, a defective pixel can be detected using the memory used by the predetermined | prescribed processing circuit contained in an imaging device.

  According to the present invention, since defective pixels can be detected by performing synchronous addition using a memory used in a predetermined processing circuit included in the imaging apparatus, it is possible to simplify the process for detecting defective pixels. .

  Hereinafter, an embodiment of the present invention will be described with reference to FIGS. In this embodiment, an example applied to a defective pixel detection circuit (in this example, a defective pixel detection unit 11) that detects a defective pixel of an image sensor will be described.

FIG. 2 shows an internal configuration example of the imaging apparatus 10.
The imaging apparatus 10 includes an imaging unit 2 that outputs image light imaged on an imaging surface via an optical system 1 including a lens, a shutter, and the like as an analog image signal, and analog / digital that converts the analog image signal into a digital image signal. A conversion unit 3 is provided. The digital image signal of this example is mainly used for recording / reproducing moving images, but may be used for recording / reproducing still images. Further, the imaging apparatus 10 is based on the image correction unit 4 that performs various corrections on the digital image signal, the image processing unit 5 that performs various processes on the corrected digital image signal, and the processed digital image signal. A display unit 6 for displaying an image and a recording unit 7 for recording an image file, image data, and the like based on the processed digital image signal.

  The imaging unit 2 includes an imaging element such as a CCD or a CMOS sensor. The analog / digital conversion unit 3 samples the analog image signal generated by the imaging unit 2 at a predetermined sampling rate and converts it into a digital image signal. The digital image signal output from the analog / digital conversion unit 3 is supplied to the image correction unit 4.

  The image correction unit 4 removes, for example, still image or moving image noise from the digital image signal supplied from the analog / digital conversion unit 3, or generates various control signals used for autofocus or the like. The image correction unit 4 includes a defective pixel detection unit 11 (see FIG. 3 to be described later) that detects defective pixels of the imaging unit 2, and corrects defective pixels detected by the defective pixel detection unit 11.

  In the correction of defective pixels performed by the image correction unit 4, for example, a process of brightening a dark spot around the defective pixel or darkening a bright spot is performed. Usually, in order to correct a defective pixel, a process of brightening a dark spot or a process of darkening a bright spot is performed, but with these processes alone, the dark spot becomes a bright spot when a dark subject is photographed. When shooting a bright subject, the bright spot becomes a dark spot. Therefore, a method of replacing the pixel value of the defective pixel with the average value of surrounding pixels is often used. In this way, even if the surrounding pixel value changes according to the subject, the pixel value of the defective pixel is replaced with the average value of the surrounding pixels, so that the level difference between the defective pixel and the surrounding pixels becomes inconspicuous. A detailed configuration example and processing example of the defective pixel detection unit 11 will be described later.

  The image processing unit 5 performs, for example, brightness / chromaticity conversion and white balance adjustment, image quality adjustment, edge enhancement, and the like on the image generated by the corrected digital image signal. . The display unit 6 includes, for example, an organic EL (Electro Luminescence) display panel or a liquid crystal display panel. The display unit 6 may be removable from the imaging device 10. For the recording unit 7, for example, a removable storage device such as a flash memory or a large-capacity storage medium such as a hard disk drive or a DVD is used.

  Each processing block in the imaging apparatus 10 is controlled by the control unit 8. For example, a central processing unit (CPU) is used as the control unit 8. When the image correction unit 4 or the image processing unit 5 does not use the memory 12 (see FIG. 3 described later), the control unit 8 of this example uses the memory 12 as a line memory for detecting defective pixels. In this example, a memory other than the frame memory is used as the memory 12.

FIG. 3 shows an internal configuration example of the image correction unit 4.
The image correction unit 4 includes a defective pixel detection unit 11 that detects defective pixels, and a memory 12 that temporarily stores a pixel value of a digital image signal output from a predetermined number or more of lines included in the image sensor for each specified range. And a correction unit 13 that performs processing such as luminance correction on the digital image signal. Note that the correction unit 13 of this example is a generic term for blocks that perform correction processing included in the image correction unit 4. Further, the correction unit 13 includes processing blocks provided in the image processing unit 5. The defective pixel detection unit 11 uses the memory 12 used when these processing blocks perform correction processing for detection of defective pixels.

  The digital image signal supplied from the analog / digital conversion unit 3 is supplied to the defective pixel detection unit 11 and the correction unit 13. The defective pixel detection unit 11 causes the memory 12 to store digital image signals output from a predetermined number of lines or more for each line. The memory 12 of this example includes line memories 12a to 12c (see FIG. 4 described later) for detecting defective pixels. Then, the defective pixel detection unit 11 performs synchronous addition using the memory 12 to detect defective pixels. However, the defective pixel detection unit 11 uses the memory 12 for the defective pixel detection process without affecting the original process performed by the correction unit 13.

  In this example, the case where the number of line memories is three will be described. However, the number of line memories is not limited to three, and line memories that are not used for other purposes at that time, that is, usable line memories should be used as much as possible. To do. Then, a memory 12 having as large a capacity as possible is prepared, and synchronous addition is performed for pixels in the largest possible range. In this example, the memory 12 is exclusively used by the correction unit 13 and the image processing unit 5 or the detection unit 24 (see FIG. 4) described later.

  The defective pixel detection unit 11 (detection unit 24) detects defective pixels based on the digital image signal read from the memory 12. The correction unit 13 corrects the image including the defective pixel based on the position information of the defective pixel detected by the defective pixel detection unit 11. Thereafter, the correction unit 13 outputs the corrected digital image signal to the display unit 6 or the recording unit 7. Then, the defective pixel detection unit 11 outputs the detected defective pixel information to the control unit 8 that controls each processing block in the imaging device 10.

  The detection of defective pixels is performed using only the image signals that have been synchronized and added and stored in the memory 12. The address data detected by the detection unit 24 (stored in an address memory 25 (see FIG. 4) described later) is transferred to the control unit 8 for each detection operation. The control unit 8 manages a large amount of address data detected by a plurality of detection operations. Then, the control unit 8 passes the managed address data to the correction unit 13, and the correction unit 13 performs an operation of correcting the defective pixel based on the received address data.

FIG. 4 shows an internal configuration example of the defective pixel detection unit 11.
The defective pixel detection unit 11 synchronously adds the pixel value of the digital image signal read from the memory 12 and the pixel value of the digital image signal output from the image sensor and output from the analog / digital conversion unit 3 for each line. 21 is provided. In addition, a selection unit 22 that reads out the pixel value of the digital image signal from the memory 12 for each line at a predetermined timing is provided. The selection unit 22 outputs the pixel values of the digital image signals output in parallel read from the memory 12 to the detection unit 24 with the horizontal direction of the detection target region aligned. Further, the defective pixel detection unit 11 includes a detection unit 24 that detects a defect of a pixel included in the image sensor as a defective pixel based on the pixel value of the digital image signal that is synchronously added for each line. The memory 12 that stores the digital image signal added by the adding unit 21 for each designated range uses a small-capacity memory or a line memory used by the image correcting unit 4 or the image processing unit 5. The position information in the defective pixel image sensor detected by the detection unit 24 is stored in the address memory 25.

  The synchronous addition is processing performed by the memory 12, the memory control unit 26 that switches and controls the processing unit that uses the memory 12, and the addition unit 21. Then, after the synchronous addition of the predetermined number of frames is completed, when the value obtained by the synchronous addition is input to the two-dimensional filter 23, the two-dimensional filter 23 extracts the feature amount of the defective pixel. Here, the memory control unit 26 stops the processing performed by the addition unit 21 and the detection unit 24 when the memory 12 is used in a predetermined processing circuit, and when the memory 12 is not used in the predetermined processing circuit, Control to execute processing by the addition unit 21 and the detection unit 24 is performed.

  Usually, in the processing of a video signal, sequential scanning is performed. In this process, when one line signal flows horizontally in the right direction from the signal located at the upper left of the screen, the next lower line is moved from the left to the right. By repeating this movement and sequentially flowing signals to the lower right, image processing is performed sequentially for each pixel. When processing an image signal in two dimensions, the signals of the previous and second previous lines are held in the memory 12, and this and the current line are combined to perform vertical and horizontal two-dimensional processing.

  Normally, reading from the frame memory is performed on a line-by-line basis, and thus is performed in parallel using a delay line. In this case, synchronous addition is performed by the frame memory and the adding unit 21, and the frame memory output after the synchronous addition is parallelized by the delay line. On the other hand, when a memory such as a line memory arranged in an integrated circuit (LSI) is used as in this example, the line memory 12a to 12c and the adding unit 21 perform synchronous addition, and then the memory 12 Simultaneously read and use multiple lines. At this time, the line memories 12a to 12c are also used as delay lines, and parallelization such as reading out three lines at a time is performed. The two-dimensional filter 23 receives the signal thus parallelized and extracts the feature amount of the defective pixel.

  The defective pixel address data held in the address memory 25 is transferred to the control unit 8 and managed there. The transferred defective pixel address data is transferred to the correction unit 13 by the control unit 8 and used for defect correction operation.

  The selection unit 22 is integrated with the memory 12 and can output in parallel, for example, by aligning the horizontal direction of three lines from the memory 12 storing the pixel values of a plurality of lines. Further, the pixel values of the selected line memories 12 a to 12 c are supplied from the selection unit 22 to the addition unit 21. Then, control signals (read-address, write-address, write-enable) are supplied from the memory control unit 26 to the memory 12. On the other hand, a vertical and horizontal address indicating a pixel position is supplied from the memory control unit 26 to the detection unit 24.

  When the three line memories 12a to 12c included in the memory 12 are used for synchronous addition, the word length of a word (for example, 10 bits / word) determined by a predetermined number of bits is increased by integration or the word length of the word is increased. Perform the calculation so that the result does not overflow without changing. Here, the integrated amount is synonymous with the designated number of frames to be integrated. If the number of accumulated frames is increased, the word length of the word must be increased as necessary.

  If the operation result overflows, the operation result cannot be used as a correct value. For this reason, when an overflow occurs in a certain line memory, an error process due to overflow of the operation result is prevented by temporarily using an area of several bits included in another line memory for calculation. Further, if the word length of the word is increased and used, the number of usable words is reduced, so that the number of pixels to be detected at a time is reduced as compared with the case of using the frame memory. Then, by performing synchronous addition using the line memories 12a to 12c, a defective pixel can be detected with a good SN ratio. In this example, an example in which three line memories are used has been described. However, basically, the memory is used as many as possible.

  Here, it will be described that “the number of words that can be used decreases when the word length is increased by an amount”. In general, the required memory capacity is determined by “word length × number of words”. For this reason, it can be said that the upper limit of the available memory capacity is determined by the installed memory capacity. Here are two conflicting requirements. The first requirement is to increase the number of words as much as possible in order to perform synchronous addition for as many pixels as possible at once. On the other hand, as the second request, since the SN ratio is improved as the number of synchronous addition frames increases, there is a request to increase the word length as much as possible so as not to overflow the number according to the number of frames to be synchronously added. Due to these conflicting requirements, the number of frames for synchronous addition and the number of pixels that can be synchronously added at a time have a trade-off relationship.

  Usually, the line memory has pixel values only for the word length of the video signal flowing through the image processing system. For example, assume that the video signal is 10 bits and the line memory has a word length of 10 bits / word. When this video signal is synchronously added, the sum of 1023 and 1023, which is the maximum value of 10 bits, is 2046. For this reason, a word length of 11 bits is required. That is, if two frames are synchronously added, the value is doubled, and an 11-bit word length is required. Furthermore, when 4 frames are synchronously added, the value is 4 times, so 2 bits are increased to 12 bits, and when 8 frames are synchronously added, the value is 8 times, so 3 bits are increased and 13 bits are required. .

  Thus, in order to perform synchronous addition of up to 8 frames for 3 lines, 3 13-bit line memories are required. From a different point of view, it can be said that a memory of 13 bits × 3 = 39 bits is required. On the other hand, the line memory physically mounted in the memory 12 of this example is of 10 bits / word. In this case, if four line memories are prepared and the width is 10 bits × 4 = 40 bits, the previous 39-bit width can be covered. In other words, the line memory handled as four lines in correction and image processing is handled as three lines in synchronous addition, and the word length is increased to prevent overflow of the value obtained by synchronous addition. As an example, when 60 frames are synchronously added, the value becomes 60 times, so that 6 bits are increased to 16 bits, that is, 16 bits × 3 = 48 bits. For this reason, five 10-bit / word line memories are required.

  The detection unit 24 is controlled by a memory control unit 26 that instructs the timing for reading pixel values from the two-dimensional filter 23. A horizontal synchronization signal and a vertical synchronization signal are input to the memory control unit 26 from a synchronization signal generation unit (not shown). This is also distributed to the image sensor and the analog / digital conversion unit 3 at the same time. With these synchronization signals, the memory control unit 26 can calculate the number of lines and the horizontal position stored in the memory 12 in one frame. The memory control unit 26 generates a write permission signal for the memory 12, a switching signal for the selection unit 22, a read signal, and the like based on the input horizontal synchronization signal and vertical synchronization signal. The pixel value is read from the memory 12, the feature quantity of the defective pixel is extracted by the two-dimensional filter 23, and the feature quantity is evaluated by the detection unit 24. This evaluation is performed by the detection unit 24 reading out the address of the defective pixel stored in the address memory 25 over a plurality of frames for each frame to determine the defective pixel.

  The defective pixel detection unit 11 stores the digital image signal for each line in the line memories 12a to 12c. The line memories 12a to 12c have a first-in first-out (FIFO) queue structure. The selection unit 22 uses the line memories 12a to 12c as delay lines by changing the timing of reading the digital image signals from the line memories 12a to 12c.

  The control unit 8 stops the processing performed by the two-dimensional filter 23 and the detection unit 24 when the memory 12 is used in a predetermined processing circuit (correction unit 13 in this example). Further, the control unit 8 performs control to execute processing by the two-dimensional filter 23 and the detection unit 24 when the memory 12 is not used in a predetermined processing circuit. When the defective pixel detection unit 11 detects a defective pixel, the selection unit 22 switches a processing path through which the digital image signal originally performed by the correction unit 13 and switches the two-dimensional filter in a state where the digital image signal is paralleled for three lines. 23. The two-dimensional filter 23 functions as a high-pass filter for digital image signals included in a region of 3 × 3 pixels.

Here, the role of the two-dimensional filter 23 will be described.
A general defective pixel always outputs a constant value regardless of the subject. For this reason, it appears as a white spot when the lens aperture is closed and the light is blocked, or appears as a black spot when a white subject is projected. Such white spots and black spots are detected as defective pixels, but these white spots and black spots can be regarded as high frequency when viewed in two dimensions. For this reason, a high frequency component is extracted as the feature amount of the defective pixel. Therefore, a two-dimensional filter 23 (two-dimensional high-pass filter) that extracts a two-dimensional high-frequency component is used. A high-frequency component, which is a feature amount of a defective pixel, is extracted by a two-dimensional high-pass filter, and if it is larger than a threshold value specified by the detection unit 24, it is determined as a defective pixel as a feature amount as a defective pixel.

  The two-dimensional filter 23 performs a process of extracting feature amounts of defective pixels. In defective pixel detection, first, synchronous addition is performed over a plurality of frames. After the synchronous addition is completed for a predetermined number of frames, the operation shifts to a defective pixel detection operation. In the detection operation, the synchronously added pixel values are read in parallel from the memory 12 and input to the two-dimensional filter 23. The two-dimensional filter 23 extracts the feature amount of the defective pixel and inputs it to the detection unit 24. The detection unit 24 evaluates the feature amount, and determines that the pixel is a defective pixel if the evaluation value is larger than a prescribed value. At this time, the vertical and horizontal address value received from the memory control unit 26 is held in the address memory 25 as defective pixel address data. The data held in the address memory 25 is transferred to the control unit 8 for each detection operation.

  Then, noise superimposed on the signal can be removed by synchronous addition. Noise assumed to be Gaussian distribution converges to zero which is the median value of the distribution by synchronous addition. That is, the influence of noise can be eliminated by synchronous addition. In the 3 × 3 filter, the extraction target is one pixel at the center, and feature amounts are extracted by calculation using the center pixel and surrounding pixels. The extraction target is sequentially extracted for each pixel by sequentially shifting the extraction target by one pixel. Note that noise is generated and superimposed on the signal is an analog portion until A / D conversion is performed. That is, it is between the image sensor and the analog / digital conversion unit 3.

  The digital image signal supplied from the line memory 12 a to the selection unit 22 is added to the digital image signal supplied from the analog / digital conversion unit 3 by the addition unit 21. Then, the detection unit 24 sets a pixel value having the same vertical position and horizontal position in the imaging surface among the pixel values read out through the selection unit 22 as a frame corresponding to the pixel value read out from the address memory 25. Synchronously add every time. Thereafter, the digital image signal is written again at the same position in the memory 12.

Here, an example of defective pixels in the imaging device will be described by cutting out a part of the imaging surface of the imaging device.
FIG. 5 shows an example in which defective pixels are included in the pixels stored in the memory 12.
FIG. 6 shows an example in which a defective pixel is not included in the pixels stored in the memory 12.
In this example, a capturing range 32 and a defective pixel detection range 34 when a digital image signal for 3 × 7 pixels is captured by synchronous addition to the line memories 12a to 12c will be described. A unit grid in the figure represents a unit pixel 31 corresponding to one pixel of the image sensor.

  The imaging surface in the figure includes a total of 300 pixels with 20 pixels per line and 15 lines. The imaging surface includes three defective pixels 33a to 33c. In the following description, the position of the pixel in the imaging surface is designated by coordinates as (number of lines in the vertical direction, number of pixels in the horizontal direction).

  The detection unit 24 performs one detection operation on the pixel values synchronously added over a plurality of frames, and passes the address data to the control unit 8. This operation is repeated many times, but at this time, the area where synchronous addition can be performed at a time is limited. For this reason, synchronous addition is repeated many times in order to extract defective pixels from the entire image sensor.

  In FIG. 5, the range in which the pixels are taken into the memory 12 and synchronous addition is performed is a 3 × 7 pixel take-in range 32, and the pixel range to be detected becomes the detection range 34. After synchronous addition is performed for the capture range 32, the operation proceeds to the detection operation. At this time, the defective pixel is detected for coordinates (6, 6) to (6, 10). In this way, the defective pixel detection evaluation is completed for the pixels at coordinates (6, 6) to (6, 10).

  As shown in FIG. 6, this time, defective pixels are detected and evaluated for pixels at coordinates (6, 11) to coordinates (6, 15). For this reason, the pixel values in the capture range 32 shown in FIG. 6 are captured in the memory 12 and synchronous addition is performed. And the detection part 24 performs detection evaluation of a defective pixel about the pixel of coordinate (6,11)-coordinate (6,15) after synchronous addition. Thereafter, the range to be taken into the memory 12 and synchronously added is shifted. In this example, next, pixels of coordinates (6, 16) to coordinates (6, 20) are subjected to detection evaluation. After reaching the right end of the image pickup device in this way, next, detection evaluation of defective pixels is performed for the pixels at coordinates (7, 1) to (7, 5). Thereafter, the defective pixel detection process is repeated for all the pixels on the imaging surface. However, a region where a defective pixel can actually be detected is indicated by a detection range 34. The outer edge of the detection range 34 is not an area in which defective pixels can be detected although included in the capture range 32.

  Then, the adder 21 captures all the pixels included in the capture range 32 in the memory 12 and performs synchronous addition. Then, the 3 × 3 filter performed in the 3 × 3 pixel region 35 performs an operation on the central pixel of 3 × 3 = 9 pixels. That is, 3 × 3 pixels are required to execute the calculation of the 3 × 3 filter, but the obtained calculation value is only a value related to the central pixel. For this reason, out of the areas that are synchronously added at a time, one pixel located at the outer edge is not a detection target of a defective pixel. One pixel located on the outer edge that is not the detection target is taken into the memory 12 so as to be the detection target in the subsequent operation, and synchronous addition is performed.

FIG. 7 shows a configuration example of the memory 12 of 2000 pixels × 3 lines.
The memory 12 includes line memories 12a to 12c that can store pixel values of digital image signals for 2000 pixels.

  The defective pixel detection unit 11 detects a defective pixel using a result obtained by synchronously adding every 3 × 3 pixels. For this reason, pixel values that are synchronously added for three lines are required in the vertical direction. For example, when the line memories 12a to 12c that can be used for synchronous addition can store pixel values for 2000 pixels, the summed line memories 12a to 12c can store synchronized addition results for 6000 pixels.

  Since the two-dimensional filter 23 of the present example uses the 3 × 3 pixel two-dimensional filter 23, a defective pixel cannot be detected from the digital image signal stored at the outer edge of the memory 12. For this reason, the number of pixels that can be detected as defective pixels at a time using the two-dimensional filter 23 is the inner 1998 pixels excluding one pixel located at the outer edge of the memory 12.

FIG. 8 shows an example of processing for detecting defective pixels.
Here, a process of capturing a specified range into the memory 12 in a plurality of times and detecting a defective pixel will be described. The defective pixel detection unit 11 performs synchronous addition of pixel values taken into the memory 12 to detect defective pixels. The range of pixels to be captured in the memory 12 is detected so that defective pixels are detected from all the pixels within the specified range while moving so that the detection ranges 34 do not overlap. However, the range of pixels taken into the memory 12 at a time is arbitrary, and the designated range may not include all the pixels of the image sensor.

  First, the imaging apparatus 10 closes the iris of the lens (iris close) and blocks light incident on the lens (step S1). Next, the defective pixel detection unit 11 initializes the memory 12 (step S2), and fetches the pixel value into the memory 12 while performing synchronous addition (step S3).

  Next, it is determined whether or not the number of synchronous additions has reached the specified number of frames (step S4). Here, the number of frames to be synchronously added is referred to as “designated frame number”, and for example, 60 frames are set as the designated frame number.

  If the number of synchronous additions has not reached the specified number of frames, the process returns to step S3, and synchronous addition is performed again. On the other hand, when the number of synchronous additions reaches the specified number of frames, an image signal is read from the memory 12 (step S5).

  Next, the detection unit 24 detects defective pixels based on the result of the two-dimensional filter 23 (step S6). After detecting the defective pixel, it is determined whether or not the detection of the defective pixel is finished within the designated range of the imaging surface (step S7).

  If the detection of defective pixels is not completed within the designated range on the imaging surface, the capture range of the memory 12 is moved (step S8), the process returns to step S2, and the memory 12 is initialized again. On the other hand, when the detection of the defective pixel is completed within the specified range of the imaging surface, the defective pixel detection process is ended.

  The above-described defective pixel detection unit 11 according to the present embodiment detects a defective pixel from the pixel value of the digital image signal using a memory other than the frame memory. At this time, for example, synchronous addition is performed by using a line memory. For this reason, there is an effect that a defective pixel can be detected with high accuracy after removing the influence of noise superimposed on the digital image signal.

  The points used for other processes are the same when a memory other than the frame memory is used. However, until now, no memory other than the frame memory has been used for synchronous addition for defect detection. Here, as a general signal processing circuit of a video camera and a digital camera, a line memory is the next largest memory after the frame memory. In general video signal processing, a line memory is used to perform two-dimensional signal processing. In the present embodiment described above, a defective pixel is detected using a line memory having a large capacity.

  In addition, by using a memory built in each unit of the imaging apparatus 10 for synchronous addition without using a frame memory, synchronous addition can be performed with a low-cost and small-area circuit. In addition, by adjusting the horizontal / vertical ratio of the target area in which the defective pixel is detected in the memory 12 built in the imaging apparatus 10, defect detection that eliminates the influence of noise by synchronous addition is performed on more pixels at a time. be able to. Therefore, there is an effect that defective pixels can be detected efficiently in a short time as compared with the conventional technique.

  The pixel range that can be processed by the two-dimensional filter 23 may be other than 3 × 3 pixels, for example, 5 × 5 pixels. In addition, as long as the memory used for the synchronous addition can store the digital image signal subjected to the synchronous addition, a memory other than the memory mounted as a line memory in the imaging device 10 may be used for the synchronous addition.

Further, the ratio of the vertical direction to the horizontal direction of the detection target area in which the line memory detects the defective pixel may be variable.
FIG. 9 shows a configuration example of the memory 12 of 1000 pixels × 6 lines.
The memory 12 of this example includes line memories 41a to 41f each storing a pixel value of 1000 pixels.

  As described above, even when the memory 12 is configured as shown in FIG. 9, one pixel located on the top, bottom, left, and right of the outer edge of the memory 12 is not detected as a defective pixel. However, the defective pixel detection unit 11 can detect the defective pixels at a time for the inner 998 pixels × 4 lines of pixels (3992 pixels).

  As described above, even when the line memories 41a to 41f having the same capacity as the line memories 12a to 12c storing the pixel values for 6000 pixels shown in FIG. 7 are used, the horizontal / vertical ratio of the memory 12 is changed at a time. The number of pixels to be detected can be approximately doubled. The memory control unit 26 performs processing for changing the ratio of the vertical direction to the horizontal direction of the detection target region. For this reason, the time required for the defective pixel detection processing using the synchronous addition performed in the above-described embodiment can be reduced to about half. In order to detect defective pixels in this way, the word length is set to 1000 pixels when the memory 12 is mounted in the imaging apparatus 10. Then, a line memory having a length of 2000 pixels may be configured by combining two line memories each having a word length of 1000 pixels.

  Further, if the length of the line memory is changed to 1/3, 1/4,..., 1 / m (m is a rational number) with respect to the original length, the number of pixels that can detect defective pixels at a time is increased. Can do. When the defective pixel detection unit 11 of this example is mounted, the number of pixels to be detected is configured to be as large as possible without affecting the processing of the correction unit 13 or the like that originally uses the memory. . As described above, when detecting the defective pixel by inputting the synchronously added digital image signal to the two-dimensional filter 23, the horizontal / vertical ratio of the target range stored in the line memory used for the synchronous addition is changed. As a result, the aspect ratio of the two-dimensional image area captured in the memory 12 can be changed to increase the area to be detected at one time, and the time required for detecting defective pixels in the entire image sensor can be shortened. is there.

  Further, the present invention is not limited to the above-described embodiments, and it is needless to say that various other configurations can be taken without departing from the gist of the present invention.

It is a block diagram which shows the internal structural example of the conventional imaging device. It is a block diagram which shows the internal structural example of the imaging device in one embodiment of this invention. It is a block diagram which shows the example of an internal structure of the image correction part in the example of 1 embodiment of this invention. It is a block diagram which shows the example of an internal structure of the defective pixel detection part in one embodiment of this invention. It is explanatory drawing which shows the example of the defective pixel in the image pick-up element at the time of detecting the defective pixel in one embodiment of this invention. It is explanatory drawing which shows the example of the defective pixel in the image pick-up element at the time of detecting the defective pixel in one embodiment of this invention. It is explanatory drawing which shows the structural example of the line memory of 2000 pixels x 3 lines in one embodiment of this invention. It is a flowchart which shows the example of the process which detects the defective pixel in one embodiment of this invention. It is explanatory drawing which shows the structural example of the line memory of 1000 pixels x 6 lines in the other embodiment of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Optical system, 2 ... Imaging part, 3 ... A / D conversion part, 4 ... Image correction part, 5 ... Image processing part, 6 ... Display part, 7 ... Recording part, 8 ... Control part, 10 ... Imaging device, DESCRIPTION OF SYMBOLS 11 ... Defect pixel detection part, 12 ... Memory, 12a-12c ... Line memory, 13 ... Correction | amendment part, 21 ... Addition part, 22 ... Selection part, 23 ... Two-dimensional filter, 24 ... Detection part, 25 ... Address memory, 26 ... Memory controller

Claims (6)

A memory that stores the pixel value of the digital image signal output from a predetermined number of lines or more included in the image sensor for each specified range;
An adder that synchronously adds the pixel value of the digital image signal read from the memory and the pixel value of the digital image signal output from the image sensor for each line;
A detection unit that detects a defect of a pixel included in the image sensor as a defective pixel based on a pixel value of the digital image signal that is synchronously added for each line;
When the memory is used in a predetermined processing circuit, the processing performed by the addition unit and the detection unit is stopped, and when the memory is not used in the predetermined processing circuit, the addition unit and the detection unit A defective pixel detection circuit comprising: a control unit that performs control to execute processing. The defective pixel detection circuit according to claim 1.
The memory is a memory other than a frame memory.
Defective pixel detection circuit. The defective pixel detection circuit according to claim 2.
A defective pixel including a selection unit that reads out the pixel value of the digital image signal from the memory for each line at a predetermined timing and outputs the pixel value of the digital image signal to the detection unit while aligning the horizontal direction of the detection target region. Detection circuit. The defective pixel detection circuit according to claim 3.
An address memory for storing position information of the defective pixel detected by the detection unit in the image sensor;
The detection unit reads out the address of the defective pixel stored in the address memory over a plurality of frames for each frame and determines the defective pixel. An imaging unit that outputs image light imaged through an optical system as an imaging signal;
A memory that stores the pixel value of the digital image signal output from a predetermined number of lines or more included in the image sensor for each specified range;
An adder that synchronously adds the pixel value of the digital image signal read from the memory and the pixel value of the digital image signal output from the image sensor for each line;
A detection unit that detects a defect of a pixel included in the image sensor as a defective pixel based on a pixel value of the digital image signal that is synchronously added for each line;
When the memory is used in a predetermined processing circuit, the processing performed by the addition unit and the detection unit is stopped, and when the memory is not used in the predetermined processing circuit, the addition unit and the detection unit A control unit that performs control to execute processing;
An image correction unit for outputting a digital image signal obtained by correcting the pixel value output by the detected defective pixel;
An output unit that outputs a digital image signal supplied from the image correction unit. Storing the pixel value of the digital image signal output from a predetermined number of lines or more included in the image sensor in a memory for each designated range;
Synchronously adding the pixel value of the digital image signal read from the memory and the pixel value of the digital image signal output from the image sensor for each line;
A step of detecting a defect of a pixel included in the image sensor as a defective pixel based on a pixel value of the digital image signal synchronously added for each line;
When the memory is used in a predetermined processing circuit, the processing performed by the addition unit and the detection unit is stopped, and when the memory is not used in the predetermined processing circuit, the addition unit and the detection unit And a step of performing control to execute processing, and a defective pixel detection method.

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