JP2010041404A - High-speed photography device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To eliminate digital noise of a high-speed photographing device. <P>SOLUTION: A high-speed imaging element 31 comprises: a CCD 36 for recording which obliquely extends from a photodiode 33; and a CCD 37 for vertical reading where the other end of the CCD 36 for recording is converged. At continuous overwriting-photographing, the digital drive voltage supply part 30a supplies the sine wave drive voltage to the CCD 36 for recording and the CCD 37 for vertical reading. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a high-speed imaging device.

  Regardless of the CCD type or the COMS type, a normal image sensor is digitally controlled by a rectangular pulse waveform voltage. On the other hand, the CCD can be driven only by a sinusoidal waveform voltage. However, a normal image sensor reads out a charge signal from the element while capturing the charge signal. Since the reading operation must be digitally controlled, all of the image pickup devices so far have been digitally controlled.

  The present inventor has developed a pixel peripheral recording imaging device having an oblique linear CCD type memory (In-situ Storage Image Sensor with slanted linear CCD storage, hereinafter referred to as “ISIS”) and a high-speed imaging device including the same (for example, Patent Document 1). In ISIS, each pixel is equipped with 100 or more CCD-type memories, and during shooting, the charge signal is recorded simultaneously by parallel processing of all the pixels, so the ultimate ultra high-speed continuous shooting (for example, 1 million images / 100 or more images per second) is possible, and charge signal readout is not performed during imaging.

  In digital control, so-called digital noise is generated. One of the main causes is clock noise for accurately ticking time. In digital control, the system is controlled using many rectangular pulse voltages. When the pulse voltage rises and falls, a fluctuation of a frequency much higher than the fundamental frequency (hereinafter referred to as “ringing”) occurs. An abrupt change in current accompanying pulsed rise, fall, or ringing generates electromagnetic waves. This electromagnetic wave flies around the system and becomes a source of digital noise.

  Digital control uses a certain value of voltage or current as a threshold value, and performs binary judgment of whether it is higher or lower, so even if some noise is added to the control voltage or current, it is wrong if it is sufficiently smaller than the threshold value order. It does not cause any control. This stability is why digital control is often used.

  However, the charge signal handled by a normal image sensor is an analog signal while in the image sensor. When the charge signal is read out of the image sensor, it is converted into a digital signal by an analog / digital converter (AD converter). In other words, the image sensor is a mixed analog / digital electronic device, and is a device that requires extremely precise signal handling such that the signal to be handled is several to tens of thousands of electrons converted from photons and the like.

  As the shooting speed is increased, the signal processing speed is increased and the current changing speed is increased, so that the digital noise increases in proportion thereto. This fluctuates the stable voltage necessary for the readout circuit, and causes an increase in readout noise. In science and technology measurement where ultra-high-speed photography is used, very high-precision measurement is often required simultaneously with ultra-high speed. In this case, an increase in shooting speed and an improvement in measurement accuracy compete.

  In science and technology measurement, it is common to use several precision measuring instruments in addition to video cameras. In this case, digital noise generated in the ultra high-speed video camera may be a major cause of reducing measurement accuracy. For example, when an electron microscope that uses an electron flow with a relatively low energy of 100 KeV or less and an electron direct-input ultra high-speed video camera image sensor is attached, the noise generated by the image sensor shakes the electron flow, and the resolution is significantly increased. Lower.

Japanese Patent No. 3770452

  An object of the present invention is to eliminate digital noise during shooting in a high-speed shooting apparatus.

  As described above, the ISIS developed by the present inventor has a large number of CCD type charge signal memories in each of all pixels. The present invention utilizes a feature of a high-speed imaging device that employs ISIS as an imaging device, such as no need to read out a charge signal during imaging, and drives a CCD only with a sine wave voltage during imaging. This realizes digital noiseless ultra high-speed shooting.

  Specifically, the present invention includes a plurality of conversion units that are arranged on the light receiving surface and generate a charge signal corresponding to the intensity of the incident line, and one end is connected to each of the conversion units toward the other end. An image sensor comprising a plurality of linearly extending recording CCDs, a drain gate provided on the other end of the recording CCD, and a drain connected to the drain gate; A sinusoidal drive voltage is supplied to the recording CCD, the charge signal generated in the conversion unit is transferred from the one end to the other end of the recording CCD, and the charge signal is transferred to the recording CCD via the drain gate. An analog drive voltage supply unit for discharging to the drain and executing continuous overwriting, and a charge signal reading unit for reading out the charge signal accumulated in the recording CCD by the continuous overwriting to the outside of the imaging device , And a digital driving voltage supply unit for reading out the charge signal via the charge signal readout unit supplies a driving voltage having a rectangular wave after the shooting out of the imaging device, to provide a high-speed imaging device.

  During shooting, only the sinusoidal drive voltage from the analog drive voltage supply unit is used, and the charge signal is transferred on the recording CCD without using any digital signal, enabling high-speed shooting with high accuracy without digital noise. It is. Further, since the charge signal transferred on the recording CCD is discharged to the drain via the drain gate, continuous overwriting can be performed. After the continuous overwriting is stopped, the digital drive voltage supply unit supplies a rectangular wave drive voltage, and the charge signal can be read out of the image sensor by digital control.

  For example, the charge signal readout unit includes a plurality of vertical readout CCDs where the other ends of the recording CCDs merge and a single horizontal readout CCD to which the plurality of vertical readout CCDs are connected.

  As an alternative, the drain and drain gate function as the charge signal readout unit.

  In the high-speed photographing apparatus of the present invention, the continuous overwriting is executed by the digital drive voltage supply unit supplying a sinusoidal drive voltage to the recording CCD during photographing. That is, during continuous overwriting, the charge signal is transferred on the CCD using only the sinusoidal drive voltage and not using any digital signal, so that digital noiseless high-accuracy and ultra-high-speed photography is possible. On the other hand, after the continuous overwriting is stopped, the digital drive voltage supply unit supplies a rectangular wave drive voltage, and the charge signal can be read out of the image sensor by digital control.

  Next, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

(First embodiment)
FIG. 1 shows the configuration of the entire high-speed photographing apparatus. The light incident on the lens 21 passes through the external shutter 22 and forms an image on a light receiving surface 32 of an ISIS type high-speed image sensor 31 (hereinafter simply referred to as an image sensor). During imaging, charges are generated according to the intensity of incident light, but excess charges generated by excessive incident light are discharged through the drain line 23. After shooting, the charge signal (image signal) stored in the image sensor through the readout line 24 is converted into digital information by the AD converter 25 and stored in the buffer memory 26. The image information stored in the buffer memory 26 is converted into continuous image information one by one by the image information processing device 27 and then output to the outside of the high-speed photographing device. This image information can be visually observed as an image on the monitor 28. Further, the high-speed photographing apparatus includes a timing controller 29 for controlling the entire apparatus. Further, the high-speed imaging device includes an analog drive voltage supply unit 30 a and a digital drive voltage supply unit 30 b that generate a drive voltage for driving the image sensor 31. These drive voltage supply units 30a and 30b will be described in detail later. A trigger signal generator 100 is connected to the timing controller 29. For example, the trigger signal generation unit 100 monitors a change in luminance of a subject to be imaged, and outputs a trigger signal that instructs the stop of continuous overwriting to the timing controller 29 when a certain condition is satisfied.

  Next, the image sensor 31 will be described. As shown in FIG. 2, a plurality of photodiodes (conversion units) 33 are arranged on the light receiving surface 32. These photodiodes 33 are arranged such that the interval S1 in the row direction (X-axis direction) and the interval S2 in the column direction (Y-axis direction) are constant. The photodiodes 33 are arranged so that the row direction and the column direction are orthogonal to each other. That is, the photodiodes 33 are arranged on the light receiving surface 32 in a rectangular array (including a square array). The pixels 34 each including one photodiode 33 are also arranged in a rectangular array. In FIG. 2, a total of 12 (4 rows and 3 columns) photodiodes 33 are shown.

  One linear recording CCD 36 is provided for each photodiode 33. Further, one linear vertical readout CCD 37 is provided for each row of photodiodes 33.

  One end of the recording CCD 36 is connected to a corresponding photodiode 33 via an input gate 38. The recording CCD 36 extends in a direction inclined with respect to the line L2 connecting the photodiodes 33 adjacent in the column direction. Further, the other end of the recording CCD 36 is joined to the vertical readout CCD 37. All the recording CCDs 36 connected to the photodiodes 33 constituting the same column are joined to the same vertical readout CCD 37.

  The vertical readout CCD 37 extends in the column direction (vertical direction) of the photodiodes 33. Further, in the figure of the vertical readout CCD 37, the lower end extends to the outside of the light receiving surface 32 and is connected to the horizontal readout CCD 39. The horizontal readout CCD 39 is connected to the AD converter 25 via an amplifier 41 and a signal readout line 24 (see FIG. 1).

  In FIG. 3, the recording CCD 36 has 17 elements 36 a as indicated by numbers 5 to 16. When the recording CCD 36 advances from the input gate 38 by 18 elements 36 a, it merges with the vertical readout CCD 37. In FIG. 3, the number “4” is assigned to the element 37 a of the vertical readout CCD 37 where the input gate 38 joins. As indicated by arrows F1 and F2 in FIG. 3, in the vicinity of the confluence of the recording CCD 36 with respect to the vertical readout CCD 37, that is, in the vicinity of the element 37a numbered “4”, The charge signal transfer method of the vertical readout CCD 37 is substantially the same direction.

  A drain 43 extending in parallel with the vertical readout CCD 37 is provided on the left side of the vertical readout CCD 37 in FIG. Similar to the vertical readout CCD 37, a drain 43 is also provided for each column of photodiodes 33. The drain 43 extends to the outside of the light receiving surface 32 and is connected to a drain line 44 extending in the horizontal direction. The drain line 44 is connected to the drain line 23 (see FIG. 1) connected to the ground. As shown in FIG. 3, the drain 43 has a charge signal transfer direction indicated by an arrow F <b> 2 with respect to the element 37 a of the vertical readout CCD 37 assigned with the number “4”, which is the junction of the recording CCD 36. One upstream element 37a, that is, the element 37a numbered “1” is connected. A drain gate 45 is provided between the drain 43 and the element 37 a of the vertical readout CCD 37.

Next, the structure of the image sensor 31 will be described with reference to FIGS. Of these figures, FIG. 4 shows a substrate (lowermost layer). FIG. 5 shows a polysilicon electrode layer formed on the lowermost layer. FIG. 6 shows a metal layer formed on the polysilicon electrode layer. FIG. 7 shows the light shielding layer 46 which is the uppermost layer. Between the substrate and the polysilicon electrode layer, between the polysilicon electrode layer and the metal layer, and between the metal layer and the light shielding layer 46, an insulating layer 101 such as SiO ₂ / Si ₃ N ₄ (see FIG. 8) is provided. Is provided.

As shown in FIG. 4, a photodiode 33, a recording CCD 36, an input gate 38, a drain gate 44, and a vertical readout CCD 37 are provided on the substrate. The recording CCD 36 is configured by alternately providing N regions 47a and N ⁺ regions 47b. Four consecutive N regions 47a and N ⁺ regions 47b constitute one element 36a. For vertical read CCD37 also configured by providing an N region 47a and the ^{N +} region 47b alternately, four N regions 47a and ^{N +} region 47b consecutive constitutes one element 37a. The pair of N region 47a and N ⁺ region 47b constitutes one input gate 38. The remaining part of the substrate excluding the photodiode 33, the recording CCD 36, the input gate 38, the drain gate 45, and the vertical readout CCD 37 constitutes a channel stop 48 formed of a P region.

  As shown in FIG. 5, the polysilicon layer is provided with three types of polysilicon electrodes 51, 52, and 53. Of these, the first polysilicon electrode 51 is for driving the recording CCD 36 and is applied with an A1 phase driving voltage. Next, the second polysilicon electrode 52 is used to drive both the recording CCD 36 and the vertical readout CCD 37, and an A2-phase driving voltage is applied thereto. Further, the third polysilicon electrode 53 is an electrode for driving the vertical readout CCD 37, and is applied with an A1 phase driving voltage.

These polysilicon electrodes 51 to 53 extend in the row direction (horizontal direction) of the photodiode 33 in the light receiving surface 32, and a pair of N region 47 a and N ⁺ region are located below the polysilicon electrodes 51 to 53. 47b is located. The first polysilicon electrode 51 and the second polysilicon electrode 52 are provided in a row in the row direction (horizontal direction), and a gap 54 is provided between them to electrically insulate them. First and third polysilicon electrodes 51 and 53 and second polysilicon electrodes 52 are alternately provided in the column direction. A pair of the first polysilicon electrode 51 and the second polysilicon electrode 52 corresponds to one element 36 a of the recording CCD 36, and one element 37 a of the vertical readout CCD 37 corresponds to the first polysilicon electrode 51 and the first polysilicon electrode 51. A pair of 3 polysilicon electrodes 53 corresponds.

  As shown in FIG. 6, the metal layer includes a first metal line 57, a second metal line 58, a third metal line 59, and a drain 43. The metal lines 57 to 59 supply the drive voltage output from the voltage supply units 30a and 30b to the polysilicon electrodes 51 to 53. Among the metal lines 57 to 59, the first metal line 57 supplies an A1 phase driving voltage to the first polysilicon electrode 51. The second metal line 58 supplies an A2 phase driving voltage to the second polysilicon electrode 52. Further, the third metal line 59 supplies the A1 phase driving voltage to the third polysilicon electrode 53. The individual metal wires 57 to 59 are electrically connected to the corresponding polysilicon electrodes 51 to 53 through contact points 61a to 61c.

  The drain gate 45 is connected to the light shielding layer 46 through the contact point 61d. Therefore, the control voltage for opening and closing the drain gate 45 is supplied to the drain gate 45 through the light shielding layer 46 and the contact point 61d.

  As shown in FIG. 7, the light shielding layer 46 made of a conductive metal such as aluminum is provided with a plurality of window portions 46a corresponding to the photodiodes 33, respectively. The window portion 46 a allows light to enter the photodiode 33. The portions other than the window portion 46a of the light shielding layer 46 cover the light receiving surface 32 and block incident light.

  The polysilicon electrodes 51 to 53 are electrically connected to the drive voltage supply units 30a and 30b as shown in FIG. 8 through conductive paths including contact points 61a to 61d and metal 57 to 59. The analog drive voltage supply unit 30a supplies a sinusoidal drive voltage (analog) to the recording CCD 36 and the vertical readout CCD 37 during continuous overwriting, and the digital drive voltage supply unit 30b reads out the recording CCD 36 from the vertical readout after continuous overwriting. A rectangular wave drive voltage (digital) is supplied to the CCD 37 and the horizontal readout CCD 39. The analog drive voltage supply unit 30a may be configured with only an analog circuit, or may be configured with a digital circuit and a DA converter that converts an output thereof into an analog signal. In the latter case, it is necessary to sufficiently shield the noise generated by the digital circuit.

  Next, the operation of the high-speed imaging device will be described.

  First, continuous overwriting will be described. At the time of continuous overwriting, the drain gate 45 is maintained at the same potential as the drain line 43, and the drain gate starts from the element 37a of the vertical readout CCD 37 connected to the drain gate 45, that is, the element 37a numbered "1" in FIG. 45, the charge signal is discharged out of the device through the drain lines 44 and 23.

  At the time of continuous overwriting, a two-phase sinusoidal drive voltage is supplied from the analog drive voltage supply unit 30a to the recording CCD 36 and the vertical readout CCD 37 as shown in FIG. More specifically, a drive voltage of an A1 phase sine wave is supplied to the element 36 a of the recording CCD 36 from the analog drive voltage supply unit 30 a through the first metal line 57, the contact point 61 a, and the first polysilicon electrode 51. Is done. Further, an A2 phase sine wave driving voltage is applied to the element 36 a of the recording CCD 36 from the analog driving voltage supply unit 30 a via the second metal line 58, the contact point 61 b, and the second polysilicon electrode 52. . On the other hand, the A1 phase drive voltage is applied to the element 37 a of the vertical readout CCD 37 from the analog drive voltage supply unit 30 a via the third metal line 59, the contact point 61 c, and the third polysilicon electrode 53. The element 37a of the vertical readout CCD 37 is supplied with an A2 phase drive voltage from the analog drive voltage supply unit 30a through the second metal line 58 and the contact point 61b.

  The A1 phase and A2 phase sinusoidal drive voltages have the same amplitude and period, and the A2 phase is shifted from the A1 phase by 1 / 2π. With these A1 and A2 phase sinusoidal drive voltages, the charge signal 102 is transferred in the recording CCD 36 and the vertical readout CCD 37 as schematically shown in FIGS. 10A and 10B. Specifically, as indicated by the numbers “5” to “21” attached to the element 36a in FIG. 3 and the arrow F1, the charge signal generated by the photodiode 33 is merged with the vertical readout CCD 37 by the recording CCD 36. It is transported toward. In addition, as indicated by the numbers “1” to “4” assigned to the element 37a and the arrow F2 in FIG. 3, the charge signal transferred to the vertical readout CCD 37 is transferred in the column direction (vertical direction). The charge signal transferred by the vertical readout CCD 37 is drained from the element 37a having the number “1” before reaching the downstream junction point, that is, the element 37a having the number “4” in FIG. It is discharged to the drain 43 through the gate 45.

  By the above operation, as shown by numbers “1” to “21” in FIG. 3, a large number of latest charge signals are recorded on the elements 36 a and 37 a of the recording CCD 36 and the vertical readout CCD 37 while being updated.

  In this way, during continuous overwriting, only the sinusoidal drive voltage is used, and the charge signal is transferred on the CCD without using any digital signal. Therefore, it is possible to realize high-accuracy ultra-high-speed shooting without generating noise (that is, noise generated by a sudden current change accompanying falling or ringing).

  When a trigger signal is input from the trigger signal generation unit 100 to the timing controller 29, the continuous overwriting is finished by stopping the application of the driving voltage, and the external shutter 22 is closed.

  Next, reading of the charge signal after stopping the continuous overwriting will be described. A control voltage (for example, 0 V) for closing the drain gate 45 is applied through the light shielding layer 46. The charge signal is read by repeating a first process for transferring the charge signal from the vertical readout CCD 37 to the horizontal readout CCD 39 and a second process for transferring the charge signal from the recording CCD 36 to the vertical readout CCD 37. Executed.

  In the first process, the charge signal is not transferred by the recording CCD 36, and the charge signal is transferred only by the vertical readout CCD 37. Specifically, the voltage supplied to the first metal line 57 for supplying the A1 phase drive voltage to the recording CCD 36 is kept constant, while the A2 phase drive voltage is supplied to the recording CCD 36 and the vertical readout CCD 37. The digital driving voltage supply unit 30b applies a driving voltage having a two-level rectangular waveform to the polysilicon electrode 52 for performing the above and the polysilicon electrode 53 for supplying the A1 phase driving voltage to the vertical readout CCD 37. As a result, in the recording CCD 36, the charge signal is not transferred and remains in the accumulated element 36a. On the other hand, in the vertical readout CCD 37, as indicated by an arrow F2 in FIG. 3, the charge signal is transferred in the column direction (vertical direction). The charge signal transferred to the horizontal readout CCD 39 is sent to the buffer memory 26 via the amplifier 41, the readout line 24 and the A / D converter 25. The horizontal readout CCD 39 is also driven by a rectangular waveform drive voltage from the digital drive voltage supply unit 30b. When all the charge signals accumulated in the element 37a of the vertical readout CCD 37 are transferred to the horizontal readout CCD 39, one first process is completed and the second process is executed. The peripheral circuits of the image sensor 31 including the amplifier 41 and the A / D converter 25 are digitally controlled by a rectangular waveform driving voltage from the digital driving voltage supply unit 30b.

  In the second process, the charge signal is transferred by both the recording CCD 36 and the vertical readout CCD 37. Specifically, a polysilicon electrode 51 for supplying an A1 phase drive voltage to the recording CCD 36, a polysilicon electrode 52 for supplying an A2 phase drive voltage to the recording CCD 36 and the vertical readout CCD 37, and a vertical The digital driving voltage supply unit 30b applies a two-level rectangular wave driving voltage to all of the polysilicon electrodes 53 for supplying the A1 phase driving voltage to the reading CCD 37. As a result, in both the recording CCD 36 and the vertical readout CCD 37, charge signals are transferred as indicated by arrows F1 and F2 in FIG. As a result, the charge signal is supplied from the recording CCD 36 to the elements 37a indicated by the numbers “1” to “4” in FIG. When charge signals are accumulated in all the elements 37a of the vertical readout CCD 37, that is, when charge signals are accumulated in the elements 37a numbered "1" to "4" in FIG. 3, one second process is performed. And the first process is executed again. When all the charge signals are transferred from the recording CCD 36, the vertical readout CCD 37, and the horizontal readout CCD 39 by repeating the first process and the second process, the reading is completed.

  As described above, during continuous overwriting, only the sinusoidal drive voltage is used, and the charge signal is transferred on the CCD without using any digital signal. (Noise generated by sudden current change due to rising, falling, or ringing) was prevented, but when overwriting was stopped due to the occurrence of a phenomenon to be photographed, a charge signal was slowly buffered outside the image sensor by digital control. The data is read into the memory 26, configured as a continuous image, and reproduced. When reading a charge signal, the CCD and peripheral circuits can be driven at a significantly slower speed than during continuous overwriting, so that noise caused by pulse rise, fall, and ringing is practical even with digital control. It can be suppressed to a level that can be almost ignored. Further, when reading out the charge signal, in addition to greatly reducing the drive speed of the CCD and the peripheral circuit, it is easy to cool the image pickup device 31, and noise can be reduced accordingly.

  In the high-speed imaging device of the present embodiment, as described above, digital imaging is realized by driving the imaging device 31 with a sine wave (analog) at the time of imaging. This is because the imaging device 31 is an ISIS type, and This is possible because the two conditions are satisfied. As a first condition, since the image pickup device 31 includes the charge signal storage elements in the light receiving surface 32, that is, the recording CCD 36 and the vertical readout CCD 37, it is not necessary to read out the charge signal during photographing. The second condition is that the recording CCD 36 and the vertical readout CCD 37 that are driven during continuous overwriting are both “linear”, and the recording CCD 36 joins the vertical readout CCD 37 (see FIG. 3). Including the element 37a) with the number “4”, the charge signal transfer method is in substantially the same direction. Even if a charge signal recording element is provided around the pixel and it is not necessary to read out the charge signal during shooting, if the change of the charge signal transport direction (bending in the charge signal transport direction) is necessary, the analog drive The voltage cannot transfer the charge signal in the transfer direction. Therefore, for example, as disclosed in US Pat. No. 5,355,165, a CCD as a charge signal storage means is provided in a pixel, but the charge signal transfer direction is bent from the horizontal direction to the vertical direction in the light receiving surface. With the image sensor, continuous overwriting by analog control cannot be realized.

(Second Embodiment)
The recording CCD 36 and the vertical readout CCD 37 of the image sensor 31 may be driven by four phases. In this case, it is not necessary to change the impurity doping profile (see FIGS. 3 and 8) in the charge transfer direction of the recording CCD 36 and the vertical readout CCD 37.

  At the time of continuous overwriting, the analog drive voltage supply unit 30a applies a four-phase (A1, A2, A3, A4) sine wave to the recording CCD 36 and the vertical readout CCD 37 as shown in FIGS. Is supplied. The A1 and A2 phase drive voltages have the same amplitude and period, and are out of phase by 1 / 2π. With these A1 to A3 phase sinusoidal drive voltages, the charge signal 102 is transferred in the recording CCD 36 and the vertical readout CCD 37 as schematically shown in FIG. As described above, during continuous overwriting, only a sinusoidal drive voltage is used, and a charge signal is transferred on the CCD without using any digital signal, so that digital noiseless high-accuracy and super-high-speed photography can be performed.

  When the charge signal is read after the continuous overwriting is stopped, the drive voltage having a waveform obtained by changing the sine wave of FIGS. 12 and 13 to a rectangular wave from the digital drive power supply unit 30b is supplied to the recording CCD 36 and the vertical readout CCD 37. Accordingly, the charge signal is read from the image sensor 31 and accumulated in the buffer memory 26 by repeating the first process and the second process described above.

  Other configurations and operations of the second embodiment are the same as those of the first embodiment.

(Third embodiment)
The overall structure of the third embodiment of the present invention shown in FIG. 15 is the same as that of the first embodiment (see FIG. 1), but the structure of the image sensor 31 is different from that of the first embodiment. . One end (upper end) of the recording CCD 203 is connected to the lower left side of the photodiode 33 through an electricity collecting well 201 and an input gate 202. The recording CCD 203 extends obliquely downward on the light receiving surface, and the other end reaches the lower side of the photodiode 33 on the left side by six in the column direction and one on the left side in the row direction. That is, the recording CCD 203 extends diagonally downward by a distance of 6 pixels. Note that illustration of individual elements of the recording CCD 203 is omitted. The other end (lower end) of the photodiode 33 is connected to a drain 205 via a MOS drain gate 204. The drain 205 is connected to a drain line (not shown) (also used as a readout line). The drain line is connected to a buffer memory (see reference numerals 41, 25 and 26 in FIGS. 1 and 2) through an amplifier and an A / D converter. A MOS type overflow gate 206 is interposed between the drain 205 and the input gate 202 described above.

  During continuous overwriting, the drain gate 204 is opened and the overflow gate 206 is closed. The recording CCD 203 is driven by a sinusoidal drive voltage supplied from the analog drive voltage supply unit 30a (see FIGS. 8 and 11). The charge signal generated by the photodiode 33 is sequentially transferred from one end to the other end on the recording CCD 203 as indicated by an arrow in FIG. 15, and is discharged out of the image sensor 31 through the drain gate 204 and the drain 205. The

  After completion of continuous overwriting by stopping the application of drive voltage to the recording CCD, the drain gate 204 of the recording CCD 203 connected to one of the photodiodes 33 is selected and opened, and the digital drive voltage supply unit 30b (FIG. 8) is opened. 11)), the selected recording CCD 203 is driven by a rectangular wave driving voltage supplied to the buffer memory (see reference numeral 41 in FIG. 1) via the drain gate 204, the drain 205, the drain line, and the like. The charge signals stored in the CCD 203 are transferred in order. As described above, in this embodiment, it is possible to read out the charge signal by randomly selecting the photodiode 33 (pixel) after completion of continuous overwriting.

  Note that the overflow gate 206 is opened when shooting at a shooting speed significantly lower than that during continuous overwriting for setting shooting conditions and the like. As a result, the charge signal generated by the photodiode 33 can be directly read out of the image sensor 31 without going through the recording CCD 203. Specifically, the charge signal generated by the photodiode 33 passes from the electricity collection well 201 to the open overflow gate 206, the open drain gate 204, the drain 205, the drain line, and the like to the buffer memory (reference numeral 41 in FIG. 1). See).

  Also in this embodiment, at the time of continuous overwriting, the recording CCD 203 is driven with a sinusoidal driving voltage (analog) so that digital noiseless high-accuracy and ultrahigh-speed shooting is possible. The charge signal can be slowly read out of the image sensor 31 with the drive voltage (digital).

  The present invention has been described by way of an example of a high-speed imaging device including an imaging device that converts visible light into a charge signal. It is also possible to convert an incident line other than visible light such as a charge signal.

The schematic diagram which shows the high-speed imaging device of 1st Embodiment of this invention. The partial front view which shows the light-receiving surface of a high-speed image sensor. The elements on larger scale which show a photodiode, CCD for recording, and CCD for vertical reading. The partial enlarged front view which shows a board | substrate (lowermost layer). The partial enlarged front view which shows a polysilicon layer. The partial enlarged front view which shows a metal layer. The partial enlarged front view which shows the light shielding layer (uppermost layer). FIG. 3 is a schematic cross-sectional view of the recording CCD and the vertical readout CCD in the first embodiment in the charge signal carrying direction. FIG. 4 is a waveform diagram showing sinusoidal drive voltages (two phases) supplied to a recording CCD and a vertical readout CCD during continuous overwriting in the first embodiment. The schematic diagram which shows the conveyance state of the signal charge in CCD for recording and CCD for vertical readout at the time of continuous overwrite photography. The schematic diagram which shows the conveyance state of the signal charge in CCD for recording and CCD for vertical readout at the time of continuous overwrite photography. FIG. 9 is a schematic cross-sectional view in the charge signal carrying direction of a recording CCD and a vertical readout CCD in a second embodiment. FIG. 9 is a waveform diagram showing sinusoidal drive voltages (four phases) supplied to a recording CCD and a vertical readout CCD during continuous overwriting in the second embodiment. FIG. 9 is a waveform diagram showing superimposed sinusoidal drive voltages (four phases) supplied to a recording CCD and a vertical readout CCD during continuous overwriting in the second embodiment. The schematic diagram which shows the conveyance state of the signal charge in CCD for recording and CCD for vertical readout at the time of continuous overwrite photography. The partial front view which shows the image pick-up element with which the high-speed imaging device of 3rd Embodiment of this invention is provided.

Explanation of symbols

DESCRIPTION OF SYMBOLS 21 Lens 22 External shutter 23 Drain line 24 Read-out line 25 A / D converter 26 Buffer memory 27 Image information processing apparatus 28 Monitor 29 Timing controller 30a Analog drive voltage supply part 30b Digital drive voltage supply part 31 High-speed image sensor 32 Light-receiving surface 33 Photo Diode 36 CCD for recording
37 CCD for vertical readout
38 Input gate 39 Horizontal readout CCD
43 Drain 44 Drain line 45 Drain gate 46 Light shielding layer 47a N region 47b N ⁺ region 51, 52, 53 Polysilicon electrode 57, 58, 59 Metal line 61a, 61b, 61c Contact point 100 Trigger signal generating unit 101 Insulating layer 102 Charge Signal 201 Charge collection well 202 Input gate 203 CCD for recording
204 Drain gate 205 Drain 206 Overflow gate

Claims (3)

A plurality of converters that are arranged on the light receiving surface and generate a charge signal according to the intensity of the incident line;
A plurality of recording CCDs, one end of which is connected to each of the conversion units and extending linearly toward the other end;
A drain gate provided on the other end of the recording CCD;
An imaging device having a drain connected to the drain gate;
At the time of shooting, a sinusoidal drive voltage is supplied to the recording CCD of the image sensor, and a charge signal generated by the conversion unit is transferred from the one end to the other end of the recording CCD. An analog driving voltage supply unit that discharges the charge signal to the drain via the line and performs continuous overwriting;
A charge signal reading unit for reading out the charge signal accumulated in the recording CCD by the continuous overwriting to the outside of the imaging device;
A digital drive voltage supply unit for supplying a rectangular-wave drive voltage after imaging and reading out a charge signal to the outside of the image sensor via the charge signal readout unit;
High-speed photography device. The charge signal readout unit includes a plurality of vertical readout CCDs joined at the other ends of the recording CCDs,
The high-speed imaging device according to claim 1, further comprising: a single horizontal readout CCD to which the plurality of vertical readout CCDs are connected.   The high-speed imaging device according to claim 1, wherein the drain and the drain gate function as the charge signal readout unit.