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JP2010040920A - Optical semiconductor device and method of manufacturing same - Google Patents

Optical semiconductor device and method of manufacturing same Download PDF

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JP2010040920A
JP2010040920A JP2008204351A JP2008204351A JP2010040920A JP 2010040920 A JP2010040920 A JP 2010040920A JP 2008204351 A JP2008204351 A JP 2008204351A JP 2008204351 A JP2008204351 A JP 2008204351A JP 2010040920 A JP2010040920 A JP 2010040920A
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light receiving
receiving element
semiconductor device
insulator
semiconductor light
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Naoki Obara
直樹 小原
Hiroshige Takehara
浩成 竹原
Hiroyuki Ishida
裕之 石田
Noriyuki Yoshikawa
則之 吉川
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Panasonic Corp
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Abstract

【課題】半導体受光素子の受光領域を避けて、精度よく封止樹脂で被覆する光半導体装置及びその製造方法の提供を目的とする。
【解決手段】本発明の光半導体装置は、実装基板上に配置された、受光領域を有する半導体受光素子と、実装基板上の電極体と、半導体受光素子と電極体を電気的に接続する接続体を備えた光半導体装置を前提としている。そして本発明の光半導体装置は、絶縁壁が、半導体受光素子の受光領域の周囲に形成されている。そして、封止樹脂が、絶縁壁の外周面に接し、実装基板外縁にわたる範囲内で、半導体受光素子及び実装基板を被覆している。
【選択図】図1
An object of the present invention is to provide an optical semiconductor device that can be accurately coated with a sealing resin while avoiding a light receiving region of a semiconductor light receiving element, and a method for manufacturing the same.
An optical semiconductor device of the present invention includes a semiconductor light receiving element having a light receiving region, an electrode body on the mounting substrate, and a connection for electrically connecting the semiconductor light receiving element and the electrode body, which are disposed on the mounting substrate. An optical semiconductor device provided with a body is assumed. In the optical semiconductor device of the present invention, the insulating wall is formed around the light receiving region of the semiconductor light receiving element. The sealing resin is in contact with the outer peripheral surface of the insulating wall and covers the semiconductor light receiving element and the mounting substrate within a range extending over the outer edge of the mounting substrate.
[Selection] Figure 1

Description

本発明は、光ピックアップなどに用いられる光半導体装置とその製造方法に関し、さらに詳しくは、樹脂封止された光半導体装置に関する。   The present invention relates to an optical semiconductor device used for an optical pickup or the like and a manufacturing method thereof, and more particularly to a resin-sealed optical semiconductor device.

従来、光ピックアップに用いる光半導体装置は、電極が形成された実装基板上に半導体受光素子を配設し、当該半導体受光素子の全面を封止樹脂の透明保護層で覆う構成によりパッケージ化されていた。この透明保護層は、半導体受光素子に形成されたボンディングパッドや、ボンディングワイヤ、受光領域といった部分が外気に含まれる水分によって腐食することを抑制し、塵埃によって発生する特性劣化から受光装置を保護する機能を有する。   Conventionally, an optical semiconductor device used for an optical pickup has been packaged by a structure in which a semiconductor light receiving element is disposed on a mounting substrate on which electrodes are formed, and the entire surface of the semiconductor light receiving element is covered with a transparent protective layer of a sealing resin. It was. This transparent protective layer prevents the portions such as bonding pads, bonding wires, and light receiving areas formed on the semiconductor light receiving element from being corroded by moisture contained in the outside air, and protects the light receiving device from characteristic deterioration caused by dust. It has a function.

前記光半導体受光素子は、例えばCD−R(Compact Disk−Recordable)ドライブやDVD(Digital Versatile Disk)ドライブに代表される光ディスク装置の光ピックアップとして使用される。また、その構成は、前記DVDドライブ等に装填されたDVD等の光ディスクで反射されたレーザ光を受光するための受光領域であるフォトダイオードと、受光したレーザ光に基づいてフォトダイオードで生成された電気信号を処理するための信号処理回路領域とからなる。   The optical semiconductor light receiving element is used, for example, as an optical pickup of an optical disk apparatus represented by a CD-R (Compact Disk-Recordable) drive and a DVD (Digital Versatile Disk) drive. Further, the configuration is generated by a photodiode that is a light receiving region for receiving laser light reflected by an optical disk such as a DVD loaded in the DVD drive or the like, and a photodiode based on the received laser light. It consists of a signal processing circuit area for processing electrical signals.

一方、前記光源としての半導体レーザは、光ディスク装置の高速動作化、記憶容量の大容量化の要望があり、近年エネルギー密度が高くなり、短波長化が進んでいる。このため従来では650nmの波長の光を放出する赤色半導体レーザが用いられていたが、現在ではさらに短波長である、405nmの波長を放出する青色半導体レーザを使用したシステムへと変わりつつある。   On the other hand, the semiconductor laser as the light source has been demanded to increase the operation speed of the optical disk device and to increase the storage capacity. In recent years, the energy density has increased and the wavelength has been shortened. For this reason, a red semiconductor laser that emits light with a wavelength of 650 nm has been used in the past, but now it is changing to a system that uses a blue semiconductor laser that emits a wavelength of 405 nm, which is a shorter wavelength.

エネルギー密度が高い短波長レーザは、樹脂を変色させることから、受光素子の受光領域であるフォトダイオードを樹脂よりなる透明保護層で覆うと、その透明保護層まで変色させる。このため、受光領域の光透過率が低下して、受光素子に到達できるレーザ光の光量を低下させて、素子特性が変動するといった不具合が発生する。   Since the short wavelength laser with high energy density changes the color of the resin, when the photodiode, which is the light receiving region of the light receiving element, is covered with a transparent protective layer made of resin, the color of the transparent protective layer is also changed. For this reason, the light transmittance of the light receiving region is lowered, the amount of laser light that can reach the light receiving element is reduced, and the device characteristics fluctuate.

このような問題を解決する方法として、受光領域には封止樹脂を被覆しない技術が知られている。特許文献1に開示の光半導体装置は、実装基板上に半導体受光素子のベアチップを搭載し、当該、ベアチップ上のボンディングパッドと実装基板の引き出し電極の間をワイヤボンディングで接続したのち、ボンディングパッドとボンディングワイヤを樹脂でモールドする。この技術は、図6のように受光領域周辺を取り囲むようにフォトリソグラフィ法によりポリイミド薄膜100を形成し、その後、例えばシリコン系の封止樹脂124を受光領域以外の半導体受光素子上及び実装基板上の外縁にわたる範囲に流し込む。シリコン系の樹脂の表面張力は、ポリイミドの表面張力より大きいので、シリコン系の封止樹脂124はポリイミド薄膜100上で留まり受光面上に開口部を形成したまま半導体受光素子を封止する。これにより、受光領域112に開口部が形成されたベアチップを形成することができる。さらに特許文献2に開示の技術は、金型に形成した柱状突起を受光領域に当接させた状態で金型に封止樹脂を充填する。これにより、受光領域が樹脂封止されることを防いでいる。
特開2007−189182号公報 米国特許出願公開第2006/0196412号明細書
As a method for solving such a problem, a technique in which a light receiving region is not covered with a sealing resin is known. In the optical semiconductor device disclosed in Patent Document 1, a bare chip of a semiconductor light receiving element is mounted on a mounting substrate, and a bonding pad on the bare chip and a lead electrode of the mounting substrate are connected by wire bonding, The bonding wire is molded with resin. In this technique, as shown in FIG. 6, the polyimide thin film 100 is formed by photolithography so as to surround the periphery of the light receiving region, and then, for example, a silicon-based sealing resin 124 is applied on the semiconductor light receiving element other than the light receiving region and on the mounting substrate. Pour over the outer edge of the Since the surface tension of the silicon-based resin is larger than the surface tension of the polyimide, the silicon-based sealing resin 124 stays on the polyimide thin film 100 and seals the semiconductor light receiving element with the opening formed on the light receiving surface. Thereby, a bare chip in which an opening is formed in the light receiving region 112 can be formed. Furthermore, the technique disclosed in Patent Document 2 fills the mold with sealing resin in a state where the columnar protrusions formed on the mold are in contact with the light receiving region. This prevents the light receiving region from being resin-sealed.
JP 2007-189182 A US Patent Application Publication No. 2006/0196412

しかしながら特許文献1に記載の技術では、封止樹脂124とポリイミドとの材料物性差による表面張力を利用して受光領域112上に開口部が形成されるため、受光領域112が複雑、微細なパターンとなったときには均一な開口領域の形成が困難となる。たとえば一つの受光素子内に複数個の受光面を設ける場合、封止樹脂124が受光素子のポリイミド薄膜上で均一に流れにくくなるため、受光領域112外の封止領域全面を均一に封止用の樹脂で被覆することが困難となる。よって、多層ディスクや光半導体装置の小型化による受光領域の複雑化に対応できない。さらに特許文献2に記載の技術では柱状突起からの衝撃が直接受光素子に加わるため受光素子にクラックが発生しやすい。   However, in the technique described in Patent Document 1, since the opening is formed on the light receiving region 112 by utilizing the surface tension due to the material property difference between the sealing resin 124 and the polyimide, the light receiving region 112 is complicated and has a fine pattern. When it becomes, it becomes difficult to form a uniform opening region. For example, when a plurality of light receiving surfaces are provided in one light receiving element, the sealing resin 124 is difficult to flow uniformly on the polyimide thin film of the light receiving element, so that the entire sealing area outside the light receiving area 112 is uniformly sealed. It becomes difficult to coat with the resin. Therefore, it is impossible to cope with the complexity of the light receiving region due to the miniaturization of the multilayer disk or the optical semiconductor device. Furthermore, in the technique described in Patent Document 2, since the impact from the columnar protrusion is directly applied to the light receiving element, cracks are likely to occur in the light receiving element.

本発明はこのような問題を解決するものであって、半導体受光素子の受光領域を避けて、精度よく封止樹脂で被覆する光半導体装置及びその製造方法の提供を目的とする。   SUMMARY OF THE INVENTION The present invention solves such problems, and an object of the present invention is to provide an optical semiconductor device that can be accurately coated with a sealing resin while avoiding a light receiving region of a semiconductor light receiving element, and a method for manufacturing the same.

上記目的を達成するために、本発明の光半導体装置は、以下の手段を採用している。本発明の光半導体装置は、実装基板上に配置された、受光領域を有する半導体受光素子と、実装基板上の電極体と、半導体受光素子と電極体を電気的に接続する接続体を備えた光半導体装置を前提としている。そして本発明の光半導体装置は、絶縁壁が、半導体受光素子の受光領域の周囲に形成されている。そして、封止樹脂が、絶縁壁の外周面に接し、実装基板外縁にわたる範囲内で、半導体受光素子及び実装基板を被覆している。   In order to achieve the above object, the optical semiconductor device of the present invention employs the following means. An optical semiconductor device of the present invention includes a semiconductor light receiving element having a light receiving region, an electrode body on the mounting substrate, and a connection body that electrically connects the semiconductor light receiving element and the electrode body, disposed on the mounting substrate. An optical semiconductor device is assumed. In the optical semiconductor device of the present invention, the insulating wall is formed around the light receiving region of the semiconductor light receiving element. The sealing resin is in contact with the outer peripheral surface of the insulating wall and covers the semiconductor light receiving element and the mounting substrate within a range extending over the outer edge of the mounting substrate.

上記絶縁壁は、半導体装置の実装基板外縁にわたる範囲内に液状の樹脂を充填した場合、半導体受光領域への液状樹脂の侵入を確実に防止する。このため、封止樹脂の変色の問題を回避することができる。封止樹脂は、例えば、半導体受光素子が配設された実装基板を金型内に配置し、金型の外部から封止樹脂被覆領域に液状の樹脂を充填することで形成される。このとき、絶縁壁は、金型上面に当接した状態となっており、金型から絶縁壁及び半導体素子に対して力が働く。しかし、絶縁壁を当該金型からの外力を緩和する機能を備える構成とすることによって、半導体受光素子が損傷することはない。   The insulating wall reliably prevents the liquid resin from entering the semiconductor light receiving region when the liquid resin is filled in a range extending over the outer edge of the mounting substrate of the semiconductor device. For this reason, the problem of discoloration of sealing resin can be avoided. The sealing resin is formed, for example, by placing a mounting substrate on which a semiconductor light receiving element is disposed in a mold and filling a liquid resin into the sealing resin coating region from the outside of the mold. At this time, the insulating wall is in contact with the upper surface of the mold, and a force acts on the insulating wall and the semiconductor element from the mold. However, the semiconductor light receiving element is not damaged by providing the insulating wall with a function of relaxing the external force from the mold.

すなわち絶縁壁は、ヤング率の異なる少なくとも二種類の絶縁体が積層されることにより形成されることが望ましい。これにより、ヤング率の違いを利用して緩衝層を形成し、金型成形の樹脂封止時において絶縁壁にかかる局所的な圧力を分散、吸収させることが可能となる。   That is, the insulating wall is desirably formed by laminating at least two types of insulators having different Young's moduli. This makes it possible to form a buffer layer using the difference in Young's modulus, and to disperse and absorb the local pressure applied to the insulating wall during resin molding in mold molding.

上記の少なくとも二種類の絶縁体のうち、ヤング率の最も大きい絶縁体が、前記半導体受光素子に直接積層される下層の絶縁体とすることが好ましい。これにより、上層の絶縁体が弾性変形し、金型から絶縁壁にかかる局所的な圧力を分散、吸収させることが可能となる。   Of the at least two types of insulators, the insulator having the largest Young's modulus is preferably a lower-layer insulator that is directly stacked on the semiconductor light receiving element. As a result, the upper-layer insulator is elastically deformed, and the local pressure applied to the insulating wall from the mold can be dispersed and absorbed.

上記において、上層の絶縁体を半導体受光素子の上面に平行な面で切った断面積の内、最小断面積が下層絶縁体より小さいことが好ましい。断面積が下層の絶縁体より小さい最小面積の部分に絶縁壁の応力が集中するので、弾性変形により応力が緩和されるからである。さらに、少なくとも二種類の絶縁体のうち、上層の絶縁体の下面の外縁が下層の絶縁体の上面の外縁より内側に形成されることで、樹脂封止時の金型からの圧力を上層の絶縁体から下層の絶縁体に分散させることができる。   In the above, it is preferable that the minimum cross-sectional area is smaller than the lower-layer insulator among the cross-sectional areas obtained by cutting the upper-layer insulator along a plane parallel to the upper surface of the semiconductor light receiving element. This is because the stress of the insulating wall concentrates on the portion of the minimum area smaller in cross-sectional area than the lower insulator, and the stress is relieved by elastic deformation. Further, the outer edge of the lower surface of the upper insulator is formed inside the outer edge of the upper surface of the lower insulator among at least two types of insulators, so that the pressure from the mold during resin sealing can be increased. It can be dispersed from the insulator to the underlying insulator.

また、絶縁壁内部に中空部が形成されてもよい。この場合前記絶縁壁の上面は、封止されていても、開口されていてもよい。さらに、絶縁壁が3層以上の絶縁体から構成されてもよい。これらの絶縁体のうち中間層の絶縁体に中空部が形成されてもよい。   A hollow portion may be formed inside the insulating wall. In this case, the upper surface of the insulating wall may be sealed or opened. Furthermore, the insulating wall may be composed of three or more layers of insulators. A hollow part may be formed in the insulator of the intermediate layer among these insulators.

上記の半導体受光素子と電極体を電気的に接続する接続体が、ボンディングワイヤであって、半導体受光素子から絶縁壁上面までの厚みが、半導体受光素子からボンディングワイヤ最上部までの高さよりも大きい状態で、ボンディングワイヤが封止されることが望ましい。これによりワイヤ形成後の金型での樹脂封止時に、金型がワイヤに接触することなく樹脂封止が可能となる。   The connection body that electrically connects the semiconductor light receiving element and the electrode body is a bonding wire, and the thickness from the semiconductor light receiving element to the upper surface of the insulating wall is larger than the height from the semiconductor light receiving element to the top of the bonding wire. In the state, it is desirable that the bonding wire is sealed. Thereby, at the time of resin sealing with the metal mold | die after wire formation, resin sealing becomes possible, without a metal mold | die contacting a wire.

さらに半導体受光素子には、複数の受光領域が形成されてもよい。受光領域のそれぞれは、多層ディスクの各レイヤーの情報を読み出す機能を有する。これにより多層光ディスクの動作に必要な光学設計が可能となり、高機能な光半導体装置を構成することが可能となる。   Furthermore, a plurality of light receiving regions may be formed in the semiconductor light receiving element. Each of the light receiving areas has a function of reading information of each layer of the multilayer disc. As a result, an optical design necessary for the operation of the multilayer optical disc is possible, and a highly functional optical semiconductor device can be configured.

上記の目的を達成する光半導体装置の製造方法は以下の手段を採用している。まず、本発明の光半導体装置の製造方法は、受光領域を有する半導体受光素子と、電極体と、半導体受光素子と電極体を電気的に接続する接続体とを備えた実装基板を金型内に配置して、半導体受光素子の受光領域を除く実装基板上の領域のうち少なくとも接続体を含む領域を樹脂で封止する、光半導体装置の製造方法を前提にしている。そして、本発明の光半導体装置の製造方法は、半導体受光素子の受光領域の周囲に樹脂を遮る絶縁壁を形成し、絶縁壁を金型の内壁に当接させた状態で金型に樹脂を注入することを特徴とする。接続体を含む領域とは、実装基板上の電極体の一部又は全部を含む領域のことである。   An optical semiconductor device manufacturing method that achieves the above object employs the following means. First, a method of manufacturing an optical semiconductor device according to the present invention includes a mounting substrate including a semiconductor light receiving element having a light receiving region, an electrode body, and a connection body that electrically connects the semiconductor light receiving element and the electrode body. And a method for manufacturing an optical semiconductor device in which at least a region including a connection body among regions on a mounting substrate excluding a light receiving region of a semiconductor light receiving element is sealed with a resin. In the method for manufacturing an optical semiconductor device of the present invention, an insulating wall that blocks the resin is formed around the light receiving region of the semiconductor light receiving element, and the resin is applied to the mold in a state where the insulating wall is in contact with the inner wall of the mold. It is characterized by injecting. The region including the connection body is a region including part or all of the electrode body on the mounting substrate.

上記絶縁壁は、半導体受光素子よりヤング率の小さい材料で形成されることが望ましい。さらに、半導体受光素子の受光領域の周囲に形成される絶縁壁の製造工程が、半導体受光素子よりヤング率の小さい下層絶縁体を形成し、下層絶縁体よりヤング率が小さく、かつ半導体受光素子の上面に平行な面の最小断面積が小さい絶縁体を下層絶縁体に積層して、製造されてもよい。   The insulating wall is preferably made of a material having a Young's modulus smaller than that of the semiconductor light receiving element. Further, the manufacturing process of the insulating wall formed around the light receiving region of the semiconductor light receiving element forms a lower layer insulator having a Young's modulus smaller than that of the semiconductor light receiving element, and has a Young's modulus lower than that of the lower layer insulator. It may be manufactured by laminating an insulator having a small minimum cross-sectional area of a plane parallel to the upper surface on a lower insulator.

上層の絶縁体を半導体受光素子の上面に平行な面で切った断面積のうち、最小断面積を下層絶縁体より小さく構成することで、最小面積の部分に絶縁壁の応力が集中するので、弾性変形により応力が緩和する。さらに、上層と下層の二種類の絶縁体のうち、上層の絶縁体の下面の外縁が、下層の絶縁体の上面の外縁より内側に形成されることで、樹脂封止時の金型からの圧力を上層の絶縁体から下層の絶縁体に分散させることができる。   By configuring the minimum cross-sectional area smaller than the lower-layer insulator among the cross-sectional area obtained by cutting the upper-layer insulator in a plane parallel to the upper surface of the semiconductor light-receiving element, the stress of the insulating wall concentrates on the portion of the minimum area. Stress is relieved by elastic deformation. Furthermore, of the two types of insulators of the upper layer and the lower layer, the outer edge of the lower surface of the upper layer insulator is formed inside the outer edge of the upper surface of the lower layer insulator, so that from the mold at the time of resin sealing The pressure can be distributed from the upper insulator to the lower insulator.

この絶縁壁内部に中空部が形成されてもよい。これにより、中空部を利用して緩衝機能が備わり、金型から絶縁壁にかかる局所的な圧力を分散、吸収させることが可能となる。上記絶縁壁上面は、開口されてもよい。絶縁壁は、3層以上の絶縁体から形成されてもよい。これらの絶縁体のうち中間層の絶縁体に開口し、中間層の絶縁体上に上層の絶縁体を積層してもよい。絶縁壁が、フォトリソグラフィにより形成されると、フォトリソグラフィで得られる高精度なパターン形成が可能となり、高機能、高品質な光半導体装置を構成することが可能となる。   A hollow portion may be formed inside the insulating wall. Accordingly, a buffer function is provided using the hollow portion, and the local pressure applied to the insulating wall from the mold can be dispersed and absorbed. The upper surface of the insulating wall may be opened. The insulating wall may be formed of three or more layers of insulators. Of these insulators, an opening may be made in an intermediate insulator, and an upper insulator may be laminated on the intermediate insulator. When the insulating wall is formed by photolithography, it is possible to form a highly accurate pattern obtained by photolithography, and it is possible to configure a high-functional and high-quality optical semiconductor device.

前記半導体受光素子が複数の受光領域を有し、受光領域それぞれの周囲に絶縁壁が形成されてもよい。これにより多層光ディスクの動作に必要な光学設計が可能となり、高機能な光半導体装置を構成することが可能となる。   The semiconductor light receiving element may have a plurality of light receiving regions, and an insulating wall may be formed around each of the light receiving regions. As a result, an optical design necessary for the operation of the multilayer optical disc is possible, and a highly functional optical semiconductor device can be configured.

上記の半導体受光素子と電極体を電気的に接続する接続体が、ボンディングワイヤであり、半導体受光素子から絶縁壁上面までの厚みが、半導体受光素子からボンディングワイヤ最上部までの高さよりも大きい状態で、ボンディングワイヤが封止されることが望ましい。   The connection body that electrically connects the semiconductor light receiving element and the electrode body is a bonding wire, and the thickness from the semiconductor light receiving element to the upper surface of the insulating wall is larger than the height from the semiconductor light receiving element to the top of the bonding wire Therefore, it is desirable that the bonding wire be sealed.

本発明の光半導体装置は、短波長レーザの受光領域面上に封止樹脂を形成しないので、その変色の問題を回避できる。さらに半導体受光素子周囲に形成した絶縁壁が樹脂封止により光半導体装置を形成する際の、金型からの外力を緩和するので、半導体受光素子のクラックの発生を抑制することができる。さらに封止用樹脂が受光領域外に高精度に被覆し、高機能、高品質な光半導体装置を構成することが可能となる。従って、本発明に係る光半導体装置を用いることにより、青色レーザ用の光ディスク装置等の高機能な光ディスク装置に適した高性能、高品質な光半導体装置を提供することができる。また、同一半導体素子内において受光領域が複数個配置される多層光ディスクの動作に必要な光学設計を可能とする。   Since the optical semiconductor device of the present invention does not form the sealing resin on the light receiving region surface of the short wavelength laser, the problem of discoloration can be avoided. Furthermore, since the insulating wall formed around the semiconductor light receiving element relaxes the external force from the mold when the optical semiconductor device is formed by resin sealing, the occurrence of cracks in the semiconductor light receiving element can be suppressed. Further, the sealing resin coats the light receiving area with high accuracy, and it is possible to configure a high-functional and high-quality optical semiconductor device. Therefore, by using the optical semiconductor device according to the present invention, it is possible to provide a high-performance and high-quality optical semiconductor device suitable for a high-function optical disc device such as an optical disc device for blue laser. In addition, the optical design necessary for the operation of the multilayer optical disc in which a plurality of light receiving regions are arranged in the same semiconductor element can be realized.

(第1の実施形態)
図1は本発明の第1の実施の形態による光半導体装置の概略を示し、図1(a)は平面図、図1(b)は、A―Aの断面図である。実施の形態では、半導体受光素子と電極体を電気的に接続する接続体が、ボンディングワイヤである事例について説明する。
(First embodiment)
FIG. 1 shows an outline of an optical semiconductor device according to a first embodiment of the present invention. FIG. 1 (a) is a plan view and FIG. 1 (b) is a cross-sectional view taken along line AA. In the embodiment, a case will be described in which the connection body that electrically connects the semiconductor light receiving element and the electrode body is a bonding wire.

光半導体装置1は、電極であるボンディングパッド16が配置された実装基板3上に半導体受光素子10が搭載された構成を有する。図2は前記光半導体装置の製造工程を示す概略断面図であり、図3は本発明による半導体受光素子10の拡大断面構造図である。   The optical semiconductor device 1 has a configuration in which a semiconductor light receiving element 10 is mounted on a mounting substrate 3 on which bonding pads 16 as electrodes are disposed. FIG. 2 is a schematic cross-sectional view showing a manufacturing process of the optical semiconductor device, and FIG. 3 is an enlarged cross-sectional structure diagram of the semiconductor light receiving element 10 according to the present invention.

(半導体受光素子の形成)
まず、図2(a)に示す半導体受光素子10が準備される。図1(a)、(b)に示すように、半導体受光素子10は、シリコンなどの半導体基板11にフォトダイオードからなる受光領域12が形成され、さらに当該半導体受光素子10にボンディングワイヤ20をボンディングするためのボンディングパッド14が形成されている。そして受光領域12を囲むように絶縁壁30が形成されている。尚図示はしないが、受光領域12の表面には水分を透過させないSiN膜(シリコン窒化膜)が形成され、受光領域を露出させていても水分の浸入を防ぐようになっている。
(Formation of semiconductor light receiving element)
First, the semiconductor light receiving element 10 shown in FIG. 2A is prepared. As shown in FIGS. 1A and 1B, in the semiconductor light receiving element 10, a light receiving region 12 made of a photodiode is formed on a semiconductor substrate 11 such as silicon, and a bonding wire 20 is bonded to the semiconductor light receiving element 10. A bonding pad 14 is formed for this purpose. An insulating wall 30 is formed so as to surround the light receiving region 12. Although not shown, a SiN film (silicon nitride film) that does not transmit moisture is formed on the surface of the light receiving region 12 so as to prevent moisture from entering even if the light receiving region is exposed.

受光領域12は、一個の半導体受光素子10上に複数個あってもよく、図1の例では3つの受光領域が1つの半導体基板11上に形成されている。各受光領域は、多層ディスクの各レイヤーの情報を読み出す機能を有する。このように一個の半導体受光素子に複数個の受光領域を設ける理由は、多層ディスクに対応した光学設計を満たすためのものであり、大容量光ディスクに対応した光ディスク装置では必須となる。またボンディングパッド14は半導体受光素子チップ上の左右両端の上下の領域に4つずつの群で形成されている。   A plurality of light receiving regions 12 may be provided on one semiconductor light receiving element 10. In the example of FIG. 1, three light receiving regions are formed on one semiconductor substrate 11. Each light receiving area has a function of reading information of each layer of the multilayer disc. The reason why a plurality of light receiving regions are provided in one semiconductor light receiving element is to satisfy an optical design corresponding to a multilayer disk, and is essential for an optical disk apparatus compatible with a large capacity optical disk. The bonding pads 14 are formed in groups of four in the upper and lower regions on the left and right ends on the semiconductor light receiving element chip.

図2(a)の半導体受光素子10が備える絶縁壁30は、図3(a)に示すように受光領域12を取り囲む二層の絶縁体31、32から構成されている。これらの絶縁体31、32はそれぞれ異なるヤング率をもち、下層の絶縁体31は例えばヤング率=4.7GPaのポリイミド(日立化成デュポンマイクロシステムズ社製、PI2731)、上層の絶縁体32は例えばヤング率=2.0GPaのエポキシ系レジスト(化薬マイクロケム社製、SU−8 3000)とすることができる。尚、上層及び下層の絶縁体のヤング率は後述のハードベーク後のヤング率である。   The insulating wall 30 provided in the semiconductor light receiving element 10 in FIG. 2A is composed of two layers of insulators 31 and 32 surrounding the light receiving region 12 as shown in FIG. The insulators 31 and 32 have different Young's moduli, the lower insulator 31 is, for example, a polyimide with Young's modulus = 4.7 GPa (PI2731 manufactured by Hitachi Chemical DuPont Microsystems), and the upper insulator 32 is, for example, Young. An epoxy resist having a rate of 2.0 GPa (SU-83000, manufactured by Kayaku Microchem Corporation) can be used. The Young's modulus of the upper and lower insulators is the Young's modulus after hard baking described later.

上層及び下層の絶縁体31、32は半導体受光素子10の強度を代表するシリコン基板11のヤング率190GPaよりはるかに小さい材料が選択される。なお、上層の絶縁体32の材料は、ヤング率が0.1〜10GPa程度のものが常識的な範囲であることから、下層の絶縁体31の材料のヤング率はそれよりも大きな値である0.2〜20GPa程度の値を有することが好ましい。これらの絶縁体は通常のフォトリソグラフィ技術を用いて半導体基板11上にパターン形成される。   For the upper and lower insulators 31 and 32, a material much smaller than the Young's modulus of 190 GPa of the silicon substrate 11 representing the strength of the semiconductor light receiving element 10 is selected. In addition, since the material of the upper insulator 32 has a Young's modulus of about 0.1 to 10 GPa, the Young's modulus of the material of the lower insulator 31 is larger than that. It preferably has a value of about 0.2 to 20 GPa. These insulators are patterned on the semiconductor substrate 11 using a normal photolithography technique.

下層絶縁体31上に上層絶縁体32を形成する前に、下層絶縁体31のパターンを現像後、下層絶縁体31をハードベークしておく。このときの温度は、下層絶縁体31が十分硬化する温度とする。このように下層絶縁体31を硬化させておくと、上層絶縁体32のパターンを形成する際の現像液で下層絶縁体31が溶解しないことになり、2層の絶縁体を確実に形成することができる。上層及び下層の絶縁体のヤング率は、上記ハードベーク後のヤング率で規定している。尚、下層絶縁体31は膜厚10μmで形成し、上層絶縁体32は膜厚50μmで形成した。   Before the upper insulator 32 is formed on the lower insulator 31, the lower insulator 31 is hard-baked after the pattern of the lower insulator 31 is developed. The temperature at this time is a temperature at which the lower-layer insulator 31 is sufficiently cured. If the lower layer insulator 31 is cured in this manner, the lower layer insulator 31 is not dissolved by the developing solution used to form the pattern of the upper layer insulator 32, and two layers of insulators are reliably formed. Can do. The Young's modulus of the upper and lower insulators is defined by the Young's modulus after the hard baking. The lower insulator 31 was formed with a thickness of 10 μm, and the upper insulator 32 was formed with a thickness of 50 μm.

半導体基板11平面に沿った方向の絶縁壁30の断面積は、下層の絶縁体31の方が上層の絶縁体32よりも大きく、かつ上層の絶縁体32は下層の絶縁体31の外縁よりも内側に形成する。よって、図3(b)のような上底の方が下底よりも短い台形の絶縁体32でもよい。また図3(c)のように、上層絶縁体32は、半導体基板11に平行な断面の最小断面積35を下層絶縁体の半導体基板11に平行な面で切った断面積より小さく形成した逆台形であってもよい。上記図3(a)、(b)、(c)のように、上層の絶縁体の下面の外縁が下層の絶縁体の上面の外縁より内側に形成されることで、樹脂封止時の金型からの圧力を上層の絶縁体から下層の絶縁体に分散させることができる。   The cross-sectional area of the insulating wall 30 in the direction along the plane of the semiconductor substrate 11 is such that the lower-layer insulator 31 is larger than the upper-layer insulator 32, and the upper-layer insulator 32 is larger than the outer edge of the lower-layer insulator 31. Form inside. Therefore, the trapezoidal insulator 32 whose upper base is shorter than the lower base as shown in FIG. In addition, as shown in FIG. 3C, the upper layer insulator 32 is formed in such a manner that the minimum sectional area 35 of the cross section parallel to the semiconductor substrate 11 is smaller than the cross sectional area cut by the plane parallel to the semiconductor substrate 11 of the lower layer insulator. It may be trapezoidal. As shown in FIGS. 3A, 3B, and 3C, the outer edge of the lower surface of the upper insulator is formed on the inner side of the outer edge of the upper surface of the lower insulator, so that the gold at the time of resin sealing The pressure from the mold can be distributed from the upper insulator to the lower insulator.

(半導体受光素子の配置)
次に図2(b)に示すように、実装基板3上にダイスボンドにより半導体受光素子10を配置する。実装基板3の材質は特に限定されるものではなく、ガラスエポキシなどのエポキシ系やフェノール系、テフロン(登録商標)系、ポリエチレン系などの樹脂が好適に利用できる。
(Arrangement of semiconductor light receiving element)
Next, as shown in FIG. 2B, the semiconductor light receiving element 10 is disposed on the mounting substrate 3 by die bonding. The material of the mounting substrate 3 is not particularly limited, and epoxy resins such as glass epoxy, phenol resins, Teflon (registered trademark) resins, polyethylene resins, and the like can be suitably used.

実装基板3の側面から上面及び下面にかけては、半導体受光素子10側のボンディングパッド14とワイヤボンディングするための実装基板3側ボンディングパッド16及び引き出し電極18が形成される。ボンディングパッド16と引き出し電極18とは一体で形成されるので明確に分けるのは困難であるが、ボンディングパッド16は、実装基板3の上面部分であり、引き出し電極18は、実装基板3の側面から下面にかけての部分と考えてよい。上記引き出し電極18に代えて、スルーホール内の膜を引き出し電極として使用してもよい。これは、ボンディングパッド16の直下で実装基板3に表面から裏面に貫通するスルーホール(図示せず)を形成し、当該スルーホール内部にメッキにより膜を形成する。   A mounting substrate 3 side bonding pad 16 and a lead electrode 18 for wire bonding to the bonding pad 14 on the semiconductor light receiving element 10 side are formed from the side surface to the upper surface and the lower surface of the mounting substrate 3. Since the bonding pad 16 and the extraction electrode 18 are integrally formed, it is difficult to clearly separate them. However, the bonding pad 16 is an upper surface portion of the mounting substrate 3, and the extraction electrode 18 is formed from the side surface of the mounting substrate 3. You can think of it as the part over the lower surface. Instead of the extraction electrode 18, a film in the through hole may be used as the extraction electrode. In this process, a through hole (not shown) penetrating from the front surface to the back surface is formed in the mounting substrate 3 immediately below the bonding pad 16, and a film is formed by plating inside the through hole.

(ボンディングワイヤの接続)
次に、図2(c)に示すように、実装基板3側のボンディングパッド16と半導体受光素子10上のボンディングパッド14間をボンディングワイヤ20により接続する。ここで上層絶縁体32のパターン側のボンディングパッド14は、半導体受光素子10の基板11上面に形成されているため、ボンディングワイヤ20は半導体受光素子10側のボンディングパッド14から一旦上方に立ち上がり、それから実装基板3側のボンディングパッド16に接続される。
(Connection of bonding wire)
Next, as shown in FIG. 2C, the bonding pads 16 on the mounting substrate 3 side and the bonding pads 14 on the semiconductor light receiving element 10 are connected by bonding wires 20. Here, since the bonding pad 14 on the pattern side of the upper insulator 32 is formed on the upper surface of the substrate 11 of the semiconductor light receiving element 10, the bonding wire 20 once rises upward from the bonding pad 14 on the semiconductor light receiving element 10 side, and then It is connected to the bonding pad 16 on the mounting substrate 3 side.

(樹脂封止)
次いで図2(d)に示すように、上記のように実装基板3上に半導体受光素子10を配設した光半導体装置を金型21に装填する。金型21は、下金型21aと上金型21bとで構成されている。下金型21aは、実装基板3を隙間なく収容できる大きさ、及び実装基板3の厚みと同じ深さの凹部21cを備え、当該凹部21cに実装基板3を収容したとき、実装基板3の外周上面が凹部21cの上面と一致するようになっている。
(Resin sealing)
Next, as shown in FIG. 2D, the optical semiconductor device in which the semiconductor light receiving element 10 is arranged on the mounting substrate 3 as described above is loaded into the mold 21. The mold 21 includes a lower mold 21a and an upper mold 21b. The lower mold 21a includes a recess 21c having a size that can accommodate the mounting substrate 3 without a gap and the same depth as the thickness of the mounting substrate 3, and when the mounting substrate 3 is received in the recess 21c, the outer periphery of the mounting substrate 3 The upper surface coincides with the upper surface of the recess 21c.

上金型21bにも凹部21dが形成されており、当該凹部21dは、平面視(下からの平面視)で下金型21aの凹部21cよりやや小さな大きさで、実装基板外周上面から、前記絶縁壁30の上面までの厚み21fと一致する、あるいはやや小さな深さを備えている。前記上金型21bの下金型21aとの境界付近には、前記凹部21cに連通する樹脂注入口23が設けられており、ここから、溶融した封止樹脂を流し込むことができるようになっている。   A recess 21d is also formed in the upper mold 21b. The recess 21d is slightly smaller in size than the recess 21c of the lower mold 21a in a plan view (plan view from below), The depth is equal to or slightly smaller than the thickness 21 f up to the upper surface of the insulating wall 30. Near the boundary between the upper mold 21b and the lower mold 21a, there is provided a resin injection port 23 communicating with the recess 21c, from which the molten sealing resin can be poured. Yes.

上記構成において、下金型21aに半導体受光素子10を実装した実装基板3を収容した状態で上金型21bを蓋すると、当該上金型21bの外周部で、前記実装基板3の外周部を抑えるとともに、絶縁壁30の上面に上金型の凹部21dの底面が当接し、半導体受光素子10及び実装基板3は上下の金型から僅かな応力を受けることになる。しかしながら、上記したように絶縁壁30を構成することによって、当該絶縁壁30で応力は緩和され、半導体受光素子10及び実装基板3に、亀裂を生じさせるまでのストレスを与えることはない。すなわち、本実施の形態では、上層絶縁体32の下に下層の絶縁体31を形成して二層構造とし、しかも下層の絶縁体材料を上層の絶縁体材料と最下層の半導体受光素子との中間的なヤング率に設定した。これにより、直接的に半導体受光素子に応力がかからず、下層の絶縁体材料が応力を緩和するとともに、受光領域12とそれ以外の領域が液密に分離されることになる。   In the above configuration, when the upper mold 21b is covered in a state where the mounting substrate 3 on which the semiconductor light receiving element 10 is mounted is accommodated in the lower mold 21a, the outer peripheral portion of the mounting substrate 3 is changed by the outer peripheral portion of the upper mold 21b. At the same time, the bottom surface of the recess 21d of the upper mold comes into contact with the upper surface of the insulating wall 30, and the semiconductor light receiving element 10 and the mounting substrate 3 receive a slight stress from the upper and lower molds. However, by configuring the insulating wall 30 as described above, the stress is relieved by the insulating wall 30 and the semiconductor light receiving element 10 and the mounting substrate 3 are not subjected to stress until cracks are generated. That is, in the present embodiment, a lower layer insulator 31 is formed under the upper layer insulator 32 to form a two-layer structure, and the lower layer insulator material is composed of an upper layer insulator material and a lowermost layer semiconductor light receiving element. An intermediate Young's modulus was set. As a result, no stress is directly applied to the semiconductor light receiving element, the lower insulating material relaxes the stress, and the light receiving region 12 and the other region are separated in a liquid-tight manner.

この状態で、前記樹脂注入口23から溶融した樹脂を注入したとき、当該樹脂は前記受光領域12以外の半導体受光素子10上、及び実装基板3上に充填され、受光領域12の部分を外気に開放した状態で、ボンディングワイヤ20及びボンディングパッド14が外気から保護された状態で封止ができることになる。   In this state, when molten resin is injected from the resin injection port 23, the resin is filled on the semiconductor light receiving element 10 other than the light receiving region 12 and the mounting substrate 3, and the portion of the light receiving region 12 is exposed to the outside air. In the opened state, the bonding wire 20 and the bonding pad 14 can be sealed while being protected from the outside air.

封止樹脂としては、フェノール樹脂、メラミン樹脂、エポキシ樹脂、あるいはポリエステル樹脂などの熱硬化性樹脂で樹脂封止し、その後当該樹脂を固化する。
封止樹脂で封止される領域は、少なくとも接続体を含む領域が樹脂で封止されていればよいが、実装基板上の領域のうち、半導体受光素子の受光領域を除く実装基板上の全領域が封止されてもよく、一部が封止されてもよい。
The sealing resin is resin-sealed with a thermosetting resin such as a phenol resin, a melamine resin, an epoxy resin, or a polyester resin, and then the resin is solidified.
The region to be sealed with the sealing resin is sufficient if at least the region including the connection body is sealed with the resin, but the entire region on the mounting substrate excluding the light receiving region of the semiconductor light receiving element among the regions on the mounting substrate. The region may be sealed or a part may be sealed.

(その他)
本実施の形態では、受光領域12を取り囲む絶縁壁30のうち、下層の絶縁体31としてポリイミド、上層の絶縁体32としてエポキシレジストを用いた例について説明したが、これらに限定されるものではなく、例えば上層の絶縁体32としてアクリル系レジストを使用することも可能であり、上下層それぞれの材料のヤング率と表面積の大小関係が上記と同等で有る限り、任意の材料を選択することが可能である。さらに、上記絶縁壁30は二層構造に限定されるものではなく、絶縁体の上層から下層へヤング率又は断面積が順次増えるという関係を維持する限り任意の層数を積層することが可能である。
(Other)
In the present embodiment, the example in which polyimide is used as the lower-layer insulator 31 and epoxy resist is used as the upper-layer insulator 32 in the insulating wall 30 surrounding the light receiving region 12 is not limited thereto. For example, an acrylic resist can be used as the upper-layer insulator 32, and any material can be selected as long as the Young's modulus and surface area of the upper and lower layers are equivalent to the above. It is. Furthermore, the insulating wall 30 is not limited to a two-layer structure, and any number of layers can be stacked as long as the relationship of increasing Young's modulus or cross-sectional area sequentially from the upper layer to the lower layer of the insulator is maintained. is there.

また半導体受光素子10から絶縁壁30上面までの厚みは半導体受光素子10からボンディングワイヤ20の最も高い位置までの高さよりも大きいことが望ましい。これによりボンディングワイヤ20の最も高い位置まで封止樹脂24に封止されることになり、本願の目的をより効果的に達成することができる。積層された少なくとも二種類からなる絶縁体材料のパターン化加工は適切な数種の方法を用いて可能であるが、高精度なパターン形成が可能なフォトリソグラフィを用いることで、本願の目的をより効果的に達成することができる。   The thickness from the semiconductor light receiving element 10 to the upper surface of the insulating wall 30 is preferably larger than the height from the semiconductor light receiving element 10 to the highest position of the bonding wire 20. Thus, the highest position of the bonding wire 20 is sealed with the sealing resin 24, and the object of the present application can be achieved more effectively. Patterning of at least two types of laminated insulator materials is possible using several appropriate methods, but by using photolithography capable of forming a highly accurate pattern, the purpose of the present application can be further improved. Can be achieved effectively.

(第2の実施形態)
本発明の第2の実施形態に係る光半導体装置について図4を用いて説明する。図4(a)、(b)は本実施形態による半導体受光素子の断面構造を示し、図4(c)は図4(a)、(b)の半導体受光素子の平面図である。また、図4(d)は、本実施の形態で使用するフォトマスクである。第1の実施形態の(半導体受光素子の形成)工程では、上下2層の絶縁体を使用したが、本実施の形態では、単層の絶縁壁30に開口33を形成する。
(Second Embodiment)
An optical semiconductor device according to the second embodiment of the present invention will be described with reference to FIG. 4A and 4B show a cross-sectional structure of the semiconductor light receiving device according to the present embodiment, and FIG. 4C is a plan view of the semiconductor light receiving device of FIGS. 4A and 4B. FIG. 4D illustrates a photomask used in this embodiment mode. In the (embodiment of semiconductor light receiving element) step of the first embodiment, two layers of upper and lower insulators are used. In this embodiment, the opening 33 is formed in the single-layer insulating wall 30.

開口33の形成方法を説明する。まず、通常のフォトリソグラフィ技術を用いて半導体基板11上に絶縁壁30を形成する。次に、上記絶縁壁30に開口33を形成する。図4(a)、(c)に示すように、この開口33は、底部に半導体受光素子10の半導体基板11が露出し、平面形状が円形の空洞である。この開口33は、図4(d)に示すように、例えば20μmφの径の開口パターン41を100μm間隔で複数有するフォトマスク40を使用したフォトリソグラフィにより形成する。絶縁壁30の材料は、例えば、第1の実施形態で用いたヤング率=2.0GPaのエポキシ系レジスト(化薬マイクロケム社製、SU−8 3000)を使用する。   A method for forming the opening 33 will be described. First, the insulating wall 30 is formed on the semiconductor substrate 11 using a normal photolithography technique. Next, an opening 33 is formed in the insulating wall 30. As shown in FIGS. 4A and 4C, the opening 33 is a cavity in which the semiconductor substrate 11 of the semiconductor light receiving element 10 is exposed at the bottom and the planar shape is circular. As shown in FIG. 4D, the openings 33 are formed by photolithography using a photomask 40 having a plurality of opening patterns 41 having a diameter of 20 μmφ at intervals of 100 μm, for example. As the material of the insulating wall 30, for example, an epoxy resist having a Young's modulus = 2.0 GPa (SU-83000, manufactured by Kayaku Microchem Corporation) used in the first embodiment is used.

本構造の半導体受光素子11を実装した実装基板を第1の実施形態と同様、上下の金型21の間に挟み込み、樹脂封止すると、上記絶縁壁30は、複数の開口33が金型封止時に絶縁体30にかかる応力を弾性変形にて吸収し、局所的な圧力を分散、吸収する。これにより、半導体受光素子10の基板11のクラック発生を抑制することができる。なお、前記開口33のサイズが大きすぎると金型21からの圧力から半導体受光素子10を保護することが困難となり、また半導体受光素子10との密着性も低下する。そこで、開口33の径は50μmφ程度を上限とし、パターニング可能な10μmφ程度を下限とすることが望ましい。   When the mounting substrate on which the semiconductor light receiving element 11 having this structure is mounted is sandwiched between the upper and lower molds 21 and sealed with resin as in the first embodiment, the plurality of openings 33 are sealed with the mold. The stress applied to the insulator 30 at the time of stopping is absorbed by elastic deformation, and the local pressure is dispersed and absorbed. Thereby, generation | occurrence | production of the crack of the board | substrate 11 of the semiconductor light receiving element 10 can be suppressed. If the size of the opening 33 is too large, it is difficult to protect the semiconductor light receiving element 10 from the pressure from the mold 21, and the adhesion to the semiconductor light receiving element 10 is also reduced. Therefore, it is desirable that the upper limit of the diameter of the opening 33 is about 50 μmφ and the lower limit is about 10 μmφ that can be patterned.

また開口33の平面形状に関しても、応力緩衝機能と半導体受光素子基板11への接着強度を確保できるものであれば円状に限定されるものではないが、均一な圧力分布が得られるよう、均等な寸法の同一形状で絶縁体平面上で均等な密度に配置することが望ましい。さらに図4(b)のように、絶縁壁30を2層または多層として第1の実施形態との組み合わせも有効である。上下層の絶縁体材料のうち上層絶縁体32のみあるいは上下の両層の絶縁体31,32に開口33を形成することにより、金型封止時にかかる応力を弾性変形でも吸収することができる。   Further, the planar shape of the opening 33 is not limited to a circular shape as long as the stress buffering function and the adhesive strength to the semiconductor light receiving element substrate 11 can be ensured, but it is uniform so that a uniform pressure distribution can be obtained. It is desirable to arrange them with the same shape of different dimensions and with an equal density on the insulator plane. Further, as shown in FIG. 4B, the combination with the first embodiment in which the insulating wall 30 has two layers or multiple layers is also effective. By forming the openings 33 in only the upper insulator 32 or the upper and lower insulators 31 and 32 of the upper and lower insulator materials, the stress applied during mold sealing can be absorbed even by elastic deformation.

(第3の実施形態)
本発明の第3の実施形態に係る光半導体装置について、図5を用いて説明する。図5は本実施形態の半導体受光素子の断面構造を示している。絶縁壁を3層とし、中間層の絶縁体内部に中空部34を多数設けた半導体受光素子10を形成することが第2の実施形態と異なる。
(Third embodiment)
An optical semiconductor device according to the third embodiment of the present invention will be described with reference to FIG. FIG. 5 shows a cross-sectional structure of the semiconductor light receiving element of this embodiment. A difference from the second embodiment is that the semiconductor light receiving element 10 having three insulating walls and a plurality of hollow portions 34 provided inside the insulator of the intermediate layer is formed.

上層30c、中層30b、下層30aの各絶縁壁30の材料はいずれも第1の実施形態で用いたヤング率=2.0GPaのエポキシ系レジスト(化薬マイクロケム社製、SU−8 3000)とし、使用可能なヤング率の範囲も第1の実施形態と同じである。   The material of each of the insulating walls 30 of the upper layer 30c, the middle layer 30b, and the lower layer 30a is the epoxy-based resist having a Young's modulus of 2.0 GPa (SU-8 3000, manufactured by Kayaku Microchem Corporation) used in the first embodiment. The range of usable Young's modulus is the same as that in the first embodiment.

上層30c、中層30b、下層30aを有する絶縁壁30の形成方法を説明する。まず第1の実施形態と同様にして半導体基板11に形成した下層絶縁体30a上に中間層の絶縁体30bを形成する。次に、第2の実施形態で使用した図4(d)の開口パターン41を有するフォトマスク40を使用して開口を形成する。この開口が中空部34になる。   A method for forming the insulating wall 30 having the upper layer 30c, the middle layer 30b, and the lower layer 30a will be described. First, an intermediate insulator 30b is formed on a lower insulator 30a formed on the semiconductor substrate 11 in the same manner as in the first embodiment. Next, an opening is formed using the photomask 40 having the opening pattern 41 of FIG. 4D used in the second embodiment. This opening becomes a hollow portion 34.

次に、上層絶縁体30cを形成する。ここで使用したレジストはドライフィルムタイプのレジスト(図示しない。)である。ドライフィルムタイプのレジストとは、構成材料自体は液体状態のレジストと同一成分で、主として溶剤のみを除去した(固化した)状態の材料をフィルム状にしたものである。このドライフィルムタイプのレジストを中層絶縁体30b上に貼り付ける。貼り付け方法は、真空ラミネータを使用した。ドライフィルムタイプのレジスト各一層分の厚みは20μmである。   Next, the upper layer insulator 30c is formed. The resist used here is a dry film type resist (not shown). In the dry film type resist, the constituent material itself is the same component as the resist in the liquid state, and the material in a state where only the solvent is removed (solidified) is formed into a film. This dry film type resist is affixed on the middle layer insulator 30b. As a pasting method, a vacuum laminator was used. The thickness of each dry film type resist is 20 μm.

このようにすることで、中層の絶縁体30bに形成した中空部34が埋まらないように、テンタティブに最上層レジストを貼り付けることが可能である。本構造の絶縁体は外観的には空洞のない絶縁体と同様の出来映えを示すことから見映えがよい。   By doing in this way, it is possible to affix the uppermost layer resist in a tentative manner so that the hollow portion 34 formed in the middle-layer insulator 30b is not filled. The insulator of this structure is good in appearance because it shows the same result as an insulator without a cavity.

下層30a、中層30bのレジスト膜もドライタイプのレジスト膜で形成できる。図5に示す3層構造の絶縁壁30はレジストフィルム貼り付け、露光現像といったフォトリソグラフィによる一連の処理を各絶縁体の層に繰り返し行うことで形成することが可能である。   The resist film of the lower layer 30a and the middle layer 30b can also be formed of a dry type resist film. The insulating wall 30 having a three-layer structure shown in FIG. 5 can be formed by repeatedly performing a series of photolithography processes such as attaching a resist film and exposing and developing each insulator layer.

本構造の半導体受光素子11を実装した実装基板を第1の実施形態と同様、上下の金型21の間に挟み込み、樹脂封止すると、金型封止時に絶縁壁30にかかる応力を中空部34が変形、吸収することで、当該応力を分散、吸収させることができ、半導体受光素子のクラック発生を抑制することができる。   As in the first embodiment, when the mounting substrate on which the semiconductor light receiving element 11 having this structure is mounted is sandwiched between the upper and lower molds 21 and sealed with resin, the stress applied to the insulating wall 30 during the mold sealing is reduced to the hollow portion. By deforming and absorbing 34, the stress can be dispersed and absorbed, and the occurrence of cracks in the semiconductor light receiving element can be suppressed.

中空部34の平面視形状は正方形、円形であることが好ましい。中空構造に関しては三層の構造に限定されるものではなく、三層以上の多層の中空構造にすることも可能である。さらに開口の配置位置を各層でずらせて積層することも可能である。   The plan view shape of the hollow portion 34 is preferably square or circular. The hollow structure is not limited to a three-layer structure, and a multi-layer hollow structure having three or more layers may be used. Further, it is possible to stack the openings by shifting the position of each layer.

また第1及び第2の実施形態のようなヤング率の異なる絶縁体を用いることもできる。例えば、最下層30aにヤング率の大きな感光性ポリイミド(日立化成デュポンマイクロシステムズ社製、PI2731)を用い、その上に本実施形態の中空構造を形成したヤング率の小さなエポキシ系永久レジスト(化薬マイクロケム社製、SU−8 3000)を用いることで、絶縁体にかかる局所的な圧力を分散、吸収させることができる。   Insulators having different Young's moduli as in the first and second embodiments can also be used. For example, a photosensitive polyimide having a high Young's modulus (PI2731 manufactured by Hitachi Chemical DuPont Microsystems Co., Ltd.) is used for the lowermost layer 30a, and an epoxy-based permanent resist having a low Young's modulus and having a hollow structure according to this embodiment formed thereon (Chemicals) By using Microchem Co., Ltd. SU-83000), the local pressure applied to the insulator can be dispersed and absorbed.

(効果)
本発明は、樹脂封止時に、絶縁壁上面と上金型の下面が液密に当接し封止樹脂の受光領域への侵入を遮るので、受光領域が封止樹脂で覆われることはない。よって、半導体装置のパッケージの透明樹脂の変色の問題を回避できる。さらに半導体受光素子に到達できるレーザ光の光量が低下することにより素子特性が変動するといった不具合を抑制できる。本発明の半導体受光素子は、受光領域が外気に開放している構成であるが、受光領域表面に水を透過しない膜を形成することにより水分の侵入を防ぐことができる。
(effect)
In the present invention, the upper surface of the insulating wall and the lower surface of the upper mold are in liquid-tight contact with each other during resin sealing, thereby preventing the sealing resin from entering the light receiving region, so that the light receiving region is not covered with the sealing resin. Therefore, the problem of discoloration of the transparent resin of the package of the semiconductor device can be avoided. Further, it is possible to suppress a problem that the element characteristics fluctuate due to a decrease in the amount of laser light that can reach the semiconductor light receiving element. The semiconductor light receiving element of the present invention has a structure in which the light receiving region is open to the outside air, but it is possible to prevent moisture from entering by forming a film that does not transmit water on the surface of the light receiving region.

本発明の光半導体装置は、光ピックアップ装置に用いられる半導体受光素子、イメージセンサ等の光デバイスに対しても有用でありその産業上の利用可能性は大きい。   The optical semiconductor device of the present invention is useful for optical devices such as a semiconductor light receiving element and an image sensor used in an optical pickup device, and its industrial applicability is great.

本発明の第1の実施形態に係る光半導体装置を示す(a)平面図、及び(b)断面図である。It is (a) top view and (b) sectional view showing an optical semiconductor device concerning a 1st embodiment of the present invention. 本発明の第1の実施形態に係るに光半導体装置おけるプロセス図である。FIG. 6 is a process diagram in the optical semiconductor device according to the first embodiment of the present invention. 本発明の第1の実施形態に係る受光領域を示す断面図である。It is sectional drawing which shows the light reception area | region which concerns on the 1st Embodiment of this invention. 本発明の第2の実施形態に係る受光領域を示す断面図である。It is sectional drawing which shows the light-receiving area | region which concerns on the 2nd Embodiment of this invention. 本発明の第3の実施形態に係る受光領域を示す断面図である。It is sectional drawing which shows the light reception area | region which concerns on the 3rd Embodiment of this invention. 従来の光半導体装置を説明する断面図である。It is sectional drawing explaining the conventional optical semiconductor device.

符号の説明Explanation of symbols

1 光半導体装置
3 実装基板
10 半導体受光素子
12 受光領域
14 半導体受光素子側ボンディングパッド
16 基板側ボンディングパッド
18 引き出し電極
20 ボンディングワイヤ
21a 金型下部
21b 金型上部
23 樹脂注入口
24 封止樹脂
30 絶縁壁
31 絶縁体下層
32 絶縁体上層
33 開口
34 中空部
DESCRIPTION OF SYMBOLS 1 Optical semiconductor device 3 Mounting board 10 Semiconductor light receiving element 12 Light receiving area 14 Semiconductor light receiving element side bonding pad 16 Substrate side bonding pad 18 Lead electrode 20 Bonding wire 21a Mold lower part 21b Mold upper part 23 Resin injection port 24 Sealing resin 30 Insulation Wall 31 Insulator lower layer 32 Insulator upper layer 33 Opening 34 Hollow part

Claims (20)

実装基板上に配置された、受光領域を有する半導体受光素子と、
前記実装基板上の電極体と、
前記半導体受光素子と前記電極体を電気的に接続する接続体を備えた光半導体装置において、
前記半導体受光素子の受光領域の周囲に形成された絶縁壁と、
前記絶縁壁の外周面に接し、前記実装基板外縁にわたる範囲内で、前記半導体受光素子及び当該実装基板を被覆する封止樹脂を有することを特徴とする光半導体装置。
A semiconductor light-receiving element having a light-receiving region disposed on the mounting substrate;
An electrode body on the mounting substrate;
In an optical semiconductor device including a connection body that electrically connects the semiconductor light receiving element and the electrode body,
An insulating wall formed around the light receiving region of the semiconductor light receiving element;
An optical semiconductor device comprising: a sealing resin that covers the outer surface of the insulating wall and covers the outer surface of the mounting substrate and covers the mounting substrate.
前記絶縁壁が、ヤング率の異なる少なくとも二種類の絶縁体が積層されることにより形成される請求項1に記載の光半導体装置。   The optical semiconductor device according to claim 1, wherein the insulating wall is formed by stacking at least two types of insulators having different Young's moduli. 前記少なくとも二種類の絶縁体のうち、ヤング率の最も大きい絶縁体が、前記半導体受光素子に直接積層される下層の絶縁体である、請求項2に記載の光半導体装置。   3. The optical semiconductor device according to claim 2, wherein the insulator having the largest Young's modulus among the at least two kinds of insulators is a lower-layer insulator directly stacked on the semiconductor light receiving element. 前記半導体受光素子の上面に平行な面の最小断面積を前記下層の絶縁体より小さく形成された絶縁体が、当該下層の絶縁体上に積層された、請求項2または3記載の光半導体装置。   4. The optical semiconductor device according to claim 2, wherein an insulator having a minimum cross-sectional area parallel to the upper surface of the semiconductor light receiving element is made smaller than that of the lower insulator, and is laminated on the lower insulator. . 前記少なくとも二種類の絶縁体のうち、上層の絶縁体の下面の外縁が下層の絶縁体の上面の外縁より内側に形成される請求項4に記載の光半導体装置。   5. The optical semiconductor device according to claim 4, wherein, of the at least two types of insulators, the outer edge of the lower surface of the upper insulator is formed inside the outer edge of the upper surface of the lower insulator. 前記絶縁壁内部に中空部が形成された、請求項1から5いずれか一項記載の光半導体装置。   The optical semiconductor device according to claim 1, wherein a hollow portion is formed inside the insulating wall. 前記絶縁壁上面に開口が形成された、請求項1から5いずれか一項記載の光半導体装置。   The optical semiconductor device according to claim 1, wherein an opening is formed on an upper surface of the insulating wall. 前記絶縁壁が3層以上の絶縁体から構成され、当該絶縁体のうち中間層の絶縁体上面に開口が形成された、請求項6に記載の光半導体装置。   The optical semiconductor device according to claim 6, wherein the insulating wall is made of three or more layers of insulators, and an opening is formed on an upper surface of the intermediate layer of the insulators. 前記接続体が、ボンディングワイヤであり、
前記半導体受光素子から絶縁壁上面までの厚みが、当該半導体受光素子から前記ボンディングワイヤ最上部までの高さよりも大きい状態で、当該ボンディングワイヤが封止された、請求項1から8いずれか一項記載の光半導体装置。
The connection body is a bonding wire;
9. The bonding wire is sealed in a state where the thickness from the semiconductor light receiving element to the upper surface of the insulating wall is larger than the height from the semiconductor light receiving element to the top of the bonding wire. The optical semiconductor device described.
前記半導体受光素子が複数の受光領域を有し、当該受光領域それぞれの周囲に前記絶縁壁が形成された、請求項1から9いずれか一項記載の光半導体装置。   The optical semiconductor device according to claim 1, wherein the semiconductor light receiving element has a plurality of light receiving regions, and the insulating wall is formed around each of the light receiving regions. 受光領域を有する半導体受光素子と、電極体と、前記半導体受光素子と前記電極体を電気的に接続する接続体とを備えた実装基板が金型内に配置され、前記半導体受光素子の受光領域を除く実装基板上の領域のうち少なくとも前記接続体を含む領域が樹脂で封止される、光半導体装置の製造方法において、
前記樹脂を遮る絶縁壁が前記半導体受光素子の受光領域の周囲に形成される工程と、
前記絶縁壁を前記金型の内壁に当接させた状態で前記金型に樹脂が注入される工程を備えることを特徴とする光半導体装置の製造方法。
A mounting substrate including a semiconductor light-receiving element having a light-receiving region, an electrode body, and a connection body that electrically connects the semiconductor light-receiving element and the electrode body is disposed in a mold, and the light-receiving region of the semiconductor light-receiving element In the method of manufacturing an optical semiconductor device, a region including at least the connection body in a region on the mounting substrate excluding is sealed with a resin.
Forming an insulating wall that blocks the resin around a light receiving region of the semiconductor light receiving element;
A method of manufacturing an optical semiconductor device, comprising a step of injecting resin into the mold in a state where the insulating wall is in contact with an inner wall of the mold.
前記絶縁壁が、前記半導体受光素子よりヤング率の小さい材料で形成される請求項11に記載の光半導体装置の製造方法。   The method of manufacturing an optical semiconductor device according to claim 11, wherein the insulating wall is formed of a material having a Young's modulus smaller than that of the semiconductor light receiving element. 前記絶縁壁の形成工程が、
前記半導体受光素子の受光領域の周囲に、当該半導体受光素子よりヤング率の小さい下層絶縁体が形成される工程と、
前記下層絶縁体よりヤング率が小さく、かつ前記半導体受光素子の上面に平行な面の最小断面積が小さい絶縁体が当該下層絶縁体に積層される工程を含む請求項11に記載の光半導体受光素子装置の製造方法。
The step of forming the insulating wall comprises
Forming a lower layer insulator having a smaller Young's modulus than the semiconductor light receiving element around the light receiving region of the semiconductor light receiving element;
12. The optical semiconductor light receiving device according to claim 11, further comprising a step of laminating an insulator having a Young's modulus smaller than that of the lower layer insulator and having a smaller minimum cross-sectional area parallel to the upper surface of the semiconductor light receiving element on the lower layer insulator. Manufacturing method of element device.
前記二種類の絶縁体のうち、上層の絶縁体の下面の外縁が、下層の絶縁体の上面の外縁より内側に形成される請求項13に記載の光半導体装置の製造方法。   14. The method of manufacturing an optical semiconductor device according to claim 13, wherein, of the two types of insulators, an outer edge of the lower surface of the upper insulator is formed inside an outer edge of the upper surface of the lower insulator. 前記絶縁壁内部に中空部が形成される請求項11から13いずれか一項記載の光半導体装置の製造方法。   The method for manufacturing an optical semiconductor device according to claim 11, wherein a hollow portion is formed inside the insulating wall. 前記絶縁壁上面に開口が形成される請求項11から13いずれか一項記載の光半導体装置の製造方法。   The method of manufacturing an optical semiconductor device according to claim 11, wherein an opening is formed on the upper surface of the insulating wall. 前記絶縁壁が、3層以上の絶縁体から形成され、当該絶縁体のうち中間層の絶縁体に開口を形成し、当該中間層の絶縁体上に上層の絶縁体が積層される請求項15に記載の光半導体装置の製造方法   16. The insulating wall is formed of three or more insulators, an opening is formed in an intermediate insulator among the insulators, and an upper insulator is laminated on the intermediate insulator. For manufacturing an optical semiconductor device according to claim 1 前記絶縁壁が、フォトリソグラフィにより形成される請求項11から17いずれか一項記載の光半導体装置の製造方法。   The method for manufacturing an optical semiconductor device according to claim 11, wherein the insulating wall is formed by photolithography. 前記半導体受光素子が複数の受光領域を有し、当該受光領域それぞれの周囲に前記絶縁壁が形成された、請求項11から18いずれか一項記載の光半導体装置の製造方法。   The method of manufacturing an optical semiconductor device according to claim 11, wherein the semiconductor light receiving element has a plurality of light receiving regions, and the insulating walls are formed around each of the light receiving regions. 前記接続体が、ボンディングワイヤであり、
前記半導体受光素子から絶縁壁上面までの厚みが、当該半導体受光素子から前記ボンディングワイヤ最上部までの高さよりも大きい状態で、当該ボンディングワイヤが封止される請求項11から19いずれか一項記載の光半導体装置の製造方法。
The connection body is a bonding wire;
20. The bonding wire is sealed in a state where the thickness from the semiconductor light receiving element to the upper surface of the insulating wall is larger than the height from the semiconductor light receiving element to the uppermost part of the bonding wire. Manufacturing method of the optical semiconductor device.
JP2008204351A 2008-08-07 2008-08-07 Optical semiconductor device and method of manufacturing same Pending JP2010040920A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011105155A1 (en) 2010-02-25 2011-09-01 三菱重工業株式会社 Turbine

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011105155A1 (en) 2010-02-25 2011-09-01 三菱重工業株式会社 Turbine

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