JP2010040850A - Semiconductor device and producing method of the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device having superior mechanical strength, and to provide a method of producing the same device. <P>SOLUTION: The semiconductor device 1 includes a light-receiving part 3 on a first main surface 2a and is provided with a semiconductor substrate 2, having an external terminal 7 on a second main surface 2b, in the opposite side of the first principal surface; a light-transmitting protecting substrate 9, provided opposed to the first main surface of the semiconductor substrate for protecting the light-receiving part 3; and a bonding layer 10, surrounding the light receiving part 3 for bonding the semiconductor substrate 2 and the light-transmitting protecting substrate 9. The internal edge of the bonding layer 10 is formed into a zigzag shape. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof.

  Semiconductor devices such as CCD and CMOS image sensors using semiconductor integrated circuit technology are widely used in digital cameras and mobile phones with camera functions. In such a semiconductor device, it has been proposed that the sensor chip (semiconductor element) be a CSP (Chip size package) in order to cope with the small size and light weight of the mounted components.

  When the sensor chip is converted to CSP, the semiconductor substrate is provided with a through hole that connects the front surface and the back surface, and an integrated circuit including a light receiving portion provided on the surface of the semiconductor substrate by a through wiring layer formed in the through hole; An external connection terminal provided on the rear surface is electrically connected. The separated semiconductor device is mounted on a module substrate with a case with an optical lens attached, and becomes a camera module.

  At that time, in order to protect the light receiving portion provided on the surface of the semiconductor substrate from dust and dirt, a light-transmitting protective member is disposed so as to cover the region including the light receiving portion (see Patent Document 1). A light-transmissive protective member such as a glass substrate is arranged in parallel with a predetermined gap on a semiconductor substrate on which an integrated circuit including a light receiving portion is formed. The glass substrate is bonded to the semiconductor substrate by an adhesive resin disposed so as to surround the outer edge of the light receiving portion of the semiconductor substrate. The adhesive resin finally becomes a sealing member, and a gap sandwiched between the semiconductor substrate and the glass substrate is formed on the light receiving portion.

However, it cannot be said that the conventional structure has been sufficiently considered in terms of mechanical strength.
International Publication No. 2005/022631 Pamphlet

  An object of this invention is to provide the semiconductor device excellent in mechanical strength, and its manufacturing method.

  A semiconductor device according to a first aspect of the present invention is provided so as to surround a semiconductor substrate having an element region, a protective substrate facing the semiconductor substrate and protecting the element region, and surrounding the element region. An adhesive layer for adhering the substrate and the protective substrate, and an inner edge of the adhesive layer has a zigzag shape.

  A method of manufacturing a semiconductor device according to a second aspect of the present invention includes a step of preparing a semiconductor substrate having an element region, a step of preparing a protective substrate for protecting the element region, the semiconductor substrate and the protective substrate. And a step of adhering with an adhesive layer surrounding the element region, and the inner edge of the adhesive layer is zigzag-shaped.

  ADVANTAGE OF THE INVENTION According to this invention, the semiconductor device excellent in mechanical strength and its manufacturing method can be provided.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  The configuration of the embodiment of the present invention will be described with reference to FIGS. 1 and 2.

  FIG. 1 is a cross-sectional view schematically showing the basic structure of the semiconductor device according to this embodiment.

  As shown in FIG. 1, the semiconductor device 1 includes a semiconductor substrate 2. For example, a silicon (Si) substrate or the like is used as the semiconductor substrate 2. The semiconductor substrate 2 has a first main surface (front surface) 2a and a second main surface (back surface) 2b opposite to the front surface 2a. The front surface 2a is a formation surface of an active element region including semiconductor elements such as photodiodes and transistors and wirings connecting them, and the back surface 2b is a formation surface of external connection terminals.

  A light receiving portion 3 (active element region) is provided on the surface 2a. The light receiving unit 3 includes a light receiving element such as a photodiode and a transistor, and receives energy rays such as light and electrons irradiated on the surface 2a and collects them in a photodiode or the like. The surface 2a is provided with a plurality of electrodes 4 that are electrically connected to elements, wirings, and the like in the light receiving section 3 and that perform input / output of electric signals, power supply, and the like. The semiconductor substrate 2 having the light receiving unit 3 and the electrodes 4 constitutes an image sensor such as a CMOS image sensor.

  The semiconductor substrate 2 has a through hole 5 that connects the front surface 2a and the back surface 2b. The opening on the surface 2 a side of the through hole 5 is closed by the electrode 4. The through hole 5 is filled with a conductive material to be the through wiring layer 6 through an insulating layer (not shown). The through wiring layer 6 is electrically connected to the electrode 4. The through wiring layer 6 is provided from the through hole 5 to the back surface 2b.

  On the back surface 2b, streaks are formed by a polishing process described later. On the back surface 2b, the through wiring layer 6 is formed via an insulating layer (not shown). The through wiring layer 6 connects the front surface 2 a and the back surface 2 b of the semiconductor substrate 2. Furthermore, an external connection terminal 7 electrically connected to the through wiring layer 6 is provided on the back surface 2b. The back surface 2 b is covered with a protective layer 8 except for the external connection terminals 7. As a result, the through wiring layer 6 existing on the back surface 2 b is covered with the protective layer 8.

  On the semiconductor substrate 2, a light-transmitting protective substrate (protective member) 9 is disposed so as to cover the main surface 2 a so as to protect the light receiving unit 3. The light-transmissive protective substrate 9 is bonded to the surface 2a of the semiconductor substrate 2 through an adhesive layer 10 disposed on the peripheral edge of the surface 2a. A cavity (space) 11 is formed between the light-transmissive protective substrate 9 and the surface 2 a of the semiconductor substrate 2 based on the thickness of the adhesive layer 10. That is, the light-transmitting protective substrate 9 is disposed above the light-receiving unit 3 provided on the surface 2 a via the cavity 11.

  The light-transmitting protective substrate 9 has a first main surface (front surface) 9a and a second main surface (back surface) 9b opposite to the first main surface (front surface) 9a. A protective film 12 is formed on the surface 9a. Further, the protective film 12 has an opening 12 a provided on the light receiving unit 3. That is, the protective film 12 has an opening 12a so as not to interfere with the incidence of energy rays such as light and electrons to the light receiving portion 3, and the peripheral portion of the surface 9a of the light-transmissive protective substrate 9 excluding the opening 12a. Only provided. The size of the opening 12 a may be larger than that of the light receiving unit 3.

  Next, the structure of the adhesive layer 10 will be described with reference to FIG. FIG. 2 is a plan view schematically showing the basic structure of the semiconductor device according to this embodiment. FIG. 2A is an adhesive layer 10 having a polygonal line structure, and FIG. 2B is a wavy line. An adhesive layer 10 having a shape structure is shown.

  As shown in FIG. 2, an edge (hereinafter referred to as an inner edge) where the cavity 11 of the adhesive layer 10 is formed has a shape obtained by deforming each side of a square indicated by a broken line into a zigzag shape. The adhesive layer 10 is provided in an outer peripheral region surrounding the light receiving unit 3. Specifically, the adhesive layer 10 is provided so that the minimum distance (min) between the light receiving unit 3 and the adhesive layer 10 is about 50 to 100 μm and the maximum distance (max) is about 200 to 550 μm. The detailed shape of the inner edge will be described later.

  Note that streaks are formed on the back surface 2b of the semiconductor substrate 2 by a polishing process described later. The inventors of the present application have found that when the direction of the striations coincides with the direction of the inner edge of the adhesive layer 10, the semiconductor substrate 2 is easily broken along the direction.

  According to the embodiment, the inner edge of the adhesive layer 10 has a zigzag shape. For this reason, the length in which the direction of the striations formed on the back surface 2b of the semiconductor substrate 2 and the direction of the inner edge of the adhesive layer 10 are continuously matched is reduced. For this reason, it is possible to suppress the crack of the semiconductor substrate 2 along the cavity 11. As a result, the quality of the semiconductor device 1 can be improved.

  3 to 9 are cross-sectional views schematically showing a basic manufacturing method of the semiconductor device according to the present embodiment.

  First, as shown in FIG. 3, a semiconductor substrate 2 having a light receiving portion 3 and an electrode 4 provided on the surface 2a is prepared. The semiconductor substrate 2 is supplied as a semiconductor wafer. Further, an adhesive layer 10 having a thickness of, for example, about 50 μm is formed in the outer peripheral region surrounding the light receiving portion 3 on the surface 2 a of the semiconductor substrate 2. The inner edge of the adhesive layer 10 has a shape as shown in FIG. Specifically, the inner edge of the adhesive layer 10 has a shape obtained by deforming each side of a square indicated by a broken line into a zigzag shape. The adhesive layer 10 is made of an adhesive made of an epoxy resin, a polyimide resin, an acrylic resin, or the like.

  Next, as shown in FIG. 4, a light-transmitting protective substrate 9 having the same size as the semiconductor substrate (semiconductor wafer) 2 is prepared. As the light-transmissive protective substrate 9, a glass substrate made of, for example, borosilicate glass, quartz glass, soda lime glass, or the like is used. When the transmitted light is infrared light, the light-transmitting protective substrate 9 may be made of silicon, gallium arsenide (GaAs), or the like. A protective film 12 is formed in advance on the surface 9 a of the light transmissive protective substrate 9. The protective film 12 is provided with an opening 12 a in a region corresponding to the light receiving portion 3 of the semiconductor substrate 2.

  The protective film 12 is formed, for example, by sputtering, CVD, vapor deposition, plating, spin coating, spray coating, printing, or the like. As a constituent material of the protective film 12, for example, a high resistance metal material (Ti, TiN, TiW, Ni, Cr, TaN, CoWP, etc.), a low resistance metal material (Al, Al-Cu, Al-Si-Cu, Cu, Au, Ag, etc.), polycrystalline silicon, a polymer compound having conductivity, a conductive resin material such as an epoxy resin or a polyimide resin containing conductive particles is used. The protective film 12 may be formed of an insulating material such as a resin material, but is preferably formed of a conductive material in consideration of electrostatic chucking properties in the wafer process.

  Furthermore, the protective film 12 preferably has a light shielding property. For this reason, when the protective film 12 is formed of a resin material, it is desirable that the resin film be blackened by adding carbon black or the like in order to provide the protective film 12 with light shielding properties. The high-resistance metal material and low-resistance metal material described above are preferable as the constituent material of the protective film 12 because they have both conductivity and light shielding properties. The protective film 12 may be composed of a single layer film of various metal materials, or may be composed of a multilayer film in which a plurality of metal material layers are laminated.

  On the surface 9 a of the light transmissive protective substrate 9, the protective film 12 is provided in an outer peripheral region excluding a region (light transmissive region) corresponding to the light receiving portion 3 of the semiconductor substrate 2. The surface 9 a of the light transmissive region of the light transmissive protective substrate 9 is concave with respect to the protective film 12. That is, the protective film 12 is formed in a convex shape with respect to the surface 9 a of the light transmissive protective substrate 9, and the surface 9 a of the light transmissive region of the light transmissive protective substrate 9 is concave based on the thickness of the protective film 12. It has become. Therefore, direct contact with the surface 9a of the light-transmissive protective substrate 9 can be suppressed in the wafer process.

  The light-transmissive protective substrate 9 as described above is disposed on the semiconductor substrate 2 so that the back surface 9b faces the front surface 2a.

  Next, as shown in FIG. 5, the light-transmissive protective substrate 9 and the semiconductor substrate 2 are bonded to each other through, for example, pressurization and heating via the adhesive layer 10. A cavity 11 is formed between the light-transmissive protective substrate 9 and the semiconductor substrate 2 based on the formation position and thickness of the adhesive layer 10. The light receiving portion 3 of the semiconductor substrate 2 is disposed so as to be exposed to the cavity 11.

  Next, as shown in FIG. 6, after the semiconductor substrate 2 and the light-transmissive protective substrate 9 are bonded, the back surface 2b of the semiconductor substrate 2 is processed by mechanical grinding, chemical mechanical polishing (CMP), or the like. Then, the semiconductor substrate 2 is thinned from the back surface 2b side. The thickness of the semiconductor substrate 2 is preferably about 50 to 150 μm. This processing step is preferably performed after the light-transmitting protective substrate 9 is bonded because the light-transmitting protective substrate 9 serves as a support substrate that mechanically reinforces the semiconductor substrate 2. In this processing step, polishing marks (stries) as described later are formed on the back surface 2b.

  Next, as shown in FIG. 7, a through hole 5 is formed from the second main surface 2 b side of the semiconductor substrate 2 toward the first main surface 2 a, and the electrode 4 is exposed in the through hole 5. The through hole 5 is formed by etching the semiconductor substrate 2 by a plasma etching method or the like using a mask (not shown) having a predetermined pattern arranged on the second main surface 2b side of the semiconductor substrate 2. The through hole 5 may be formed by a laser etching method. In this case, no mask is required. The through hole 5 has, for example, a convex cross-sectional shape in the vicinity of the electrode 4 toward the first main surface 2a.

  Subsequently, as illustrated in FIG. 8, the through wiring layer 6 is formed from the inside of the through hole 5 to the second main surface 2 b of the semiconductor substrate 2. In order to insulate between the through wiring layer 6 and the semiconductor substrate 2, an insulating layer (not shown) is formed in advance in the through hole 5 and on the second main surface 2b. Since an opening is provided in advance in the insulating layer of the through hole 5, the through wiring layer 6 is connected to the electrode 4.

  The through wiring layer 6 is formed by a sputtering method, a CVD method, a vapor deposition method, a plating method, a printing method, or the like using a mask (not shown) having a predetermined pattern. The through wiring layer 6 includes, for example, a high resistance metal material (Ti, TiN, TiW, Ni, Cr, TaN, CoWP, etc.) and a low resistance metal material (Al, Al—Cu, Al—Si—Cu, Cu, Au, Ag, solder material, etc.) are used. These form a wiring layer (conductive layer) with a single layer structure or a multilayer structure in which a plurality of material layers are laminated.

  Thereafter, as shown in FIG. 9, external connection terminals 7 are formed in the through wiring layer 6, and a protective layer 8 is formed so as to cover the back surface 2 b of the semiconductor substrate 2 except for the external connection terminals 7. The external connection terminal 7 is formed of, for example, a solder material, and the protective layer 8 is formed of polyimide resin, epoxy resin, solder resist material, or the like. After these series of steps (wafer steps) are completed, the semiconductor device 2 shown in FIG. 1 is manufactured by cutting the semiconductor substrate 2 together with the light-transmitting protective member 9 with a blade and separating it.

  FIG. 10 is a plan view schematically showing the relationship between the striations formed on the semiconductor substrate 2 by the CMP of FIG. 6 and the separation of the semiconductor substrate.

  As shown in FIG. 10, streaks are formed on the back surface 2 b by CMP when the semiconductor substrate 2 is thinned. The semiconductor substrates 21 and 22 separated from the semiconductor substrate 2 are provided with striations in different directions depending on the cut portions.

  FIG. 11 is a plan view schematically showing the relationship between the separated semiconductor substrate and its striations. The relationship between the direction of the streak and the mechanical strength will be described below.

  As shown in FIG. 11, for example, a semiconductor substrate 21 separated into pieces is arranged on two support bars 13. An angle defined by a line perpendicular to the support bar 13 and the direction of the streak (hereinafter referred to as a streak angle) is defined as θ1. Similarly, the separated semiconductor substrate 22 is disposed on the two support bars 13. The streak angle of the semiconductor substrate 22 is defined as θ2. Note that θ1> θ2.

  FIG. 12 is a cross-sectional view schematically showing how the strength of the semiconductor substrate shown in FIG. 11 is measured.

  As shown in FIG. 12, the strength of the semiconductor substrate is measured by applying pressure to an intermediate point between the two support bars 13 in parallel with the support bars 13.

  FIG. 13 is a graph showing the relationship between the saw mark angle and the strength of the semiconductor substrate.

  As shown in FIG. 13, the strength of the semiconductor substrate decreases as the streak angle approaches 90 degrees. Moreover, the strength of the semiconductor substrate increases as the streak angle approaches 0 degrees. That is, as the striation and the angle at which the force is applied become parallel, the semiconductor substrate easily breaks along the striation. Further, in the semiconductor substrates 21 and 22, θ 2 is smaller than θ 1, so that it can be seen that the strength of the semiconductor substrate 22 is higher than that of the semiconductor substrate 21.

  According to the said embodiment, the inner edge of the contact bonding layer 10 which adhere | attaches the semiconductor substrate 2 and the light transmissive protective substrate 9 has a zigzag shape. For this reason, it is possible to reduce the length in which the direction of the striation and the direction of the inner edge of the adhesive layer 10 continuously coincide with each other regardless of the direction of the striation formed on the back surface 2b of the semiconductor substrate 2. Can do. For this reason, it is possible to suppress the crack of the semiconductor substrate 2 along the cavity 11. As a result, a structure with high strength can be obtained, and a highly reliable semiconductor device can be obtained.

  14A to 14D are plan views showing the shape of the inner edge of the adhesive layer 10. (A) is a quadrangle whose one side is 5.6 mm. (B) shows a case where each side of the quadrangle shown in (a) has a shape in which the bending portion has an amplitude of 0.15 mm and the bending portion is 90 degrees. (C) shows a case where each side of the quadrangle shown in (a) has a shape with a bending portion amplitude of 0.30 mm and the bending portion is 90 degrees. (D) has shown the case where each edge | side of the square shown to (a) has the shape which has the amplitude of a bending part of 0.45 mm, and a bending part is 90 degree | times.

  FIG. 15 is a graph showing the relationship between the amplitude of the bent portion and the misses stress (chip stress).

  In FIG. 15, the results simulated using the models of FIGS. 14A to 14D are plotted. It can be confirmed that the misses stress changes abruptly with an amplitude of about 0.20 mm. Thereby, the amplitude is preferably 0.20 mm or more.

  FIGS. 16E to 16G are plan views showing the shape of the inner edge of the adhesive layer 10. FIG. 14 (e) shows a case where each side of the quadrangle shown in FIG. 14 (a) has a bent portion amplitude of 0.30 mm and the bent portion has a shape of 120 degrees. Further, the number of repetitions of the bent portion on one side is 10 times. FIG. 14 (f) shows a case where each side of the quadrangle shown in FIG. 14 (a) has a bent portion amplitude of 0.30 mm and the bent portion is 90 degrees. Further, the number of repetitions of the bent portion on one side is 16 times. FIG. 14 (g) shows a case where each side of the quadrangle shown in FIG. 14 (a) has a shape where the bending portion has an amplitude of 0.30 mm and the bending portion is 60 degrees. Further, the number of repetitions of the bent portion on one side is 30 times.

  FIG. 17 is a graph showing the relationship between the number of repetitions of the bent portion and the misses stress.

  In FIG. 17, the results simulated using the models of FIGS. 17E to 17G are plotted. When the number of repetitions is 16 times or more, that is, when the bent portion is 90 degrees or less, the stress rapidly decreases. For this reason, the bent portion is preferably 90 degrees or less.

  In the above-described embodiment, the number of bent portions on each side of the rectangular inner edge of the adhesive layer 10 may be two or more. Further, from the viewpoint of symmetry of the bent portions on each side, the number of bent portions on each side is preferably an odd number.

  Mainly, in the above-described embodiment, the shape of the inner edge of the adhesive layer 10 is a substantially square assuming that the light receiving unit 3 is a quadrangle, but the inner edge has a zigzag (polygonal or wavy) structure If it has, it is possible to obtain the same effect.

  In the above-described embodiment, the image sensor has been described as an example. However, the above-described configuration can be applied to a semiconductor device other than the image sensor. Further, the protective substrate is not necessarily limited to the light-transmitting protective substrate as long as it protects the element region of the semiconductor substrate 2.

  Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the present invention. Further, the above embodiments include inventions at various stages, and various inventions can be extracted by appropriately combining the disclosed constituent elements. For example, even if several constituent requirements are deleted from the disclosed constituent requirements, the invention can be extracted as long as a predetermined effect can be obtained.

It is sectional drawing which showed typically the structure of the semiconductor device which concerns on embodiment of this invention. It is the top view which showed typically the structure of the semiconductor device which concerns on embodiment of this invention. It is sectional drawing which showed typically a part of manufacturing process of the semiconductor device which concerns on embodiment of this invention. It is sectional drawing which showed typically a part of manufacturing process of the semiconductor device which concerns on embodiment of this invention. It is sectional drawing which showed typically a part of manufacturing process of the semiconductor device which concerns on embodiment of this invention. It is sectional drawing which showed typically a part of manufacturing process of the semiconductor device which concerns on embodiment of this invention. It is sectional drawing which showed typically a part of manufacturing process of the semiconductor device which concerns on embodiment of this invention. It is sectional drawing which showed typically a part of manufacturing process of the semiconductor device which concerns on embodiment of this invention. It is sectional drawing which showed typically a part of manufacturing process of the semiconductor device which concerns on embodiment of this invention. It is the top view which showed typically the relationship of the stripe formed in the semiconductor substrate by CMP, and the separation of a semiconductor substrate. It is the top view which showed typically the separated semiconductor substrate and the relationship of the striations. It is sectional drawing which showed typically a mode that the intensity | strength of a semiconductor substrate was measured. It is the figure which showed the relationship between a streak angle and the intensity | strength of a semiconductor substrate. It is the top view which showed typically the structure of the semiconductor device which concerns on embodiment of this invention. It is the figure which showed the relationship between the amplitude of a bending part and misses stress. It is the top view which showed typically the structure of the semiconductor device which concerns on embodiment of this invention. It is the figure which showed the relationship between the frequency | count of repetition of a bending part, and misses stress.

Explanation of symbols

1 ... Semiconductor device,
2, 21, 22 ... semiconductor substrate, 2a ... front surface, 2b ... back surface,
3. Light receiving part,
4 ... Electrodes,
5 ... through hole,
6 ... Penetration wiring layer,
7: External connection terminal,
8 ... Protective film,
9 ... light-transmitting protective substrate, 9a ... front surface, 9b ... back surface,
10: Adhesive layer,
11 ... cavity,
12 ... Protective film, 12a ... Opening,
13 ... support bar,

Claims (5)

A semiconductor substrate having an element region;
A protective substrate facing the semiconductor substrate and protecting the element region;
An adhesive layer which is provided so as to surround the element region and bonds the semiconductor substrate and the protective substrate;
With
The semiconductor device according to claim 1, wherein an inner edge of the adhesive layer has a zigzag shape.   2. The semiconductor device according to claim 1, wherein the inner edge of the adhesive layer has a shape obtained by deforming each side of the square in a zigzag shape.   3. The semiconductor device according to claim 1, wherein the amplitude of the inner edge of the zigzag adhesive layer is 0.2 mm or more.   4. The semiconductor device according to claim 1, wherein an angle of a bent portion at an inner edge of the zigzag adhesive layer is 90 degrees or less. 5. Preparing a semiconductor substrate having an element region;
Providing a protective substrate for protecting the element region;
Bonding the semiconductor substrate and the protective substrate with an adhesive layer surrounding the element region;
With
A method for manufacturing a semiconductor device, wherein an inner edge of the adhesive layer has a zigzag shape.

Images