JP2010040697A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device having improved characteristics of a leakage current, or the like. <P>SOLUTION: An SBD 10 has a GaN layer 13 grown epitaxially on a GaN substrate 11. An upper portion of the GaN layer 13 is in a projecting mesa section 13a, and a Schottky electrode 15 is formed on the mesa section 13a. A side 13c of the mesa section 13a is an m face, and a side 15b of the Schottky electrode 15 is formed along the m face. The side 13c of the mesa section 13a is subjected to wet etching after patterning by plasma etching. The side 13c is a smooth surface nearly vertical to a substrate surface by wet etching. The distance (x) between an edge 15a of the Schottky electrode 15 and an upper edge 13b of the mesa section 13a is not more than 2 μm. With the structure, a field distribution shape is improved, thus improving a breakdown voltage. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to semiconductor devices such as diodes and transistors, and more particularly to measures for improving breakdown voltage characteristics.

  Conventionally, for example, a semiconductor device of Patent Document 1 is known as a conductor device having a mesa structure. In the technique of this document, a mesa-type or planar-type Schottky barrier diode is provided on the GaN layer (see FIGS. 6A and 6B of the same document). FIG. 1 of this document discloses the relationship between the doping concentration of the GaN layer and the reverse breakdown voltage characteristic.

The technique of this document assumes that a GaN layer having a sufficient thickness is epitaxially grown on a sapphire substrate. A high breakdown voltage is being realized by reducing the dopant concentration of the GaN layer.
JP-T-2005-530334

  However, this document does not disclose what reverse breakdown voltage is actually obtained. That is, simply increasing the thickness of the mesa portion and lowering the dopant concentration does not provide sufficient measures for improving the characteristics.

  An object of the present invention is to provide a high breakdown voltage semiconductor device by improving the mesa structure.

  The semiconductor device of the present invention includes a mesa portion that protrudes from a semiconductor region whose main surface is a c-plane ({0 0 0 1}), and an electrode formed on the mesa portion. The side surface of the mesa portion is the m plane ({1-1 0 0}). Semiconductor devices include Schottky barrier diodes, pn diodes, pin diodes, field effect transistors, and the like.

  With this structure, the following effects can be obtained in the present invention. Since the etching speed of the m-plane is slow, when wet etching is performed, anisotropic wet etching is performed, which is substantially perpendicular to the substrate surface. An ideal stripe-shaped electric field distribution can be obtained by making the surface substantially perpendicular to the substrate surface. Therefore, the electric field relaxation effect is enhanced, and a high breakdown voltage can be achieved.

  By performing anisotropic wet etching on the side surface of the mesa portion, the smoothness becomes extremely high, and the above-described effects are remarkably obtained. In addition, since processing damage at the time of patterning is also removed, the occurrence of a leak path through a defect is suppressed. The breakdown voltage is further improved by reducing the leakage current.

  Since the c-plane substrate is a free-standing substrate, lattice mismatch does not occur as in the case of using a sapphire substrate or the like, and defects such as dislocations in the semiconductor region are reduced. Therefore, the effect by the improvement of the mesa structure is surely exhibited.

When the semiconductor device is a Schottky diode provided with a Schottky electrode, the breakdown voltage is improved by improving the electric field distribution shape.
In that case, it is preferable that the side surface of the Schottky electrode is formed along the m-plane, and the distance between the side end portion of the Schottky electrode and the upper end portion of the mesa portion is not more than a predetermined value. Inventors' experiments have demonstrated that such a structure significantly reduces leakage current. The breakdown voltage is further improved by reducing the leakage current.

  The semiconductor device manufacturing method of the present invention is performed by the following procedure. First, a mask film having a side surface along the m-plane of the semiconductor region is formed on the c-plane semiconductor region. Next, using the mask film, the semiconductor region is etched to form a mesa portion. At any point in time, an electrode is formed on the mesa portion or the mesa portion forming region of the semiconductor region.

By this method, a semiconductor device that exhibits the above-described effects can be obtained.
At the time of etching, after performing dry etching, anisotropic wet etching is performed to remove processing damage. Further, a mesa portion having an extremely smooth side surface is formed. Therefore, an extremely high breakdown voltage semiconductor device having a small leakage current can be obtained.

  By forming the electrode on the mesa portion as a mask film, the distance between the end portion of the mesa portion and the end portion of the electrode becomes almost zero. Through experiments by the present inventors, it has been found that such a structure makes the leakage current of the semiconductor device extremely small.

  According to the semiconductor device of the present invention or the manufacturing method thereof, a high breakdown voltage semiconductor device can be obtained.

-Structure of Schottky barrier diode (hereinafter abbreviated as "SBD")-
1A and 1B are a cross-sectional view and a plan view showing the structure of the SBD according to the embodiment of the present invention. In this embodiment, an example in which the semiconductor device of the present invention is applied to SBD will be described. However, the semiconductor device of the present invention is not limited to SBD. The present invention can exhibit the effects described later also in a pn diode, a pin diode, a field effect transistor, and the like.

The SBD 10 includes a GaN substrate 11 and a GaN layer 13 formed on the GaN substrate 11. The GaN substrate 11 is a free-standing substrate and has a thickness of about 400 μm.
The thickness of the GaN layer 13 is about 7 μm. The GaN layer 13 has a mesa portion 13a protruding upward from the bottom portion. The side surface 13c of the mesa portion 13a is a vertical wall. The side plane shape of the mesa portion 13a is a regular hexagon as shown in FIG.

  A Schottky electrode 15 made of Au is provided on the upper surface of the mesa portion 13a. As shown in FIG. 1B, the planar shape of the Schottky electrode 15 is a regular hexagon having a longest portion of about 200 μm. An ohmic back electrode 16 made of Ti / Al / Ti / Au is formed on the back surface of the GaN substrate 11.

  As shown in the left diagram of FIG. 1B, the GaN substrate 11 and the GaN layer 13 have a dense hexagonal crystal structure, and the plane orientation is a c-plane ({0 0 0 1} plane). The side surface 13c of the mesa portion 13a is an m-plane ({1-1 0 0} plane). Further, the lower end portion 15a of the side surface 15b of the Schottky electrode 15 is substantially parallel to the side surface 13c of the mesa portion 13a. “Substantially parallel” means that an error caused by manufacturing variations or the like can be allowed.

  In the present embodiment, the side surface 15b of the Schottky electrode 15 is also substantially parallel to the side surface 13c of the mesa portion 13a. However, the side surface 15b of the Schottky electrode 15 does not have to be parallel to the side surface 13c of the mesa portion 13a. If the lower end portion 15a of the side surface 15b of the Schottky electrode 15 is substantially parallel to the side surface 13c of the mesa portion 13a, the effects described later can be obtained.

The main body of the GaN substrate 11 includes a relatively high concentration of n-type dopant of about 3 × 10 ¹⁸ cm ⁻³ . The GaN layer 13 (drift layer) contains a low concentration n-type dopant of about 5 × 10 ¹⁵ cm ⁻³ . A region having a thickness of about 1 μm between the GaN layer 13 and the GaN substrate 11 is the buffer layer 14. The buffer layer 14 contains a relatively low concentration dopant of about 1 × 10 ¹⁷ cm ⁻³ .

  The distance x between the end portion 15a of the Schottky electrode 15 and the upper end portion 13b of the mesa portion 13a is 2 μm or less. Such a structure is realized by manufacturing method 1 or manufacturing method 2 described later. Further, the mesa d (= mesa thickness) that is the step between the mesa portion 13a and the bottom portion in the present embodiment is 0.2 μm or more, for example, about 1 μm.

-Manufacturing process of SBD-
(Production method 1-1)
2A to 2E are cross-sectional views showing the manufacturing process of the SBD according to manufacturing method 1-1.
First, the buffer layer 14 and the GaN layer 13 are grown on the GaN substrate 11 in the step shown in FIG. In the growth, a known organometallic growth method is used. The buffer layer 14 contains an n-type dopant having a carrier concentration of about 1 × 10 ¹⁷ cm ⁻³ . The GaN layer 13 includes an n-type dopant having a carrier concentration of about 5 × 10 ¹⁵ cm ⁻³ (1 × 10 ¹⁶ cm ⁻³ or less). The GaN layer 13 may be an undoped layer.

Next, organic cleaning is performed in the step shown in FIG. Next, a resist mask 20 is formed on the GaN layer 13. The planar shape of the resist mask 20 is substantially a regular hexagon. A side surface 20 a of the resist mask 20 is formed along the m-plane of the GaN layer 13. The planar dimension of the resist mask 20 is slightly larger than the Schottky electrode 15 to be formed (2 μm or less).
Note that the side surface 20 a of the resist mask 20 may not be parallel to the m-plane of the GaN layer 13. If the lower end portion of the side surface 20a of the resist mask 20 is along the m-plane of the GaN layer 13, a mesa portion 13a having the m-side surface 13c is formed in the etching process.

Instead of the resist mask 20, an etching mask made of another material can be formed. For example, SiN, SiON, SiO ₂ , Au, Pt, W, Ni, Ti or the like can be used as a material constituting the etching mask.

Next, in the step shown in FIG. 2C, the GaN layer 13 is plasma etched with the resist mask 20 attached. At that time, using a parallel plate plasma apparatus (RIE), Cl ₂ and BCl ₂ are allowed to flow as etching gases. The etching conditions in this example are a power density of 0.004 W / mm ² , a chamber internal pressure of 10 mTorr to 200 mTorr, an electrode temperature of 25 ° C. to 40 ° C., and gas flow rates of Cl ₂ of 40 sccm and BCl ₂ of 4 sccm. However, it is not limited to the above conditions. Plasma etching is terminated at the point where the GaN layer 13 is etched to a depth of 1 μm.

  Thereby, as shown in FIG.1 (b), the mesa part 13a whose planar shape is a substantially regular hexagon is formed. The side surface 13c of the mesa portion 13a is the m-plane ({1-1 0 0} plane) of the GaN crystal. The protrusion amount (mesa height) of the mesa portion 13a in the GaN layer 13 is about 1 μm. At this point, an etching damage layer is generated over the surface portion of the GaN layer 13 including the mesa portion 13a over a depth of several nm (about 1 nm to 20 nm).

The etching gas may be Cl ₂ alone, Cl ₂ and Ar, Cl ₂ and N ₂ , Cl ₂ and BCl ₂ , N ₂ , or the like. By using these etching gases, damage to the GaN layer 13 can be suppressed as much as possible. The plasma generator is not limited to the RIE type. It is also possible to use other types of plasma generators such as ICP as the plasma generator.

  Next, the resist mask 20 is removed in the step shown in FIG. Next, RTA (Rapid Thermal Annealing) (rapid heat treatment) is performed at 700 ° C. for 2 minutes.

  Next, wet etching of GaN is performed in the step shown in FIG. At that time, the entire substrate is immersed in a 25% TMAH aqueous solution (tetramethylammonium hydroxide aqueous solution) having a temperature of about 85 ° C. By this treatment, the damaged layer generated on the surface portion of the GaN layer 13 is removed by plasma etching. The depth of the etching damage layer varies depending on the plasma generator used and the plasma etching conditions. Therefore, the wet etching process is performed until the etching damage layer is substantially removed. “Substantially removed” means that the etching damage layer is removed to the extent that it does not affect the leakage current described later.

  The etching solution for performing the wet etching is not limited to the TMAH aqueous solution. As the etchant, an appropriate one can be used according to the material of the substrate (in this embodiment, GaN). Even when a TMAH aqueous solution is used, the concentration is not limited to 25%. Conditions such as the concentration and temperature of the TMAH aqueous solution can also be selected as appropriate.

  Subsequently, a Schottky electrode 15 made of a Ni / Au film having a thickness of about 50 nm / 300 nm is formed on the GaN layer 13. The Schottky electrode 15 is formed by a known lift-off method. The planar shape of the Schottky electrode 15 is a regular hexagon having a longest portion of 200 μm. The distance between the end portion 15a of the Schottky electrode 15 and the upper end portion 13b of the mesa portion 13a is 2 μm or less.

Next, in the step shown in FIG. 2E, a back electrode 16 that is in ohmic contact with the GaN substrate 11 is formed on the back surface of the GaN substrate 11. The procedure for forming the back electrode is as follows.
After cleaning with 10% hydrochloric acid for 3 minutes as a pre-deposition cleaning, a multilayer Ti / Al / Ti / Au film (thickness 20 nm / 100 nm / 20 nm / 200 nm) is deposited on the entire back surface by an evaporation method. . Thereafter, an alloying heat treatment between the GaN substrate 1 and the back electrode 16 is performed under the condition of 450 ° C. for 2 minutes. The alloying process is performed at a temperature and a time at which Schottky contact between the Schottky electrode 15 and the GaN layer 13 is maintained.

  Note that the process of removing the resist mask 20 by ashing or the like is not necessarily required. This is because the resist mask 20 can be removed depending on the time of wet etching with a 25% TMAH aqueous solution.

(Production method 1-2)
3A to 3E are cross-sectional views illustrating the manufacturing process of the SBD according to the manufacturing method 1-2.
In the step shown in FIG. 3A, the buffer layer 14 and the GaN layer 13 are grown on the GaN substrate 11 under the same conditions as in manufacturing method 1-1.

  Next, in the step shown in FIG. 3B, organic cleaning is performed, and further cleaning is performed with 10% hydrochloric acid for 3 minutes. Thereafter, a Schottky electrode 15 made of Ni / Au is formed on the GaN layer 13 under the same conditions as in manufacturing method 1-1. The planar shape of the Schottky electrode 15 is a regular hexagon having a longest portion of 200 μm. The thickness of the Schottky electrode 15 is about 50 nm / 300 nm.

  Next, in the step shown in FIG. 3C, a resist mask 20 that covers the upper surface and side surfaces of the Schottky electrode 15 is formed. The planar dimension of the resist mask 20 is slightly larger than that of the Schottky electrode 15. Even in consideration of mask alignment errors, the Schottky electrode 15 is reliably covered with the resist mask 20. However, it is sufficient that at least the upper surface of the Schottky electrode 15 is covered. In any part of the Schottky electrode 15, the distance x between the resist mask 20 and the end of the Schottky electrode 15 is 2 μm or less.

Also in the manufacturing method 1-2, it can replace with the resist mask 20 and can form the etching mask which consists of another material. As a material constituting the etching mask, SiN, SiON, SiO ₂ , Au, Pt, W, Ni, Ti, or the like can be used.

  Then, with the resist mask 20 attached, the GaN layer 13 is plasma etched under the same conditions as in manufacturing method 1-1. The types of etching gas and plasma generator that can be used other than the above are the same as those in Production Method 1-1.

  Next, in the step shown in FIG. 3D, when the GaN layer 13 is etched to a depth of 1 μm, the plasma etching is finished. Thereby, as shown in FIG.1 (b), the mesa part 13a whose planar shape is a substantially regular hexagon is formed. The protrusion amount (mesa height) of the mesa portion 13a in the GaN layer 13 is about 1 μm. At this point, an etching damage layer is generated over the surface portion of the GaN layer 13 including the mesa portion 13a over a depth of several nm (about 1 nm to 20 nm).

  Thereafter, the resist mask 20 is removed by ashing or the like. Further, GaN wet etching is performed under the same conditions as in manufacturing method 1-1 to remove the damaged layer. Similar to the production method 1-1, the type and conditions of the etching solution for performing the wet etching can be appropriately selected.

Next, a back electrode 16 is formed on the back surface of the GaN substrate 11 in the step shown in FIG.
The process of removing the resist mask 20 by ashing or the like is not always necessary. For the same reason as in Production Method 1-1.

(Production method 1-3)
4A to 4D are cross-sectional views showing the manufacturing process of the SBD according to the manufacturing method 1-3.
In the step shown in FIG. 4A, the buffer layer 14 and the GaN layer 13 are grown on the GaN substrate 11 under the same conditions as in the manufacturing method 1-1.

Next, in the step shown in FIG. 4B, a Schottky electrode 15 made of Ni / Au is formed on the GaN layer 13 under the same conditions as in manufacturing method 1-2. The planar shape of the Schottky electrode 15 is a regular hexagon having a longest portion of 200 μm. The side surface 15 b of the Schottky electrode 15 is formed along the m-plane of the GaN substrate 11. The thickness of the Schottky electrode 15 is about 50 nm / 300 nm.
Note that the side surface 15 b of the Schottky electrode 15 may not be parallel to the m-plane of the GaN layer 13. If the lower end portion of the side surface 15b of the Schottky electrode 15 is along the m-plane of the GaN substrate 11, the mesa portion 13a having the m-side surface 13c is formed in the etching process.

  Next, in the step shown in FIG. 4C, the GaN layer 13 is plasma etched using the Schottky electrode 15 as an etching mask. That is, in manufacturing method 1-3, it is not necessary to form a resist mask. The conditions for plasma etching are the same as in Production Method 1-1. The types of etching gas and plasma generator that can be used are the same as in Production Method 1-1.

  Next, in the step shown in FIG. 4D, when the GaN layer 13 is etched to a depth of 1 μm, the plasma etching is finished. As a result, the mesa portion 13a having the same planar shape as the Schottky electrode 15 is formed. The protrusion amount (mesa height) of the mesa portion 13a in the GaN layer 13 is about 1 μm. Similarly to the manufacturing method 1-1, an etching damage layer is generated on the surface portion of the GaN layer 13 including the mesa portion 13a.

  Thereafter, wet etching of GaN is performed under the same conditions as in manufacturing method 1-1, and the damaged layer is removed. Similar to the production method 1-1 and the like, the type and conditions of the etchant for performing wet etching can be appropriately selected.

  Next, in the step shown in FIG. 4E, the back electrode 16 is formed on the back surface of the GaN substrate 11 under the same conditions as in the manufacturing method 1-1.

  By the manufacturing method 1-3, a mesa portion 13a having substantially the same shape as the Schottky electrode 15 is formed. Therefore, the distance between the end portion of the Schottky electrode 15 and the end portion of the mesa portion 13a is infinitely close to zero.

(Manufacturing method 2)
5A to 5C are cross-sectional views showing the manufacturing process of the SBD according to manufacturing method 2.
First, in the step shown in FIG. 5A, a GaN layer is grown under the same conditions as in manufacturing method 1-1. Thereafter, a resist mask 20 similar to the manufacturing method 1-1 is formed on the mesa portion 13a. Next, the GaN layer 13 is plasma etched with the resist mask 20 attached. The plasma generator and plasma etching conditions used are the same as those in production method 1-1. At this time, an etching damage layer is generated over the surface portion of the GaN layer 13 including the mesa portion 13a over a depth of several nm (about 1 nm to 20 nm).

  Thereafter, the resist mask 20 is removed by ashing or the like. Furthermore, GaN wet etching is performed under the same conditions as in manufacturing method 1-1 and the like to remove the damaged layer. Similar to the production method 1-1 and the like, the type and conditions of the etchant for performing wet etching can be appropriately selected.

Next, a back electrode 16 is formed on the back surface of the GaN substrate 11 in the step shown in FIG. The material of the back electrode 16 is the same as the manufacturing method 1-1. However, in the production method 2, the rear electrode is alloyed by RTA at 700 ° C. for 2 minutes.
Further, in the step shown in FIG. 5C, the Schottky electrode 15 having the same shape and size as the manufacturing method 1-1 is formed. The forming method is also the same as in manufacturing method 1-1. The distance x between the upper end portion 13b of the mesa portion 13a and the end portion 15a of the Schottky electrode 15 is 2 μm or less.
That is, in the manufacturing method 2, unlike the manufacturing methods 1-1 to 1-3, the back electrode 16 is formed before the Schottky electrode 15 is formed.

  As shown in data to be described later, when the manufacturing process 2 is adopted, the distance x between the upper end 13b of the mesa portion 13a and the end 15a of the Schottky electrode 15 is a predetermined value (in this example, Even if it is not less than 2 μm), the leakage current can be suppressed.

  In addition, after forming the back surface electrode 16, you may perform the wet etching by 25% TMAH aqueous solution. In that case, it is preferable to form an etching protective film on the back surface of the GaN substrate 11 so as to cover the back electrode 16. As the etching protective film, an insulating film having resistance to a 25% TMAH aqueous solution, for example, a silicon oxide film or a silicon nitride film can be used. Thereafter, the insulating film is removed by a known etching solution corresponding to the material, and then the step shown in FIG.

  According to the present embodiment, as shown in each of the above manufacturing methods, the following effects can be exhibited by setting the side surface of the mesa portion 13a to the m plane. Since the etching speed is slow, the m-plane becomes a smooth surface during plasma etching or wet etching. As a result, an effect of suppressing leakage current and an effect of improving withstand voltage are obtained. Hereinafter, the basis will be described based on experiments conducted by the present inventors.

  FIGS. 6A and 6B are graphs showing the difference in etching rate between the a-plane direction and the m-plane direction of the GaN layer. In the figure, the horizontal axis represents the TMAH processing time, and the vertical axis represents the change in pattern dimension (etching amount). Comparing FIGS. 6A and 6B, it can be seen that the etching amount of the GaN layer in the m-plane direction is extremely small compared to the a-plane.

  7 (a) and 7 (b) are SEM photographs showing a side surface during plasma etching of GaN and a side surface after wet etching in order. As shown in FIG. 7A, the c-plane GaN is patterned by plasma etching so that the m-plane and the a-plane appear.

  On the other hand, as shown in FIG. 7B, the m-plane also appears in the portion that was the a-plane after wet etching for 2 hours. A wide m-plane appears at the corner where the m-plane and the a-plane intersect. The m-plane is extremely flat and the surface is smooth.

  Therefore, if the patterning is performed so that the side surface 13c of the mesa portion 13a becomes the m-plane of the GaN layer 13, a smooth side surface 13c can be obtained. Thereby, in this Embodiment, the following effects are acquired.

  As shown in the left diagram of FIG. 1B, the m-plane is a plane perpendicular to the substrate surface (c-plane) of the c-plane substrate. Therefore, the mesa portion 13 a is substantially perpendicular to the GaN layer 13. With this vertical shape, the depletion layer at the lower end of the mesa portion 13a spreads ideally and uniformly. Therefore, it becomes difficult to generate a portion where the electric field is concentrated, and the breakdown voltage is improved.

Moreover, as shown in FIG.7 (b), when the side surface 13c of the mesa part 13a is a surface, an unevenness | corrugation is large. The same applies not only to the a-plane but also to all planes other than the m-plane. Therefore, when the side surface 13c of the mesa portion 13a is other than the m-plane, the electric field tends to concentrate on the tip portion of the unevenness. Due to the concentration of the electric field, a leak path is likely to occur.
On the other hand, in the present embodiment, since the side surface 13c of the mesa portion 13a is an m-plane, the occurrence of a leak path is suppressed. The leakage current is a threshold parameter for determining the breakdown voltage (breakdown voltage). Therefore, the breakdown voltage is improved by suppressing the occurrence of a leak path.

  Moreover, the following effect is acquired by making the Schottky electrode 15 into the shape along m surface, and making the distance x of the Schottky electrode 15 and the mesa part 13a below predetermined value.

  FIGS. 8A and 8B are diagrams showing measured data of leakage current characteristics of SBDs according to manufacturing method 1 and manufacturing method 2 in order. However, wet etching is not performed. In the figure, the horizontal axis represents the distance x between the upper end portion 13b of the mesa portion 13a and the end portion 15a of the Schottky electrode 15. The vertical axis represents the leakage current (A) when a reverse voltage of 200 V is applied.

  As shown in FIG. 8A, in the case of the SBD formed by the manufacturing method 1, the leakage current is reduced as the distance x is reduced. The leakage current is a threshold parameter for determining the breakdown voltage (breakdown voltage). Therefore, a small leak current means a high breakdown voltage. Therefore, by limiting the distance x shown in FIG. 1 or the like to a predetermined value or less, the breakdown voltage of the SBD can be improved. In particular, the leakage current is significantly reduced by limiting the distance x to 2 μm or less. As a result, the breakdown voltage is greatly improved.

  Further, it has been found that when the distance x is limited to a predetermined value or less, a leak current is likely to occur if a damaged layer due to plasma etching exists. Therefore, by removing the damaged layer by plasma etching by wet etching, the effect of reducing leakage current becomes significant. That is, it can be expected that the leakage current shown in FIGS. 8A and 8B is further reduced by removing the damaged layer. Therefore, an SBD with a higher breakdown voltage can be obtained by performing wet etching.

  In plasma etching, if the etching efficiency is increased, the damage layer also becomes deeper. On the other hand, if the damage depth is to be suppressed, the etching efficiency deteriorates because the plasma etching is performed under mild conditions. Therefore, by introducing wet etching after plasma etching, the formation efficiency of the mesa portion 13a is also improved.

  Then, by making the side surface 13c of the mesa portion 13a the m plane and the side surface 15b of the Schottky electrode 15 along the m plane, the distance x can be easily reduced to 2 μm or less.

  Further, if the Schottky electrode 15 is used as an etching mask as in the manufacturing method 2-3, the distance x can be reduced to zero. That is, since the side surface 13c of the mesa portion 13a becomes a smooth surface by wet etching, the distance x can be made closer to 0 in practice. Therefore, as shown in FIG. 8A, the leakage current can be extremely reduced.

  In addition, when the epitaxial growth layer on a sapphire substrate etc. is used instead of a self-supporting GaN substrate like patent document 1, it is difficult to acquire the said effect. This is because many defects such as dislocations are included, so that even if the mesa structure or the Schottky electrode structure is improved, sufficient characteristics cannot be improved. On the other hand, by using a self-supporting GaN substrate (bulk substrate), the effects of the present invention can be exhibited more remarkably.

  Further, as shown in FIG. 8B, also in the case of the SBD formed by the manufacturing method 2-1, the tendency that the leakage current is reduced as the distance x becomes smaller appears. Accordingly, the SBD manufactured by the manufacturing method 2 can also exhibit the effect of improving the breakdown voltage as in the case of the manufacturing method 1.

  FIG. 9 is a diagram showing actual measurement data of a withstand voltage value for the mesa step d of the SBD formed by the manufacturing methods 1 and 2. As shown in the figure, the breakdown voltage is improved as the mesa step d is larger than when the mesa step d is zero. That is, it can be seen that the withstand voltage is improved by adopting the mesa structure as compared with the planar type SBD. When the mesa level difference d is 0.2 μm or more, the breakdown voltage is about 800 (V) or more, and a significant improvement in breakdown voltage is observed.

  In the above embodiment, an example in which a GaN substrate and a GaN epitaxial growth layer are provided as semiconductor regions has been described. However, the SBD of the present invention can also be applied to SiC and Si.

  In the above embodiment, the semiconductor device of the present invention is a Schottky barrier diode (SBD), but the present invention is not limited to this. The present invention can be applied to other semiconductor devices as long as they have a mesa structure on a c-plane substrate. Examples of other semiconductor devices include pn diodes, pin diodes, field effect transistors, and the like. In these semiconductor devices as well, the side surface of the mesa portion is an m-plane, so that the electric field distribution shape is an ideal stripe shape. Therefore, a high breakdown voltage characteristic can be exhibited.

  In the above-described embodiment, particularly the manufacturing method 2, the Schottky electrode 15 may protrude from the upper surface of the mesa portion 13a.

  The structures of the embodiments of the present invention disclosed above are merely examples, and the scope of the present invention is not limited to the scope of these descriptions. The scope of the present invention is indicated by the description of the scope of claims, and further includes meanings equivalent to the description of the scope of claims and all modifications within the scope.

  The semiconductor device manufactured according to the present invention can be used as a circuit element in various electronic devices.

(A), (b) is sectional drawing and the top view of SBD which concern on embodiment in order. (A)-(e) is sectional drawing which shows the manufacturing process of SBD which concerns on manufacturing method 1-1. (A)-(e) is sectional drawing which shows the manufacturing process of SBD which concerns on the manufacturing method 1-2. (A)-(e) is sectional drawing which shows the manufacturing process of SBD which concerns on manufacturing method 1-3. (A)-(c) is sectional drawing which shows the manufacturing process of SBD which concerns on the manufacturing method 2. FIG. (A), (b) is a graph which shows the difference in the to-be-etched rate in the a-plane direction and m-plane direction of a GaN layer. (A), (b) is a SEM photograph figure which shows the side surface at the time of the plasma etching of a GaN substrate, and the side surface after wet etching in order. (A), (b) is a figure which shows the actual measurement data of the leakage current characteristic of SBD by the manufacturing method 1 and the manufacturing method 2 in order. It is a figure which shows the actual measurement data of the pressure | voltage resistant value with respect to the mesa level | step difference of SBD formed by the manufacturing methods 1 and 2. FIG.

Explanation of symbols

10 Schottky barrier diode (SBD)
11 GaN substrate 13 GaN layer 13a mesa portion 13b top surface end portion 13c side surface 14 buffer layer 15 Schottky electrode 15a end portion 15b side surface 16 back surface electrode 20 resist mask

Claims (8)

A semiconductor region provided on a {0 0 0 1} plane substrate;
A mesa portion formed protruding from the semiconductor region;
An electrode formed on the mesa portion,
The side surface of the mesa portion is a semiconductor device that is a {1-1 0 0} plane. The semiconductor device of claim 1.
A side surface of the mesa portion is a semiconductor device that is subjected to anisotropic wet etching. The semiconductor device according to claim 1 or 2,
The {0 0 0 1} plane substrate is a self-standing substrate, a semiconductor device. In the semiconductor device according to any one of claims 1 to 3,
The electrode is in Schottky contact with the mesa portion,
A semiconductor device that functions as a Schottky diode. The semiconductor device according to claim 4.
The electrode is formed such that its side faces are along the {1-1 0 0} plane of the mesa portion,
The distance between the side edge part of the said Schottky electrode and the upper surface edge part of the said mesa part is a semiconductor device which is below a predetermined value. a step (a) of forming a mask film having a side surface along a {1-1 100} plane on a semiconductor region on a c-plane substrate;
After the step (a), using the mask film, the semiconductor region is etched to form a mesa portion;
A step (c) of forming an electrode on the mesa portion or the mesa portion forming region of the semiconductor region;
A method for manufacturing a semiconductor device comprising: In the manufacturing method of the semiconductor device according to claim 6,
In the step (b), a method for manufacturing a semiconductor device, wherein dry etching is performed and then anisotropic wet etching is performed. In the manufacturing method of the semiconductor device of Claim 6 or 7,
In the step (a), an electrode on a mesa portion is formed as the mask film, and the step (c) is performed simultaneously with the step (a).

Images