JP2009300752A - Display device and driving method - Google Patents

Abstract

In a method of setting a threshold voltage by a charging operation, an error due to a color deviation of a parasitic capacitance of a light emitting element is reduced with a simple circuit configuration, and a capacitance value of a storage capacitor element is made independent of the parasitic capacitance of the light emitting element. Provided are a display device and a driving method which can be set.
A plurality of pixel circuits 30 arranged in a matrix, each of which includes a drive transistor 36, an OLED 38 that emits reference color light according to the operation of the drive transistor 36, and a gate and a source of the drive transistor 36 A plurality of pixel circuits 3030 including a storage capacitor element 34 connected between them, and a column common capacitor discharge switch that is provided for each column of the plurality of pixel circuits 3030 and is turned on / off according to a signal from the correction capacitor element 26 and the outside And a plurality of parallel circuits connected in parallel with each other, using either the parasitic capacitance of the OLED 38 and the correction capacitance element 26, or using only the correction capacitance element 26, and charging the threshold voltage of the drive transistor 36. The holding capacitor element 34 holds it.
[Selection] Figure 1

Description

  The present invention relates to an active matrix organic EL display device and a display device driving method.

  In an active matrix organic EL (Electric Luminescence) display device, a current-controlled organic light-emitting diode (OLED) is used. Therefore, unlike a liquid crystal display (LCD), a selection transistor, a storage capacitor element, and a driving transistor are required.

  Conventionally, as described in Patent Document 1 below, a low-temperature polysilicon or amorphous silicon thin film transistor (Thin Film Transistor: TFT) is used as a drive transistor. The low-temperature polysilicon TFT can provide high mobility and threshold voltage stability, but has a problem in uniformity of mobility. Amorphous silicon TFTs can achieve mobility uniformity, but have problems with low mobility and threshold voltage fluctuation over time.

  When the mobility uniformity and the threshold voltage stability are low, it appears as unevenness in the display image. Therefore, as described in Patent Document 2 below, when an amorphous silicon TFT is used, a diode connection type compensation circuit is provided in the pixel circuit to perform threshold voltage correction by the parasitic capacitance of the OLED. . However, when such a compensation circuit is provided, the pixel circuit becomes complicated, which may lead to an increase in cost due to a decrease in yield and a decrease in aperture ratio.

  Therefore, a method of reducing the number of transistors by correcting the threshold voltage by charging the OLED parasitic capacitance as described in Patent Document 3 below for threshold voltage correction of the diode connection method has been devised. .

  FIG. 11 is a diagram showing a pixel circuit configuration disclosed in Patent Document 3. As shown in FIG.

  The pixel circuit shown in FIG. 11 includes a selection gate connection switch 100, a holding capacitor element 102, a driving transistor 104, a current control element (OLED) 106, a parasitic capacitor 108, and a reset switch 110. The selection gate connection switch 100 is formed of a thin film transistor, and its gate is connected to a row scan signal line (hereinafter referred to as “Scan line”) 112, and one of the drain and the source is a column data signal line (hereinafter referred to as “Data line”) 114. The other of the drain and the source is connected to the gate of the driving transistor 104.

  In addition, the storage capacitor element 102 is connected between the gate and the source of the driving transistor 104. The drive transistor 104 is formed of a thin film transistor, and has a gate connected to one of the drain and source of the selection gate connection switch 100 and one end of the storage capacitor 102, a drain connected to the power supply Vdd, and a source connected to the anode of the OLED 106. ing.

  The anode of the OLED 106 is connected to the source of the driving transistor 104, and the cathode is grounded. The OLED 106 emits light with a luminance corresponding to the current of the driving transistor 104. The parasitic capacitance 108 is a parasitic capacitance between the electrodes of the OLED 106.

  The reset switch 110 is connected between the source of the driving transistor 104, the OLED 106 and the parasitic capacitor 108, and is connected to one end of the storage capacitor element 102. The reset switch 110 is connected to a row reset signal line (hereinafter referred to as a Res line) 116 and is turned on / off in response to a Reset signal supplied from the Res line 116.

  Here, the operation of the pixel circuit shown in FIG. 11 will be described with reference to FIGS. FIG. 12 is a diagram illustrating voltage waveform examples during the operation period of this circuit, where Vs is the source voltage of the drive transistor 104 and Vgs is the gate-source voltage of the drive transistor 104.

  Note that a period from T1 to T4 illustrated in FIG. 12 is a period indicating one display period of the pixel circuit, and a period before T1 in FIG. 12 indicates a previous display period. Accordingly, in this previous display period, the voltage value applied to the Data line 114, the source voltage Vs of the drive transistor 104, and the gate-source voltage Vgs of the drive transistor 104 are voltages corresponding to the previous display period. Here, the value is not particularly specified, and the voltage range is shown by shading.

  FIGS. 13 to 16 are diagrams schematically showing ON / OFF states and current flows of the selection gate connection switch 100 and the reset switch 110 in each operation period described below.

  During the period T1 shown in FIG. 12, a reset operation is performed. In the reset operation period T1, the selection gate connection switch 100 is turned on as shown in FIG. 13 by the Scan signal supplied to the Scan line 112 by the Scan driver (not shown), and supplied to the Data line 114 by the Data driver (not shown). The applied voltage VB is applied to the gate of the driving transistor 104. If the light emission threshold voltage of the OLED 106 is Vf0 and the threshold voltage of the driving transistor 104 is Vth, a voltage VB that satisfies the condition of “Vth <VB <Vf0 + Vth” is applied to the gate of the driving transistor 104.

  Further, in the reset operation period T1, the reset switch 110 is turned on by the Reset signal supplied to the Res line 114 simultaneously with the Scan signal, the storage capacitor element 102 and the parasitic capacitor 108 are discharged, and the source voltage Vs of the drive transistor 104 is discharged. Becomes 0V. The reset operation period T1 is set in advance as a period required for the source voltage Vs of the drive transistor 104 to be 0V.

  In the period T2 shown in FIG. 12, the threshold voltage detection operation is performed. When the period of T1 ends and the period of T2 starts, the Reset signal is set to a non-selection level, and the reset switch 110 is turned off as shown in FIG.

  Since the source voltage Vs of the driving transistor 104 is 0 V and the gate voltage Vg is the voltage VB at the start of T2, the gate-source voltage Vgs is Vgs> Vth, and the driving transistor 104 has a gate-source voltage Vgs. The current Id corresponding to

The parasitic capacitance 108 is charged by this current Id, and the source voltage Vs rises. Since the gate voltage Vg = VB and a fixed voltage, the gate-source voltage Vgs decreases and the current Id decreases as the source voltage Vs increases. In this process, the gate-source voltage Vgs of the driving transistor 36 gradually approaches the threshold voltage Vth.
Then, the increase of the source voltage Vs stops when the current Id becomes sufficiently small.

Here, the saturation region current equation of the thin film transistor (TFT) is
Id = μ * Cox * (W / L) * (Vgs-Vth) ²
(Μ is the mobility, Cox is the capacitance per unit area of the gate insulating film, W is the channel width, and L is the channel length)
Therefore, the voltage Vcs written to the storage capacitor 102 at this time is Vcs = Vgs = Vth.

In order not to cause the OLED 106 to emit light so that no current flows through the OLED 106, the source voltage Vs is:
Vs = VB-Vth <Vf0
Is a condition. Therefore, as described above, the voltage VB is
VB <Vf0 + Vth
It becomes.

  In the period T3 shown in FIG. 12, a program operation is performed. Here, the operation of setting a current that is actually desired to flow through the drive transistor 104 (that is, holding the voltage for flowing the current in the storage capacitor 102) is referred to as a program operation. At the start of the program operation period T3, as shown in FIG. 15, the Data signal voltage of the Data line 114 is stepped up from VB to VB + Vod. Therefore, the gate voltage Vg of the driving transistor 104 is VB + Vod.

Here, Vod is an overdrive voltage of the drive transistor 104, and
Vod = Vgs-Vth
It is.

Further, since the source voltage Vs is a divided voltage of the storage capacitor element 102 and the parasitic capacitor 108, when the capacitance value of the storage capacitor element 102 is Cs and the capacitance value of the parasitic capacitor 108 is Cd, the source voltage Vs at this time is ,
Vs = VB-Vth + Vod * Cs / (Cd + Cs)
When the capacitance value Cd of the parasitic capacitor 108 is much larger than the capacitance value Cs of the storage capacitor element 102 (Cd >> Cs), the source voltage Vs is substantially equal to “VB−Vth”. Therefore, the gate-source voltage Vgs of the driving transistor 104 is
Vgs = Vg-Vs = (VB + Vod)-(VB-Vth) = Vth + Vod
Thus, a voltage obtained by adding the overdrive voltage Vod to the threshold voltage Vth detected in the threshold voltage detection operation period T2 is set in the storage capacitor element 102 located between the gate and the source of the drive transistor 104. The voltage set here is called a program voltage.

  In the period T4 shown in FIG. 12, the light emission operation is performed. In the period of the light emission operation period T4 in FIG. 12, since the voltage value corresponding to the next display period is applied to the Data line 114, the Data signal voltage is not particularly specified here, and the voltage range is represented by the network. It is shown with a hook.

  In the light emission operation period T4, the Scan signal becomes a non-selection level, and the selection gate connection switch 100 is turned off as shown in FIG. Further, the voltage across the holding capacitor element 102 remains held, and the parasitic capacitance 108 of the OLED 106 is charged by the current Id flowing through the driving transistor 104, and the source voltage Vs rises. Furthermore, since the gate-source voltage Vgs of the driving transistor 104 remains at the program voltage, the source voltage Vs eventually exceeds the light emission threshold voltage Vf0 of the OLED 106, and the OLED 106 emits light.

  Although it is the timing to turn off the selection gate connection switch 100, it is necessary to turn it off before the source voltage Vs starts to rise after the application of the overdrive voltage Vod is completed.

  Further, Patent Document 4 discloses an apparatus in which a correction function for mobility μ is added to the technique described in Patent Document 3.

  FIG. 17 is a diagram showing a pixel circuit configuration disclosed in Patent Document 4. As shown in FIG. In FIG. 17, components given the same reference numerals as those in FIG. 11 are the same components as those in FIG. 11.

  The pixel circuit illustrated in FIG. 17 includes a selection gate connection switch 100, a storage capacitor element 102, a driving transistor 104, an OLED 106, and a parasitic capacitor 108. Each connection relationship is the same as in FIG. However, the reset switch 110 is not provided in the circuit of FIG. Further, the drain of the driving transistor 104 is connected to a common power line (hereinafter referred to as Vddx line) 118.

  Here, with reference to FIG. 18, the operation of the pixel circuit shown in FIG. 17 will be described focusing on the mobility μ correction function. FIG. 18 is a diagram showing voltage waveform examples during the operation period of this circuit.

  During the period T1 shown in FIG. 18, a reset operation is performed. In this reset operation period T1, the selection gate connection switch 100 is turned on by the Scan signal supplied to the Scan line 112 by the Scan driver (not shown), and the voltage VB supplied to the Data line 114 by the Data driver (not shown) is Applied to the gate of the driving transistor 104. As in the case of FIG. 11 above, if the emission threshold voltage of the OLED 106 is Vf0 and the threshold voltage of the drive transistor 104 is Vth, the gate of the drive transistor 104 satisfies the condition “Vth <VB <Vf0 + Vth”. Voltage VB is applied.

  Here, the power supply voltage Vddx supplied through the Vddx line 118 is set to “Vddx = VL <VB−Vth”. That is, the power supply voltage Vddx is made smaller than VB. As a result, the driving transistor 104 is turned on, and a current flows from the parasitic capacitance 108 side to the Vddx line 118 side in the driving transistor 104. Therefore, the parasitic capacitance 108 of the OLED 106 is discharged to the Vddx line 118, and finally the source voltage Vs of the driving transistor 104 becomes 0V. Thus, in this configuration, the parasitic capacitor 108 is discharged without providing the reset switch 110.

  In the period T2 shown in FIG. 18, the threshold voltage detection operation is performed. The threshold voltage detection operation performed here is the same as in the case of the configuration of FIG.

  In the first half of the period T3 shown in FIG. 18, a program operation is performed. The program operation performed here is also the same as that of the configuration of FIG.

  In the latter half of the period T3 shown in FIG. 18, that is, after the program operation, the mobility μ is corrected to correct the program voltage.

  In the technique described in Patent Document 3 described above with reference to FIG. 11, the light emission operation is started by setting the Scan signal to the non-selection level as soon as the program operation is completed. During this time (= Tx), the Scan signal is maintained at the selection level, and the selection gate connection switch 100 is held in the ON state.

During this time, a current Id corresponding to the programmed voltage Vod flows through the drive transistor 104. The current Id is charged in the parasitic capacitor 108, and the source voltage Vs of the drive transistor 104 is increased again as shown in FIG. When this re-rise voltage is ΔV, ΔV can be expressed by the following equation.
ΔV = Tx * Id / Cd

  Here, if the time Tx and the capacitance value Cd of the parasitic capacitance 108 are common to all the pixels, ΔV is a function of the current Id.

As mentioned above, the saturation region current equation of TFT is
Id = μ * Cox * (W / L) * (Vgs-Vth) ²
Since the threshold voltage Vth has already been corrected in the period of T2,
Id = μ * Cox * (W / L) * Vod ²
It becomes.

  Therefore, ΔV is a voltage corresponding to μ * Cox * (W / L) of each driving transistor 104, and the voltage Vcs of the storage capacitor 102 is the gate-source voltage Vgs (as described above, Vgs = Vth + It is held at a voltage “Vth + Vod−ΔV” obtained by subtracting ΔV from (Vod). As a result, the μ deviation of the drive transistor 104 for each pixel is canceled. That is, ΔV increases as the mobility μ increases, and ΔV decreases as the mobility μ decreases. Therefore, the program voltage is corrected with this deviation.

In the period T4 shown in FIG. 18, a light emitting operation is performed. In the light emission operation period T4, the Scan signal becomes a non-selection level, and the selection gate connection switch 100 is turned off. The parasitic capacitance 108 of the OLED 106 is charged by the current Id flowing through the driving transistor 104 while the voltage across the holding capacitor 102 is held, and the source voltage Vs rises. Since the gate-source voltage Vgs of the drive transistor 104 is maintained at the program voltage, the source voltage Vs eventually exceeds the light emission threshold voltage Vf0 of the OLED 106, and the OLED 106 emits light.
JP-A-8-234683 JP 2003-255856 A JP 2003-271095 A JP 2007-310311 A

  However, the above conventional techniques have the following problems.

<Problem 1>

  In the technique disclosed in Patent Document 3, the gate-source voltage Vgs when the current Id becomes sufficiently small and the increase in the source voltage Vs stops is set as the threshold voltage Vth in the threshold voltage Vth detection operation. In this TFT, the voltage (Von) at which the current flows differs from the threshold voltage Vth in the saturation region current equation due to the current characteristics of the subthreshold region (here, the subthreshold region refers to a region below Vth).

  The overdrive voltage Vod set by the program operation in the period T3 is a voltage calculated from the saturation region current equation, and the voltage to be obtained in the threshold voltage Vth detection operation is not Von but Vth on the current equation. However, what is actually detected by the threshold voltage Vth detection operation by the technique of Patent Document 3 is a voltage Von different from the threshold voltage Vth on the current equation.

  This point will be described with reference to FIGS.

  FIG. 19 is a specific example of a graph showing the Vgs-Id characteristics of TFT. In this graph, the V axis is Vgs, the Y axis is Id, the Vgs-Id characteristic of a TFT having a small subthreshold region current is indicated by a bold line, and the Vgs-Id characteristic of a TFT having a large subthreshold region current is indicated by a thin line. Although the difference between the two is not clear in this graph, the difference between the two becomes clear when the relationship between the value obtained by taking the square root of the current Id and Vgs is graphed. FIG. 20 is a specific example of a graph showing Vgs-√Id characteristics. In this graph, the X axis is Vgs, the Y axis is √Id, and the Vgs-√Id characteristic of a TFT with a small subthreshold region current is indicated by a bold line, as in FIG. √Id characteristics are shown by thin lines. A straight line indicating the threshold voltage Vth on the saturation region current equation (a straight line for calculating the threshold voltage Vth) is indicated by a broken line.

  As is clear from FIG. 20, the threshold voltage indicated by the extrapolated X intercept of the straight line for calculating the threshold voltage Vth is Vth = 1.46V here. This value is the value that you want to set in the program operation. However, the current Id when Vgs = Vth differs depending on the current characteristics of the subthreshold region. That is, the voltage Von at which current actually flows is lower than Vth obtained by the calculation line of the threshold voltage Vth, and the value varies depending on the current characteristics in the subthreshold region (see Von1 and Von2 in FIG. 20).

  This is because, in the threshold voltage Vth detection operation in the conventional pixel circuit described above, in order to detect Vth instead of Von, the storage capacitor element when a predetermined time elapses before the rise of the source voltage Vs saturates. This means that the charging of 102 is stopped.

  This threshold voltage Vth detection period is determined by the current characteristics of the subthreshold region of the driving transistor 104 and the magnitude of the parasitic capacitance 108.

  Here, the relationship between the capacitance value of the parasitic capacitance 108 and the threshold voltage detection time for each current characteristic in the subthreshold region will be described with reference to FIGS. 21 and 22.

  FIG. 21 is a graph showing a specific example of the simulation result of the threshold voltage detection operation when the capacitance value Cd of the parasitic capacitance 108 is 2 pF and 4 pF with a TFT having a small subthreshold region current.

  FIG. 22 is a graph showing a specific example of a simulation result of the threshold voltage detection operation when the capacitance value Cd of the parasitic capacitance 108 is 2 pF and 4 pF in a TFT having a large subthreshold region current.

  In both graphs, the horizontal axis represents the threshold voltage Vth detection period t (s), and the vertical axis represents the gate-source voltage Vgs. In addition, the simulation result when the capacitance value Cd is 4 pF is indicated by a thick line, and the simulation result when the capacitance value Cd is 2 pF is indicated by a thin line. A broken line in the graph indicates a threshold voltage of 1.46V.

  As is clear from FIG. 21, in the case of a TFT with a small subthreshold region current, the threshold voltage detection time is about 50 μs in all cases, and the threshold voltage detection time does not change even if the capacitance value Cd of the parasitic capacitance 108 changes. Since it does not change, a large error does not occur in the detected value of the threshold voltage Vth.

  On the other hand, as can be seen from FIG. 22, in the case of a TFT with a large subthreshold region current, the threshold voltage detection time is about 20 μs when the capacitance value Cd is 4 pF, but when the capacitance value Cd is 2 pF. The threshold voltage detection time changes greatly, and a large error occurs in the detection value of the threshold voltage Vth.

  From the above, it can be seen that when a TFT having a large subthreshold region current is used as the drive transistor 104 in the organic EL display device, the threshold voltage Vth detection period varies greatly according to the size of the parasitic capacitance 108.

The capacitance value of the parasitic capacitance 108 of the OLED 106 is usually about 150 to 300 pF / mm ² , but this value is mainly determined by the relative dielectric constant and film thickness of the organic light emitting material. Since the relative permittivity and the film thickness also change according to the color (RGB) of the OLED 106, the parasitic capacitance value differs for each color of the OLED 106.

  In general, in an active matrix organic EL display device, a line for each color in which pixels for each color of RGB are arranged in the column direction (Data line direction) is, for example, RGBRGB... In the row direction (Scan line direction). Arranged in this order. Since each pixel circuit on the same scan line is controlled at the same timing, the detection period of the threshold voltage Vth is common between RGB. However, as described above, in the case of the driving transistor 104 having a large subthreshold region current, the threshold voltage Vth detection time depends on the size of the parasitic capacitance 108 of the OLED 106, and therefore, a detection error of the threshold voltage Vth occurs due to RGB deviation. There is a problem that it will.

  Also in the pixel circuit performing μ correction described in Patent Document 4, ΔV = Tx * Id / Cd, and the RGB deviation of the parasitic capacitance 108 becomes an error factor.

  As a method of solving this problem, as shown in FIG. 23, there is a method of installing a correction capacitor 120 for each pixel so that the capacitance value connected to the source of the drive transistor 104 is the same between RGB. Although this may be mentioned, this leads to a decrease in OLED life due to a decrease in aperture ratio and an increase in cost due to a decrease in yield.

<Problem 2>

  The holding capacitor element 102 shown in FIG. 11 and FIG. 17 is a capacitance for holding the gate-source voltage Vgs during one display period. The gate leakage current of the driving transistor 104 and the selection gate connection switch 100 The required capacitance is determined by the off-current.

  In the conventional method, when the overdrive voltage Vod is applied to the gate in the program operation after detecting the threshold voltage Vth, it is assumed that the capacitance value Cs of the storage capacitor element 102 is sufficiently smaller than the capacitance value Cd of the parasitic capacitance 108. It was. However, if this assumption is not satisfied, the increase (= Vod) of the gate voltage Vg is not applied to the storage capacitor element 102 at the time of the program operation, and the voltage Vcs of the storage capacitor element 102 is the capacitance of the storage capacitor element 102. A value divided by the value Cs and the capacitance value Cd of the parasitic capacitance 108 is set, and a program error occurs.

That is, when the capacitance value Cs of the storage capacitor element 102 is so large that it cannot be ignored with respect to the capacitance value Cd of the parasitic capacitance 108, the source voltage Vs is
Vs = VB-Vth + Vod * Cs / (Cd + Cs)
The gate-source voltage Vgs is
Vgs = Vth + Vod * Cd / (Cs + Cd)
It becomes. This is set as a program voltage.

  If the capacitance value Cd of the parasitic capacitance 108 is reduced in the high-definition panel of the organic EL display device, it is necessary to reduce the capacitance value Cs of the storage capacitor element 102, which causes a deterioration of the storage characteristics.

  The present invention has been made in consideration of the above facts. In the method of setting the threshold voltage by the charging operation, the error caused by the color deviation of the parasitic capacitance of the light emitting element can be reduced with a simple circuit configuration, and the storage capacitor element. An object of the present invention is to provide a display device and a driving method capable of setting the capacitance value of the first and second capacitances independently of the parasitic capacitance of the light emitting element.

  The display device according to claim 1 is a plurality of pixel circuits arranged in a matrix, each of which includes a drive transistor, a light emitting element that emits reference color light according to the operation of the drive transistor, and the drive transistor A plurality of pixel circuits including a storage capacitor element connected between a gate and a source of the pixel, a switching capacitor provided for each column of the plurality of pixel circuits, and a switching element that is turned on / off in response to a signal from the outside, And a plurality of parallel circuits connected in parallel.

  As described above, since the parallel circuit in which the correction capacitor element and the switching element are connected in parallel is provided for each column of the pixel circuit, the charging operation is performed using both the parasitic capacitance of the light emitting element and the correction capacitor element, or The charging operation can be performed using only the correction capacitor element, and the threshold voltage of the driving transistor can be held in the storage capacitor element. The same applies when the mobility is corrected. Therefore, by designing the capacitance of the correction capacitive element provided for each column to a suitable value, errors due to the color deviation of the parasitic capacitance of the light emitting element can be reduced, and the capacitance value of the holding capacitive element can be emitted. It can be set regardless of the parasitic capacitance of the element. Because of the simple circuit configuration provided with the parallel circuit, the problem can be solved without complicating the pixel circuit and without reducing the aperture ratio and the yield.

  According to a second aspect of the present invention, there is provided a display device comprising: a plurality of scan lines arranged in parallel; a plurality of data lines arranged in parallel in a direction intersecting the plurality of scan lines; and each of the data lines. A plurality of source lines arranged in correspondence with each other, and a plurality of pixel circuits arranged corresponding to each of intersections of the plurality of scan lines and the plurality of data lines, each comprising a drive transistor, A light emitting element that emits reference color light in response to the operation of the driving transistor, a storage capacitor element connected between the gate and source of the driving transistor, one of the drain or source connected to the data line, and the drain or source A first transistor that is connected to the gate of the drive transistor and that is turned on and off in response to a scan signal from the scan line, and a drain Or a second transistor connected to the source line and having the other of the drain and the source connected to the source of the driving transistor and turned on / off in response to a scan signal from the scan line. A pixel circuit, a correction capacitor provided for each of the plurality of source lines, connected to the source line at one end, and supplied with a first fixed voltage at the other end, and a switching element that is turned on / off in response to an external signal And a plurality of parallel circuits connected in parallel.

  As described above, since the parallel circuit in which the correction capacitor element and the switching element are connected in parallel is provided for each of the plurality of source lines, that is, for each column of the pixel circuit, both the parasitic capacitance of the light emitting element and the correction capacitor element are used. The charging operation can be performed, or the charging operation can be performed using only the correction capacitor element, and the threshold voltage of the driving transistor can be held in the storage capacitor element. The same applies when the mobility is corrected. Therefore, by setting the capacitance of the correction capacitive element provided for each source line to a suitable value, errors due to the color deviation of the parasitic capacitance of the light emitting element can be reduced, and the capacitance value of the holding capacitive element can be emitted. It can be set regardless of the parasitic capacitance of the element. Because of the simple circuit configuration provided with the parallel circuit, the problem can be solved without complicating the pixel circuit and without reducing the aperture ratio and the yield.

  According to a third aspect of the present invention, in the display device according to the second aspect, each of the plurality of reference colors is caused to emit light by each of the light emitting elements, and the same reference color is provided along the extending direction of the plurality of data lines. A column of pixel circuits in which a plurality of the pixel circuits each having a light emitting element that emits light is arrayed repeatedly in a predetermined color order along the extending direction of the plurality of scan lines, and the capacitance of the correction capacitor element and the light emission The total of the parasitic capacitance of the element is made common among the pixel circuits that emit the plurality of reference color lights.

  According to such a configuration, even when the charging operation is performed using both the parasitic capacitance and the correction capacitance element of the light emitting element and the threshold voltage is set, the influence of the parasitic capacitance deviation between the reference colors is affected. High quality display can be realized at low cost. The reference color refers to, for example, the colors of the three primary colors of light (R (Red), G (Green), and B (Blue)).

  According to a fourth aspect of the present invention, in the display device according to the second aspect, the cathode of the light emitting element is grounded, and is turned on / off between the source of the driving transistor and the anode of the light emitting element according to an external signal. A third transistor is connected.

  According to such a configuration, the threshold voltage can be set by performing the charging operation using only the correction capacitive element without using the parasitic capacitance of the light emitting element, and the influence of the deviation of the parasitic capacitance between the reference colors. High quality display can be realized at low cost.

  Further, in the conventional technology, only the parasitic capacitance of the light emitting element is used for charging, and therefore the operation of detecting the threshold voltage only in the voltage region below the light emitting threshold voltage of the light emitting element (operation for holding the threshold voltage in the holding capacitor element). Since the mobility cannot be corrected, it is difficult to employ a driving transistor having a large variation in threshold voltage over time or a light emitting element having a small light emission threshold voltage. However, since the light emitting element can be separated from the driving transistor by the configuration in which the third transistor is provided as in the above invention, charging is performed using only the correction capacitor element without using the parasitic capacitance of the light emitting element. be able to. Therefore, it is possible to detect the threshold voltage and correct the mobility without depending on the light emission threshold voltage of the light emitting element, and it is possible to employ a driving transistor having a large variation in threshold voltage over time or a light emitting element having a small light emission threshold voltage, thereby Can be realized.

  According to a fifth aspect of the present invention, in the display device according to the second aspect, the anode of the light emitting element is connected to a power supply voltage, the cathode of the light emitting element is connected to the drain of the driving transistor, and the source of the driving transistor is A third transistor that is turned on / off in response to a signal from the outside is connected to the ground.

  In the prior art, since the parasitic capacitance of the light emitting element is used in the threshold voltage setting operation and the mobility correcting operation, the configuration of the pixel circuit is naturally limited to a so-called cathode common type in which the light emitting element is connected to the source of the driving transistor. Therefore, there is a problem that it cannot be applied to a so-called anode common type circuit in which a light emitting element is connected to the drain of the driving transistor. However, if a parallel circuit is provided as described above and the third transistor is connected between the source of the drive transistor and the ground, the threshold voltage setting operation and the mobility correction operation are performed by turning off the third transistor and causing the parasitic of the light emitting element. This can be performed using only the correction capacitor element without using the capacitor, and can also be applied to an anode common type circuit.

  Further, in the invention according to claim 5, as in the invention according to claim 4, since the charging operation is performed without using the parasitic capacitance of the light emitting element, the threshold voltage does not depend on the light emitting threshold voltage of the light emitting element. Detection and mobility correction, which is not affected by the parasitic capacitance deviation between the reference colors, can realize high-quality display at low cost, and has a large threshold voltage variation over time. In addition, a light emitting element having a small light emission threshold voltage can be adopted, and power saving can be realized.

  When the charging operation is performed using only the correction capacitance element without using the parasitic capacitance of the light emitting element as described above, the correction capacitance of each of the plurality of parallel circuits is provided as in the invention described in claim 6. The capacitance of the element can be made common.

  That is, since only the correction capacitance element is used without using the parasitic capacitance of the light emitting element, the capacitance of the correction capacitance element can be made common regardless of the parasitic capacitance between the reference colors, and the deviation of the parasitic capacitance between the reference colors can be reduced. The threshold voltage can be set and the mobility can be corrected without any influence.

  According to a seventh aspect of the present invention, in the display device according to the second or third aspect, the first transistor, the second transistor, and the switching element are turned on, and a second fixed voltage is applied to the data line. To discharge parasitic capacitances of the storage capacitor element and the light emitting element through the parallel circuit to reset a source voltage of the driving transistor, and to turn on the first transistor and the second transistor. The second fixed voltage is continuously supplied to the data line, and the parasitic capacitance of the light emitting element and the correction capacitance element are charged for a predetermined time in a state where the switching element is turned off. The threshold voltage is held in the holding capacitor element, and the ON state and the previous state of the first transistor and the second transistor are The switching element is kept off, and the voltage obtained by adding the overdrive voltage to the second fixed voltage is supplied to the data line, whereby the voltage obtained by adding the overdrive voltage to the threshold voltage is held. A control circuit for causing the light emitting element to emit light by causing a current to flow through the light emitting element using a voltage held in the holding capacitive element by holding the capacitor and turning off the first transistor and the second transistor Further provided.

  By providing such a control circuit, both the parasitic capacitance of the light emitting element and the correction capacitive element can be charged and the threshold voltage can be held in the holding capacitor element. The error caused by the color deviation of the parasitic capacitance of the light emitting element, which has occurred when used for the charging operation, can be reduced, and the capacitance value of the holding capacitor element can be set regardless of the parasitic capacitance of the light emitting element. Because of the simple circuit configuration provided with the parallel circuit, the problem can be solved without complicating the pixel circuit and without reducing the aperture ratio and the yield.

  According to an eighth aspect of the present invention, in the display device according to the seventh aspect, the control circuit further includes a predetermined time before the light emitting element emits light using the voltage held in the storage capacitor element. Only the ON state of the first transistor and the second transistor, the OFF state of the switching element, and the supply of the voltage obtained by adding the overdrive voltage to the second fixed voltage to the data line are continued. Thus, the mobility is corrected.

  According to such a configuration, since both the parasitic capacitance of the light emitting element and the correction capacitive element can be used in the mobility correction, the error due to the color deviation of the parasitic capacitance of the light emitting element can be reduced. In addition, the capacitance value of the storage capacitor element can be set regardless of the parasitic capacitance of the light emitting element. Because of the simple circuit configuration provided with the parallel circuit, the problem can be solved without complicating the pixel circuit and without reducing the aperture ratio and the yield.

  According to a ninth aspect of the present invention, in the display device according to any one of the fourth to sixth aspects, the first transistor, the second transistor, and the switching element are turned on, and the third transistor is turned on. By turning off and supplying a second fixed voltage to the data line, the storage capacitor element is discharged through the parallel circuit to reset the source voltage of the driving transistor, and the first transistor and the second transistor The correction capacitor element is charged for a predetermined time while the transistor is on, the third transistor is off, and the second fixed voltage is continuously supplied to the data line, and the switching element is off. By doing so, the threshold voltage of the driving transistor is held in the holding capacitor element, and the first transistor and the first transistor By supplying a voltage obtained by adding an overdrive voltage to the second fixed voltage to the data line while continuing the ON state of the transistor and the OFF state of the third transistor and the switching element, the threshold voltage The voltage obtained by adding the overdrive voltage to the holding capacitor element is held in the holding capacitor element, the first transistor and the second transistor are turned off, and the third transistor is turned on, thereby holding the voltage held in the holding capacitor element And a control circuit for causing the light emitting element to emit light by supplying a current to the light emitting element.

  By providing such a control circuit, it is possible to charge only the correction capacitor element and hold the threshold voltage in the holding capacitor element. Therefore, this occurs when only the parasitic capacitance of the light emitting element is used for the charging operation as in the past. The error caused by the color deviation of the parasitic capacitance of the light emitting element can be reduced, and the capacitance value of the holding capacitor element can be set regardless of the parasitic capacitance of the light emitting element. Because of the simple circuit configuration provided with the parallel circuit, the problem can be solved without complicating the pixel circuit and without reducing the aperture ratio and the yield.

  According to a tenth aspect of the present invention, in the display device according to the ninth aspect, the control circuit further includes a predetermined time before the light emitting element emits light using the voltage held in the storage capacitor element. Only, the ON state of the first transistor and the second transistor, the OFF state of the third transistor and the switching element, and the supply of the voltage obtained by adding the overdrive voltage to the second fixed voltage for the data line. The mobility is corrected by continuing the above.

  According to such a configuration, only the correction capacitor element can be used in the mobility correction, so that errors due to the color deviation of the parasitic capacitance of the light emitting element can be reduced, and the storage capacitor element The capacitance value can be set regardless of the parasitic capacitance of the light emitting element. Because of the simple circuit configuration provided with the parallel circuit, the problem can be solved without complicating the pixel circuit and without reducing the aperture ratio and the yield.

  A driving method according to an eleventh aspect of the present invention is the driving method for driving the display device according to any one of the first to third aspects, wherein the parallel circuit and the source of the driving transistor are electrically connected. In this state, by turning off the switching element and supplying a second fixed voltage to the gate of the driving transistor, the parasitic capacitance of the storage capacitor element and the light emitting element is discharged through the parallel circuit, The source voltage of the driving transistor is reset, the state where the parallel circuit and the source of the driving transistor are electrically connected, and the supply of the second fixed voltage to the gate of the driving transistor are continued, and the switching element In a state in which the drive capacitor is turned off, the drive capacitor is charged by charging the parasitic capacitance of the light emitting element and the correction capacitor element for a predetermined time. The threshold voltage of the transistor is held in the holding capacitor element, the state where the parallel circuit and the source of the driving transistor are electrically connected, and the state where the switching element is turned off are continued, and the second fixed voltage Is supplied to the gate of the drive transistor to hold the voltage obtained by adding the overdrive voltage to the threshold voltage in the storage capacitor element, and the source of the parallel circuit and the drive transistor Are electrically disconnected from each other, and a current is supplied to the light emitting element using a voltage held in the storage capacitor element to cause the light emitting element to emit light.

  According to such a method, since both the parasitic capacitance and the correction capacitance element of the light emitting element can be charged and the threshold voltage can be held in the holding capacitor element, only the parasitic capacitance of the light emitting element is charged as in the conventional method. The error due to the color deviation of the parasitic capacitance of the light emitting element, which has occurred in the case of the above, can be reduced, and the capacitance value of the holding capacitor element can be set irrespective of the parasitic capacitance of the light emitting element.

  A driving method according to a twelfth aspect of the invention is a driving method for driving the display device according to any one of the first and fourth to sixth aspects, wherein the parallel circuit and the source of the driving transistor are connected. In an electrically connected state, the switching element is turned off and a second fixed voltage is supplied to the gate of the driving transistor, so that the storage capacitor element is discharged through the parallel circuit. The source voltage was reset, the state where the parallel circuit and the source of the driving transistor were electrically connected, and the supply of the second fixed voltage to the gate of the driving transistor was continued, and the switching element was turned off In this state, the threshold voltage of the driving transistor is held in the storage capacitor by charging the correction capacitor for a predetermined time. And continuously driving the parallel circuit and the source of the drive transistor, and turning off the switching element, and driving the voltage obtained by adding an overdrive voltage to the second fixed voltage. By supplying to the gate of the transistor, a voltage obtained by adding the overdrive voltage to the threshold voltage is held in the holding capacitor element, and the parallel circuit and the source of the driving transistor are electrically separated, and the holding capacitor Using the voltage held in the element, a current is passed through the light emitting element to cause the light emitting element to emit light.

  According to such a method, since only the correction capacitor element can be charged and the threshold voltage can be held in the holding capacitor element, this occurs when only the parasitic capacitance of the light emitting element is used for the charging operation as in the prior art. In addition, it is possible to reduce an error caused by the color deviation of the parasitic capacitance of the light emitting element, and to set the capacitance value of the storage capacitor element regardless of the parasitic capacitance of the light emitting element. Up

  As described above, according to the present invention, in the method of setting the threshold voltage by the charging operation, the error due to the color deviation of the parasitic capacitance of the light emitting element is reduced with a simple circuit configuration, and the capacitance value of the storage capacitor element is set to the light emitting element. It has an excellent effect that it can be set regardless of the parasitic capacitance.

  Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a diagram showing an overall configuration of a display device 10 according to an embodiment of the present invention. FIG. 2 is a diagram illustrating an example of the pixel circuit 30 of each pixel included in the display device 10.

  The display device 10 is an active matrix driving type organic EL display device using a thin film transistor (TFT), and includes a scan driver 12 and a data driver 14 as shown in FIG. A plurality of row scan signal lines (hereinafter referred to as “Scan lines”) 16 connected to 12 and arranged in parallel, and a plurality of column data signals connected to the data driver 14 and arranged in parallel in a direction crossing the Scan lines 16 The display panel 60 includes a line 18 (hereinafter referred to as a Gdata line) and a plurality of pixel circuits 30 arranged at the intersection of the scan line 16 and the Gdata line 18. That is, the pixel circuits 30 are arranged in a matrix (matrix). In FIG. 1, only the pixel circuit 30 of one pixel is shown in the display panel 60.

  In the display device 10, the scan driver 12 gives a Scan signal to the Scan line 16 in the pixel selection period, and the data driver 14 gives the Gdata signal to the Gdata line 18 in the pixel selection period. Supply to circuit 30.

  As shown in FIG. 2, the pixel circuit 30 of each pixel includes a selection gate connection switch 32, a storage capacitor element 34, a drive transistor 36, a current-controlled organic light-emitting diode (OLED) 38, and an OLED 38. A parasitic capacitor 40 and a source connection switch 42 are provided.

  The selection gate connection switch 32 is formed of an N-type thin film transistor, and has a gate connected to the scan line 16, one of the drain and the source connected to the Gdata line 18, and the other of the drain and the source connected to the gate of the driving transistor 36. Has been.

  The storage capacitor element 34 is connected between the gate and source of the drive transistor 36.

  The drive transistor 36 is composed of an N-type thin film transistor, and has a gate connected to the source of the selection gate connection switch 32 and one end of the storage capacitor element 34, a drain connected to the power supply Vdd, and a source connected to the anode of the OLED 38. Yes.

  The anode of the OLED 38 is connected to the source of the driving transistor 36, and the cathode is grounded. The OLED 38 emits light with a luminance corresponding to the current of the driving transistor 36. The parasitic capacitance 40 is a parasitic capacitance between the electrodes of the OLED 38.

  The source connection switch 42 is composed of an N-type thin film transistor, and its gate is connected to the scan line 16, one of the drain and the source is connected to a source signal line (hereinafter referred to as Sdata line) 20, and the other of the drain or the source is driven. The source of the transistor 36 is connected.

  That is, the source of the drive transistor 36 is connected to the Sdata line 20 via the source connection switch 42.

  Further, the display device 10 is provided with a column common capacitance element 26 that is a capacitance element common to the pixel columns for each pixel column.

  One end of the column common capacitance element 26 is connected to the Sdata line 20, and the other end is connected to the VA line 24 that supplies a fixed voltage VA. A column common capacitance discharge switch 28 is connected in parallel to the column common capacitance element 26. The column common capacitance discharge switch 28 is formed of a thin film transistor, and has a gate connected to a reset line (Res line) 22 and is turned on / off in response to a Res signal supplied from the scan driver 12 via the Res line 22. In the present embodiment, the scan driver 12 provides a Res signal to the Res line 22 and also applies a fixed voltage VA to the VA line 24. Although the column common capacitance discharge switch 28 is a thin film transistor here, other switching elements may be used.

  In general, an active matrix organic EL display device is configured by sequentially arranging pixel circuits 30 of pixels composed of OLEDs that emit light of RGB colors, but the display device 10 according to the present embodiment is also the same. Configure.

  FIG. 3 is a diagram illustrating an arrangement example of each color pixel circuit and an arrangement example of the column common capacitance element 26 and the column common capacitance discharge switch 28 of the display device 10 according to the present embodiment. In FIG. 3, r, g, and b are attached to the end of the reference numeral 30 indicating the pixel circuit, and the pixel circuits for each color of RGB are distinguished and illustrated. Similarly, the end of the column common capacitance element 26 is also denoted by the reference numerals r, g, and b for distinction. Further, when the description is made without distinguishing between RGB, the suffixes r, g, and b are omitted.

  As shown in FIG. 3, the display device 10 according to the present embodiment is a device that displays a color image by emitting light of each color of RGB by the OLED 38 included in the pixel circuit 30 of each pixel, and emits the same color. Pixel circuits 50r, 50g, and 50b for each RGB color in which pixel circuits (30r, 30g, and 30b) are arranged along the column direction (Gdata line 18 extending direction) are arranged in the row direction (Scan line 16 extending direction). It is configured to be repeatedly arranged in a predetermined order (here, RGBRGB... In this order).

  Here, the capacitance value of the parasitic capacitance 40 of the OLED 38 is determined by the relative permittivity and the film thickness of the organic light emitting material, but the relative permittivity and the film thickness also vary depending on the color (RGB) of the OLED 38. The value is different for each color of the OLED 38. Accordingly, the detection period of the threshold voltage Vth of the drive transistor 36, which will be described later, originally fluctuates for each RGB, but each pixel circuit 30 on the same scan line 16 is controlled at the same timing. This detection period is made common between RGB. As a result, a detection error of the threshold voltage Vth occurs. In the present embodiment, column common capacitance elements 26r, 26g, and 26b are provided for each of the pixel columns 50r, 50g, and 50b, and due to the RGB deviation of the parasitic capacitance 40. The detection error of the generated threshold voltage Vth is corrected.

  Note that the column common capacitance elements 26r, 26g, and 26b have the same capacitance value between the pixel circuits 30r, 30g, and 30b, by adding the capacitance value Cd of the parasitic capacitance 40 and the capacitance value Cx of the column common capacitance element 26. A capacitance value Cx is set such that

That is, the capacitance value of the parasitic capacitance 40 of the R pixel circuit 30r is Cdr, the capacitance value of the column common capacitance element 26r corresponding to the R pixel column 50r is Cxr, and the capacitance value of the parasitic capacitance 40 of the G pixel circuit 30g. Is Cdg, the capacitance value of the column common capacitance element 26g corresponding to the G pixel column 50g is Cxg, the capacitance value of the parasitic capacitance 40 of the B pixel circuit 30b is Cdb, and the column common corresponding to the B pixel column 50b is common. When the capacitance value of the capacitive element 26b is Cxb,
Cdr + Cxr = Cdg + Cxg = Cdb + Cxb
The common capacitor elements 26r, 26g, and 26b are designed so that

  The column common capacitance element 26 and the column common capacitance discharge switch 28 need to be installed between the Sdata line and the VA line. These can be composed of a driver IC and a capacitor component. In this embodiment, the column common capacitance element 26 is provided at the intersection of the Sdata line 20 and the VA line 24, and the column common capacitance discharge switch 28 is provided with a TFT. It consists of. Thereby, there is an advantage that the cost is not increased and the outer shape of the organic EL panel is not greatly enlarged.

  Hereinafter, the operation of the pixel circuit 30 of the present embodiment will be described. FIG. 4 is a diagram illustrating voltage waveform examples during the operation period of the pixel circuit 30 of the present embodiment, where Vs is the source voltage of the drive transistor 36 and Vgs is the gate-source voltage of the drive transistor 36.

  A period from T1 to T4 shown in FIG. 4 is a period indicating one display period of the pixel circuit 30, and a period before T1 in FIG. 4 indicates a previous display period. Therefore, in the previous display period, the voltage value applied to the Gdata line 18, the source voltage Vs of the drive transistor 36, and the gate-source voltage Vgs of the drive transistor 36 are voltages corresponding to the previous display period. Here, the value is not particularly specified, and the voltage range is shown by shading.

  5 to 8 are diagrams schematically showing ON / OFF states and current flows of the selection gate connection switch 32, the source connection switch 42, and the column common capacitance discharge switch 28 in each operation period described below. .

  In general, a program operation for setting a voltage in the storage capacitor element 34 is performed in units of one row. However, the same operation is performed in the present embodiment.

  During the period T1 shown in FIG. 4, a reset operation is performed. In the reset operation period T1, the scan signal is set to H level by the scan driver 12. As a result, as shown in FIG. 5, the selection gate connection switch 32 and the source connection switch 42 are turned on, the gate of the drive transistor 36 is connected to the Gdata line 18, and the source is connected to the Sdata line 20.

  In this state, the data driver 14 applies the voltage VB as the Gdata signal to the Gdata line 18. As a result, the voltage VB is supplied to the gate of the drive transistor 36.

  Further, the scan driver 12 supplies an H level Res signal to the Res line 22 to turn on the column common capacitance discharge switch 28 as shown in FIG. At this time, since the fixed voltage VA is supplied to the VA line 24 by the scan driver 12, the potential of the Sdata line 20 is fixed to VA. This voltage VA is supplied to the source of the drive transistor 36, the storage capacitor element 34, and the OLED 38 via the Sdata line 20.

  Thus, the gate voltage Vg of the drive transistor 36 is reset to the voltage VB, the source voltage Vs is reset to the voltage VA, and the gate-source voltage Vgs is reset to VB-VA.

Here, if the correction range of the threshold voltage Vth of the drive transistor 36 is Vthmin (lower limit value) to Vthmax (upper limit value), some current Id is caused to flow through the drive transistor 36, and the current Id is caused to flow in the direction of the Sdata line 20. The voltage VB applied to the gate of the drive transistor 36 is
VB> VA + Vthmax
The voltage satisfying the following conditions. Thereby, the current Id flows as shown by the dotted line in FIG.

Further, when the emission threshold voltage of the OLED 38 is Vf0 and the difference between Vthmin and Vthmax is ΔVth, the parasitic capacitance 40 of the OLED 38 is discharged, so the voltage VA is
VA <Vf0-ΔVth
The voltage satisfying the following conditions. In general, there is no problem with VA = 0v. However, when ΔVth is small, setting a high voltage for VA can shorten the OLED light emission transition time. Conversely, when ΔVth is large, a low voltage (negative voltage) is used for VA. Need to be set).

  With the above operation, a current flows in the pixel circuit 30 in the direction indicated by the dotted line in FIG. 5, and the storage capacitor element 34 and the parasitic capacitor 40 are discharged.

  In the period T2 shown in FIG. 4, the threshold voltage detection operation is performed. When the period of T1 ends and the period of T2 starts, the Res signal is set to L level by the scan driver 12, and the column common capacitance discharge switch 28 is turned off as shown in FIG. Further, the selection gate connection switch 32 and the source connection switch 42 are kept on.

Here, the gate-source voltage Vgs is
Vgs = Vg-Vs = VB-VA> Vthmax
Therefore, the current Id flows through the drive transistor 36 (see the dotted line in FIG. 6). The parasitic capacitance 40 and the column common capacitive element 26 are charged by this current Id, and the source voltage Vs (= potential of the Sdata line 20) of the drive transistor 36 rises.

  Further, since the gate voltage Vg of the drive transistor 36 is a VB fixed voltage, the gate-source voltage Vgs gradually decreases and the current Id decreases as the source voltage Vs increases. In this process, the gate-source voltage Vgs of the driving transistor 36 gradually approaches the threshold voltage Vth. Then, the threshold voltage Vth detection operation is stopped when a preset charging time has elapsed. In this embodiment, since the total value of the capacitance values of the parasitic capacitance 40 and the column common capacitance element 26 is constant in each pixel column as described above, even if the Vth detection operation is completed in a certain time, the deviation between RGB is not the same. Does not occur.

At this time, the gate voltage Vg is VB, and the source voltage Vs is VB-Vth. Therefore, the voltage VB applied to the gate voltage Vg is set so that the source voltage Vs is equal to or lower than the light emission threshold voltage Vf0 of the OLED 38 so that the OLED 38 does not emit light during the period T2.
VB <Vf0 + Vthmin
Set to.

  In the period T3 shown in FIG. 4, a so-called program operation is performed in which the holding capacitor element 34 holds a voltage for causing a current to flow through the driving transistor 36. In order to pass a current through the drive transistor 36, it is necessary to apply a voltage (overdrive voltage Vod: Vod = Vgs−Vth) that is more excessive than the threshold voltage Vth. Therefore, at the start of the program operation period T3, as shown in FIG. 7, the Gdata signal voltage of the Gdata line 18 is stepped up from VB to VB + Vod. Therefore, the gate voltage Vg of the drive transistor 36 is VB + Vod.

Further, since the source voltage Vs is a divided voltage of the storage capacitor element 34, the parasitic capacitor 40, and the column common capacitor element 26, the capacitance value of the storage capacitor element 34 is Cs, and the capacitance value of the parasitic capacitor 40 is Cd. When the capacitance value of the capacitive element 26 is Cx, the source voltage Vs of the driving transistor 36 at this time is
Vs = (VB-Vth) + Vod * Cs / (Cd + Cx + Cs)
It becomes.

However, the total value of the capacitance value Cd of the parasitic capacitance 40 and the capacitance value Cx of the column common capacitance element 26 (even if the capacitance value Cs of the storage capacitance element 34 is not so small as compared with the capacitance value Cd of the parasitic capacitance 40). Is sufficiently smaller (Cs << Cd + Cx), the source voltage Vs is substantially equal to “VB−Vth”. Therefore, the gate-source voltage Vgs of the drive transistor 36 is approximately
Vgs = Vg-Vs = (VB + Vod)-(VB-Vth) = Vth + Vod
Thus, a voltage obtained by adding the overdrive voltage Vod to the threshold voltage Vth detected in the threshold voltage detection operation period T2 is set in the storage capacitor 34 positioned between the gate and the source of the drive transistor 36. The voltage set here is called a program voltage.

The drive transistor 36 follows the TFT current equation,
Id = μ * Cox * (W / L) * (Vgs-Vth) ² = μ * Cox * (W / L) * Vod ²
(Μ is the mobility, Cox is the capacitance per unit area of the gate insulating film, W is the channel width, and L is the channel length)
Current Id flows out.

  After the completion of the program operation (the second half of the period T3 shown in FIG. 4), the mobility μ is corrected to correct the program voltage.

  Specifically, the Scan signal is maintained at the H level for a predetermined time (= Tx) after the completion of the program operation, and the selection gate connection switch 32 and the source connection switch 42 are held in the ON state.

During this time, a current Id corresponding to the programmed voltage Vod flows through the drive transistor 36. The current Id is charged in the parasitic capacitance 40 and the column common capacitance element 26, and the source voltage Vs of the drive transistor 36 rises again as shown in FIG. When this re-rise voltage is ΔV, ΔV can be expressed by the following equation.
ΔV = Tx * Id / (Cd + Cx)
Here, since the times Tx and Cd + Cx are common to all the pixels, ΔV is a function of the current Id.

As mentioned above, the saturation region current equation of TFT is
Id = μ * Cox * (W / L) * (Vgs-Vth) ²
Since the threshold voltage Vth has already been corrected in the period of T2,
Id = μ * Cox * (W / L) * Vod ²
It becomes.

  Therefore, ΔV is a voltage corresponding to μ * Cox * (W / L) of each driving transistor 36, and the voltage Vcs of the storage capacitor element 34 includes the gate-source voltage Vgs (Vgs = Vth as described above). The voltage “Vth + Vod−ΔV” obtained by subtracting ΔV from (Vod +) is held. Thereby, the program voltage is corrected and the μ deviation of the drive transistor 36 for each pixel is canceled.

  This μ correction operation is effective when the μ deviation of the TFT causes a display luminance unevenness in LPTS or the like, and is not necessary for a TFT having a small μ deviation such as a-Si (amorphous silicon) or inorganic oxide film. .

  In the period T4 shown in FIG. 4, a light emitting operation is performed. As will be described later, during this period, the selection gate connection switch 32 is turned off and the pixel circuit 30 and the Gdata line 18 are electrically disconnected, so that the potential of the Gdata line 18 affects the light emission operation in the current display period. do not do. For this reason, here, the Gdata signal voltage is not particularly specified, and the voltage range is shown by shading.

  In the light emission operation period T4, the scan signal is set to L level by the scan driver 12, and the selection gate connection switch 32 and the source connection switch 42 are turned off as shown in FIG. Thereby, the pixel circuit 30 and the Gdata line 18 and the Sdata line 20 are electrically disconnected.

  Further, the source voltage Vs rises due to the current Id flowing through the drive transistor 36 while the voltage across the storage capacitor 34 is held. Since the gate-source voltage Vgs of the drive transistor 36 maintains the program voltage (Vod + Vth), the source voltage Vs eventually exceeds the light emission threshold voltage Vf0 of the OLED 38, and the OLED light emission operation at a constant current is performed. The

  As described above, since the column common capacitive element 26 is provided for each pixel column 50, detection error of the threshold voltage Vth due to RGB deviation can be prevented. Even when the capacitance value Cs of the storage capacitor element 34 is not sufficiently small with respect to the capacitance value Cd of the parasitic capacitor 40 of the OLED 38, the capacitance value Cd of the parasitic capacitor 40 can be obtained by adding the column common capacitor element 26. Thus, the capacitance value Cs of the storage capacitor element 34 can be made sufficiently smaller than the total value of the capacitance values Cx of the column common capacitor element 26, and the occurrence of programming errors can also be prevented.

  In the above embodiment, one column common capacitive element 26 is provided for each pixel column 50 instead of for each pixel. This is because the program operation is executed at only one row (only pixels connected to one scan line) at the same timing, and the object can be achieved only by providing a common capacitor element in the column. Compared with the case where a capacitor is provided for each pixel, the cost can be reduced.

  Further, by providing the column common capacitance element 26 for each pixel column 50 as described above, a TFT having a large variation with time in the threshold voltage Vth is adopted as the driving transistor 36, or the OLED 38 is replaced with an OLED having a small light emission threshold voltage Vf0. You can also This advantage will be described in detail.

In the period T2 and the period T3, the threshold voltage Vth detection and the μ correction operation need to be performed in the region of Vs <Vf0 so that the OLED does not emit light. Therefore, the voltage VA and the voltage VB are as shown below. It is necessary to set to satisfy.
VA <Vf0-ΔVth
VB <Vf0 + Vthmin

  Therefore, when an OLED with a low light emission threshold voltage Vf0 is used, or when a TFT with a large Vth and ΔVth is used as a driving transistor, the voltage VA needs to be set low, and a negative voltage may be used in some cases. Become. In the prior art, the column common capacitance element 26 is not provided, and the charging operation using the current Id during the threshold voltage Vth detection operation or the μ correction operation is performed using only the parasitic capacitance of the OLED. It has been difficult to employ a TFT having a large threshold voltage Vth variation over time or an OLED having a small light emission threshold voltage Vf0.

  On the other hand, by providing the column common capacitive element 26 in each pixel column 50, the column common capacitive element 26 can be used in place of the parasitic capacitance of the OLED for the charging operation during the period T2 and T3. There are no restrictions.

  In the above-described embodiment, the charging operation is performed using both the parasitic capacitance 40 of the OLED 38 and the column common capacitance element 26. In this state, only the column common capacitance element 26 is used without using the parasitic capacitance 40 of the OLED 38. Therefore, the OLED isolation switch 44 is connected between the source of the driving transistor 36 and the anode of the OLED 38 in the above embodiment as in the circuit configuration shown in FIG. The OLED isolation switch 44 is formed of a thin film transistor, and its gate is connected to the control line 46 and is turned on / off in response to a control signal supplied from the scan driver 12 via the control line 46. Then, the OLED isolation switch 44 is turned off during the period T1, T2, and T3 to electrically disconnect the OLED 38 from the pixel circuit 30, and the OLED isolation switch 44 is turned on and connected to the source of the drive transistor 36 during the period T4. Other controls are the same as in the above embodiment. In FIG. 9, the components given the same reference numerals as those in FIG. 2 are the same components as those in FIG. 2. However, in the circuit configuration shown in FIG. 9, all the column common capacitive elements 26 are designed to have the same capacitance value. This is because the parasitic capacitance 40 is not used for the charging operation of T2 and T3.

With this configuration, the Vf0 term can be excluded from the VA and VB setting conditions, and the following conditions
VB-VA> Vthmin + ΔVth
You just have to meet it. Therefore, it is possible to control only with the positive power supply voltage, and it is possible to employ a TFT having a large variation with time in the threshold voltage Vth as the driving transistor 36, or to make the OLED 38 an OLED having a small light emission threshold voltage Vf0.

  In the prior art, since the parasitic capacitance of the OLED is used, the pixel circuit 30 is naturally limited to a so-called cathode common type in which the OLED is connected to the source of the driving transistor, and the OLED is connected to the drain of the driving transistor. There is a problem that it cannot be applied to a so-called common anode type circuit. However, by providing the column common capacitance element 26 as in the above embodiment, it can be applied to an anode common type circuit.

  FIG. 10 is a diagram showing a specific example of the anode common type pixel circuit 30 in the case where the column common capacitance element 26 is provided. In FIG. 10, components given the same reference numerals as those in FIG. 2 are the same components as those in FIG. 2. Again, each of the column common capacitive elements 26 is designed to have the same capacitance value. This is because the parasitic capacitance 40 is not used for the charging operation of T2 and T3.

  As shown in FIG. 10, a charge control switch 48 is provided between the source of the driving transistor 36 and the ground in the above embodiment, the cathode of the OLED 38 is connected to the drain side of the driving transistor 36, and the power supply voltage is connected to the anode of the OLED 38. Vdd is connected. The charge control switch 48 is formed of a thin film transistor, and its gate is connected to the control line 49 and is turned on / off in response to a control signal given from the scan driver 12 via the control line 49. A column common capacitive element 26 is provided at the end of the Sdata line 20, and the charging control switch 48 is turned off during the charging operation by the column common capacitive element 26. More specifically, the charge control switch 48 is turned off during the period T1, T2, T3, and the charge control switch 48 is turned on during the period T4. Other controls are the same as in the above embodiment. Thus, the OLED 38 is not involved during discharging or charging, and the OLED 38 is involved only during the light emitting operation.

  With this configuration, even the anode common type circuit can perform the threshold voltage Vth detection operation and the μ correction operation without any problem.

It is a figure which shows the whole structure of the display apparatus which concerns on one Embodiment of this invention. It is a figure which shows an example of the pixel circuit of each pixel contained in the display apparatus which concerns on embodiment. It is a figure which shows the example of arrangement | positioning of the pixel of each color of the display apparatus which concerns on embodiment, and the example of arrangement | positioning of a column common capacity | capacitance element and a column common capacity | capacitance discharge switch. It is a figure which shows the voltage waveform example during the operation period of the pixel circuit of embodiment. It is a figure which shows typically the on-off state and current flow of a selection gate connection switch, a source connection switch, and a column common capacity | capacitance discharge switch during reset operation. It is a figure which shows typically the on-off state and current flow of a selection gate connection switch, a source connection switch, and a column common capacity | capacitance discharge switch during threshold voltage detection operation. It is a figure which shows typically the on-off state and electric current flow of a selection gate connection switch during a program operation, a source connection switch, and a column common capacity | capacitance discharge switch. It is a figure which shows typically the on-off state and current flow of a selection gate connection switch, a source connection switch, and a column common capacity | capacitance discharge switch in light emission operation | movement. It is a figure which shows the modification of a pixel circuit. It is a figure which shows the modification of a pixel circuit. It is a figure which shows the conventional pixel circuit structure. It is a figure which shows the voltage waveform example in the operation period of the conventional pixel circuit. It is a figure which shows typically the ON / OFF state and current flow of a selection gate connection switch and a reset switch during the conventional reset operation. It is a figure which shows typically the ON / OFF state of a selection gate connection switch and a reset switch during threshold voltage detection operation | movement, and the flow of an electric current. It is a figure which shows typically the ON / OFF state of a selection gate connection switch during a program operation, and a reset switch, and the flow of an electric current. It is a figure which shows typically the ON / OFF state of a selection gate connection switch and reset switch during light emission operation | movement, and the flow of an electric current. It is a figure which shows the conventional pixel circuit structure which performs micro correction | amendment operation | movement. It is a figure which shows the voltage waveform example during the operation | movement period of the conventional pixel circuit which performs micro correction | amendment operation | movement. It is a specific example of the graph which shows the Vgs-Id characteristic of TFT. It is a specific example of a graph showing the Vgs-√Id characteristics of TFT. 10 is a graph showing a specific example of a simulation result of threshold voltage detection operation in the case where the capacitance value Cd of the parasitic capacitance is 2 pF and 4 pF with a TFT having a small subthreshold region current. 6 is a graph showing a specific example of a simulation result of a threshold voltage detection operation when a parasitic capacitance value Cd is 2 pF and 4 pF with a TFT having a large subthreshold region current. It is an example of a circuit configuration in the case where a correction capacitor is installed for each pixel so that the capacitance value connected to the source of the driving transistor is the same between RGB.

Explanation of symbols

10 Display Device 12 Scan Driver 14 Data Driver 16 Row Scan Signal Line (Scan Line)
18 column data signal line (Gdata line)
20 Source signal line (Sdata line)
22 Reset line (Res line)
24 VA line 26 column common capacitor 28 column common capacitor discharge switch 30 pixel circuit 32 selection gate connection switch 34 holding capacitor 36 drive transistor 38 OLED
40 Parasitic capacitance 42 Source connection switch 44 OLED isolation switch 46 Control line 48 Charge control switch 49 Control line 50 Pixel column

Claims (12)

A plurality of pixel circuits arranged in a matrix, each connected between a driving transistor, a light emitting element that emits reference color light according to the operation of the driving transistor, and a gate and a source of the driving transistor. A plurality of pixel circuits including a storage capacitor element;
A plurality of parallel circuits that are provided for each column of the plurality of pixel circuits, and in which a correction capacitance element and a switching element that is turned on and off in response to an external signal are connected in parallel;
A display device comprising: A plurality of scan lines arranged in parallel;
A plurality of data lines arranged in parallel in a direction intersecting the plurality of scan lines;
A plurality of source lines each arranged corresponding to each of the data lines;
A plurality of pixel circuits arranged corresponding to each of intersections of the plurality of scan lines and the plurality of data lines,
Driving transistor,
A light emitting element that emits reference color light according to the operation of the driving transistor;
A storage capacitor connected between a gate and a source of the driving transistor;
One of a drain and a source is connected to the data line, and the other of the drain and the source is connected to a gate of the driving transistor, and the first transistor is turned on / off in response to a scan signal from the scan line; A second transistor having one of its sources connected to the source line and the other of its drain or source connected to the source of the driving transistor and turned on and off in response to a scan signal from the scan line;
A plurality of pixel circuits including:
A correction capacitance element provided for each of the plurality of source lines, connected to one end of the source line and supplied with the first fixed voltage to the other end, and a switching element that is turned on / off in response to an external signal are connected in parallel. A plurality of parallel circuits,
A display device comprising: Each of the plurality of reference colors is caused to emit light by each of the light emitting elements,
A column of pixel circuits in which a plurality of the pixel circuits having light emitting elements that emit light of the same reference color along the extending direction of the plurality of data lines is arranged along the extending direction of the plurality of scan lines. Are arranged in order of colors,
The display device according to claim 2, wherein a sum of a capacitance of the correction capacitor element and a parasitic capacitor of the light emitting element is made common among the pixel circuits that emit the plurality of reference color lights. Grounding the cathode of the light emitting element;
The display device according to claim 2, wherein a third transistor that is turned on / off in response to an external signal is connected between a source of the driving transistor and an anode of the light emitting element. Connecting the anode of the light emitting element to a power supply voltage, connecting the cathode of the light emitting element to the drain of the driving transistor,
A third transistor that is turned on and off in response to an external signal is connected between the source of the driving transistor and the ground;
The display device according to claim 2. The display device according to claim 4, wherein each of the plurality of parallel circuits has a common correction capacitance element. By turning on the first transistor, the second transistor, and the switching element, and supplying a second fixed voltage to the data line, the storage capacitor element and the light emitting element are connected via the parallel circuit. Discharging parasitic capacitance to reset the source voltage of the driving transistor;
The parasitic capacitance and the correction capacitance of the light emitting element are maintained in a state where the ON state of the first transistor and the second transistor and the supply of the second fixed voltage to the data line are continued and the switching element is turned off. By charging the element for a predetermined time, the threshold voltage of the driving transistor is held in the storage capacitor element,
The on-state of the first transistor and the second transistor and the off-state of the switching element are continued, and a voltage obtained by adding an overdrive voltage to the second fixed voltage is supplied to the data line. A voltage obtained by adding the overdrive voltage to a threshold voltage is held in the holding capacitor element,
3. A control circuit is further provided for turning off the first transistor and the second transistor to cause the light-emitting element to emit light by causing a current to flow through the light-emitting element using a voltage held in the storage capacitor element. Or the display apparatus of Claim 3. The control circuit further includes:
Before the light emitting element emits light using the voltage held in the storage capacitor element, the first transistor and the second transistor are turned on for a predetermined time, and the switching element is turned off. The display device according to claim 7, wherein mobility is corrected by continuing to supply a voltage obtained by adding the overdrive voltage to the second fixed voltage to the data line. The first transistor, the second transistor, and the switching element are turned on, the third transistor is turned off, and a second fixed voltage is supplied to the data line. Discharging the storage capacitor element to reset the source voltage of the drive transistor;
While continuing the ON state of the first transistor and the second transistor, the OFF state of the third transistor, and the supply of the second fixed voltage to the data line, the switching element is turned off, By charging the correction capacitor element for a predetermined time, the threshold voltage of the driving transistor is held in the holding capacitor element,
The on state of the first transistor and the second transistor and the off state of the third transistor and the switching element are continued, and a voltage obtained by adding an overdrive voltage to the second fixed voltage is applied to the data line. By supplying the voltage, the storage capacitor element holds a voltage obtained by adding the overdrive voltage to the threshold voltage,
By turning off the first transistor and the second transistor and turning on the third transistor, a current is supplied to the light emitting element using the voltage held in the storage capacitor element, and the light emitting element emits light. The display device according to claim 4, further comprising a circuit. The control circuit further includes:
Before the light emitting element emits light using the voltage held in the holding capacitor element, the ON state of the first transistor and the second transistor, the third transistor, and the switching element for a predetermined time. The display device according to claim 9, wherein the mobility correction is performed by continuing the off state and the supply of the voltage obtained by adding the overdrive voltage to the second fixed voltage to the data line. A driving method for driving the display device according to claim 1,
In a state where the parallel circuit and the source of the driving transistor are electrically connected, the switching element is turned off and a second fixed voltage is supplied to the gate of the driving transistor. The parasitic capacitance of the storage capacitor element and the light emitting element is discharged to reset the source voltage of the driving transistor,
In a state where the parallel circuit and the source of the driving transistor are electrically connected, and the supply of the second fixed voltage to the gate of the driving transistor is continued and the switching element is turned off, the light emitting element By charging the parasitic capacitor and the correction capacitor element for a predetermined time, the threshold voltage of the drive transistor is held in the holding capacitor element,
The state in which the parallel circuit and the source of the driving transistor are electrically connected and the state in which the switching element is turned off are continued, and a voltage obtained by adding an overdrive voltage to the second fixed voltage is applied to the driving transistor. By supplying to the gate, the storage capacitor element holds a voltage obtained by adding the overdrive voltage to the threshold voltage,
A driving method of causing the light emitting element to emit light by electrically separating the parallel circuit and the source of the driving transistor and causing a current to flow through the light emitting element using a voltage held in the storage capacitor element. A driving method for driving the display device according to any one of claims 1 and 4 to 6,
In a state where the parallel circuit and the source of the driving transistor are electrically connected, the switching element is turned off and a second fixed voltage is supplied to the gate of the driving transistor. Discharging the storage capacitor element to reset the source voltage of the drive transistor;
In the state where the parallel circuit and the source of the driving transistor are electrically connected, and the second fixed voltage is continuously supplied to the gate of the driving transistor, and the switching element is turned off, the correction capacitor By charging the element for a predetermined time, the threshold voltage of the driving transistor is held in the storage capacitor element,
The state in which the parallel circuit and the source of the driving transistor are electrically connected and the state in which the switching element is turned off are continued, and a voltage obtained by adding an overdrive voltage to the second fixed voltage is applied to the driving transistor. By supplying to the gate, the storage capacitor element holds a voltage obtained by adding the overdrive voltage to the threshold voltage,
A driving method of causing the light emitting element to emit light by electrically separating the parallel circuit and the source of the driving transistor and causing a current to flow through the light emitting element using a voltage held in the storage capacitor element.

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