JP2009231324A - Stencil mask and method of manufacturing the same - Google Patents

Abstract

There is a need for a microcapsule type electrophoretic display panel that is difficult to peek and has good display performance.
A part of the reinforcing layer in the multilayer membrane layer composed of the reinforcing layer and the membrane layer in the opening from which the supporting substrate layer in the stencil mask composed of the supporting layer, the reinforcing layer and the membrane layer is removed is formed. The membrane layer opening made of the removed membrane layer has an area larger than the stencil pattern region where the membrane layer is removed in a pattern, and the stencil pattern region is formed in the pattern region. In a stencil mask, a reinforcing layer and a membrane layer are both made of silicon, and a stencil mask and a method for manufacturing the stencil mask are provided.
[Selection] Figure 1

Description

  The present invention relates to a stencil mask and a manufacturing method thereof.

In recent years, research has been conducted on a charged particle beam transfer method using a stencil mask. The stencil mask transfer technique is a technique in which a stencil pattern is formed on a self-supporting thin film (membrane), and charged particles incident on the membrane are absorbed or scattered in the membrane and use charged particles that have passed through the stencil pattern.
One application process is an ion implantation process using a stencil mask in a semiconductor manufacturing process. In this implantation method, impurities are implanted into the process substrate through the opening pattern of the stencil mask, so that there is no need for a resist lithography process or a resist removal process compared to the conventional ion implantation process, and the process and apparatus cost can be reduced. Is possible. Furthermore, the process cost can be reduced by repeatedly using one stencil mask.

  However, in the stencil mask used in the ion implantation process, it is necessary to prevent thermal distortion at the time of ion implantation, and it is preferable to set the membrane thickness to, for example, 10 μm or more, depending on the incident energy to the mask and the membrane size. In the stencil mask, the implanted ions pass through the opening pattern formed in the self-supporting membrane, and the ions implanted onto the membrane are captured in the membrane, so that the ions can be implanted into a desired location on the substrate to be implanted. For this reason, the implantation process must be accurately controlled, and processing accuracy such as the opening size of the stencil pattern, the angle in the depth direction (taper angle), and the variation in the stencil mask surface is required.

  When a stencil pattern having an opening width w is processed on a membrane having a thickness t, it is generally advantageous that the aspect ratio A (= t / w) is small in order to satisfy the required processing accuracy. For example, when silicon is used for the membrane, it is desirable that A be 20 or less even if a Bosch process that excels in high aspect etching is used.

  In addition to the above ion implantation process, there is a transfer method using a stencil mask for electron beam lithography. In this method, there is an exposure apparatus called EBLITHO (manufactured by Holon Co., Ltd.) that can form a fine pattern with a low acceleration electron beam. Since this apparatus uses a low-acceleration electron beam, the membrane thickness can be made very thin, 500 nm to 2 μm, and a resist micropattern of several hundred nm or less can be formed in an area of 10 mm □ or more. According to this method, compared with photolithography and nanoimprinting, the method can be formed with a deeper depth of focus, which makes the lithography process easier. This feature is suitable for a process for forming a fine structure on the surface of an LED chip, and is expected to be applied to a process for increasing the brightness of an LED.

As for such a stencil mask, as in Patent Document 1, a multilayer composed of the reinforcing layer and the membrane layer in the opening from which the supporting substrate layer is removed in the stencil mask composed of a supporting layer, a reinforcing layer and a membrane layer. The membrane layer opening made of the membrane layer from which a part of the reinforcing layer in the membrane layer is removed has an area larger than the stencil pattern region where the membrane layer is provided in a pattern, and the inside of the pattern region A stencil mask forming a stencil pattern region is known.
JP 2003-37055 A

  In the case of an ion implantation mask, a membrane thickness of 10 to 20 μm is often used. The minimum aperture width that can be processed with high accuracy in a membrane having a thickness of 10 μm is about 0.5 μm.

  However, the opening size required in the ion implantation process may not only be 0.5 μm or less, but if the current is increased to improve the throughput, the thermal load on the mask increases, so the film thickness must also be increased. . Therefore, a stencil mask having a higher aspect ratio than the current pattern by increasing the film thickness is effective, but cannot be actually manufactured.

  In the same-size exposure using a low acceleration electron beam such as EBLITHO, the pattern size used in the optical member processing is often about the wavelength of the target light source or less, and the size is from several tens of nm to It is about 500 nm. Further, the fine patterns are arranged at a pitch about twice the size, and a fine pattern group is formed at a high density. In order to form such a fine pattern, a membrane thickness of about 0.5 to 2.0 μm is used. When a 100 nm pattern is formed on a 0.7 μm thick membrane, the width is 100 nm and the height is 700 nm. When a very weak stencil beam is formed and a pattern is arranged at a high density with a pitch of about twice the size, the membrane strength is greatly reduced. Such a decrease in strength causes problems such as membrane deformation and breakage during the use of a stencil mask or during fabrication.

  Therefore, it is possible to increase the membrane strength by increasing the film thickness, but it is impossible to form a high aspect pattern exceeding the processing limit. It is also possible to apply a material that is stronger than silicon, such as diamond, but it is very difficult to process diamond while forming a defect-free diamond layer and satisfying good processing accuracy. Therefore, it is not suitable for a member such as a mask that has severe defect control.

  Accordingly, the present invention has been made to solve the above-described problems, and an object thereof is to provide a stencil mask having improved mechanical strength and heat resistance and having excellent processing accuracy, and a method for manufacturing the stencil mask.

  The present invention according to claim 1 is directed to the reinforcing layer in the multilayer membrane layer including the reinforcing layer and the membrane layer in the opening from which the supporting substrate layer is removed in the stencil mask including the supporting layer, the reinforcing layer, and the membrane layer. The membrane layer opening made of the membrane layer from which a part of the membrane layer is removed has a larger area than the stencil pattern region from which the membrane layer is removed in a pattern, and the stencil pattern region is included in the pattern region. In the formed stencil mask, the stencil mask is characterized in that both the reinforcing layer and the membrane layer are made of silicon.

  According to a second aspect of the present invention, there is provided the stencil mask according to the first aspect, wherein the support layer includes a support substrate layer and an intermediate oxide film layer.

  The present invention according to claim 3 provides the stencil mask according to claim 1 or 2, wherein the thickness of the reinforcing layer is larger than the thickness of the membrane layer.

  The present invention according to claim 4 provides the stencil mask according to any one of claims 1 to 3, wherein an alignment mark is formed in a region where the reinforcing layer is exposed. To do.

  The present invention according to claim 5 is a method for manufacturing a stencil mask according to any one of claims 1 to 4, wherein a reinforcing layer patterning step for patterning only a blank reinforcing layer composed of a supporting layer and a reinforcing layer, A bonding process in which a membrane substrate composed of a support and a membrane layer is bonded so that the reinforcement layer and the membrane layer are in contact, a support removal process for removing the support, a membrane layer patterning process for patterning the membrane layer, and a support layer The present invention provides a method for producing a stencil mask characterized by comprising a support layer patterning step for patterning.

  The present invention according to claim 6 provides a stencil mask manufacturing method according to claim 5, wherein the support layer includes a support substrate layer and an intermediate oxide film layer. .

  The present invention according to claim 7 is the method for manufacturing the stencil mask according to claim 5 or 6, wherein in the step of exposing the stencil pattern, an alignment mark formed in a region where the reinforcing layer is exposed is used. The present invention provides a method for producing a stencil mask, wherein a stencil pattern is formed in accordance with the position of the membrane layer opening.

  According to the method of the present invention, the alignment accuracy of the two layers does not depend on the alignment accuracy of the bonding apparatus, but is determined by the overlay accuracy of the drawing apparatus. Therefore, a very good alignment accuracy of several nm can be easily realized. . Furthermore, since both the reinforcing layer and the membrane layer are made of silicon, membrane deformation due to internal stress does not occur. Therefore, the thickness t2 of the reinforcing layer can be made thicker than the thickness t1 of the membrane layer. Deformation can be suppressed.

  Since both the membrane layer and the reinforcing layer forming the multilayer membrane layer are made of silicon, the same etching technique can be used for both layers, and the etching process is easy without using a plurality of etching apparatuses. Furthermore, since the membrane deformation due to internal stress does not occur as compared with the case where a material different from silicon such as an oxide film is used as the reinforcing layer, the membrane layer can be kept flat.

  Hereinafter, the stencil mask of the present invention and the manufacturing method thereof will be described.

  First, the stencil mask of the present invention will be described with reference to the cross-sectional view of FIG. 1 and the planar positional relationship diagram of FIG. The stencil mask of the present invention has a multilayer membrane 3 comprising a reinforcing layer 2 having a thickness t2 and a membrane layer 1 having a thickness t1, and the multilayer membrane 3 is held on a support layer comprising an intermediate oxide film layer 4 and a support substrate layer 5. And the opening 6 having no support layer is formed. A part of the support layer in the opening is removed to form a membrane layer opening 7, and a stencil pattern region 8 in which the membrane layer is removed in a pattern is formed in the membrane layer opening 7.

  The membrane layer 1 and the reinforcing layer 2 are both made of silicon, so that the same material prevents warping by the two layers of the membrane layer 1 and the reinforcing layer 2, and no internal stress. Deformation is also minimized.

Further, both the membrane layer 1 and the reinforcing layer 2 are made of silicon, and the same etching technique can be used for both layers. Therefore, the etching process is easy without using a plurality of etching apparatuses. Furthermore, since an etching stopper layer such as an oxide film is unnecessary between the membrane layer and the reinforcing layer, membrane deformation due to internal stress of the etching stopper layer does not occur.

  Moreover, since the width of the membrane layer opening 7 can be made larger than the stencil pattern, the thickness t2 of the reinforcing layer 2 can be made thicker than the thickness t1 of the membrane layer 1. Thereby, by providing the thicker reinforcing layer 2, it is possible to prevent the membrane from rising in temperature and deformed when charged particles are irradiated onto the stencil mask as compared with the case where the reinforcing layer 2 is not provided.

  Furthermore, the mask of the present invention can be arbitrarily arranged so that the multilayer membrane region 9 does not overlap the stencil pattern region 8 as shown in the mask top view, and the area of the multilayer membrane region 9 in the opening 6 can be further increased. By increasing the size, it is possible to obtain a mask that is not easily deformed by heat or external force.

  A part of the upper surface of the wafer is provided with a region 10 where the reinforcing layer is exposed, and an alignment mark 11 is formed. By using this alignment mark 11, when the stencil pattern is exposed, alignment with respect to the membrane layer opening can be performed with high accuracy. In order to perform translation and rotation correction, it is desirable to arrange at least two alignment marks, and to increase the alignment accuracy, it is desirable to arrange more alignment marks.

  The width of the boundary region between the multilayer membrane region and the stencil pattern region depends on the overlay accuracy when aligning the stencil pattern with the membrane opening for exposure, but keeps the width of 1 μm or more in consideration of the process margin of the stencil mask. It is desirable.

  Hereinafter, as an example of the stencil mask of the present invention, an ion implantation stencil mask having a membrane layer thickness of 10 μm and a reinforcing layer thickness of 50 μm will be exemplified.

  First, a silicon on insulator substrate (hereinafter referred to as an SOI substrate) 12 having a diameter of 100 mmφ comprising a support body 5 having a thickness of 525 μm, an intermediate oxide film layer 4 having a thickness of 0.5 μm, and a reinforcing layer 2 having a thickness of 50 μm is prepared. (FIG. 3A). The material of the supporting substrate layer and the reinforcing layer was a silicon single crystal. The substrate size does not limit the present invention, and can be 3, 6, 8 inches, which is a size generally used in a wafer process.

Next, an electron beam sensitive resist 13 (PMMA (polymethylmethacrylate) positive resist, sensitivity: 300 μC / cm ² ) is formed on the reinforcing layer 2 by spin coating so as to have a film thickness of 3000 nm. After applying and irradiating the electron beam sensitive resist 15 with an electron beam so that the electron beam dose is 300 μC / cm ² , after development, the alignment resist pattern 14, the membrane layer opening resist pattern 15, and the back surface A registration resist mark 16 was obtained (FIG. 3B). By arranging a large number of registration resist patterns 14 in as wide a range as possible, the position coordinates on the SOI substrate can be measured with high accuracy, so that the positional deviation between the membrane layer opening and the stencil pattern region can be reduced.

  Next, etching is performed until the intermediate oxide film layer 4 is exposed by dry etching using a fluorocarbon-based mixed gas plasma with the same pattern as an etching mask, and after the electron beam sensitive resist layer 13 is peeled off by oxygen plasma, Washing was performed by washing with ammonia overwater or the like to obtain a patterned 10 mmΦ SOI substrate 19 in which the alignment pattern 17, the membrane layer opening 7 and the back surface alignment mark 18 were formed (FIG. 3C).

  Next, a membrane substrate 22 which is an SOI substrate having a diameter of 50 mmφ made of the membrane layer 1 having a thickness of 20 μm is formed on the support substrate layer 20 having a thickness of 525 μm and the intermediate oxide film layer 21 having a thickness of 1 μm. prepare. When there is no commercially available 50 mmΦ SOI substrate, a 50 mmΦ SOI substrate can be easily obtained by cutting out from a 100 mmΦ SOI substrate.

  Next, bonding is performed so that the surface of the membrane layer 1 of the 50 mmφ membrane substrate 22 and the surface of the reinforcing layer 2 of the patterned SOI substrate 19 are in contact with each other, and the centers of the substrates are overlapped. Bonding can be realized by activating the bonding surfaces of both substrates with vacuum plasma and bonding the bonding surfaces. In order to obtain sufficient adhesion, it is desirable to apply heating and pressure at 300 to 500 ° C. simultaneously with bonding. Further, since the support substrate layer 20 is shaved by polishing in a later step, it is desirable to make it thinner than 525 μm (FIG. 3D).

  Next, the supporting substrate layer 20 of the bonded membrane substrate 22 is removed to the intermediate oxide film layer 21 of the membrane substrate by polishing or etching, and then the intermediate oxide film layer 21 is removed by hydrofluoric acid (HF) etching. Thus, the membrane layer 1 is exposed. At this time, it is desirable to form a protective film layer such as a resist on the support substrate layer so that the alignment pattern 17 and the back surface alignment mark 18 on the patterned SOI substrate 19 are not damaged (FIG. 4E )).

Next, an electron beam sensitive resist 23 (PMMA (polymethylmethacrylate) positive resist, sensitivity: 300 μC / cm ² ) is applied on the membrane layer 1 to a thickness of 1000 nm (FIG. 4F). ).

Next, the alignment pattern 17 on the patterned SOI substrate 19 is detected by the electron beam drawing apparatus, and the electron beam sensitive resist is so positioned as to be in the same position as the membrane layer opening 7 on the patterned SOI substrate. The implantation resist stencil pattern region 24 is obtained by irradiating the electron beam on the surface 23. At this time, the electron beam irradiation dose is 300 μC / cm ² (FIG. 4G).

  Next, etching is performed up to the membrane opening of the patterned SOI substrate 19 by dry etching using a fluorocarbon-based mixed gas plasma using the resist stencil pattern for implantation as an etching mask, and the resist layer is peeled off by oxygen plasma, and ammonia is removed. After cleaning by RCA cleaning such as excess water, an injection stencil pattern region 8 was obtained (FIG. 4 (h)).

  Since the alignment pattern is detected by the electron beam drawing apparatus and the implantation pattern of the SOI layer is formed, the positional deviation between the implantation stencil pattern and the membrane layer opening is at least about 2 nm, which is the limit of positional accuracy measurement. . Here, the positional deviation is a relative deviation between the two pattern centers. Further, even when the SOI substrate adheres on the alignment mark at the time of bonding and a part of the alignment mark cannot be observed, an approximate plane is calculated from the coordinate information of the remaining marks, and the SOI in the drawing apparatus is obtained. The distortion of the base can be calculated. Therefore, even if the bonding accuracy is about 15 μm, the positional deviation can be several tens nm or less at maximum.

  Next, a photoresist is applied on the support substrate layer 5 of the patterned SOI substrate 19 with a spinner or the like to form a photosensitive layer 25 having a thickness of 50 μm, and patterning processing such as pattern exposure and development is performed to form a membrane. An opening resist pattern 26 is formed. At this time, the alignment between the substrate and the photomask for exposure of the membrane opening resist pattern at the time of pattern exposure uses the back surface alignment mark 18 and the alignment mark of the photomask (FIG. 5 (i)).

  Next, a part of the support substrate layer 5 is etched by dry etching using a fluorocarbon-based mixed gas plasma with the membrane opening resist pattern 26 as an etching mask, using the intermediate oxide film layer 4 as an etching stopper layer, thereby opening the opening 6. Then, the intermediate oxide film layer 4 exposed by dry etching was removed by immersing in an HF solution (FIG. 5 (j)).

  Next, washing was performed. At this time, as a cleaning process, a ratio of ammonia: hydrogen peroxide water: pure water is mixed at about 1: 1: 5, and immersed in ammonia overwater heated to 70 ° C. for 10 minutes to rinse pure water. Then, hydrofluoric acid treatment and overflow treatment are performed again, and isopropyl alcohol (IPA) vapor drying is performed.

  As described above, a stencil mask for ion implantation having a membrane layer thickness of 10 μm and a reinforcing layer thickness of 50 μm could be obtained.

  According to the method of the present invention, the alignment accuracy of the two layers does not depend on the alignment accuracy of the bonding apparatus, but is determined by the overlay accuracy of the drawing apparatus. Therefore, a very good alignment accuracy of several nm can be easily realized. . Furthermore, since both the reinforcing layer and the membrane layer are made of silicon, membrane deformation due to internal stress does not occur. Therefore, the thickness t2 of the reinforcing layer can be made thicker than the thickness t1 of the membrane layer. Deformation can be suppressed.

  Since both the membrane layer and the reinforcing layer forming the multilayer membrane layer are made of silicon, the same etching technique can be used for both layers, and the etching process is easy without using a plurality of etching apparatuses. Furthermore, since the membrane deformation due to internal stress does not occur as compared with the case where a material different from silicon such as an oxide film is used as the reinforcing layer, the membrane layer can be kept flat.

It is sectional drawing in the A-A 'line | wire part of the stencil mask which concerns on one embodiment of this invention. FIG. 2 is a planar positional relationship diagram of a stencil mask according to one embodiment of the present invention in FIG. 1. It is a conceptual sectional view concerning the manufacturing method of the stencil mask concerning one embodiment of the invention in this application. FIG. 4 is a continuation conceptual sectional view of FIG. 3 relating to a method for manufacturing a stencil mask according to one embodiment of the present invention. FIG. 5 is a continuation conceptual sectional view of FIG. 4 relating to a method for manufacturing a stencil mask according to one embodiment of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Membrane layer 2 ... Reinforcement layer 3 ... Multilayer membrane layer 4 ... Intermediate oxide film layer 5 ... Supporting substrate layer 6 ... Opening 7 ... Membrane layer opening 8 ... Stencil pattern area 9 ... Multilayer membrane area 10 Area where reinforcing layer is exposed 11 Position alignment mark 12 SOI substrate with diameter of 100 mm 13 Electron beam sensitive resist layer 14 Position alignment resist pattern 15 Membrane layer opening resist pattern 16 Reference mark for back surface alignment 17 Pattern for alignment 18 Back surface alignment mark 19 SOI substrate 20 with pattern processing 20 Support substrate layer 21 Intermediate oxide film layer 22 Membrane (SOI) substrate 23 Electron beam sensitive resist 24 ... Resist pattern area for implantation 25 ... Photosensitive layer 26 ... Resist pattern for opening

Claims (7)

  The membrane from which a part of the reinforcing layer in the multilayer membrane layer composed of the reinforcing layer and the membrane layer is removed from the opening in the stencil mask composed of the supporting layer, the reinforcing layer and the membrane layer is removed. In the stencil mask in which the membrane layer opening having a layer has a larger area than the stencil pattern region where the membrane layer is removed in a pattern, and the stencil pattern region is formed in the pattern region, reinforcement A stencil mask characterized in that both the layer and the membrane layer are made of silicon.   2. The stencil mask according to claim 1, wherein the support layer comprises a support substrate layer and an intermediate oxide film layer.   3. The stencil mask according to claim 1, wherein the reinforcing layer is thicker than the membrane layer. 4.   4. The stencil mask according to claim 1, wherein an alignment mark is formed in a region where the reinforcing layer is exposed.   A method for producing a stencil mask according to any one of claims 1 to 4, comprising a reinforcing layer patterning step for patterning only a blank reinforcing layer comprising a supporting layer and a reinforcing layer, and a membrane substrate comprising a support and a membrane layer. From the laminating process, in which the reinforcing layer and the membrane layer are in contact, the support removing process for removing the support, the membrane layer patterning process for patterning the membrane layer, and the support layer patterning process for patterning the support layer A method for manufacturing a stencil mask.   6. The stencil mask manufacturing method according to claim 5, wherein the support layer includes a support substrate layer and an intermediate oxide film layer.   7. The method for manufacturing a stencil mask according to claim 5, wherein in the step of exposing the stencil pattern, the alignment mark formed in the region where the reinforcing layer is exposed is used to align with the position of the membrane layer opening. Forming a stencil pattern.

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