JP2009218374A - Solid-state imaging device - Google Patents

Abstract

Provided is a solid-state imaging device capable of preventing steps and protrusions generated when a light shielding layer is formed of a metal, sensitivity deterioration and insufficient light shielding caused by the steps and protrusions.
A substrate 1 having an imaging region 20 and a light-shielding region such as a black reference pixel region 30 formed in the periphery thereof, wiring layers 11, 12, 13 and an interlayer insulating film 4 formed on the substrate 1. And a first light-shielding layer 15 and a second light-shielding layer 16 made of a metal material that shields the light-shielding region, and the first light-shielding layer 15 is viewed in plan with respect to the imaging region 20 in the interlayer insulating film 4 The second light shielding layer 16 is formed on the interlayer insulating film 4 so as to be adjacent to or partially overlap the first light shielding layer 15 in plan view.
[Selection] Figure 2

Description

  The present invention relates to a solid-state imaging device, and more particularly to a solid-state imaging device having a structure for shielding light such as black reference pixels.

  In general, the solid-state imaging device includes an imaging region for capturing an image and a light-shielded black reference pixel region for obtaining a signal serving as a signal level reference. When obtaining an electrical signal based on the signal charge generated according to the amount of light received by the imaging pixel, a thermal charge is generated and mixed into the signal charge, so a black reference pixel that is shielded from light is provided to obtain a black reference level signal, The signal level due to thermal charge or the like is detected and the received light signal is corrected.

  FIG. 7 shows a configuration of an imaging region and a black reference pixel region of a conventional solid-state imaging device. The imaging pixel P1 and the black reference pixel P2 having the photodiode 2 and the floating diffusion layer 3 are formed on the surface of the silicon substrate 1, and the transfer gate 10 and the wiring layers 11, 12, and 13 are formed on the upper layer thereof, and the black reference A light shielding layer 14 is formed in the region of the pixel P2. Since the wiring layers 11, 12, and 13 are conventionally formed of an Al alloy such as Al or AlCu, the light shielding layer 14 is formed by forming a metal layer of the same layer as the wiring layer 13 on the black reference pixel P2 in a large area. It was a general technique.

  In recent years, Cu, which is a highly conductive metal, is generally used for a wiring layer of a solid-state imaging device. However, when a large-area Cu light-shielding layer is formed of the same metal layer as the Cu wiring layer as in the prior art, the amount of polishing at the center of the Cu light-shielding layer is large when flattening by CMP (Chemical Mechanical Polishing). Thus, a phenomenon called a dishing that causes a large step occurs. The dishing amount (step) is about several tens to 100 nm with respect to the wiring width of 20 μm. If there is such a step in the light shielding layer on the black reference pixel region, distortion occurs in the structure of the on-chip lens formed also on the black reference pixel region, distortion of the on-chip lens in the outer peripheral portion of the imaging region, It is thought that this will affect the sensitivity degradation.

For this reason, for example, Patent Document 1 proposes that the light shielding layer be formed in the same layer as the contact pad formed for external connection, instead of forming the light shielding layer in the same layer as the Cu wiring layer. Yes. As for contact pads, since bonding of lead wires and the like is not performed well with Cu, Al alloys such as Al and AlCu (hereinafter simply referred to as Al) are still used, and a light shielding layer is formed using this Al as a material. To do.
JP 2007-184111 A

  However, when a large-area metal layer called a light shielding layer is formed of Al, as shown in FIG. 8A, it is called a hillock 103 in a heat treatment process for forming a planarizing film 102 or the like on the metal layer 101. A hemispherical protrusion is formed. The larger the area of the metal layer 101, the larger the hillock 103 grows as the heat treatment after film deposition is repeated.

  If planarization is performed in this state, the top of the hillock 103 may be exposed as shown in FIG. 8B as the planarization film 102 on the hillock 103 becomes thinner. When the top of the hillock 103 is exposed, it is gradually dissolved from the exposed portion by the cleaning liquid in the cleaning step after planarization, and the metal layer 101 is partially lost. As a result, light leakage occurs without being able to block light at the lost portion, and an accurate black reference level cannot be detected. Such hillocks 103 are prominently generated in Al wiring having a length (or width) of 20 μm or more. Since the above-described black reference pixels are provided in about several to several tens of rows, the light shielding layer has a width of about several tens of um and a length of about several mm. The possibility and the possibility of insufficient shading are high enough.

  In view of the above problems, an object of the present invention is to provide a solid-state imaging device capable of preventing steps and protrusions generated when a light shielding layer is formed of a metal, and sensitivity deterioration and insufficient light shielding caused by the steps and protrusions. .

  In order to solve the above problems, a solid-state imaging device according to the present invention includes a semiconductor substrate having an imaging region and a light-shielding region formed around the imaging region, and a wiring formed on the semiconductor substrate via an interlayer insulating film. And a contact pad for external connection, and first and second light-shielding layers made of a metal material that shields the light-shielding region. The first light-shielding layer is a metal layer that is the same layer as the wiring layer. The second light-shielding layer is formed adjacent to the imaging region in plan view, and the second light-shielding layer is adjacent to or partially overlaps the first light-shielding layer by a metal layer that is the same layer as the contact pad. It is characterized by being formed.

  The first light shielding layer is made of copper, and the second light shielding layer is made of aluminum or an aluminum alloy. Preferably, the first light shielding film has a width of 10 μm or less, and the second light shielding film has a width of 20 μm or less.

  A third light-shielding film formed on a side of the first light-shielding layer, the metal layer being the same layer as the first light-shielding layer and farther from the imaging region than the first light-shielding layer; and the same as the second light-shielding layer A fourth light-shielding film formed on a side farther from the imaging region than the second light-shielding layer, and further comprising the second light-shielding film and the third light-shielding film. It is preferable that the fourth light-shielding film partially overlaps with each other in plan view.

  A fifth light-shielding layer that is partially overlapped with the first light-shielding layer and the second light-shielding layer in a plan view in the interlayer insulating film and above the first light-shielding layer; It is preferable to provide.

  According to the structure of the solid-state imaging device according to the present invention, the light shielding region can be shielded without providing a large-area metal layer. It becomes possible to prevent insufficient light shielding. For example, when the first light shielding layer is made of copper and the second light shielding layer is made of aluminum or an aluminum alloy, it is possible to prevent the steps of the first light shielding layer and the projections of the second light shielding layer from being generated.

  If the wiring layer and the first light-shielding layer are formed as the same metal layer, both can be formed at the same time, so that the number of processes does not increase. The same applies to the case where the second light shielding layer is a metal layer that is the same layer as a contact pad formed for external connection.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
First, a schematic overall configuration of a conventional solid-state imaging device, here, a CMOS solid-state imaging device (image sensor) will be described with reference to FIG.

  An imaging pixel region 20 in which imaging pixels P1 are arranged in a matrix is provided on a substrate 1 such as a silicon substrate, and a black reference pixel region 30 in which black reference pixels P2 are arranged is provided in the vicinity of the imaging pixel region 20. It has been.

  A peripheral circuit section 40 (vertical shift register 41, column amplifier 42, horizontal shift register 43, output circuit 44, column AD converter 45, etc.) is provided around the imaging pixel area 20 and the black reference pixel area 30, and the peripheral circuit section. A pad portion 50 in which contact pads 51 are arranged is provided closer to the outer periphery of the substrate than 40.

  Although not shown, the imaging pixel P1 has various MOS transistors such as a photodiode and an n-channel MOS transistor that constitute a photoelectric conversion element. The black reference pixel P2 has a configuration similar to that of the imaging pixel P1, but is shielded so that external light is not incident as much as possible.

  Next, a solid-state imaging device according to an embodiment of the present invention will be described with reference to FIG. Since it has the same overall configuration as the solid-state imaging device of FIG. 1, the same members as those of FIG.

  An imaging pixel area 20 (shown as imaging area 20 in the figure) in which an imaging pixel P1 having a photodiode 2 and a floating diffusion layer 3 is arranged on a substrate 1, and a black reference pixel in which a black reference pixel P2 is arranged. The region 30, the peripheral circuit unit 40, and the pad unit 50 are included.

  On the upper layer of the substrate 1, a transfer gate 10 and wiring layers 11, 12, 13 made of a metal such as Cu having excellent conductivity are formed in a required pattern via an interlayer insulating film 4, and are connected to each other at a predetermined position. ing. The surface of the interlayer insulating layer 4 on the wiring layer 13 is flattened.

  In the pad portion 50, a part of the wiring layers 11, 12, and 13 is formed to extend, and a contact pad that contacts the extended portion of the wiring layers 11, 12, and 13 on the flat surface of the interlayer insulating layer 4. 51 is formed. As a material of the contact pad 51, Al or an Al alloy such as AlCu is used so that an external lead wire or the like can be satisfactorily contacted.

For example, red R, green G, and blue B color filters and minute lenses, so-called on-chip lenses 17, are formed above the contact pads 51 and on the imaging pixels P1.
Here, a major feature of the solid-state imaging device is that the first light shielding layer 15 and the second light shielding layer 16 are formed in the upper layer of the black reference pixel region 20 and the peripheral circuit section 40. The first light shielding layer 15 is formed as the same layer with the same material as the wiring layer 13 adjacent to the outside of the imaging pixel region 20. The second light shielding layer 16 is formed adjacent to the first light shielding layer 15 and made of the same material as the contact pad 51 as the same layer.

  In manufacturing, the imaging pixel P1, the black reference pixel P2, the transfer gate 10, the wiring layers 11, 12, 13, the interlayer insulating film 4 and the like are formed on the substrate 1 by a technique such as diffusion, photolithography, and sputtering. At this time, the first light shielding layer 15 is formed simultaneously with the wiring layer 13. In each layer Cu wiring process for forming the wiring layer 11, the wiring layer 12, and the wiring layer 13 (and the first light shielding layer 15), a groove serving as a wiring layer and a via at a necessary portion are formed, and Cu is embedded. , CMP is performed.

  Then, the outermost surface of the interlayer insulating layer 4 on the wiring layer 13 and the first light shielding layer 15 is flattened, and an opening for exposing the wiring layer 13 of the pad portion 50 is formed in the interlayer insulating layer 4. A metal layer made of Al or an Al alloy is formed on the entire surface (including the inside of the opening), and the formed metal layer is etched to form the second light shielding layer 16 simultaneously with the contact pad 51. Thereafter, a planarizing film 4 ′ is formed, and color filters RGB and on-chip lenses 17 are formed.

According to the structure of this solid-state imaging device, there are the following advantages compared to the case where the entire light shielding region is shielded by Cu or Al.
Since the area of the first light shielding layer 15 made of Cu is reduced, dishing (steps) can be reduced. That is, barrier as compared with the case of forming a Cu shielding layer for blocking light entire region, if the first number of the line width of the light-shielding layer 15 [mu] m can be reduced about 20~30nm dishing amount. Since dishing can be reduced, distortion of the on-chip lens 17 can be suppressed even in the imaging pixel region 20, which improves sensitivity and reduces sensitivity unevenness. Although the dimension on the long side of the first light shielding layer 15 varies depending on the chip size, the length on the long side is, for example, several millimeters (the same applies hereinafter).

  Similarly, since the area of the second light shielding layer 16 made of Al is reduced, hillocks (protrusions) can be reduced, and insufficient light shielding caused thereby can be prevented. Since the second light shielding layer 16 has a sufficient thickness required for the contact pad 51, it also has a complete light shielding effect.

  Since the first light shielding layer 15 that is the same layer as the wiring layer 13 is provided immediately outside the imaging pixel region 20, the second layer that is the same layer as the contact pad 51 (that is, located above the wiring layer 13) at this position. Compared with the arrangement of the light shielding layer 16, the light shielding is performed at a position close to the photodiode 2, so that the light shielding accuracy with respect to the light incident obliquely can be improved.

  Regarding the area where the black reference pixel is shielded by the contact pad forming metal layer, when the wiring metal layer under the light shielding film is used effectively, that is, when the circuit is formed by the wiring metal layer below the light shielding film. Thus, a potential different from the voltage applied to the contact pad and the light shielding film can be used for the circuit under the light shielding film.

  Since the first light-shielding layer 15 and the second light-shielding layer 16 are formed simultaneously with the wiring layer 13 and the contact pad 51, respectively, in order to form the first and second light-shielding layers 15 and 16, the number of processes is particularly large. There will be no increase.

  The first light-shielding layer 15 and the second light-shielding layer 16 are desirably arranged so that portions thereof overlap each other two-dimensionally (overlapping). This is because incident light from an oblique direction is shielded with high accuracy.

  FIG. 3 shows a first example of the arrangement of the light shielding layers. A first light shielding layer 15 is disposed just outside the imaging pixel region and a second light shielding layer 16 is disposed outside the imaging pixel region (displayed as an imaging region in the drawing).

  Since the same Cu layer as the wiring layer 13 is used for the first light shielding layer 15 as described above, the dishing amount by Cu-CMP is set to 10 to 20 nm or less in order to reduce the influence on the distortion of the on-chip lens. For example, the line width is set to 10 μm or less. The second light shielding layer 16 made of Al has a line width that does not cause hillocks, for example, 20 μm or less.

  The first light-shielding layer 15 and the second light-shielding layer 16 are desirably arranged so that portions thereof overlap each other two-dimensionally (overlapping). Since the maximum incident angle of light incident on the photodiode 2 (see FIG. 2) is about 20 to 30 degrees, the uppermost wiring layer 13 (the same layer as the first light shielding layer 15) and the contact pad 51 are connected. If the interlayer between the metal layer to be formed (the same layer as the second light shielding layer 16) is 500 nm, the overlap amount between the first light shielding layer 15 and the second light shielding layer 16 is suitably about 200 to 300 nm. It is believed that there is. It is desirable to provide an overlap portion for one pixel.

  FIG. 4 shows a second example of the arrangement of the light shielding layers. As in FIG. 3, the first light shielding layer 15 is disposed just outside the imaging pixel region and the second light shielding layer 16 is disposed outside the imaging pixel region so as to surround the imaging pixel region. The reason why the first light shielding layer 15 is arranged just outside the imaging region is to prevent the incident light from being obliquely shielded.

  Furthermore, in this second example, the line widths of the first light shielding layer 15 and the second light shielding layer 16 are narrowed, and a plurality of them are alternately arranged so as to surround the imaging region. In other words, the first light-shielding layer 15 and the second light-shielding layer 16 are alternately arranged to reduce the line width of each so as not to cause a problem of processing of Cu and Al. For the first light shielding layer 15 made of Cu, a line width that does not cause dishing, for example, 10 μm or less is desirable, and for the second light shielding layer 16 made of Al, a line width that does not cause hillocks, For example, 20 μm or less is desirable. It is preferable that the first light shielding layer 15 and the second light shielding layer 16 overlap each other and the overlap is large.

  FIG. 5 shows a third example of the arrangement of the light shielding layers. As in FIG. 3, the first light shielding layer 15 is disposed just outside the imaging pixel region and the second light shielding layer 16 is disposed outside the imaging pixel region so as to surround the imaging pixel region. The reason why the first light shielding layer 15 is arranged just outside the imaging region is to prevent the incident light from being obliquely shielded.

  Furthermore, in this third example, the first light shielding layer 15 is narrow outside the pair of opposite sides of the imaging region and wide outside the other pair of opposite sides. The second light-shielding layer 16, the first light-shielding layer 15, the second light-shielding layer 16, and the first light-shielding layer 15 are alternately arranged on the outside of the narrow first light-shielding layer 15 by reducing the line width. Is arranged.

  This is because the above-described dishing occurs when the first light shielding layer 15 made of Cu is formed in a large area. Therefore, the first light shielding layer 15 and the second light shielding layer 16 are on the side where dishing may occur. Are arranged alternately with a narrow line width, while only the first light shielding layer 15 is provided on the side where the possibility of dishing is low. For example, it corresponds to forming the first light shielding layer 15 with a small line width using two or more wiring layers only on the side where the peripheral circuit portion is wide.

  As for the light shielding of the peripheral circuit portion 40 (see FIGS. 1 and 2), a portion where the wiring layer is interrupted is generated depending on the arrangement of capacitors and the like, that is, a portion where the first light shielding layer 15 cannot be formed. The light shielding can be ensured by forming the second light shielding layer 16 above the interrupted portion.

  FIG. 6 shows a fourth example of the arrangement of the light shielding layers. As in FIG. 3, the first light shielding layer 15 is disposed just outside the imaging pixel region and the second light shielding layer 16 is disposed outside the imaging pixel region so as to surround the imaging pixel region.

  Further, in the fourth example, the line widths of the first light shielding layer 15 and the second light shielding layer 16 are narrowed and alternately arranged so as to surround the imaging region. That is, a first light shielding layer 15 ′ is formed just outside the imaging region by a wiring layer that is not the uppermost layer (the first wiring layer 11 or the second wiring layer 12 in FIG. 2), and the outside thereof. In this order, a first light shielding layer 15, a second light shielding layer 16, and a first light shielding layer 15 are formed by the uppermost wiring layer (the third wiring layer 13 in FIG. 2).

  Thus, by using the same layer as the wiring layer which is not the uppermost layer as the first light shielding layer 15 ′, light shielding at a portion closer to the photodiode 2 (see FIG. 2) becomes possible, and incident light from an oblique direction is obtained. In addition to light shielding, it is possible to enhance the light shielding effect of stray light reflected by the wiring.

  As described above, the line width of each of the first light shielding layers 15 and 15 ′ is desirably 10 μm or less. Each of the first light shielding layers 15 and 15 ′ and the second light shielding layer 16 has a width of an overlap portion so that it can sufficiently shield against oblique light.

  The present invention is not limited to the above-described embodiment, and can be modified and changed according to the use mode, purpose, and the like.

  The solid-state imaging device of the present invention is very useful as a structure manufactured by a copper wiring process.

Plan view showing schematic overall configuration of conventional and solid-state imaging device of the present invention Sectional drawing which expands and shows typically a part of solid-state imaging device of one Embodiment of this invention The top view which shows the 1st example of arrangement | positioning of the light shielding layer in the solid-state imaging device of this invention The top view which shows the 2nd example of arrangement | positioning of the light shielding layer in the solid-state imaging device of this invention The top view which shows the 3rd example of arrangement | positioning of the light shielding layer in the solid-state imaging device of this invention The top view which shows the 4th example of arrangement | positioning of the light shielding layer in the solid-state imaging device of this invention Sectional drawing which shows the structure of the imaging region and black reference pixel area | region of the conventional solid-state imaging device Sectional drawing explaining the protrusion produced in the heat treatment process on the metal layer used as the light shielding layer

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Substrate 2 Photodiode 3 Floating diffusion layer 11 Wiring layer 12 Wiring layer 13 Wiring layer 15 1st light shielding layer 16 2nd light shielding layer

Claims (5)

  A semiconductor substrate having an imaging region and a light shielding region formed in the periphery thereof, a wiring layer formed on the semiconductor substrate via an interlayer insulating film and a contact pad for external connection, and a metal that shields the light shielding region First and second light-shielding layers made of a material, and the first light-shielding layer is formed adjacent to the imaging region in a plan view by a metal layer that is the same layer as the wiring layer. The solid-state imaging device is characterized in that the light-shielding layer is formed adjacent to or partially overlapping the first light-shielding layer by a metal layer that is the same layer as the contact pad.   The solid-state imaging device according to claim 1, wherein the first light shielding layer is made of copper, and the second light shielding layer is made of aluminum or an aluminum alloy.   3. The solid-state imaging device according to claim 2, wherein the first light-shielding film has a width of 10 μm or less, and the second light-shielding film has a width of 20 μm or less.   A third light-shielding film formed on a side of the first light-shielding layer, the metal layer being the same layer as the first light-shielding layer and farther from the imaging region than the first light-shielding layer; and the same as the second light-shielding layer A fourth light-shielding film formed on a side farther from the imaging region than the second light-shielding layer, and further comprising the second light-shielding film and the third light-shielding film. 2. The solid-state imaging device according to claim 1, wherein the first light-shielding film and the fourth light-shielding film partially overlap each other in plan view.   A fifth light-shielding layer that is partially overlapped with the first light-shielding layer and the second light-shielding layer in a plan view in the interlayer insulating film and above the first light-shielding layer; The solid-state imaging device according to claim 1, wherein the solid-state imaging device is provided.

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