JP2009212304A - Method of manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device reducing size error and variations of all openings, achieving ready design of a mask opening pattern and suppressing the increase of the manufacturing cost. <P>SOLUTION: In the method of manufacturing the semiconductor device 200 in which the plurality of openings 21, 22 having different opening areas are formed by wet-etching in a surface protection film 1 of a non-photosensitive polyimide resin, in laying out the mask opening pattern for forming the plurality of openings 21, 22, a reference opening pattern 21a having an opening area smaller than the smallest opening area of the smallest opening 21 among the plurality of openings 21, 22 is set. The reference opening patterns 21a are laid out along outer peripheries of the openings 21, 22 inwards by a one-side etched amount L21 of the reference opening pattern 21a at intervals d1, d2 which are less than two times the one-side etched amount L21. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a method of manufacturing a semiconductor device in which a plurality of openings having different opening areas are formed by wet etching on a surface protective film made of a non-photosensitive polyimide resin formed on a semiconductor substrate.

  For example, Japanese Patent Laid-Open No. 2000-228419 (Patent Document 1) discloses a method for manufacturing a semiconductor device in which a plurality of openings are formed by wet etching on a surface protective film made of polyimide resin formed on a semiconductor substrate. It is disclosed.

A non-photosensitive polyimide resin is widely used as a surface protective film of a semiconductor device. The polyimide film can be processed by a normal photolithography process along with the silicon oxide film (SiO ₂ ) and the silicon nitride film (SiN), and has excellent coverage.

  A semiconductor device in which a polyimide film is used as the surface protective film is manufactured as follows, for example. Subsequent to the formation of the device portions such as the gate and emitter of the semiconductor element, an interlayer insulating film such as a PSG (Phospho-Silicate Glass) film is formed, and aluminum (Al) and copper (Cu) are interposed through the interlayer insulating film. A wiring metal layer such as is formed. Next, a polyimide film is generally formed by the following process as a surface protective film. First, heat treatment is performed at around 200 ° C. to remove moisture on the wafer surface. Next, a polyimide film having a required thickness is applied, and heat treatment is performed at around 150 ° C. for baking the polyimide film.

Next, the process proceeds to a patterning process by a photolithography process. Since the photoresist used in the photolithography process is hydrophobic, in a general photolithography process, heat treatment is performed at around 200 ° C. to remove moisture, and then HMDS (hexamethylzine for improving the adhesion of the photoresist). Razan) processing is performed. However, in the case of patterning of the polyimide film, if the heat treatment is performed at around 200 ° C., the polyimide film is cured and patterning becomes impossible, so the two steps of the heat treatment after the photoresist formation and the HMDS treatment are omitted. Following the photoresist coating, heat treatment is performed at around 90 ° C. to cure the photoresist and remove volatile gases in the photoresist. Next, after exposure using the equal magnification transfer method or projection method, the photoresist and the polyimide film on the region to be opened are etched with an alkaline developer. After the etching is completed, heat treatment is performed at around 120 ° C. to dry the photoresist. Subsequently, the photoresist is removed with n-butyl acetate or the like. Finally, the polyimide film is cured by heat treatment at around 350 ° C. This completes the patterning of the polyimide film.
JP 2000-228419 A

  In the surface protective film of the semiconductor device, it is necessary to form openings of different sizes (hereinafter also referred to as pad portions) depending on applications such as wire bonding, trimming, and inspection. Since the polyimide film is isotropically etched by the alkaline developer as described above, the etching involves not only the thickness direction but also lateral etching (hereinafter referred to as side etching). It becomes. Therefore, the dimensions of the mask opening pattern (the extraction pattern on the CAD and the photoresist extraction pattern) for forming the pad portion are finally determined in consideration of the one-side side etching amount (etching width in the lateral direction). Set to the pad size. However, in setting the mask opening pattern, as described in detail below, there arises a problem due to the fact that the one-side side etching amount and the variation thereof depend on the size of the opening.

  FIG. 5 is a schematic top view of a semiconductor device 100 having a pad portion (opening portion) 11 having a small opening area and a pad portion (opening portion) 12 having a large opening area. In FIG. 5, the portion indicated by the coating pattern of reference numeral 1 is a surface protective film (polyimide film) made of a non-photosensitive polyimide resin formed on the semiconductor substrate, and the portion indicated by the coating pattern of reference numeral 2 is It is a wiring metal layer such as aluminum (Al) or copper (Cu) exposed in the openings 11 and 12.

  FIG. 6 is a diagram showing an example of a conventional manufacturing method for the semiconductor device 100 shown in FIG. 5, and is a schematic top view of the semiconductor device 100 a in the middle of manufacturing in which the mask opening patterns 11 a and 12 a are formed. It is. In FIG. 6, the portion indicated by the coating pattern of reference numeral 3 is a photoresist, and the polyimide film 1 before etching is exposed from the mask opening patterns 11a and 12a. Further, in FIG. 6, openings 11 and 12 having desired dimensions after etching of the polyimide film 1 with a developer are indicated by broken lines.

  As shown in FIG. 6, the difference L11 between the opening 11 and the mask opening pattern 11a and the difference L12a between the opening 12 and the mask opening pattern 12a are the amount of one side etch of the polyimide film 1 for each mask opening pattern 11a, 12a. is there. Here, as shown in FIG. 6, the mask opening pattern 11a having a small opening area and the mask opening pattern 12a having a large opening area have a relationship of L11 <L12, and the opening area is smaller than that of the mask opening pattern 11a having a small opening area. The side etching amount tends to increase with a large mask opening pattern 12a. This is because the mask opening pattern 11a having a small opening area does not easily enter the developing solution, so that the etching does not proceed easily. Conversely, the mask opening pattern 12a having a large opening area easily enters the developing solution, so that the etching progresses quickly. It is done.

  FIG. 7 shows the result of quantitative evaluation of the one-side side etch amount and its variation due to the difference in the opening area of the mask opening pattern, with the coating film thickness of the polyimide film 1 being 15 μm. In FIG. 7, a test of n = 10 points was performed with the mask opening pattern of each opening area, and the result is shown by the average value of the one-side side etch amount and 3σ variation.

As shown in FIG. 7, in the mask opening pattern having an opening area of about 1000 μm ² , the one side etching amount is about 8 μm, whereas in the mask opening pattern having an opening area of about 42000 μm ² , the one side etching amount is 20 μm. There is a degree. Similarly, in the mask opening pattern having an opening area of about 1000 μm ² , the value of the variation 3σ in one side etching is about 2 μm, whereas in the mask opening pattern having an opening area of about 42000 μm ² , the one side etching amount is about The value of the variation 3σ is about 5 μm.

  Therefore, in order to finally obtain a desired pad portion dimension, it is necessary to set different values of one-side side etching for each mask opening pattern having different opening areas. However, if one side etching amount having a different value is set for all openings having different opening areas in designing a semiconductor device, the design becomes complicated and the manufacturing cost increases. Even in such a case, the difference in variation in the amount of etching on one side of mask opening patterns having different opening areas cannot be eliminated.

  On the other hand, the design is facilitated by setting one side etching amount (for example, 8 μm) of the mask opening pattern corresponding to the minimum opening having the minimum opening area for all the openings formed in the semiconductor device. An opening having a large opening area is undersized. On the other hand, if the one-side etching amount (for example, 20 μm) of the mask opening pattern corresponding to the maximum opening having the maximum opening area is set for all the openings formed in the semiconductor device, the opening having a small opening area is set. The part will be oversized. When the desired pad size is not finally obtained in this way, the protection of the area that requires protection is insufficient, or the probe at the time of inspection does not hit the wiring metal layer and cannot be inspected. There is a risk that the semiconductor element may be inoperable due to danger or wire bonding for applying current or voltage.

  Accordingly, the present invention provides a method for manufacturing a semiconductor device in which openings having different opening areas are formed in a surface protective film made of a non-photosensitive polyimide resin, and includes dimensional errors and variations of all openings in the semiconductor device. An object of the present invention is to provide a manufacturing method that can reduce the manufacturing cost and can easily design a mask opening pattern and suppress an increase in manufacturing cost.

  The invention according to claim 1 is a method of manufacturing a semiconductor device in which a plurality of openings having different opening areas are formed by wet etching on a surface protective film made of a non-photosensitive polyimide resin formed on a semiconductor substrate. In laying out a mask opening pattern for forming the plurality of openings, a reference opening pattern having an opening area smaller than a minimum opening having a minimum opening area among the plurality of openings is set. The reference opening pattern is laid out along the outer periphery of the opening by an interval of not more than twice the one-side side etching amount on the inner side by the one-side side etching amount of the reference opening pattern. Yes.

  In the semiconductor device manufacturing method, when laying out a mask opening pattern for forming a plurality of openings, a reference opening pattern is set, and the reference opening pattern is laid out along the outer periphery of the opening. The reference opening pattern is set so as to have an opening area smaller than the minimum opening having the minimum opening area among the plurality of openings formed in the semiconductor device. Therefore, the reference opening pattern can be laid out along the outer periphery for all openings formed in the semiconductor device. The reference opening pattern has a constant one side etching amount, and since the opening area is small, variation in the one side etching amount is also reduced. In the above manufacturing method, such a reference opening pattern is laid out on the inner side by the amount of one side etch along the outer periphery of the opening. For this reason, after wet etching, an opening having a design dimension that allows for a certain amount of etching on one side can be formed with small dimensional variations for all openings formed in the semiconductor device. Further, in the above manufacturing method, the reference opening pattern is laid out along the outer periphery of the opening with an interval equal to or less than twice the one side etching amount, so that no etching residue occurs.

  The layout of the reference opening pattern in the semiconductor device manufacturing method is to lay out a reference opening pattern having a constant one-side side etch amount for all openings having different opening areas. Therefore, the mask opening pattern can be easily designed and an increase in manufacturing cost can be suppressed as compared with the case where different one-side side etching amounts are set for all the openings having different opening areas.

  As described above, the method for manufacturing a semiconductor device is a method for manufacturing a semiconductor device in which openings having different opening areas are formed in a surface protective film made of a non-photosensitive polyimide resin. It is possible to reduce the dimensional errors and variations of all the openings, and to make a manufacturing method that can easily design a mask opening pattern and prevent an increase in manufacturing cost.

  In the semiconductor device manufacturing method, for example, it is preferable that a mask opening pattern corresponding to the opening is configured only by the reference opening pattern. In this way, by laying out only one type of reference opening pattern in all openings formed in the semiconductor device, only one side etching amount corresponding to the reference opening pattern can be considered. Therefore, the mask opening pattern can be designed more easily, and the manufacturing cost can be further suppressed.

  In the method of manufacturing a semiconductor device, as described in claim 3, a mask opening pattern corresponding to the opening is formed by using the reference opening pattern and an internal opening pattern having an opening area larger than the reference opening pattern. You may make it comprise. In this case, for example, as described in claim 4, the reference opening pattern may be laid out in a single line along the outer periphery of the opening, or as described in claim 5, the reference You may make it lay out an opening pattern in multiple along the outer periphery of the said opening part. According to this, compared with the case where a mask opening pattern is comprised only with a reference | standard opening pattern, the probability that an etching residue will generate | occur | produce can be reduced more.

  The reference opening pattern in the semiconductor device manufacturing method may be any shape such as a quadrangle, a hexagon, an octagon, or a circle. However, since there are generally many quadrangular pad portions (openings), it is preferable that the reference opening pattern has a quadrangular shape as described in claim 6. In particular, as described in claim 7, the reference opening pattern may be square. According to this, the outer periphery of the opening after etching formed from the laid-out reference opening pattern can be made a more complete quadrangular straight line as compared with the case of setting a reference opening pattern of another shape. it can.

  In the method of manufacturing the semiconductor device, as described in claim 8, the reference opening pattern is set with reference to the minimum opening so that the minimum opening is generated from one reference opening pattern. It is possible. According to this, compared with the case of setting a reference opening pattern having a smaller opening area, the total number of reference opening patterns to be laid out can be reduced, and the design of the mask opening pattern becomes easier.

  As described above, any of the above-described methods for manufacturing a semiconductor device is a method for manufacturing a semiconductor device in which openings having different opening areas are formed in a surface protective film made of a non-photosensitive polyimide resin, This is a manufacturing method that can reduce dimensional errors and variations in all openings in the semiconductor device, can easily design a mask opening pattern, and can suppress an increase in manufacturing cost.

  The present invention relates to a method of manufacturing a semiconductor device in which a plurality of openings having different opening areas are formed by wet etching on a surface protective film made of a non-photosensitive polyimide resin formed on a semiconductor substrate. The best mode for carrying out the present invention will be described below with reference to the drawings.

  FIG. 1 is a schematic top view of a semiconductor device 200 having a pad portion (opening portion) 21 having a small opening area and a pad portion (opening portion) 22 having a large opening area, similar to the semiconductor device 100 shown in FIG. FIG. In FIG. 1, a portion indicated by a coating pattern of reference numeral 1 is a surface protective film (polyimide film) made of a non-photosensitive polyimide resin formed on a semiconductor substrate, and a portion indicated by a coating pattern of reference numeral 2 is A wiring metal layer such as aluminum (Al) or copper (Cu) exposed in the openings 21 and 22. Note that the opening 21 on the left side of FIG. 1 indicates the smallest opening having the smallest opening area among the plurality of openings formed in the surface protective film 1 of the semiconductor device 200.

  FIG. 2 is a diagram showing an example of the manufacturing method of the present invention for the semiconductor device 200 shown in FIG. 1, and a schematic top view of the semiconductor device 200a in the middle of manufacturing in which a plurality of mask opening patterns 21a are formed. FIG. In FIG. 2, the portion indicated by the coating pattern 3 is a photoresist, and the polyimide film 1 before etching is exposed from the mask opening pattern 21a. The mask opening pattern 21a is a pattern extracted from the photoresist 3, but is also a pattern extracted from the CAD at the time of mask design. Further, in FIG. 2, openings 21 and 22 having finished dimensions desired after etching of the polyimide film 1 with a developer are indicated by broken lines.

  In manufacturing the semiconductor device 200 of FIG. 1, the following method is employed in the manufacturing method shown by the semiconductor device 200a in the process of manufacturing in FIG. That is, when laying out a mask opening pattern for forming a plurality of openings of the semiconductor device 200 exemplified by the openings 21 and 22 in FIG. 1, the minimum opening having the smallest opening area among the plurality of openings. A reference opening pattern 21 a having an opening area smaller than 21 is set. Then, along the outer periphery of the opening 22, an interval d1, d2 that is not more than twice the one-side side etch amount L21 is provided on the inner side by the one-side side etch amount (etching width in the lateral direction) L21 of the reference opening pattern 21a. (D1, d2 ≦ 2 × L21), the reference opening pattern 21a is laid out.

  As described above, in the method of manufacturing the semiconductor device 200 shown in FIGS. 1 and 2, when laying out a mask opening pattern for forming a plurality of openings of the semiconductor device 200, the reference opening pattern 21a is set, The reference opening pattern 21 a is laid out along the outer periphery of an arbitrary opening exemplified by the opening 22. The reference opening pattern 21 a is set to have an opening area smaller than the minimum opening 21 having the minimum opening area among the plurality of openings formed in the semiconductor device 200. Therefore, it is possible to lay out the reference opening pattern 21a along the outer periphery for all the openings formed in the semiconductor device 200. The reference opening pattern 21a has a constant one-side side etch amount L21, and the same reference opening pattern 21a is disposed when forming the openings 21 and 22 having different opening areas. Further, since the reference opening pattern 21a has a small opening area, as shown in FIG. In the method for manufacturing the semiconductor device 200 shown in FIGS. 1 and 2, such a reference opening pattern 21 a is laid out on the inside along the outer periphery of the opening 22 by the one side etch amount L <b> 21. For this reason, at the time of wet etching, the way of entering the developer is equal in each reference opening pattern 21a laid out to form the openings 21 and 22, and after the wet etching, all the openings formed in the semiconductor device 200. On the other hand, it is possible to form an opening having a design dimension that allows for a certain one-side side etch amount L21 with a small dimensional variation. Further, in the method of manufacturing the semiconductor device 200 shown in FIGS. 1 and 2, the reference opening pattern 21a is spaced along the outer periphery of the opening 22 with intervals d1 and d2 that are not more than twice the one-side side etching amount L21 (d1). , D2 ≦ 2 × L21). For this reason, the polyimide film 1 in the space | interval d1, d2 part lose | disappears by side etching by a developing solution, and an etching residue does not generate | occur | produce.

  The layout of the reference opening pattern 21a in the method for manufacturing the semiconductor device 200 shown in FIGS. 1 and 2 is laid out with a reference opening pattern having a constant one side etch amount L21 for all openings having different opening areas. Is. Therefore, the mask opening pattern can be designed more easily than in the case of setting different values of one-side side etching for all openings having different opening areas as shown in the method for manufacturing the semiconductor device 100 of FIGS. Yes, an increase in manufacturing cost can be suppressed.

  As described above, the method for manufacturing the semiconductor device 200 shown in FIGS. 1 and 2 is a method for manufacturing a semiconductor device in which openings having different opening areas are formed in the surface protective film 1 made of non-photosensitive polyimide resin. Thus, the manufacturing method can reduce the dimensional error and variation of all the openings in the semiconductor device 200, can easily design the mask opening pattern, and can prevent the manufacturing cost from increasing.

  Further, in the method of manufacturing the semiconductor device 200 shown in FIGS. 1 and 2, the mask opening pattern corresponding to the opening 22 is constituted by only the reference opening pattern 21a. Thus, by laying out all the openings formed in the semiconductor device 200 so as to cover only one type of reference opening pattern 21a, one side etching amount L21 corresponding to the reference opening pattern 21a. Therefore, the mask opening pattern can be designed more easily, and the manufacturing cost can be further suppressed.

  However, as will be described below, the mask opening pattern corresponding to the opening can be constituted by a reference opening pattern and an internal opening pattern having an opening area larger than the reference opening pattern.

  3 and 4 are diagrams showing examples of another manufacturing method for the semiconductor device 200 shown in FIG. 1, and are schematic top views of the semiconductor devices 200b and 200c being manufactured.

  In the manufacturing method of FIG. 3, the mask opening pattern corresponding to the opening 22 is constituted by the reference opening pattern 21a and the internal opening pattern 22b having an opening area larger than the reference opening pattern 21a, and the reference opening pattern 21a is opened. A single layout is provided along the outer periphery of the portion 22. In the manufacturing method of FIG. 4, the mask opening pattern corresponding to the opening 22 is constituted by the reference opening pattern 21a and the internal opening pattern 22c having an opening area larger than the reference opening pattern 21a. A double layout is made along the outer periphery of the opening 22. Similarly, the reference opening pattern 21 a may be further laid out along the outer periphery of the opening 22.

  Also in the method of manufacturing the semiconductor device 200 shown in FIGS. 3 and 4, in laying out a mask opening pattern for forming a plurality of openings, the minimum opening 21 having the smallest opening area among the plurality of openings. A reference opening pattern 21a having a smaller opening area is set, and along the outer periphery of the opening 22, an interval d1 that is not more than twice the one-side side etching amount L21 is provided inward by the one-side side etching amount L21 of the reference opening pattern 21a. , D2, the reference opening pattern 21a is laid out. Therefore, the manufacturing method of the semiconductor device 200 shown in FIGS. 3 and 4 also has openings having different opening areas in the surface protective film 1 made of non-photosensitive polyimide resin, similarly to the manufacturing method of the semiconductor device 200 shown in FIG. A method of manufacturing a semiconductor device in which a portion is formed, which can reduce dimensional errors and variations of all openings in the semiconductor device 200, can easily design a mask opening pattern, and can prevent an increase in manufacturing cost. Needless to say, it is a manufacturing method.

  Here, in the semiconductor devices 200b and 200c shown in FIGS. 3 and 4, the intervals d3 and d4 between the reference opening pattern 21a and the internal opening pattern 22b and the interval between the reference opening pattern 21a and the internal opening pattern 22c shown in the drawings, respectively. d5 and d6 are set such that the polyimide film 1 at the intervals d3 and d4 and the intervals d5 and d6 disappears by side etching with a developer. Further, since the internal opening patterns 22b and 22c have an opening area larger than that of the reference opening pattern 21a, the one side etching amount thereof is also larger than the one side etching amount L21 of the reference opening pattern 21a. Therefore, in the semiconductor devices 200b and 200c shown in FIGS. 3 and 4, the settings are made as (d1, d2, d3, d4 ≦ 2 × L21) and (d1, d2, d5, d6 ≦ 2 × L21), respectively. As a result, it is possible to more reliably prevent the etching residue from occurring. In the method of laying out the reference opening pattern 21a shown in FIG. 3 along the outer periphery of the opening 22, when the size of the internal opening pattern 22b is very large, in the setting of d3, d4 ≦ 2 × L21, There is a possibility that the one side etching amount of the internal opening pattern 22b is too large and the opening 22 is oversized. In such a case, a method of laying out the reference opening pattern 21 a illustrated in FIG. 4 along the outer periphery of the opening 22 in a multiple manner is employed.

  As described above, the mask opening pattern corresponding to the opening 22 shown in FIGS. 3 and 4 is constituted by the reference opening pattern 21a and the internal opening patterns 22b and 22c having an opening area larger than the reference opening pattern 21a. This manufacturing method can further reduce the probability of occurrence of etching residue as compared with the manufacturing method in which the mask opening pattern is configured by only the reference opening pattern 21a shown in FIG.

  The reference opening pattern 21a in the method for manufacturing the semiconductor device 200 shown in FIGS. 2 to 4 may be any shape such as a quadrangle, a hexagon, an octagon, and a circle. However, since there are generally many quadrangular pad portions (openings), it is preferable that the reference opening pattern 21a has a quadrangular shape as shown in the figure. In particular, the reference opening pattern 21a is preferably square. According to this, as compared with the case where the reference opening pattern 21a having another shape is set, the outer periphery of the etched opening 22 formed from the laid-out reference opening pattern 21a is made into a more complete rectangular straight line. can do.

  In the method for manufacturing the semiconductor device 200 illustrated in FIGS. 2 to 4, the reference opening pattern 21 a is set on the basis of the minimum opening 21 so that the minimum opening 21 is generated from one reference opening pattern 21 a. did. According to this, compared with the case of setting a reference opening pattern having a smaller opening area, the total number of reference opening patterns to be laid out can be reduced, and the design of the mask opening pattern becomes easier. However, the reference opening pattern does not necessarily have to be set with the minimum opening 21 as a reference, and has a smaller opening area than the minimum opening 21 having the smallest opening area among the plurality of openings formed in the semiconductor device. With this setting, it may be a reference opening pattern having an arbitrary small opening area.

  As described above, any of the above-described methods for manufacturing a semiconductor device is a method for manufacturing a semiconductor device in which openings having different opening areas are formed in a surface protective film made of a non-photosensitive polyimide resin, This is a manufacturing method that can reduce dimensional errors and variations in all openings in the semiconductor device, can easily design a mask opening pattern, and can suppress an increase in manufacturing cost.

1 is a schematic top view of a semiconductor device 200 having a pad portion (opening portion) 21 having a small opening area and a pad portion (opening portion) 22 having a large opening area. 1 is a diagram illustrating an example of the manufacturing method of the present invention for the semiconductor device 200 shown in FIG. 1, and is a schematic top view of the semiconductor device 200 a in the middle of manufacturing in which a plurality of mask opening patterns 21 a are formed. It is the figure which showed the example of another manufacturing method about the semiconductor device 200 shown in FIG. 1, and is a typical top view of the semiconductor device 200b in the middle of manufacture. It is the figure which showed the example of another manufacturing method about the semiconductor device 200 shown in FIG. 1, and is a typical top view of the semiconductor device 200c in the middle of manufacture. 1 is a schematic top view of a semiconductor device 100 having a pad portion (opening portion) 11 having a small opening area and a pad portion (opening portion) 12 having a large opening area. FIG. 6 is a diagram showing an example of a conventional manufacturing method for the semiconductor device 100 shown in FIG. 5, and is a schematic top view of the semiconductor device 100 a in the middle of manufacturing in which mask opening patterns 11 a and 12 a are formed. This is the result of quantitative evaluation of the one-side side etch amount and its variation due to the difference in the opening area of the mask opening pattern, with the coating film thickness of the polyimide film 1 being 15 μm.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100,200 Semiconductor device 200a-200c Semiconductor device in the middle of manufacture 1 Surface protective film (polyimide film)
2 Wiring metal layer 3 Photoresist 11, 12, 21, 22 Opening (pad part)
11a, 12a Mask opening pattern 21a Reference opening pattern (mask opening pattern)
L21 One side etching amount 22b, 22c Internal opening pattern (mask opening pattern)

Claims (8)

A method of manufacturing a semiconductor device in which a plurality of openings having different opening areas are formed by wet etching on a surface protective film made of a non-photosensitive polyimide resin formed on a semiconductor substrate,
In laying out a mask opening pattern for forming the plurality of openings,
Setting a reference opening pattern having an opening area smaller than a minimum opening having a minimum opening area among the plurality of openings;
The reference opening pattern is laid out along the outer periphery of the opening by a distance equal to or less than twice the one side etching amount inside the reference opening pattern. Device manufacturing method.   The method of manufacturing a semiconductor device according to claim 1, wherein a mask opening pattern corresponding to the opening is configured only by the reference opening pattern.   2. The method of manufacturing a semiconductor device according to claim 1, wherein a mask opening pattern corresponding to the opening is configured by the reference opening pattern and an internal opening pattern having an opening area larger than the reference opening pattern.   4. The method of manufacturing a semiconductor device according to claim 3, wherein the reference opening pattern is laid out in a single line along an outer periphery of the opening.   4. The method of manufacturing a semiconductor device according to claim 3, wherein the reference opening pattern is laid out in a multiple manner along the outer periphery of the opening.   6. The method of manufacturing a semiconductor device according to claim 1, wherein the reference opening pattern is formed in a quadrangular shape.   The method of manufacturing a semiconductor device according to claim 6, wherein the reference opening pattern has a square shape.   The said reference opening pattern is set on the basis of the minimum opening part so that the said minimum opening part produces | generates from this one said reference opening pattern, The Claim 1 thru | or 7 characterized by the above-mentioned. A method for manufacturing a semiconductor device.

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