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JP2009290161A - Optical semiconductor device - Google Patents

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JP2009290161A
JP2009290161A JP2008144274A JP2008144274A JP2009290161A JP 2009290161 A JP2009290161 A JP 2009290161A JP 2008144274 A JP2008144274 A JP 2008144274A JP 2008144274 A JP2008144274 A JP 2008144274A JP 2009290161 A JP2009290161 A JP 2009290161A
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light absorption
semiconductor device
optical semiconductor
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Masaharu Nakaji
雅晴 中路
Eitaro Ishimura
栄太郎 石村
Eiji Yagyu
栄治 柳生
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Priority to JP2008144274A priority Critical patent/JP2009290161A/en
Priority to US12/269,206 priority patent/US7910953B2/en
Priority to CN2009101281124A priority patent/CN101599511B/en
Publication of JP2009290161A publication Critical patent/JP2009290161A/en
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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    • H10F30/00—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
    • H10F30/20—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
    • H10F30/21—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
    • H10F30/22—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes
    • H10F30/223—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier being a PIN barrier
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    • H10F30/00—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
    • H10F30/20—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
    • H10F30/21—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
    • H10F30/22—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes
    • H10F30/221—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier being a PN homojunction
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F30/00—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
    • H10F30/20—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
    • H10F30/21—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
    • H10F30/22—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes
    • H10F30/225—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier working in avalanche mode, e.g. avalanche photodiodes
    • H10F30/2255—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier working in avalanche mode, e.g. avalanche photodiodes in which the active layers form heterostructures, e.g. SAM structures
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/40—Optical elements or arrangements
    • H10F77/413—Optical elements or arrangements directly associated or integrated with the devices, e.g. back reflectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S2301/00—Functional characteristics
    • H01S2301/17—Semiconductor lasers comprising special layers
    • H01S2301/173—The laser chip comprising special buffer layers, e.g. dislocation prevention or reduction
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    • H01S5/00—Semiconductor lasers
    • H01S5/30—Structure or shape of the active region; Materials used for the active region
    • H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
    • H01S5/323—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
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Abstract

【課題】素子特性のばらつきが少なく、量子効率が高い光半導体装置を得る。
【解決手段】ｎ型ＩｎＰ基板１０（半導体基板）上に、ｎ型ＤＢＲ層１２（第１導電型の分布ブラッグ反射層）、ｎ型ＩｎＰ歪緩和層１４（第１導電型の歪緩和層）、低キャリア濃度のｉ−ＩｎＧａＡｓ光吸収層１６（光吸収層）、及びｐ型ＩｎＰ窓層１８（第２導電型の半導体層）が順番に形成されている。ｎ型ＩｎＰ歪緩和層１４は、ｎ型ＩｎＰ基板１０と同じ材料で構成されている。ｎ型ＤＢＲ層１２とｉ−ＩｎＧａＡｓ光吸収層１６の間に形成されている層のトータルの光学長は、入射光の波長λの半分の整数倍である。
【選択図】図１An optical semiconductor device with little variation in element characteristics and high quantum efficiency is obtained.
An n-type DBR layer (a first conductivity type distributed Bragg reflection layer) and an n-type InP strain relaxation layer (a first conductivity type strain relaxation layer) are formed on an n-type InP substrate (semiconductor substrate). A low carrier concentration i-InGaAs light absorption layer 16 (light absorption layer) and a p-type InP window layer 18 (second conductivity type semiconductor layer) are sequentially formed. The n-type InP strain relaxation layer 14 is made of the same material as the n-type InP substrate 10. The total optical length of the layer formed between the n-type DBR layer 12 and the i-InGaAs light absorption layer 16 is an integral multiple of half the wavelength λ of incident light.
[Selection] Figure 1

Description

本発明は、分布ブラッグ反射層を有する光半導体装置に関し、特に素子特性のばらつきが少なく、量子効率が高い光半導体装置に関するものである。   The present invention relates to an optical semiconductor device having a distributed Bragg reflection layer, and more particularly to an optical semiconductor device with little variation in element characteristics and high quantum efficiency.

光吸収層と半導体基板の間に分布ブラッグ反射（DBR: Distributed Bragg Reflector）層を有するフォトダイオードが提案されている。光吸収層で吸収されずに透過した光は、ＤＢＲ層で反射されて再び光吸収層で吸収される。これにより、ＤＢＲ層を有するフォトダイオードでは高い量子効率が得られる（例えば、特許文献１参照）。
特開２００３−３１８４８５号公報 A photodiode having a distributed Bragg reflector (DBR) layer between a light absorption layer and a semiconductor substrate has been proposed. The light transmitted without being absorbed by the light absorption layer is reflected by the DBR layer and again absorbed by the light absorption layer. Thereby, high quantum efficiency is obtained in the photodiode having the DBR layer (see, for example, Patent Document 1).
JP 2003-318485 A

フォトダイオードの各半導体層は、成長温度において半導体基板と格子整合するようにエピタキシャル成長される。しかし、ＤＢＲ層の構成材料であるＩｎＧａＡｓやＩｎＧａＡｓＰは、半導体基板の構成材料であるＩｎＰと熱膨張係数が異なるため、実動作温度ではＤＢＲ層に歪みが加わる。   Each semiconductor layer of the photodiode is epitaxially grown so as to lattice match with the semiconductor substrate at the growth temperature. However, InGaAs and InGaAsP, which are constituent materials of the DBR layer, have different thermal expansion coefficients from InP, which is a constituent material of the semiconductor substrate, strain is applied to the DBR layer at the actual operating temperature.

しかも、高い反射率を得るためにはＤＢＲ層の層厚を２ｕｍ以上にする必要があるため、ＤＢＲ層上に成長したエピ層には非常に大きな歪が加わる。従って、ＤＢＲ層上に吸収層を直接に成長させた場合、ＤＢＲ層の歪みが吸収層に直接加わるため、吸収層のバンド構造が曲がり、暗電流の増減や光吸収係数、温度特性、発生したフォトキャリアの有効質量など様々な物性定数に大きな影響を与える。また、結晶に加わる歪量の変化により、ウェハプロセス中やウェハプロセス後のドーパントの拡散速度や拡散分布に変化が見られる。さらに、アバランシェフォトダイオードでは、受光面内の増倍率分布異常、局所増倍が生じる場合や、エッジブレイクダウンが発生する場合もある。このように、チップ間でＤＢＲ層の歪量がばらつくことで、素子特性がばらつくという問題がある。   Moreover, in order to obtain a high reflectivity, the DBR layer needs to have a thickness of 2 μm or more, so that an extremely large strain is applied to the epi layer grown on the DBR layer. Therefore, when the absorption layer is directly grown on the DBR layer, the strain of the DBR layer is directly applied to the absorption layer, so that the band structure of the absorption layer is bent, the increase / decrease in dark current, the light absorption coefficient, the temperature characteristics, etc. It greatly affects various physical constants such as the effective mass of photocarriers. In addition, changes in the diffusion rate and diffusion distribution of the dopant during and after the wafer process are observed due to changes in the amount of strain applied to the crystal. Further, in the avalanche photodiode, there are cases where multiplication factor distribution anomaly in the light receiving surface, local multiplication occurs, or edge breakdown occurs. As described above, there is a problem in that element characteristics vary due to variations in strain of the DBR layer between chips.

そこで、発明者は、ＤＢＲ層と光吸収層の間に、半導体基板と同じ材料で構成された歪緩和層を挿入することを考えた。しかし、このようなＤＢＲ層と光吸収層の間に形成されている層によってＤＢＲ層の反射率が低下し、光半導体装置の量子効率が低くなるという問題があった。   Therefore, the inventor has considered inserting a strain relaxation layer made of the same material as the semiconductor substrate between the DBR layer and the light absorption layer. However, such a layer formed between the DBR layer and the light absorption layer has a problem that the reflectivity of the DBR layer is lowered and the quantum efficiency of the optical semiconductor device is lowered.

本発明は、上述のような課題を解決するためになされたもので、その目的は、素子特性のばらつきが少なく、量子効率が高い光半導体装置を得るものである。   The present invention has been made to solve the above-described problems, and an object of the present invention is to obtain an optical semiconductor device with little variation in element characteristics and high quantum efficiency.

第１の発明は、半導体基板上に、第１導電型の分布ブラッグ反射層、第１導電型の歪緩和層、光吸収層、及び第２導電型の半導体層が順番に形成され、前記歪緩和層は、前記半導体基板と同じ材料で構成され、前記分布ブラッグ反射層と前記光吸収層の間に形成されている層のトータルの光学長は、入射光の波長の半分の整数倍であることを特徴とする光半導体装置である。   According to a first aspect of the present invention, a first conductivity type distributed Bragg reflection layer, a first conductivity type strain relaxation layer, a light absorption layer, and a second conductivity type semiconductor layer are sequentially formed on a semiconductor substrate. The relaxation layer is made of the same material as the semiconductor substrate, and the total optical length of the layer formed between the distributed Bragg reflection layer and the light absorption layer is an integral multiple of half the wavelength of the incident light. This is an optical semiconductor device.

第２の発明は、半導体基板上に、第１導電型の分布ブラッグ反射層、第１導電型の歪緩和層、活性層、及び第２導電型の分布ブラッグ反射層が順番に形成され、前記歪緩和層は、前記半導体基板と同じ材料で構成され、前記第１導電型の分布ブラッグ反射層と前記活性層の間に形成されている層のトータルの光学長は、出射光の波長の半分の整数倍であることを特徴とする光半導体装置である。   According to a second aspect of the present invention, a first conductive type distributed Bragg reflective layer, a first conductive type strain relaxation layer, an active layer, and a second conductive type distributed Bragg reflective layer are sequentially formed on a semiconductor substrate, The strain relaxation layer is made of the same material as the semiconductor substrate, and the total optical length of the layer formed between the first conductivity type distributed Bragg reflection layer and the active layer is half of the wavelength of the emitted light. It is an optical semiconductor device characterized by being an integral multiple of.

本発明により、素子特性のばらつきが少なく、量子効率が高い光半導体装置を得ることができる。   According to the present invention, an optical semiconductor device with little variation in element characteristics and high quantum efficiency can be obtained.

実施の形態１．
図１は、本発明の実施の形態１に係る光半導体装置を示す断面図である。この光半導体装置は、分布ブラッグ反射層を有するフォトダイオードである。 Embodiment 1 FIG.
FIG. 1 is a sectional view showing an optical semiconductor device according to Embodiment 1 of the present invention. This optical semiconductor device is a photodiode having a distributed Bragg reflection layer.

ｎ型ＩｎＰ基板１０（半導体基板）上に、ｎ型ＤＢＲ層１２（第１導電型の分布ブラッグ反射層）、ｎ型ＩｎＰ歪緩和層１４（第１導電型の歪緩和層）、キャリア濃度５×１０１５ｃｍ−３以下のｉ−ＩｎＧａＡｓ光吸収層１６（光吸収層）、及びｐ型ＩｎＰ窓層１８（第２導電型の半導体層）が順番に形成されている。ｐ型ＩｎＰ窓層１８上には、反射防止膜と表面保護膜を兼ねたＳｉＮなどの絶縁膜２０とアノード（ｐ型）電極２２が形成されている。ｎ型ＩｎＰ基板１０の裏面にはカソード（ｎ型）電極２４が形成されている。 On an n-type InP substrate 10 (semiconductor substrate), an n-type DBR layer 12 (first conductivity type distributed Bragg reflection layer), an n-type InP strain relaxation layer 14 (first conductivity type strain relaxation layer), a carrier concentration of 5 An i-InGaAs light absorption layer 16 (light absorption layer) of × 10 15 cm −3 or less and a p-type InP window layer 18 (second conductivity type semiconductor layer) are sequentially formed. On the p-type InP window layer 18, an insulating film 20 such as SiN that also serves as an antireflection film and a surface protective film and an anode (p-type) electrode 22 are formed. A cathode (n-type) electrode 24 is formed on the back surface of the n-type InP substrate 10.

ｎ型ＤＢＲ層１２は、屈折率が低いｎ型ＩｎＰ層１２ａと屈折率が高いｎ型ＩｎＧａＡｓＰ層１２ｂを交互に積層したものである。ｎ型ＩｎＰ層１２ａとｎ型ＩｎＧａＡｓＰ層１２ｂは、それぞれ入射光の波長λに対する光学層厚がλ／４である。例えば、λが１．５５ｕｍである場合、ＩｎＰの屈折率を３．１６９とするとｎ型ＩｎＰ層１００ａの層厚は０．１２３ｕｍ、ＩｎＧａＡｓＰの屈折率を３．４３７とするとｎ型ＩｎＧａＡｓＰ層１００ｂの層厚は０．１１３ｕｍである。なお、ｎ型ＩｎＧａＡｓＰ層１２ｂの代わりにｎ型ＩｎＧａＡｓ層又はＡｌＩｎＡｓ層を用いてもよい。ただし、ｎ型ＩｎＧａＡｓ層は、バンドギャップ波長が入射光の波長λより小さく、入射光を吸収する。   The n-type DBR layer 12 is formed by alternately stacking an n-type InP layer 12a having a low refractive index and an n-type InGaAsP layer 12b having a high refractive index. Each of the n-type InP layer 12a and the n-type InGaAsP layer 12b has an optical layer thickness of λ / 4 with respect to the wavelength λ of incident light. For example, when λ is 1.55 μm, the thickness of the n-type InP layer 100a is 0.123 μm when the refractive index of InP is 3.169, and the refractive index of InGaAsP is 3.437 when the refractive index of InGaAsP is 3.437. The layer thickness is 0.113 um. Note that an n-type InGaAs layer or an AlInAs layer may be used instead of the n-type InGaAsP layer 12b. However, the n-type InGaAs layer has a band gap wavelength smaller than the wavelength λ of incident light and absorbs incident light.

本実施の形態では、ｎ型ＤＢＲ層１２とｉ−ＩｎＧａＡｓ光吸収層１６の間に、ｎ型ＩｎＰ基板１０と同じ材料で構成されたｎ型ＩｎＰ歪緩和層１４を挿入している。また、ｎ型ＤＢＲ層１２とｉ−ＩｎＧａＡｓ光吸収層１６の間に形成されている層のトータルの光学長は、入射光の波長λの半分の整数倍である。   In the present embodiment, an n-type InP strain relaxation layer 14 made of the same material as that of the n-type InP substrate 10 is inserted between the n-type DBR layer 12 and the i-InGaAs light absorption layer 16. The total optical length of the layer formed between the n-type DBR layer 12 and the i-InGaAs light absorption layer 16 is an integral multiple of half the wavelength λ of the incident light.

本実施の形態に係る光半導体装置の動作について説明する。アノード電極２２の電位がカソード電極２４の電位に比べて低くなるように０．５〜３Ｖの逆バイアスが印加される。入射光は、図の上側から絶縁膜２０とｐ型ＩｎＰ窓層１８を通ってｉ−ＩｎＧａＡｓ光吸収層１６へ入射される。そして、入射光はｉ−ＩｎＧａＡｓ光吸収層１６で吸収される。   The operation of the optical semiconductor device according to this embodiment will be described. A reverse bias of 0.5 to 3 V is applied so that the potential of the anode electrode 22 is lower than the potential of the cathode electrode 24. Incident light enters the i-InGaAs light absorption layer 16 from the upper side of the figure through the insulating film 20 and the p-type InP window layer 18. The incident light is absorbed by the i-InGaAs light absorption layer 16.

ｉ−ＩｎＧａＡｓ光吸収層１６の層厚をｔ、ｉ−ＩｎＧａＡｓ光吸収層１６の入射光に対する吸収係数をαとすると、ｉ−ＩｎＧａＡｓ光吸収層１６に吸収された入射光の割合（＝量子効率）は以下の式（１）で表される。
１−ｅｘｐ（−α・ｔ）・・・（１） When the thickness of the i-InGaAs light absorption layer 16 is t and the absorption coefficient of the i-InGaAs light absorption layer 16 with respect to the incident light is α, the ratio of the incident light absorbed in the i-InGaAs light absorption layer 16 (= quantum efficiency). ) Is represented by the following formula (1).
1-exp (−α · t) (1)

ｉ−ＩｎＧａＡｓ光吸収層１６で吸収されずに透過した光は、ｎ型ＤＢＲ層１２で反射されて、再びｉ−ＩｎＧａＡｓ光吸収層１６で吸収される。ｎ型ＤＢＲ層１２における光の反射率をＲとすると、ｎ型ＤＢＲ層１２による戻り光を考慮した場合の量子効率は以下の式（２）で表される。
１−ｅｘｐ（−α・ｔ）＋Ｒ・ｅｘｐ（−α・ｔ）・（１−ｅｘｐ（−α・ｔ））・・・（２） The light transmitted without being absorbed by the i-InGaAs light absorption layer 16 is reflected by the n-type DBR layer 12 and again absorbed by the i-InGaAs light absorption layer 16. When the reflectance of light in the n-type DBR layer 12 is R, the quantum efficiency when the return light from the n-type DBR layer 12 is taken into consideration is expressed by the following formula (2).
1−exp (−α · t) + R · exp (−α · t) · (1−exp (−α · t)) (2)

式（１）と式（２）の差がｎ型ＤＢＲ層１２による量子効率の増加分である。ｉ−ＩｎＧａＡｓ光吸収層１６の中は、逆バイアスのために空乏層化している。空乏層中は電界がかかっており、電子と正孔は、それぞれカソード電極２４とアノード電極２２側に流れて電流として取り出される。   The difference between the formula (1) and the formula (2) is an increase in quantum efficiency due to the n-type DBR layer 12. The i-InGaAs light absorption layer 16 is depleted due to a reverse bias. An electric field is applied in the depletion layer, and electrons and holes flow to the cathode electrode 24 and anode electrode 22 sides, respectively, and are taken out as current.

本実施の形態に係る光半導体装置の効果について参考例と比較しながら説明する。図２は、光半導体装置の参考例を示す断面図である。ｎ型ＩｎＰ歪緩和層１４が無く、ｎ型ＤＢＲ層１２に隣接するようにｉ−ＩｎＧａＡｓ光吸収層１６を成長している。その他の構成は本実施の形態に係る光半導体装置と同様である。   The effect of the optical semiconductor device according to the present embodiment will be described in comparison with a reference example. FIG. 2 is a cross-sectional view showing a reference example of the optical semiconductor device. The i-InGaAs light absorption layer 16 is grown so as to be adjacent to the n-type DBR layer 12 without the n-type InP strain relaxation layer 14. Other configurations are the same as those of the optical semiconductor device according to the present embodiment.

発明者の調べによると、ＩｎＰの線膨張係数は室温で４．５６×１０−６Ｋ−１であるが、ＩｎＧａＡｓの線膨張係数は５．１７×１０−６Ｋ−１、ＩｎＧａＡｓＰの線膨張係数はＡｓとＰの組成比に応じて４．５６〜５．１７×１０−６Ｋ−１である。なお、熱膨張係数は結晶の原子間結合力係数や結合長などと関係した物理量であるため、混晶における熱膨張係数の組成依存性を理論的に予測することは、その基礎となる知見の不足により現状では非常に難しい。しかし、いくつかの実験結果から、混晶の熱膨張係数を線形補間に基づいて予測することは、第一近似としては妥当なものと考えられる。 According to the inventor's investigation, the linear expansion coefficient of InP is 4.56 × 10 −6 K −1 at room temperature, whereas the linear expansion coefficient of InGaAs is 5.17 × 10 −6 K −1 , and the linear expansion coefficient of InGaAsP. The coefficient is 4.56 to 5.17 × 10 −6 K −1 depending on the composition ratio of As and P. Since the thermal expansion coefficient is a physical quantity related to the interatomic bonding force coefficient and bond length of the crystal, theoretically predicting the composition dependence of the thermal expansion coefficient in mixed crystals is based on the knowledge It is very difficult at present due to lack. However, from some experimental results, it is considered reasonable to predict the thermal expansion coefficient of mixed crystals based on linear interpolation as a first approximation.

このようなＩｎＰとＩｎＧａＡｓ（Ｐ）の線膨張係数の違いにより、ｎ型ＩｎＰ基板１０上に成長したｎ型ＤＢＲ層１２は大きな歪を受ける。そして、参考例ではｎ型ＤＢＲ層１２の歪の影響をｉ−ＩｎＧａＡｓ光吸収層１６が直接受け、素子間の特性ばらつきの原因となる。   Due to such a difference in linear expansion coefficient between InP and InGaAs (P), the n-type DBR layer 12 grown on the n-type InP substrate 10 receives a large strain. In the reference example, the i-InGaAs light absorption layer 16 is directly affected by the strain of the n-type DBR layer 12 and causes variation in characteristics between elements.

これに対し、本実施の形態では、ｎ型ＤＢＲ層１２とｉ−ＩｎＧａＡｓ光吸収層１６の間に、ｎ型ＩｎＰ基板１０と同じ材料で構成されたｎ型ＩｎＰ歪緩和層１４を挿入している。このｎ型ＩｎＰ歪緩和層１４によりｎ型ＤＢＲ層１２の歪が緩和されるため、ｉ−ＩｎＧａＡｓ光吸収層１６に加わる歪量を減らすことができる。よって、素子特性のばらつきが少ない。   In contrast, in this embodiment, an n-type InP strain relaxation layer 14 made of the same material as that of the n-type InP substrate 10 is inserted between the n-type DBR layer 12 and the i-InGaAs light absorption layer 16. Yes. Since the strain of the n-type DBR layer 12 is relaxed by the n-type InP strain relaxation layer 14, the amount of strain applied to the i-InGaAs light absorption layer 16 can be reduced. Therefore, there is little variation in element characteristics.

また、ｎ型ＤＢＲ層１２とｉ−ＩｎＧａＡｓ光吸収層１６の間に形成されている層のトータルの光学長が入射光の波長λの半分の整数倍である。これにより、ｎ型ＤＢＲ層１２の反射率が低下するのを防ぐことができる。よって、光半導体装置の量子効率が高い。   The total optical length of the layer formed between the n-type DBR layer 12 and the i-InGaAs light absorption layer 16 is an integral multiple of half the wavelength λ of the incident light. Thereby, it can prevent that the reflectance of the n-type DBR layer 12 falls. Therefore, the quantum efficiency of the optical semiconductor device is high.

なお、ｎ型ＩｎＰ歪緩和層１４は、０．１ｕｍまで薄くすることもでき、数ｕｍ又はそれ以上の層厚にすることもできる。ｎ型ＩｎＰ歪緩和層１４の層厚が増すと、ｎ型ＤＢＲ層１２の歪が緩和されて、ｉ−ＩｎＧａＡｓ光吸収層１６はｎ型ＩｎＰ基板１０上に直接エピ成長した状態に近づく。しかし、ｎ型ＩｎＰ歪緩和層１４での光損失や光散乱が多くなり、量子効率が低下する場合がある。従って、ｎ型ＩｎＰ歪緩和層１４の層厚は、用途の詳細な条件によって決めるべきである。   Note that the n-type InP strain relaxation layer 14 can be thinned to 0.1 μm, or can be several μm or thicker. As the layer thickness of the n-type InP strain relaxation layer 14 increases, the strain of the n-type DBR layer 12 is relaxed and the i-InGaAs light absorption layer 16 approaches the state of being directly epitaxially grown on the n-type InP substrate 10. However, light loss and light scattering in the n-type InP strain relaxation layer 14 increase, and the quantum efficiency may decrease. Therefore, the layer thickness of the n-type InP strain relaxation layer 14 should be determined according to the detailed conditions of the application.

実施の形態２．
図３は、本発明の実施の形態２に係る光半導体装置を示す断面図である。この光半導体装置は、ｐ型領域を選択拡散で形成したプレーナ型ｐｉｎフォトダイオードである。 Embodiment 2. FIG.
FIG. 3 is a sectional view showing an optical semiconductor device according to Embodiment 2 of the present invention. This optical semiconductor device is a planar pin photodiode in which a p-type region is formed by selective diffusion.

ｉ−ＩｎＧａＡｓ光吸収層１６上にキャリア濃度１×１０１６ｃｍ−３以下のｎ型ＩｎＰ層２６が形成され、ｎ型ＩｎＰ層２６の一部に選択拡散等によりｐ型ＩｎＰ層２８（第２導電型の半導体層）が形成されている。その他の構成は実施の形態１と同様である。これにより実施の形態１と同様の効果を得ることができる。 An n-type InP layer 26 having a carrier concentration of 1 × 10 16 cm −3 or less is formed on the i-InGaAs light absorption layer 16, and a p-type InP layer 28 (second second) is formed on a part of the n-type InP layer 26 by selective diffusion or the like. Conductive semiconductor layer) is formed. Other configurations are the same as those in the first embodiment. Thereby, the same effect as in the first embodiment can be obtained.

実施の形態３．
図４は、本発明の実施の形態３に係る光半導体装置を示す断面図である。この光半導体装置はプレーナ型ＩｎＰアバランシェフォトダイオードである。 Embodiment 3 FIG.
FIG. 4 is a sectional view showing an optical semiconductor device according to Embodiment 3 of the present invention. This optical semiconductor device is a planar InP avalanche photodiode.

ｉ−ＩｎＧａＡｓ光吸収層１６上にｎ型ＩｎＰ増倍層３０（キャリア増倍層）が形成され、ｎ型ＩｎＰ層３０の一部に選択拡散等によりｐ型ＩｎＰ層２８（第２導電型の半導体層）が形成されている。ｐ型ＩｎＰ層２８の外周にＢｅのイオン注入などによりガードリング３２が形成されている。ｎ型ＩｎＰ増倍層３０は、ｉ−ＩｎＧａＡｓ光吸収層１６で発生した光キャリアをアバランシェ増倍する。その他の構成は実施の形態１と同様である。   An n-type InP multiplication layer 30 (carrier multiplication layer) is formed on the i-InGaAs light absorption layer 16, and a p-type InP layer 28 (second conductivity type) is formed on a part of the n-type InP layer 30 by selective diffusion or the like. Semiconductor layer) is formed. A guard ring 32 is formed on the outer periphery of the p-type InP layer 28 by Be ion implantation or the like. The n-type InP multiplication layer 30 performs avalanche multiplication on the optical carriers generated in the i-InGaAs light absorption layer 16. Other configurations are the same as those of the first embodiment.

ｎ型ＩｎＰ増倍層３０に接するようにｐ型ＩｎＰ層２８が形成されている。このｐ型ＩｎＰ層２８はウェハプロセス中に熱拡散法を用いて形成される。そして、ｐ型ドーパントの拡散深さを制御することでｎ型ＩｎＰ増倍層３０の層厚をｎｍオーダーで制御している。従って、格子歪の影響でドーパントの拡散速度や、ドーパントの拡散分布が変化すると増倍特性が大きく変化するため、ｎ型ＩｎＰ歪緩和層１４を挿入することによる素子特性のばらつき低減効果は非常に大きい。   A p-type InP layer 28 is formed in contact with the n-type InP multiplication layer 30. The p-type InP layer 28 is formed using a thermal diffusion method during the wafer process. The layer thickness of the n-type InP multiplication layer 30 is controlled on the order of nm by controlling the diffusion depth of the p-type dopant. Therefore, since the multiplication characteristics greatly change when the diffusion rate of the dopant and the diffusion distribution of the dopant change due to the influence of the lattice strain, the effect of reducing the variation in device characteristics by inserting the n-type InP strain relaxation layer 14 is very high. large.

実施の形態４．
図５は、本発明の実施の形態４に係る光半導体装置を示す断面図である。この光半導体装置はプレーナ型ＡｌＩｎＡｓアバランシェフォトダイオードである。 Embodiment 4 FIG.
FIG. 5 is a sectional view showing an optical semiconductor device according to Embodiment 4 of the present invention. This optical semiconductor device is a planar AlInAs avalanche photodiode.

ｎ型ＤＢＲ層１２とｉ−ＩｎＧａＡｓ光吸収層１６の間に、ｎ型ＡｌＩｎＡｓ増倍層３４（キャリア増倍層）と電界緩和層３６が形成されている。ｎ型ＡｌＩｎＡｓ増倍層３４は、ｉ−ＩｎＧａＡｓ光吸収層１６で発生した光キャリアをアバランシェ増倍する。その他の構成は実施の形態２と同様である。これにより、実施の形態１，２と同様の効果を得ることができる。   An n-type AlInAs multiplication layer 34 (carrier multiplication layer) and an electric field relaxation layer 36 are formed between the n-type DBR layer 12 and the i-InGaAs light absorption layer 16. The n-type AlInAs multiplication layer 34 avalanche multiplies the optical carriers generated in the i-InGaAs light absorption layer 16. Other configurations are the same as those of the second embodiment. Thereby, the effect similar to Embodiment 1, 2 can be acquired.

実施の形態５．
図６は、本発明の実施の形態５に係る光半導体装置を示す断面図である。この光半導体装置は実施の形態４と同様にプレーナ型ＡｌＩｎＡｓアバランシェフォトダイオードである。 Embodiment 5 FIG.
FIG. 6 is a sectional view showing an optical semiconductor device according to Embodiment 5 of the present invention. This optical semiconductor device is a planar type AlInAs avalanche photodiode as in the fourth embodiment.

ｎ型ＩｎＰ歪緩和層１４とｎ型ＡｌＩｎＡｓ増倍層３４の間にキャリア濃度の高いｎ型ＡｌＩｎＡｓ層３８を挿入している。その他の構成は実施の形態４と同様である。これにより、ｎ型ＡｌＩｎＡｓ増倍層３４の電界がｎ型ＤＢＲ層１２のｎ型ＩｎＰ層１２ａにかからないため、ｎ型ＩｎＰ層１２ａでの正孔の増倍が抑制され、低雑音のアバランシェフォトダイオードを実現することができる。   An n-type AlInAs layer 38 having a high carrier concentration is inserted between the n-type InP strain relaxation layer 14 and the n-type AlInAs multiplication layer 34. Other configurations are the same as those in the fourth embodiment. Thereby, since the electric field of the n-type AlInAs multiplication layer 34 is not applied to the n-type InP layer 12a of the n-type DBR layer 12, the multiplication of holes in the n-type InP layer 12a is suppressed, and a low noise avalanche photodiode is obtained. Can be realized.

実施の形態６．
図７は、本発明の実施の形態６に係る光半導体装置を示す断面図である。この光半導体装置は基板側から光を入射する裏面入射共振型フォトダイオードである。 Embodiment 6 FIG.
FIG. 7 is a sectional view showing an optical semiconductor device according to Embodiment 6 of the present invention. This optical semiconductor device is a back-illuminated resonance type photodiode that receives light from the substrate side.

ｎ型ＩｎＰ基板１０の裏面に反射防止膜４０が形成されている。そして、ｎ型ＩｎＰ基板１０の裏面側から光を入射する。その他の構成は実施の形態２と同様である。これにより、実施の形態１，２と同様の効果を得ることができる   An antireflection film 40 is formed on the back surface of the n-type InP substrate 10. Then, light enters from the back side of the n-type InP substrate 10. Other configurations are the same as those of the second embodiment. Thereby, the effect similar to Embodiment 1, 2 can be acquired.

実施の形態７．
図８は、本発明の実施の形態７に係る光半導体装置を示す断面図である。この光半導体装置は面発光レーザである。 Embodiment 7 FIG.
FIG. 8 is a sectional view showing an optical semiconductor device according to Embodiment 7 of the present invention. This optical semiconductor device is a surface emitting laser.

ｎ型ＩｎＰ基板１０（半導体基板）上に、ｎ型ＤＢＲ層１２（第１導電型の分布ブラッグ反射層）、ｎ型ＩｎＰ歪緩和層１４（第１導電型の歪緩和層）、キャリア濃度５×１０１５ｃｍ−３以下のｉ−ＩｎＧａＡｓ活性層４２（活性層）、及びｐ型ＤＢＲ層４４（第２導電型の分布ブラッグ反射層）が順番に形成されている。ｐ型ＤＢＲ層４４上には、反射防止膜と表面保護膜を兼ねたＳｉＮなどの絶縁膜２０とアノード（ｐ型）電極２２が形成されている。ｎ型ＩｎＰ基板１０の裏面にはカソード（ｎ型）電極２４が形成されている。 On an n-type InP substrate 10 (semiconductor substrate), an n-type DBR layer 12 (first conductivity type distributed Bragg reflection layer), an n-type InP strain relaxation layer 14 (first conductivity type strain relaxation layer), a carrier concentration of 5 An i-InGaAs active layer 42 (active layer) of × 10 15 cm −3 or less and a p-type DBR layer 44 (second conductivity type distributed Bragg reflection layer) are formed in order. On the p-type DBR layer 44, an insulating film 20 such as SiN, which also serves as an antireflection film and a surface protective film, and an anode (p-type) electrode 22 are formed. A cathode (n-type) electrode 24 is formed on the back surface of the n-type InP substrate 10.

ｎ型ＤＢＲ層１２は、ｎ型ＩｎＰ層１２ａとｎ型ＩｎＧａＡｓＰ層１２ｂを交互に積層したものである。ｐ型ＤＢＲ層４４は、ｎ型ＩｎＰ層４４ａとｎ型ＩｎＧａＡｓＰ層４４ｂを交互に積層したものである。   The n-type DBR layer 12 is formed by alternately stacking n-type InP layers 12a and n-type InGaAsP layers 12b. The p-type DBR layer 44 is formed by alternately stacking n-type InP layers 44a and n-type InGaAsP layers 44b.

このようにｉ−ＩｎＧａＡｓ活性層４２の上下をＤＢＲ層で挟むと、上下のＤＢＲ層の間で光が往復してレーザ発振が起こる。   When the upper and lower sides of the i-InGaAs active layer 42 are sandwiched between the DBR layers in this way, light reciprocates between the upper and lower DBR layers to cause laser oscillation.

本実施の形態では、ｎ型ＤＢＲ層１２とｉ−ＩｎＧａＡｓ活性層４２の間に、ｎ型ＩｎＰ基板１０と同じ材料で構成されたｎ型ＩｎＰ歪緩和層１４を挿入している。このｎ型ＩｎＰ歪緩和層１４によりｎ型ＤＢＲ層１２の歪が緩和されるため、ｉ−ＩｎＧａＡｓ活性層４２に加わる歪量を減らすことができる。よって、素子特性のばらつきが少ない。   In the present embodiment, an n-type InP strain relaxation layer 14 made of the same material as that of the n-type InP substrate 10 is inserted between the n-type DBR layer 12 and the i-InGaAs active layer 42. Since the strain of the n-type DBR layer 12 is relaxed by the n-type InP strain relaxation layer 14, the amount of strain applied to the i-InGaAs active layer 42 can be reduced. Therefore, there is little variation in element characteristics.

また、ｎ型ＤＢＲ層１２とｉ−ＩｎＧａＡｓ活性層４２の間に形成されている層のトータルの光学長が出射光の波長λの半分の整数倍である。これにより、ｎ型ＤＢＲ層１２の反射率が低下するのを防ぐことができる。よって、光半導体装置の量子効率が高い。   Further, the total optical length of the layer formed between the n-type DBR layer 12 and the i-InGaAs active layer 42 is an integral multiple of half the wavelength λ of the emitted light. Thereby, it can prevent that the reflectance of the n-type DBR layer 12 falls. Therefore, the quantum efficiency of the optical semiconductor device is high.

本発明の実施の形態１に係る光半導体装置を示す断面図である。1 is a cross-sectional view showing an optical semiconductor device according to Embodiment 1 of the present invention. 光半導体装置の参考例を示す断面図である。It is sectional drawing which shows the reference example of an optical semiconductor device. 本発明の実施の形態２に係る光半導体装置を示す断面図である。It is sectional drawing which shows the optical semiconductor device which concerns on Embodiment 2 of this invention. 本発明の実施の形態３に係る光半導体装置を示す断面図である。It is sectional drawing which shows the optical semiconductor device which concerns on Embodiment 3 of this invention. 本発明の実施の形態４に係る光半導体装置を示す断面図である。It is sectional drawing which shows the optical semiconductor device which concerns on Embodiment 4 of this invention. 本発明の実施の形態５に係る光半導体装置を示す断面図である。It is sectional drawing which shows the optical semiconductor device which concerns on Embodiment 5 of this invention. 本発明の実施の形態６に係る光半導体装置を示す断面図である。It is sectional drawing which shows the optical semiconductor device which concerns on Embodiment 6 of this invention. 本発明の実施の形態７に係る光半導体装置を示す断面図である。It is sectional drawing which shows the optical semiconductor device which concerns on Embodiment 7 of this invention.

符号の説明Explanation of symbols

１０ ｎ型ＩｎＰ基板（半導体基板）
１２ ｎ型ＤＢＲ層（第１導電型の分布ブラッグ反射層）
１６ ｉ−ＩｎＧａＡｓ光吸収層（光吸収層）
１８ ｐ型ＩｎＰ窓層（第２導電型の半導体層）
２８ ｐ型ＩｎＰ層（第２導電型の半導体層）
３０ ｎ型ＩｎＰ増倍層（キャリア増倍層）
３４ ｎ型ＡｌＩｎＡｓ増倍層（キャリア増倍層）
４４ ｐ型ＤＢＲ層（第２導電型の分布ブラッグ反射層）
４２ ｉ−ＩｎＧａＡｓ活性層（活性層） 10 n-type InP substrate (semiconductor substrate)
12 n-type DBR layer (first conductivity type distributed Bragg reflection layer)
16 i-InGaAs light absorption layer (light absorption layer)
18 p-type InP window layer (second conductivity type semiconductor layer)
28 p-type InP layer (second conductivity type semiconductor layer)
30 n-type InP multiplication layer (carrier multiplication layer)
34 n-type AlInAs multiplication layer (carrier multiplication layer)
44 p-type DBR layer (second conductivity type distributed Bragg reflection layer)
42 i-InGaAs active layer (active layer)

Claims (6)

半導体基板上に、第１導電型の分布ブラッグ反射層、第１導電型の歪緩和層、光吸収層、及び第２導電型の半導体層が順番に形成され、
前記歪緩和層は、前記半導体基板と同じ材料で構成され、
前記分布ブラッグ反射層と前記光吸収層の間に形成されている層のトータルの光学長は、入射光の波長の半分の整数倍であることを特徴とする光半導体装置。 A first conductivity type distributed Bragg reflection layer, a first conductivity type strain relaxation layer, a light absorption layer, and a second conductivity type semiconductor layer are sequentially formed on a semiconductor substrate,
The strain relaxation layer is made of the same material as the semiconductor substrate,
An optical semiconductor device characterized in that a total optical length of a layer formed between the distributed Bragg reflection layer and the light absorption layer is an integral multiple of half the wavelength of incident light. 前記半導体基板及び前記歪緩和層はＩｎＰで構成され、
前記分布ブラッグ反射層はＩｎＧａＡｓ層、ＩｎＧａＡｓＰ層又はＡｌＩｎＡｓ層を含むことを特徴とする請求項１に記載の光半導体装置。 The semiconductor substrate and the strain relaxation layer are made of InP,
2. The optical semiconductor device according to claim 1, wherein the distributed Bragg reflection layer includes an InGaAs layer, an InGaAsP layer, or an AlInAs layer. 前記第２導電型の半導体層は、前記半導体基板と同じ材料で構成されていることを特徴とする請求項１に記載の光半導体装置。   The optical semiconductor device according to claim 1, wherein the second conductivity type semiconductor layer is made of the same material as the semiconductor substrate. 前記光吸収層で発生した光キャリアをアバランシェ増倍するキャリア増倍層が、前記光吸収層と前記第２導電型の半導体層の間に形成されていることを特徴とする請求項１に記載の光半導体装置。   2. The carrier multiplication layer for avalanche multiplication of optical carriers generated in the light absorption layer is formed between the light absorption layer and the second conductivity type semiconductor layer. Optical semiconductor device. 前記光吸収層で発生した光キャリアをアバランシェ増倍するキャリア増倍層が、前記分布ブラッグ反射層と前記光吸収層の間に形成されていることを特徴とする請求項１に記載の光半導体装置。   2. The optical semiconductor according to claim 1, wherein a carrier multiplication layer for avalanche multiplication of optical carriers generated in the light absorption layer is formed between the distributed Bragg reflection layer and the light absorption layer. apparatus. 半導体基板上に、第１導電型の分布ブラッグ反射層、第１導電型の歪緩和層、活性層、及び第２導電型の分布ブラッグ反射層が順番に形成され、
前記歪緩和層は、前記半導体基板と同じ材料で構成され、
前記第１導電型の分布ブラッグ反射層と前記活性層の間に形成されている層のトータルの光学長は、出射光の波長の半分の整数倍であることを特徴とする光半導体装置。 A first conductive type distributed Bragg reflective layer, a first conductive type strain relaxation layer, an active layer, and a second conductive type distributed Bragg reflective layer are sequentially formed on a semiconductor substrate,
The strain relaxation layer is made of the same material as the semiconductor substrate,
An optical semiconductor device characterized in that a total optical length of a layer formed between the first conductivity type distributed Bragg reflection layer and the active layer is an integral multiple of half the wavelength of the emitted light.
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