JP2009264843A - Manufacturing method of semiconductor sensor - Google Patents

Abstract

In a method of manufacturing a semiconductor sensor provided with a cover plate, when the cover wafer is mounted in a wafer state and the cover wafer is processed to expose an electrode pad, detailed alignment of the cover wafer is not required, and In addition, damage to the wiring pattern and electrode pads and generation of residues on the cover wafer are prevented.
A cover wafer having a concave portion at least at a position corresponding to the electrode pad is mounted on a semiconductor wafer having a plurality of semiconductor sensor regions and a sensor portion and an electrode pad formed on the semiconductor sensor region. (A). The surface of the cover wafer 24a opposite to the semiconductor wafer 2d is ground or polished to reduce the thickness of the cover wafer 24a and open the bottom of the recess 24b to expose the electrode pad 16 (B). The semiconductor sensor region is cut out from the semiconductor wafer 2d to solidify the semiconductor sensor 1 (C).
[Selection] Figure 1

Description

The present invention relates to a semiconductor substrate, a sensor portion formed on the semiconductor substrate, an electrode pad formed on the semiconductor substrate for taking out an electrical signal of the sensor portion, and covering the sensor portion without covering the electrode pad The present invention relates to a method for manufacturing a semiconductor sensor including a cover plate disposed on a semiconductor substrate.
The semiconductor sensor is used, for example, for measurement of acceleration in a traveling direction or a lateral direction applied to a running car, or measurement of camera shake of a video camera.

  As a semiconductor sensor, there is one in which a piezoresistor is formed on the surface of a silicon single crystal wafer by a method similar to an IC (integrated circuit) manufacturing technique and used as a strain gauge (for example, Patent Document 1, Patent Document 2 and (See Patent Document 3). A semiconductor sensor using a piezoresistor provides a thin flexible part by etching or the like on the back surface of the silicon wafer in the region where the piezoresistor is formed so that the flexible part is deformed by acceleration. The electrical signal corresponding to the acceleration is obtained by measuring the resistance value of the piezoresistor that changes due to the deformation.

  The semiconductor sensor is provided with a weight portion so that the flexible portion is easily bent. A support portion is provided around the weight portion, and one end of the flexible portion is fixed to the weight portion and the other end is fixed to the support portion. A metal wiring pattern and an electrode pad electrically connected to the piezoresistor are formed on the support portion.

  Further, as a semiconductor sensor formed on a semiconductor substrate, an acceleration is detected based on a change in capacitance between a movable electrode and a fixed electrode (see, for example, Patent Document 4), or two vibrators. There is one that detects an angular velocity based on the vibration (see, for example, Patent Document 5) and a pressure sensor.

Some semiconductor sensors include a cover plate to prevent damage to the flexible part due to, for example, a strong impact or to prevent moisture from entering the sensor part (for example, Patent Document 6 and (See Patent Document 7).
6A and 6B are diagrams illustrating an example of a semiconductor sensor provided with a cover plate. FIG. 6A is a plan view, and FIG. 6B is a cross-sectional view taken along the line AA in FIG.

The semiconductor sensor 1 includes an SOI (Silicon-on-Insulator) substrate 2 composed of a silicon layer 2a, an insulating layer 2b formed under the silicon layer 2a, and a silicon layer 2c formed under the insulating layer 2b. ing.
A flexible portion 6 made of a silicon layer 2 a is formed continuously to the silicon layer 2 a of the frame-like support portion 4 made of the SOI substrate 2. A piezoresistor 8 is formed on the silicon layer 2 a of the flexible portion 6.
A weight portion 10 made of the SOI substrate 2 is formed on the center side of the support portion 4 as viewed from above, spaced from the support portion 4. The silicon layer 2 a of the weight portion 10 is formed continuously with the flexible portion 6. The weight part 10 is supported by the flexible part 6.

  An insulating film 12 is formed on the surface of the silicon layer 2a. In FIG. 6A, the piezoresistor 8 is shown for convenience. A plurality of metal wiring patterns 14 and a plurality of electrode pads 16 are formed on the insulating film 12. The metal wiring pattern 14 is electrically connected to the piezoresistor 8 through a through hole 12 a formed in the insulating film 12. Although illustration of the metal wiring pattern 14 in the vicinity of the electrode pad 16 is omitted in FIG. 6, the electrode pad 16 is electrically connected to the piezoresistor 8 through the metal wiring pattern 14.

A protective film 18 (not shown in (A)) is formed on the insulating film 12 including the formation region of the metal wiring pattern 14. An opening is formed in the protective film 18 on the electrode pad 16, and the surface of the electrode pad 16 is exposed.
A bottom plate 20 is bonded to the back surface of the support portion 4 with an adhesive 22. The lower end surface of the weight portion 10 is spaced from the bottom plate 20 by the thickness of the adhesive 22.

  A cover plate 24 is bonded to the protective film 18 on the upper surface of the support 4 by an adhesive 26. The surface of the weight portion 10 is spaced from the cover plate 24 by the thickness of the adhesive 26. The cover plate 24 is provided at a position that covers the sensor portion 28 including the flexible portion 6 and the weight portion 10 and does not cover the electrode pad 16 when viewed from above.

  In mounting a cover plate on a semiconductor sensor, in Patent Document 6, the cover plate is mounted after the semiconductor sensor is solidified. However, in a miniaturized semiconductor sensor, the cover is covered in a wafer state as in Patent Document 7. It is more efficient to solidify the semiconductor sensor after mounting the plate.

  FIG. 7 is a process cross-sectional view for explaining a conventional method of manufacturing a semiconductor sensor including a process of mounting a cover plate in a wafer state. 7A to 7C correspond to steps (A) to (C) described below.

  (A) The bottom wafer 20a is bonded by the adhesive 22 to the back surface of the SOI wafer 2d on which the sensor unit 28, the insulating film, the metal wiring pattern, the electrode pad 16, and the protective film are formed. The cover wafer 24a is bonded to the upper surface of the SOI wafer 2d by the adhesive 26. The cover wafer 24a has a strip-shaped recess 24b at a position corresponding to the electrode pad 16 and the scribe region 30 on the surface facing the SOI wafer 2d.

  (B) The dicing saw 32 is used to cut and remove the concave portion 24b of the cover wafer 24a. Thereby, the protective film on the SOI wafer 2d in the electrode pad 16 and the scribe region 30 is exposed. A probe needle is brought into contact with the electrode pad 16 to perform an electrical characteristic test of the sensor unit 28.

  (C) Using a dicing saw (not shown), the SOI wafer 2d and the like in the scribe region 30 are cut and removed, and the semiconductor sensor 1 is solidified.

Japanese Patent No. 2670048 JP 2004-233080 A Japanese Patent Application Laid-Open No. 2004-257832 Japanese Patent No. 4000936 Japanese Patent No. 3627648 JP 2004-233072 A JP 2007-508956 A

  In the conventional manufacturing method described with reference to FIG. 7, the dicing saw 32 is controlled not to contact the SOI wafer 2d in the step (B), but the dicing saw 32 does not contact the SOI wafer 2d. The diamond abrasive grains spilling from the dicing saw 32 or the cut chips of the cover wafer 24a hit the SOI wafer 2d, thereby damaging the metal wiring pattern 14 or the surface of the electrode pad 16 as shown in FIG. There is. Thereby, there existed a problem that the reliability of a semiconductor sensor deteriorated.

  Further, in the step (B) described with reference to FIG. 7, the cover wafer is cut by cutting two portions near the side surface of the recess 24b with respect to one recess 24b as shown in FIG. 7B. When the recess 24b portion of 24a is removed, the residue 36 of the cover wafer 24a may remain in the opening portion 34 of the cover wafer 24a as shown in FIG. If the probe needle is brought into contact with the electrode pad 16 in order to perform an electrical characteristic test of the sensor unit 28 in a state where the residue 36 is present on the electrode pad 16, the probe needle may be damaged. There is. In order to solve such a problem, it is necessary to confirm and remove the residue 36 before conducting the electrical characteristic test, which increases the number of steps.

  Further, when an opaque one such as a silicon wafer is used as the cover wafer 24a, an alignment mark for cutting and removing the concave portion 24b of the cover wafer 24a is provided on the cover wafer 24a or mounted on the cover wafer 24a. In this state, it is necessary to take measures such as cutting off a part of the cover wafer 24a so that a part of the SOI wafer 2d can be seen.

  Therefore, the present invention provides a method for manufacturing a semiconductor sensor having a cover plate, which requires detailed alignment of the cover wafer when the cover wafer is processed in the wafer state and then the cover wafer is processed to expose the electrode pads. It is another object of the present invention to provide a method of manufacturing a semiconductor sensor that can prevent damage to wiring patterns and electrode pads and generation of residues on a cover wafer.

A method of manufacturing a semiconductor sensor according to the present invention includes a semiconductor substrate, a sensor unit formed on the semiconductor substrate, an electrode pad formed on the semiconductor substrate for taking out an electrical signal of the sensor unit, and a sensor unit. A method for manufacturing a semiconductor sensor comprising a cover plate disposed on a semiconductor substrate without covering a cover electrode pad. And a cover plate having a recess at least at a position corresponding to the electrode pad on a semiconductor wafer comprising a semiconductor substrate having a plurality of semiconductor sensor regions and having the sensor portion and the electrode pad formed in the semiconductor sensor region. A cover wafer mounting step of mounting the cover wafer to the semiconductor wafer with the recess facing the surface, and grinding or polishing the surface of the cover wafer opposite to the semiconductor wafer to reduce the thickness of the cover wafer And a cover wafer grinding or polishing step for opening the bottom of the recess to expose the electrode pad, and a cutting step for cutting the semiconductor sensor region from the semiconductor wafer and solidifying the semiconductor sensor.
Here, the term “semiconductor substrate” includes an SOI substrate. Further, the cover wafer may be transparent or opaque.

  In the semiconductor sensor manufacturing method of the present invention, in the cover wafer mounting step, the cover wafer is mounted on the semiconductor wafer so that a step is formed between the semiconductor wafer and the cover wafer as viewed from the side. An example can be given.

  As an example of the method for forming the step, the semiconductor wafer having a notch when viewed from above is used, and the cover wafer having the same diameter as the semiconductor wafer and having a larger notch than the semiconductor wafer is used. The method to be used can be mentioned.

As another example of the method for forming the step, the semiconductor wafer having a notch as viewed from above is used, and the cover wafer has a notch having the same diameter and the same size as the semiconductor wafer. And a method of shifting the position of the notch between the semiconductor wafer and the cover wafer when the cover wafer is mounted on the semiconductor wafer.
However, in the method for manufacturing a semiconductor sensor of the present invention, the method for forming the step is not limited to these two methods.

  In the method of manufacturing a semiconductor sensor of the present invention, a recess is provided at least at a position corresponding to the electrode pad on a semiconductor wafer including a semiconductor substrate having a plurality of semiconductor sensor regions and having a sensor portion and an electrode pad formed in the semiconductor sensor region. A cover wafer mounting step for mounting the cover wafer as the cover plate on the semiconductor wafer with the concave portion facing the semiconductor wafer, and reducing the thickness of the cover wafer by grinding or polishing the surface of the cover wafer opposite to the semiconductor wafer. At the same time, a cover wafer grinding or polishing step for opening the bottom portion of the recess to expose the electrode pad and a cutting step for cutting the semiconductor sensor region from the semiconductor wafer to solidify the semiconductor sensor are included in that order. Since the manufacturing method of the semiconductor sensor of the present invention does not use a dicing saw in the cover wafer grinding or polishing process in which the electrode pads are exposed, the diamond abrasive grains of the dicing saw or the cut pieces of the cut cover wafer hit the semiconductor wafer. It is possible to prevent damage to the wiring pattern and electrode pads. Furthermore, since the electrode pad is exposed by grinding or polishing the cover wafer, no cover wafer residue is generated as in the case of cutting and removing the cover wafer using a dicing saw. Further, when the cover wafer is ground or polished, detailed alignment as in the case of using a dicing saw may not be performed.

  In the semiconductor sensor manufacturing method of the present invention, if the cover wafer is mounted on the semiconductor wafer so that a step is formed between the semiconductor wafer and the cover wafer when viewed from the side in the cover wafer mounting process, the semiconductor wafer And the thickness of the cover wafer can be measured and managed. Here, when the bottom wafer is mounted on the semiconductor wafer, the thickness of the semiconductor wafer includes the bottom wafer.

  As a method of forming the step, the semiconductor wafer having a notch when viewed from above is used, and the cover wafer having the same diameter as the semiconductor wafer and having a larger notch than the semiconductor wafer is used. By doing so, the step can be formed without applying special processing for forming the step to the semiconductor wafer and the cover wafer. The notches in the present invention are orientation flats and notches used for wafer alignment. Normally, these notches are formed in the wafer, so that special processing for forming the steps is performed. I don't need it.

  Further, as the method for forming the step, the semiconductor wafer having a notch when viewed from above, the cover wafer having a notch having the same diameter and the same size as the semiconductor wafer, Even when the position of the notch is shifted between the semiconductor wafer and the cover wafer when the cover wafer is mounted on the semiconductor wafer, the semiconductor wafer and the cover wafer are subjected to special processing for forming the step. And the step can be formed.

  FIG. 1 is a process cross-sectional view for explaining an embodiment of the present invention. 1A to 1C correspond to steps (A) to (C) described below. The semiconductor sensor manufactured by this embodiment is the same as that shown in FIG. In FIG. 1, parts having the same functions as those in FIGS. 6 and 7 are denoted by the same reference numerals. FIG. 2 is a plan view showing an SOI wafer on which a semiconductor sensor region used in this embodiment is formed. FIG. 3 is a plan view showing a cover wafer used in this embodiment. 4 is a plan view showing a state in which the cover wafer of FIG. 3 is mounted on the SOI wafer of FIG. This embodiment will be described with reference to FIGS. 1 to 4 and FIG.

(A) Referring also to FIG. 6, the bottom wafer 20 a is bonded to the back surface of the SOI wafer 2 d on which the sensor unit 28, the insulating film 12, the metal wiring pattern 14, the electrode pad 16 and the protective film 18 are formed by the adhesive 22. To do. The cover wafer 24a is bonded to the upper surface of the SOI wafer 2d by the adhesive 26. The cover wafer 24a has a strip-shaped recess 24b at a position corresponding to the electrode pad 16 and the scribe region 30 on the surface facing the SOI wafer 2d.

  Taking an example of the dimensions and materials of each member in the present embodiment, the thickness of the SOI wafer 2d is 400 μm (micrometer). The insulating film 12 is made of an NSG (non-doped silicon glass) film or a BPSG (boron phosphorus silicon glass) film having a thickness of 0.8 μm. The metal wiring pattern 14 is made of aluminum having a film thickness of 1.0 μm, has a line width of 1.4 μm, and a pitch of 1.5 μm. The electrode pad 16 is made of aluminum having a film thickness of 1.0 μm and has a planar size of 70 × 70 μm. The protective film 18 is composed of a laminated film of an NSG film having a thickness of 0.2 μm and a SiN (Silicon Nitride) film having a thickness of 1.0 μm. The bottom wafer 20 is made of a silicon wafer having the same diameter as the SOI wafer 2d and has a thickness of 400 μm. The adhesives 22 and 26 are formed by patterning a photosensitive polyimide adhesive and have a thickness of 3 to 8 μm, here 5 μm. The cover wafer 24a is made of a silicon wafer having the same diameter as that of the SOI wafer 2d and has a thickness of 625 μm. The width of the recess 24b of the cover wafer 24a is 500 μm and the depth is 150 μm. The width of the scribe region 30 is 200 μm. The planar size of the semiconductor sensor region surrounded by the scribe region 30 is 1.2 × 1.5 mm (millimeters). If the thickness of the insulating film 12 is reduced, the sensor sensitivity can be increased. Further, the planar shape of the electrode pad 16 is not limited to a square, and may be another shape, for example, a rectangle. In FIG. 6, the plurality of electrode pads 16 are arranged side by side in the vicinity of one side of the semiconductor sensor 1, but the electrode pads 16 are dispersed and formed in the vicinity of the plurality of sides of the semiconductor sensor 1. The arrangement of the pad 16 is arbitrary.

  As shown in FIG. 2, a plurality of semiconductor sensor regions defined by a scribe region 30 are formed on the SOI wafer 2d. The SOI wafer 2d is formed using a 150 mm silicon wafer. The length of the orientation flat 2e of the SOI wafer 2d is 57.5 mm (standard value). However, the length of the orientation flat 2e is not limited to the standard value.

  As shown in FIG. 3, the cover wafer 24a is also formed using a 150 mm silicon wafer. The length of the orientation flat 24c of the cover wafer 24a is 47.5 mm (standard value). However, the length of the orientation flat 24c is not limited to the standard value. The recess 24b can be formed, for example, by excavation using a dicing saw or by etching removal.

  As shown in FIG. 4, when the cover wafer 24a is mounted on the SOI wafer 2d, a part of the SOI wafer 2d is exposed as viewed from above due to the difference in the length of the orientation flats 2e and 24c. Thereby, a step is formed between the SOI wafer 2d and the cover wafer 24a when viewed from the side.

Returning to FIG. 1, the description of the manufacturing process will be continued.
(B) The surface of the cover wafer 24a is ground or polished to reduce the thickness of the cover wafer 24a and open the bottom of the recess 24b to expose the electrode pad 16. For the grinding process on the cover wafer 24a, for example, rough grinding and finish grinding are continuously performed using a grinding wheel. The cover wafer 24a having a thickness of 625 μm is subjected to rough grinding by 495 μm and finish grinding by 20 μm. Thereby, the cover thickness after grinding becomes 110 μm. In the grinding process of the cover wafer 24a, diamond abrasive grains and chips of the dicing saw are not generated as in the case where the dicing saw is used. Further, in the grinding process of the cover wafer 24a, it is not necessary to perform detailed alignment as in the case of using a dicing saw. Therefore, it is not necessary to form an alignment mark on the cover wafer 24a.
Here, the thickness of the cover wafer 24a is reduced by grinding, but the thickness of the cover wafer 24a may be reduced by polishing such as chemical mechanical polishing.

  In the step (B), a contact-type height measuring gauge cannot be used during the grinding process. Further, a commercially available silicon wafer has a thickness error of about ± 50 μm. Therefore, it is preferable to measure and manage the thickness of the cover wafer 24a using the steps shown in FIG. 4 before the grinding process. In the grinding process, if the thickness of the cover wafer 24a is managed by the axial movement of the grinding wheel of the grinding device with respect to the measured thickness of the cover wafer 24a before grinding, the accuracy of the thickness of the cover wafer 24a after grinding can be improved. Can be improved.

  Further, the bottom wafer 20a may be ground or polished to meet the demand for thinning the semiconductor sensor chip. If the thickness of the SOI wafer 2d is measured before the bottom wafer 20a is bonded to the SOI wafer 2d, the thickness of the bottom wafer 20a can be accurately measured and managed using the steps shown in FIG.

  After grinding the cover wafer 24a to expose the electrode pad 16, a probe needle is brought into contact with the electrode pad 16 to perform an electrical characteristic test on the semiconductor sensor region of the electrode pad 16. Here, since the residue of the cover wafer 24a is not generated in the grinding process of the cover wafer 24a unlike the case where a dicing saw is used, damage to the probe needle and measurement failure due to the residue can be prevented.

  (C) Using a dicing saw (not shown), the SOI wafer 2d and the like in the scribe region 30 are cut and removed, and the semiconductor sensor 1 is solidified. The cutting and removing of the scribe region 30 is not limited to using a dicing saw, and may be performed by an etching technique.

  In the above embodiment, the cover wafer 24a having the orientation flat 24c longer than the orientation flat 2e of the SOI wafer 2d is used to form a step between the SOI wafer 2d and the cover wafer 24a when viewed from the side. On the other hand, the step can be formed even by using a cover wafer 24a having an orientation flat 24c shorter than the orientation flat 2e of the SOI wafer 2d.

  In the above embodiment, the SOI wafer 2d and the cover wafer 24a have different orientation flats 2e and 24c to form a step between the SOI wafer 2d and the cover wafer 24a as viewed from the side. The step may be formed by other methods.

  FIG. 5 is a plan view showing a state where a cover wafer having an orientation flat having the same diameter and the same length as the SOI wafer is mounted on the SOI wafer.

  In FIG. 5, the cover wafer 24 a is mounted on the SOI wafer 2 d with the positions of the orientation flats 2 e and 24 c shifted by, for example, 90 degrees as viewed from above. The SOI wafer 2d and the cover wafer 24a are provided with the orientation flats 2e and 24c having the same length. By shifting the positions of the orientation flats 2e and 24c, the SOI wafer 2d and the cover wafer 24a are positioned between the SOI wafer 2d and the cover wafer 24a as viewed from the side. A step can be formed.

  4 and 5, the SOI wafer 2d and the cover wafer 24a are provided with the orientation flats 2e and 24c, but the notches formed in the SOI wafer and the cover wafer may be notches. Even when using SOI wafers and cover wafers with notches formed on the SOI wafer, the notch size differs between the SOI wafer and the cover wafer, or the cover wafer notches are shifted with respect to the SOI wafer notches. By mounting a cover wafer on the surface, a step can be formed between the SOI wafer 2d and the cover wafer 24a when viewed from the side. Further, even if one of the SOI wafer and the cover wafer has an orientation flat and the other has a notch, the step can be formed. In addition, the manufacturing method of the semiconductor sensor of this invention does not necessarily require the said level | step difference.

  As mentioned above, although the Example of this invention was described, the material, the dimension, the shape, arrangement | positioning, etc. which were shown in this specification are only examples, and this invention is in the range described in the claim. Various changes are possible.

  Moreover, in the said Example, although this invention is applied to the manufacturing method of a piezoresistive type semiconductor sensor, the object concerning the manufacturing method of the semiconductor sensor of this invention is not limited to a piezoresistive type semiconductor sensor. For example, a semiconductor sensor manufacturing method for detecting acceleration disclosed in Patent Document 4 or a semiconductor sensor for detecting angular velocity disclosed in Patent Document 5 may be a semiconductor sensor provided with a cover plate. The manufacturing method of the semiconductor sensor of the present invention can be applied.

  In the above embodiment, when the electrode pad 16 is exposed by reducing the thickness of the cover wafer 24a, the scribe region 30 in the vicinity of the electrode pad 16 is also exposed. However, in the cover wafer grinding or polishing step of the present invention. It is sufficient that at least the electrode pad can be exposed.

It is process sectional drawing for demonstrating one Example of this invention. It is a top view which shows the SOI wafer in which the semiconductor sensor area | region used in the Example was formed. It is a top view which shows the cover wafer used in the Example. FIG. 4 is a plan view showing a state where the cover wafer of FIG. 3 is mounted on the SOI wafer of FIG. 2. It is a top view which shows the state which mounted the cover wafer which has an orientation flat of the same diameter and length as an SOI wafer on an SOI wafer. It is a figure which shows an example of the semiconductor sensor provided with the cover board, (A) is a top view, (B) is sectional drawing in the AA position of (A). It is process sectional drawing for demonstrating the manufacturing method of the conventional semiconductor sensor. It is a figure for demonstrating the malfunction of the conventional semiconductor sensor, and shows the state which the metal wiring pattern damaged. It is a figure for demonstrating the malfunction of the conventional semiconductor sensor, and shows the state in which the residue remains.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor sensor 2 SOI substrate 2d SOI wafer 16 Electrode pad 24 Cover board 24a Cover wafer 24b Recess 28 Sensor part

Claims (4)

A semiconductor substrate; a sensor portion formed on the semiconductor substrate; an electrode pad formed on the semiconductor substrate for taking out an electrical signal of the sensor portion; and an electrode pad that covers the sensor portion and does not cover the electrode pad. In a method of manufacturing a semiconductor sensor provided with a cover plate arranged,
A cover having a plurality of semiconductor sensor regions and having a recess at least at a position corresponding to the electrode pad on a semiconductor wafer comprising a semiconductor substrate in which the sensor portion and the electrode pad are formed in the semiconductor sensor region. A cover wafer mounting step for mounting the wafer with the recess facing the semiconductor wafer;
A cover wafer grinding or polishing step for reducing the thickness of the cover wafer by grinding or polishing the surface of the cover wafer opposite to the semiconductor wafer and opening the bottom of the recess to expose the electrode pad; ,
A semiconductor sensor manufacturing method comprising: a cutting step of cutting out the semiconductor sensor region from the semiconductor wafer and solidifying the semiconductor sensor in that order.   2. The semiconductor sensor according to claim 1, wherein, in the cover wafer mounting step, the cover wafer is mounted on the semiconductor wafer such that a step is formed between the semiconductor wafer and the cover wafer as viewed from a side. Production method. Using the semiconductor wafer having a notch when viewed from above,
3. The method of manufacturing a semiconductor sensor according to claim 2, wherein the step is formed by using the cover wafer having the same diameter as the semiconductor wafer and having a larger notch than the semiconductor wafer. Using the semiconductor wafer having a notch when viewed from above,
Using the cover wafer having a notch with the same diameter and the same size as the semiconductor wafer,
The method of manufacturing a semiconductor sensor according to claim 2, wherein when the cover wafer is mounted on the semiconductor wafer, the step is formed by shifting a position of a notch between the semiconductor wafer and the cover wafer.