JP2009180640A - Film thickness measurement method - Google Patents

Abstract

An object of the present invention is to improve product yield and reduce costs while performing highly accurate film thickness management.
Irradiation light is irradiated toward a metal compound layer included in a semiconductor element formed on a transparent semiconductor substrate, and the thickness of the light transmission film is measured according to the reflected light from the metal compound layer. To do.
[Selection] Figure 1

Description

  The present invention relates to a film thickness measuring method in a manufacturing process of a semiconductor device.

  In a process of manufacturing a semiconductor element, as a method of separating a semiconductor layer and a multilayer wiring in a direction perpendicular to the substrate, an intermediate insulating layer (hereinafter referred to as ILD) is used to make the semiconductor layer and the multilayer wiring. There are known methods for separating the two.

  Such ILD can smooth the coverage caused by the step of the gate electrode and the step of the wiring formed on the semiconductor layer (that is, the step surface shape of the gate electrode and the wiring). In order to obtain high flatness on the insulating film, an etch back process (that is, a flattening step) is performed after the multilayer insulating film is formed.

  Since the insulating film thickness of the ILD after the etch back process becomes the length of a through hole formed thereafter, the film thickness management in the planarization process is a very important management item. As a method for controlling the film thickness of the ILD, a method of optically measuring the insulating film thickness of a region doped with impurity atoms in a semiconductor layer (hereinafter referred to as an active region) has been conventionally known.

  The method described above has the following problems. For example, in the case where a semiconductor layer is formed on a light transmission type substrate such as a sapphire substrate, the sapphire substrate itself is transparent and the semiconductor layer has a thickness of only about several hundred nm. Will pass through the light transmissive substrate and the semiconductor layer without being reflected. Here, as shown in FIG. 5, the light transmission in the sapphire substrate can be confirmed to transmit light in a wide wavelength range. Therefore, in a semiconductor device using a light transmission type substrate typified by a sapphire substrate, the ILD film thickness on the active region cannot be measured by an optical film thickness measurement method.

  As a method for solving such a problem, a plurality of sapphire substrates and a plurality of silicon substrates are connected by an adhesive or the like, and the substrate formed by the sapphire substrate and the silicon substrate is formed as one semiconductor wafer, and the semiconductor wafer is formed on the semiconductor wafer. There is a method in which a semiconductor layer and an ILD layer are formed and an ILD film thickness on an active region formed on a silicon substrate is measured.

Further, Patent Document 1 discloses a method for relatively calculating the thickness of the film thickness from the amount of light transmitted through the light-transmitting substrate.
JP 2004-125470 A

  However, since a plurality of silicon substrates that are not used as the original product (ie, a semiconductor device including a sapphire substrate) are included in one semiconductor wafer, the yield of the original product is reduced and the processing of the silicon substrate is performed. Since the cost is also incurred, there is a problem that the cost of the original product itself increases.

  In addition, since the original product is a semiconductor device including a sapphire substrate, the conventional method does not perform film thickness management as the original product, and it is difficult to perform film thickness management with high accuracy in the original product. There are also problems.

  The present invention has been made in view of the circumstances as described above, and provides a film thickness measuring method capable of improving the yield of products and reducing costs while performing highly accurate film thickness management.

  In order to solve the above-described problems, a semiconductor device including a transparent semiconductor substrate, at least one semiconductor element including a metal compound layer formed on the semiconductor substrate, and a light transmission film covering the semiconductor element is mounted on a measurement stage. And a measuring step of irradiating irradiation light toward the metal compound layer and measuring the thickness of the light transmission film according to reflected light from the metal compound layer. A film thickness measuring method is provided.

  In addition, there may be a plurality of the semiconductor elements, and in the measurement step, measurement may be performed according to reflected light from each of two different metal compound layers of the semiconductor element.

  The metal compound layer may have a thickness of 400 nm or more. Furthermore, the semiconductor element may be an FET, and the metal compound layer may be a gate electrode.

  Irradiation light is irradiated toward the metal compound layer included in the semiconductor element formed on the transparent semiconductor substrate, and the thickness of the light transmission film is measured according to the reflected light from the metal compound layer. It is possible to improve product yield and reduce costs while performing accurate film thickness management.

BEST MODE FOR CARRYING OUT THE INVENTION

  Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

  First, an example of a film thickness measuring apparatus used in a film thickness measuring method as an embodiment of the present invention will be described in detail with reference to FIG.

  As shown in FIG. 1, the film thickness measuring device 10 detects, for example, a control unit 11, a light source 12 that emits irradiation light according to a command signal from the control unit 11, and reflected light from the semiconductor device 20. A photodetector 13 is provided. In addition, an input unit 14 is connected to the control unit 11, and data such as structure data of the semiconductor device 20 for determining an irradiation position of irradiation light can be input from the input unit 14. For example, the input unit 14 may be a keyboard. Further, the control unit 11 is connected to a display unit 15 for displaying measured film thickness data and the like. A measurement stage 16 for mounting the semiconductor device 20 is provided below the light source 12 and the photodetector 13. For example, the measurement stage 16 may be fixed to a fixing member (not shown) or the like of the film thickness measuring device 10. Further, the measurement stage 16 may be freely rotated, moved in the vertical direction, and moved in the horizontal direction by a positioning mechanism (not shown) in order to easily determine the irradiation position of the irradiation light.

  Next, the irradiation position of the irradiation light emitted from the light source 12 will be described in detail with reference to FIGS. 1 and 2.

  As shown in FIG. 1, for example, the semiconductor device 20 has a configuration in which a semiconductor layer 23 is sandwiched between a sapphire substrate 21 that is a transparent substrate and an ILD 22.

  FIG. 2 shows a more detailed structure. On a sapphire substrate 21 having a thickness of about 600 μm, a silicon layer 24 and high impurity density layers 25a to 25d (hereinafter, if any one is not specified, high impurity density is shown). The semiconductor layer 23 having a thickness of about 100 nm formed by the low-impurity density layers 26a to 26d (hereinafter, referred to as the low-impurity density layer 26 if any one is not specified) is formed. . Each of the high impurity density layers 25a to 25d and the low impurity density layers 26a to 26d adjacent to each of the high impurity density layers 25a to 25d is a source electrode 27a, 27b (hereinafter, if any one is not specified, the source electrode 27 Or drain electrodes 28a and 28b (hereinafter referred to as the drain electrode 28 when one of them is not specified). Specifically, the source electrode 27a is formed by the high impurity density layer 25a and the low impurity density layer 26a, and the drain electrode 28a, the high impurity density layer 25c, and the low impurity density layer 26c are formed by the high impurity density layer 25b and the low impurity density layer 26b. The drain electrode 28b is formed by the source electrode 27b, the high impurity density layer 25d, and the low impurity density layer 26d. Here, the source electrode 27a and the drain electrode 28a are p-type semiconductors in which the silicon layer 24 is doped with boron, and the source electrode 27b and the drain electrode 28b are n-type semiconductors in which the silicon layer 24 is doped with phosphorus. A plurality of CMOSs are formed by forming the p-type semiconductor and the n-type semiconductor as a set and alternately forming the p-type semiconductor and the n-type semiconductor. By providing the high impurity density layer 25 and the low impurity density layer 26, an LDD (Lightly-doped-drain) structure is obtained, and by using such an LDD structure, the channel connection portion becomes low in concentration and the electric field near the drain is reduced. It becomes possible.

  On the silicon layer 24 located between the source electrode 27 and the drain electrode 28, a gate oxide film 29 having a thickness of several nm is formed. A polysilicon layer 30 doped with impurities at a high concentration is formed on the gate oxide film 29. A tungsten silicon layer 31 is formed on the polysilicon layer 30. A cap layer 32 made of silicon oxide is formed on the tungsten silicon layer 31. A sidewall layer 33 made of silicon oxide is formed around the gate oxide film 29, the polysilicon layer 30, the tungsten silicon layer 31, and the cap layer 32. A gate electrode 34 that is a metal compound layer is formed by the gate oxide film 29, the polysilicon layer 30, the tungsten silicon layer 31, the cap layer 32, and the sidewall layer 33. For example, each of the polysilicon layer 30, the tungsten silicon layer 31, and the cap layer 32 has a thickness of about several hundred nm, and the thickness from the gate oxide film 29 to the cap layer 32 (that is, the step of the gate structure) is about 400. It may be ˜500 nm. The semiconductor layer 22 and the plurality of gate electrodes 34 form a plurality of semiconductor elements that are FETs (field effect transistors).

  An ILD 22 of about 1500 nm is formed so as to cover the semiconductor layer 22 and the gate electrode 34. For example, the ILD 22 may be an insulating film (BPSG: Boron Phosphorus Glass) in which boron and phosphorus are added to a silicon oxide film.

  As shown in FIG. 2, the irradiation light is applied to the gate electrode 34 (that is, the cap layer 32 located on the uppermost layer of the gate electrode). The gate electrode 34 is not transparent like a sapphire substrate because of its structure, and the thickness of the gate electrode 34 is about 400 to 500 nm, so that the irradiation light can be reflected. The reflected light reflected by the gate electrode 34 is detected by the photodetector 13.

  Note that the structure of the semiconductor device 20 shown in FIG. 2 is such that COMO, which is a semiconductor element, is formed on an SOS substrate (ie, a substrate composed of the sapphire substrate 21 and the silicon layer 24) using SOS (silicon on sapphire). Although it has an integrated structure, it is not limited to such a structure. For example, a CMOS may be integrated on an SOQ (silicon on quartz) substrate using a quartz substrate instead of the sapphire substrate 21. Further, the present invention is not limited to CMOS integration, and either PMOS or NMOS may be integrated. Furthermore, the semiconductor device 20 may include only one semiconductor element such as PMOS or NMOS.

  The irradiation position of the irradiation light is not limited to the gate electrode 34, and is a metal compound layer including a compound layer (that is, silicide) made of silicon and a metal element and having a predetermined thickness (for example, 400 nm or more). There may be.

  Next, the film thickness measurement flow of the film thickness measurement method as an embodiment of the present invention will be described in detail with reference to FIG.

  First, the semiconductor device 20 is placed on the measurement stage 16 (step S1). For example, as a mounting method, the semiconductor device 20 may be mounted using a chucker that performs suction using a negative pressure attached to the tip of the robot arm. Further, the film thickness measurer may place the semiconductor device 20 with his / her own hand.

  Next, one of the plurality of gate electrodes 34 in the semiconductor device 20 is selected, and the light source 12 and the semiconductor device 20 are positioned so that the selected gate electrode 34 is irradiated with the irradiation light from the light source 12. Perform (step S2). In this step, pattern data of the semiconductor device 20 that is arrangement data of the gate electrode 34 is input to the control unit 11 in advance, and the arrangement data is compared with contrast data of the mounted semiconductor device 20. The position of the selected gate electrode 34 can be accurately grasped and positioned. The positioning is performed by adjusting the light source 12 and the measurement stage 16.

  After positioning, irradiation light is emitted from the light source 12 (step S3), and the reflected light from the gate electrode 34 is detected by the photodetector 13 (step S4). The thickness of the ILD 22 on the gate electrode 34 is calculated according to the reflected light detected by the photodetector 13 (step S5). The calculation method of the film thickness is a well-known calculation method such as a calculation method based on the wavelength of reflected light or a calculation method based on a phase change between irradiation light and reflected light, and is limited to any one of the calculation methods. There is no. Note that the steps including step S2 to step S5 are referred to as a measurement process.

  A gate electrode 34 different from the gate electrode 34 positioned in step S2 is selected, and positioning is performed again (step S6). After the repositioning, irradiation light is irradiated to the gate electrode 34 positioned in the same manner as in steps S3 to S5, and the reflected light from the gate electrode 34 is detected and the ILD 22 on the repositioned gate electrode 34 is detected. The thickness is calculated (steps S7, S8, S9).

  Next, the average of the thickness of the ILD 22 on the gate voltage 34 is calculated by averaging the measurement results of the thickness of the ILD 22 on the two gate voltages 34 (step S10).

  In the film thickness measurement flow, the thickness of the ILD 22 on the two gate voltages 34 is measured, but by increasing the number of gate voltages 34 that irradiate irradiation light (that is, increase in measurement points). More accurate ILD 22 thickness can be obtained. Further, by measuring the thickness of the ILD 22 on the gate electrode 34 in a wide range of the semiconductor device 20, the flatness of the ILD 22 can also be measured.

  Further, when measuring a test sample or the like, there may be a case where only one gate electrode 34 is included. In such a case, positioning is performed again on the same gate electrode 34, and the result of measurement a plurality of times. The average value may be calculated from Further, step S6 to step S10 may be omitted.

  FIG. 4 is a graph showing the correlation between the thickness of the ILD 22 on the gate electrode 34 and the thickness of the ILD 22 on the active region on the silicon substrate. The horizontal axis of the graph is the thickness of the ILD 22 on the active region on the silicon substrate, and the vertical axis is the thickness of the ILD 22 on the gate electrode 34. As shown in FIG. 4, the correlation coefficient is 0.84, and it can be seen that there is a sufficient correlation between the two data. From this correlation, it can be seen that the thickness control of the ILD 22 can be performed by measuring the thickness of the ILD on the gate electrode 34 in the embodiment of the present invention instead of measuring the thickness of the ILD 22 on the active region on the silicon substrate.

  As described above, according to the film thickness measuring method according to the present embodiment, the irradiation light is irradiated toward the metal compound layer included in the semiconductor element formed on the transparent semiconductor substrate, and the metal compound layer is irradiated with the irradiation light. Since the thickness of the light transmission film is measured according to the reflected light, it is possible to improve the product yield and reduce the cost while performing highly accurate film thickness management.

It is a schematic block diagram of a film thickness measuring apparatus in order to implement the film thickness measuring method as an Example of this invention. FIG. 2 is an enlarged cross-sectional view of a portion surrounded by an alternate long and short dash line 2 in FIG. It is the flowchart which showed the flow of the film thickness measuring method as an Example of this invention. It is the graph which showed the correlation of the thickness of ILD on a gate electrode, and the thickness of ILD on an active region on a silicon substrate. It is a graph which shows the light transmission characteristic of sapphire.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Film thickness measurement apparatus 11 Control part 12 Light source 13 Photo detector 16 Measurement stage 20 Semiconductor wafer 34 Gate electrode

Claims (4)

A mounting step of mounting a semiconductor device comprising a transparent semiconductor substrate, at least one semiconductor element including a metal compound layer formed on the semiconductor substrate, and a light transmission film covering the semiconductor element on a measurement stage;
A film thickness measuring method comprising: a measurement step of irradiating irradiation light toward the metal compound layer and measuring the thickness of the light transmission film in accordance with reflected light from the metal compound layer.   2. The film thickness measurement according to claim 1, wherein there are a plurality of the semiconductor elements, and in the measurement step, measurement is performed according to reflected light from each of two different metal compound layers of the semiconductor element. Method.   The thickness measurement method according to claim 1 or 2, wherein the thickness of the metal compound layer is 400 nm or more.   The film thickness measuring method according to claim 1, wherein the semiconductor element is an FET, and the metal compound layer is a gate electrode.

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