JP2009170454A - Mold package and its mounting structure - Google Patents

Abstract

[PROBLEMS] To mount a mold package with an external connection terminal exposed on the lower surface of a mold resin on a printed circuit board, while suppressing an increase in the size of the package as much as possible, and a large current wiring on the package mounting surface of the printed circuit board. A package suitable for miniaturization of a printed circuit board is realized by reducing the formation area.
A terminal 12 includes a first terminal 121 and a second terminal 122 having a larger area than the first terminal 121. The second terminal 122 is formed on an upper surface 11a of an island 11. It is located on the inner peripheral portion of the lower surface 32 of the mold resin 30 when viewed from above.
[Selection] Figure 1

Description

  The present invention relates to a mold package in which a terminal for external connection is exposed on the back surface of a mold resin, and a mounting structure in which such a mold package is mounted on a printed board.

  Conventionally, this type of mold package includes an island, an IC chip mounted on the upper surface side of the island, terminals located around the island and electrically connected to the IC chip, these IC chip, island and There is proposed a mold resin that seals a terminal, and the lower surface of the terminal is exposed on the lower surface of the mold resin located on the lower surface side of the island, that is, the back surface of the mold resin (see, for example, Patent Document 1). ).

  As such a mold package, for example, a so-called QFN (Quad Flat Non-Leaded Package) is well known. The QFN is a leadless type in which the terminal does not protrude outward from the outer peripheral end of the mold resin when the package is viewed from the upper surface of the mold resin, that is, a leadless type having no outer lead.

In this mold package, soldering is performed between the lower surface of the terminal exposed on the lower surface of the mold resin and an external base material such as a printed circuit board. Since such a mold package does not have an outer lead, the mounting area can be reduced, and it is expected as a small mold package that meets the demand for downsizing electronic devices.
Japanese Patent No. 3428591

  By the way, the QFN package has a single-row terminal structure in which terminals are arranged only on the lower surface of the mold resin, that is, the periphery of the package back surface, and a multi-row terminal structure in which terminals are arranged in multiple rows on the back surface of the package.

  Here, according to the study of the present inventor, when this QFN package is used as an IC package for flowing a large current of several A (amperes) or more, a wiring region for flowing a large current on the surface of the printed circuit board is required. Therefore, it has been found that in any package having any terminal structure, there is a problem that the wiring region hinders downsizing of the printed board.

  This will be described with reference to FIG. FIG. 6 is a diagram showing the configuration of a QFN package prototyped by the present inventor based on the prior art. FIG. 6A shows the QFN package J1 on the mounting surface 210 of the printed circuit board 200 as a package of a large current IC. The figure which shows a schematic planar structure when the mounted structure mounted is seen from the upper surface 31 side of the mold resin 30, (b) is a schematic sectional drawing of the part cut | disconnected along the FF line in (a).

  6A, the outer shape of the lower surface 11b of the island 11 and the lower surface 12b of the terminal 12 exposed at the lower surface 32 of the mold resin 30 are indicated by solid lines and hatched hatching, and the IC chip located inside the mold resin 30 is shown. 20 and the suspension lead 13 are indicated by broken lines. In FIG. 6A, the via 240 of the substrate 200 is indicated by a white circle, and the wire 50 is omitted.

  In the QFN package, the IC chip 20 fixed on the island 11 by the die mount material 40 and the terminal 12 electrically connected to the IC chip 20 via the Au wire 50 are sealed with the mold resin 30. The lower surface 12 b of the terminal 12 and the lower surface 11 b of the island 11 are exposed at the lower surface 32 of the mold resin 30. The exposed portions of the terminal 12 and the island 11 are soldered to the printed circuit board 200 via the solder 300.

  Here, heat generated from the IC chip 20 by flowing a large current is radiated to the outside of the package through the island 11 via the die mount material 40. In FIG. 6A, the terminal 12 and the island 11 exposed on the lower surface 32 of the mold resin 30 which is the back surface of the package are indicated by hatching.

  The printed circuit board 200 on which the QFN package is mounted is a multilayer printed circuit board, and includes a surface layer wiring 220, an inner layer wiring 230, and a via 240. The via 240 is a via hole filled with Cu, and electrically connects the surface layer wiring 220 and the inner layer wiring 230.

  Here, since the amount of current that can flow through one via 240 depends on the cross-sectional area of Cu filled in the via hole, a large current cannot flow through the minute via 240, and a large current flows. For this purpose, it is necessary to use a plurality of vias 240.

  For example, if the current value that can be passed through the via 240 formed by a 0.1 mmφ laser is 0.1 A / piece, only a current of 0.1 A or less is normally passed in the case of a digital signal such as a control signal. One via 240 may be connected, but in order to pass a current of 3A, it is necessary to connect 30 vias 240 in parallel.

  Therefore, since the wiring is formed on the large number of vias 240, the area of the wiring region on the package mounting surface 210 of the printed circuit board 200 is increased, which is a limitation, and the area of the printed circuit board 200 cannot be reduced. In FIG. 6, a QFN package having a single-row terminal structure has been described as an example. However, even in a conventional multi-row terminal structure such as a double row, the wiring area increases because a large number of vias need to be connected to a terminal through which a large current flows. A similar problem occurs.

  The present invention has been made in view of the above problems, and suppresses the enlargement of the package as much as possible when mounting the mold package of the type in which the terminal for external connection is exposed on the lower surface of the mold resin on the printed circuit board. However, it is an object of the present invention to realize a package and a package mounting structure suitable for downsizing the printed circuit board by reducing the formation region of the large current wiring on the package mounting surface of the printed circuit board.

  In order to achieve the above object, in the invention described in claim 1, in the mold package of the type in which the external connection terminal (12) is exposed on the lower surface (32) of the mold resin (30), the terminal (12) The first terminal (121) and the second terminal (122) having a larger area than the first terminal (121) are provided, and the second terminal (122) is formed on the island (11). It is characterized in that it is located on the inner peripheral portion of the lower surface (32) of the mold resin (30) when viewed from above the upper surface (11a).

  According to this, the second terminal (122) having a large area may be used as a terminal for large current, and the second terminal (122) is located on the inner periphery of the package. The formation area of the large current wiring on the surface of the substrate (200) can be reduced, and a package suitable for downsizing of the printed circuit board (200) can be realized.

  According to the second aspect of the present invention, in the mold package of the type in which the external connection terminal (12) is exposed on the lower surface (32) of the mold resin (30), the first terminal (121) is used as the terminal (12). ) And a second terminal (122) having a larger area than the first terminal (121), as viewed from above the upper surface (11a) of the island (11), the second terminal (122 ) Is located on the inner peripheral portion of the lower surface (32) of the mold resin (30), the island (11) has a smaller area than the IC chip (20), and the peripheral portion of the IC chip (20) is the island ( 11) is protruded from the end of the upper surface (11a) of the upper surface (11a), and the second terminal (122) is connected to the island (in the IC chip (20) from the peripheral side of the lower surface (32) of the mold resin (30). 11) Top surface With penetrate to the bottom of the protruding portion from 11a), it is characterized in that in a state apart from the protruding portion at the lower portion of the protruding portion.

  According to this, the second terminal (122) having a large area may be used as a terminal for large current, and the IC chip (20) is arranged while the second terminal (122) is positioned on the inner periphery of the package. The second terminal (122) can be inserted into the region. Therefore, it is possible to realize a package suitable for miniaturization of the printed circuit board (200) by reducing the formation area of the high current wiring on the mounting surface (210) of the printed circuit board (200) while suppressing the increase in size of the package as much as possible.

  Here, as in the third aspect of the present invention, a portion of the second terminal (122) that enters the lower part of the protruding portion from the upper surface (11a) of the island (11) in the IC chip (20) is defined. By setting the thickness to be thinner than that of the first terminal (121), it may be separated from the protruding portion.

  According to this, when the second terminal (122) is inserted into the protruding portion of the IC chip (20), the contact between the second terminal (122) and the IC chip (20) can be easily prevented.

  According to a fourth aspect of the present invention, the second terminal (122) and the IC chip (20) are connected to the upper surface of the island (11) in the IC chip (20) of the second terminals (122). You may electrically connect with the wire (50) in the site | part which has not entered into the lower part of the protrusion part from (11a). According to this, appropriate electrical connection between the second terminal (122) and the IC chip (20) becomes possible.

  Further, as in the fifth aspect of the invention, the second terminal (122) is more island (11) than the first terminal (121) at the inner peripheral portion of the lower surface (32) of the mold resin (30). ) Can be located near the side.

  According to the sixth aspect of the present invention, a mold package mold package (103) of a type in which the terminal (12) for external connection is exposed on the lower surface (32) of the mold resin (30) is mounted on the printed circuit board (200). In addition, the present invention relates to a mold package mounting structure in which the mold package (103) is soldered to the printed circuit board (200) at the lower surface (12b) of the terminal (12).

  In the invention described in claim 6, in such a mounting structure, the first surface layer wiring (221) is provided on the mounting surface (210) on which the mold package (100) is mounted on the printed circuit board (200). ) And a second surface layer wiring (222) having a larger area than the first surface layer wiring (221), and the first surface layer wiring (221) and the second surface layer wiring (222) The bottom surface (12b) of the terminal (12) in the mold package (103) is soldered, and the second surface layer wiring (222) is molded resin as viewed from above the top surface (11a) of the island (11). It is characterized by being located on the inner periphery of the lower surface (32) of (30).

  Accordingly, the second surface layer wiring (222) having a large area may be connected to the terminal (12) for large current of the mold package (103), and the second surface layer wiring (222) is connected to the inner periphery of the package. Therefore, it is possible to realize a mounting structure suitable for miniaturization of the printed circuit board (200) by reducing the formation area of the large current wiring on the package mounting surface of the printed circuit board while suppressing the increase in size of the package as much as possible.

  Here, in the invention according to claim 7, in the mounting structure according to claim 6, the lower surface (11b) of the island (11) is discontinuously exposed at the lower surface (32) of the mold resin (30). As seen from above the upper surface (11a) of the island (11), the lower surface (11b) of the island (11) is not exposed in the lower surface (32) of the mold resin (30) and the IC The second surface layer wiring (222) is inserted into the part where the chip (20) is located.

  According to this, the second surface layer wiring (222) can be inserted into the arrangement area of the IC chip (20) in a plane.

  Further, in these mounting structures, as in the invention according to claim 8, in the printed circuit board (200), immediately below the first surface wiring (221) and directly below the second surface wiring (222). A first via (241) that conducts with the first surface wiring (221) and a second via (242) that conducts with the second surface wiring (222) are provided, and the second via (242) is provided. In this case, a current larger than that of the first via (242) can be caused to flow by using an assembly of wirings larger in number than the first via (241).

  In addition, the code | symbol in the bracket | parenthesis of each means described in the claim and this column is an example which shows a corresponding relationship with the specific means as described in embodiment mentioned later.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, parts that are the same or equivalent to each other are given the same reference numerals in the drawings in order to simplify the description.

  In addition, the upper surface and the lower surface in each component of the present specification and the claims are the surface located on the upper side in each component in the following cross-sectional views, the lower It only means a surface located on the side, and does not limit the vertical relationship corresponding to the actual top-and-bottom direction. That is, the upper surface of a certain component is one surface of the component, and the lower surface is the other surface located on the opposite side of the one surface.

(First embodiment)
FIG. 1 is a diagram illustrating a mounting state of a mold package 100 according to a first embodiment of the present invention on a printed circuit board 200. FIG. 1A illustrates a mounting in which the package 100 is mounted on a mounting surface 210 of the printed circuit board 200. The figure which shows a schematic planar structure when a structure is seen from the upper surface 11a of the island 11, (b) is a schematic sectional drawing of the part cut | disconnected along the AA in (a). In FIG. 1, (a) is a top plan view of (b).

  In FIG. 1A, the outer shape of the lower surface 11 b of the island 11 exposed on the lower surface 32 of the mold resin 30 and the lower surface 12 b of the terminal 12 is shown by solid and hatched hatching, and is located inside the mold resin 30. The IC chip 20 and the suspension lead 13 to be performed are indicated by broken lines. In FIG. 1A, the vias 240, 241, and 242 of the substrate 200 are indicated by white circles, and the wires 50 are omitted. The same applies to FIGS. 1A, 2A, 3A, and 4A which will be described later.

  The mold package 100 of the present embodiment is broadly divided into an island 11, an IC chip 20 mounted on the upper surface 11 a of the island 11, and terminals 12 disposed around the island 11 and electrically connected to the IC chip 20. The island 11, the terminal 12, and the mold resin 30 for sealing the IC chip 20 are provided.

  The island 11 and the terminal 12 are formed separately from one lead frame. Here, the lead frame is made of a normal lead frame material such as Cu or 42 alloy, and the pattern of the islands 11 and the terminals 12 is obtained by performing pressing or etching on the lead frame material. Is formed.

  Here, in this embodiment, the terminal 12 includes a first terminal 121 and a second terminal 122 having different areas, and details of the first and second terminals 121 and 122 will be described later. The island 11 is connected to the suspension lead 13, and the role of the suspension lead 13 is the same as that of a general lead frame.

  Here, the island 11 has a rectangular plate shape, and a plurality of terminals 12 are arranged on the outer periphery of the four sides of the island 11. The IC chip 20 is mounted on and bonded to the upper surface 11a of the island 11 via a die mount material 40 made of Ag paste, conductive adhesive, or the like.

  The IC chip 20 is formed by a semiconductor process using a semiconductor substrate such as a silicon semiconductor. As shown in FIG. 1, the IC chip 20 and the upper surface 12a of each terminal 12 are connected via a bonding wire 50 made of Au (gold), aluminum, or the like and are electrically connected to each other.

  The mold resin 30 is formed by a transfer molding method using a normal mold material such as an epoxy resin, and the island resin 11, the terminal 12, the IC chip 20, and the bonding wire 50 are formed by the mold resin 30. Is sealed so as to be wrapped.

  Here, as shown in FIG. 1, the upper surface 11 a on the island 11 on which the IC chip 20 is mounted and the upper surface 12 a that is the connection surface of the terminal 12 to the bonding wire 50 are oriented in the same direction.

  In the mold resin 30, a surface 31 located on the same side as the upper surface 11 a of the island 11 and the upper surface 12 a of the terminal 12 is the upper surface 31 of the mold resin 30, and a surface 32 opposite to the upper surface 31 is formed. This is the lower surface 32 of the mold resin 30. That is, the lower surface 32 of the mold resin 30 is a surface 32 located on the same side of the mold resin 30 as the lower surface 11 b of the island 11 and the lower surface 12 b of the terminal 12.

  Here, the mold resin 30 is plate-shaped with the upper surface 31 and the lower surface 32 as main surfaces. In the illustrated example, the mold resin 30 has a rectangular plate shape, and the end surface 33 of the mold resin 30 is an outer peripheral end surface between the upper surface 31 and the lower surface 32.

  Further, the lower surface 32 of the mold resin is a mounting surface facing the substrate 200 when the mold package 100 is mounted on the substrate 200, as shown in FIG. From the lower surface 32 of the mold resin 30, the lower surface 11b of the island 11 and the lower surface 12b of the terminal 12 (that is, the lower surface 12b of the first terminal 121 and the lower surface 12b of the second terminal 122) are exposed.

  Further, the lower surface 12 b of each terminal 12, that is, the lower surface 12 b of the first terminal 121 and the lower surface 12 b of the second terminal 122 are exposed at the peripheral portion of the lower surface 32 of the mold resin 30. , 122 are positioned substantially on the same plane as the end surface 33 of the mold resin 30 to form a leadless package.

  The mold package 100 of this embodiment is mounted on a mounting surface 210 that is a surface on which the mold package 100 is mounted on the printed board 200 as shown in FIG. The package 100 is bonded to the lower surface 11 b of the island 11 exposed from the mold resin 30 and the lower surface 12 b of each terminal 12 via the solder 300.

  Here, the printed board 200 is a build-up board or the like, and the mounting surface 210 is provided with a surface layer wiring 220 for performing soldering. An inner layer wiring 230 is provided inside the printed circuit board 200 and is connected to the surface layer wiring 210 by a via 240. The wirings 220 and 230 and the via 240 are made of copper or the like, as in general.

  Then, the surface layer wiring 220 and the lower surface 11 b of the island 11 and the lower surface 12 b of each terminal 12 in the mold package 100 are connected via a solder 300.

  Thereby, in the mounting structure of the mold package 100 shown in FIG. 1, electrical signals are exchanged between the terminals 12 and the printed circuit board 200, and heat generated from the IC chip 20 and the like is transmitted from the island 11. Heat is dissipated to the substrate 200.

  Here, in this embodiment, as shown in FIG. 1, the terminal 12 includes a first terminal 121 and a second terminal 122 having different areas. The second terminal 122 has a larger area than the first terminal 121, and is therefore used as the terminal 12 through which a larger current flows than the first terminal 121.

  In the present embodiment, the second terminal 122 is located on the inner peripheral portion of the lower surface 32 of the mold resin 30 when viewed from above the upper surface 11 a of the island 11. Note that the upper side of the upper surface 11 a of the island 11 is the upper side of the mold package 100 in FIG. 1B, in other words, the upper side of the upper surface 31 of the mold resin 30.

  Here, in the present embodiment, the second terminal 122 does not protrude from the lower surface 32 of the mold resin 30 when viewed from above the upper surface 11 a of the island 11, and the entirety of the second terminal 122 is the inner peripheral portion of the lower surface 32 of the mold resin 30. Is in the range. That is, the entire lower surface 12 b of the second terminal 122 is accommodated in the inner periphery of the lower surface 32 of the mold resin 30.

  In other words, the entire second terminal 122 is located within a range defined by the outline of the lower surface 32 of the mold resin 30. In other words, in the present embodiment, the entire second terminal 122 is located in a region where the lower surface 32 of the mold resin 30 is projected from above the mold resin 30.

  Further, as shown in FIG. 1, when the island 11 and the IC chip 20 that are both plate-shaped are viewed, the island 11 has a smaller area than the IC chip 20, and the central portion of the IC chip 20 is the upper surface of the island 11. The peripheral portion of the IC chip 20 is located so as to protrude from the end portion of the upper surface 11 a of the island 11.

  The second terminal 122 enters from the peripheral portion of the lower surface 32 of the mold resin 30, that is, the end surface 33 side, to the lower portion of the protruding portion from the upper surface 11a of the island 11 in the IC chip 20, and at the lower portion of the protruding portion. It is in a state away from the protruding portion.

  That is, as viewed from above the upper surface 11 a of the island 11, a part of the second terminal 122 is in a position overlapping with the protruding part in the IC chip 20, and the remaining part of the second terminal 122 is the above in the IC chip 20. It is located outside the protruding part.

  Thus, the second terminal 122 is further arranged at a position closer to the center of the lower surface 32 of the mold resin 30. In the example shown in FIG. 1, the second terminal 122 is located closer to the island 11 than the first terminal 121 in the inner peripheral portion of the lower surface 32 of the mold resin 30.

  Further, as shown in FIG. 1B, the portion of the second terminal 122 that enters the lower portion of the protruding portion in the IC chip 20 is thinner than the first terminal 121. . As a result, the portion of the second terminal 122 that enters is away from the protruding portion of the IC chip 20.

  Accordingly, when the second terminal 122 is inserted into the protruding portion of the IC chip 20, the contact between the second terminal 122 and the IC chip 20 can be easily prevented. In the example shown in FIG. 1, the entire second terminal 122 is thinner than the first terminal 121, not just the part that enters the second terminal 122.

  Making the second terminal 122 thinner than the first terminal 121 in this way, for example, selectively etches or presses the portion that becomes the second terminal 122 in the state of the lead frame alone. This is possible depending on the situation.

  The second terminal 122 and the IC chip 20 are electrically connected by a bonding wire 50 at a portion of the second terminal 122 that does not enter the lower part of the protruding portion of the IC chip 20. Here, since the second terminal 122 flows a larger current than the first terminal 121, the number of wires 50 is larger in the second terminal 122.

  Further, when viewing the printed circuit board 200, the surface layer wiring 220 soldered to the second terminal 122 through which a larger current flows than the first terminal 121 is a large current wiring in the printed circuit board 200 and is connected thereto. The via 240 is a plurality of aggregates. The planar shape of the surface layer wiring 220 is not particularly limited, but is the same shape as the planar shape of the first terminal 121 and the second terminal 122 to be connected.

  In the present embodiment, since the second terminal 122 is located on the inner peripheral portion of the lower surface 32 of the mold resin 30 when viewed from above the upper surface 11a of the island 11, the surface layer wiring 220 as the large current wiring. Also, it is arranged at a position overlapping the mold package 100 in a plan view, and the area for forming a large current wiring in the printed board 200 is reduced.

  In this mold package 100, the IC chip 20 is mounted on a multiple lead frame in which the islands 11 and the terminals 12 are patterned, and after wire bonding, this is molded with a mold resin 30. Manufactured by dicing and cutting.

  In the mounting structure of the mold package 100 shown in FIG. 1, first, solder 300 is disposed on the surface layer wiring 220 of the substrate 200 by a printing method or the like, and then the mold package 100 is mounted on the substrate via the solder 300. It is formed by mounting on 200 and then reflowing solder 300.

  By the way, according to the present embodiment, the second terminal 122 having a large area may be used as a large current terminal, and the IC chip 20 is arranged while the second terminal 122 is positioned on the inner peripheral portion of the package 100. The second terminal 122 can be inserted into the region.

  Therefore, according to the present embodiment, the mold package 100 suitable for miniaturization of the printed circuit board 200 by reducing the formation region of the large current wiring on the mounting surface 210 of the printed circuit board 200 while suppressing the increase in size of the package as much as possible. realizable.

  In the package 100 of this embodiment, the thickness of the second terminal 122 extended to the protruding portion of the IC chip 20 is made thinner than that of the first terminal 121. By doing so, since the size of the IC chip 20 becomes large and does not come into contact with the second terminal 122 in plan view, the size of the IC chip 20 can be increased.

  In addition, as described above, it may be necessary to connect a plurality of wires 50 to the second terminal 122 in order to flow a large current. In the present embodiment, the second terminal 122 is used. Is larger than the first terminal 121, the degree of freedom of the position where the wire 50 is connected is increased, and the connectivity of the wire 50 can be improved.

  In addition, the soldering portion of the terminal 12 with the printed circuit board 200 generates stress due to temperature fluctuation due to the difference in thermal expansion coefficient between the mold package 100 and the printed circuit board 200, causing a decrease in reliability of the soldering portion. There is.

  In this case, by suppressing the thermal deformation of the package by soldering the island 11 to the printed circuit board 200, the stress applied to the soldered portion of the fine terminal 12 can be reduced, but generally the area of the island 11 is small. There is a concern that the effect of this fixation will be reduced if it becomes smaller.

  In the present embodiment, the deformation suppressing effect can be maintained by increasing the area of the second terminal 122 and soldering the large-area second terminal 122 and the printed circuit board 200 in place of the island 11. it can.

  In the example shown in FIG. 1, the second terminal 122 having a larger area is positioned on the inner periphery of the package than the first terminal 121 having a smaller area, but the second terminal 122 is disposed on the inner periphery of the package. If it is ensured that the second terminal 122 is positioned, the second terminal 122 may be positioned closer to the periphery of the package than the first terminal 121.

  Further, the electrical connection between the second terminal 122 and the IC chip 20 is not limited to the wire 50. For example, in FIG. 1, the protruding portion from the upper surface 11a of the island 11 in the IC chip 20; This may be performed by connecting the portion of the second terminal 122 entering the lower portion of the protruding portion with a bump such as solder.

  Further, the second terminal 122 only needs to be positioned on the inner peripheral portion of the lower surface 32 of the mold resin 30 when viewed from above the upper surface 11 a of the island 11, and the entire second terminal 122 is the lower surface of the mold resin 30. It does not have to stick to the inner periphery of the lower surface 32 of the mold resin 30 without protruding from 32. That is, a part of the second terminal 122 may be located outside the lower surface 32 of the mold resin 30 when viewed from above the upper surface 11 a of the island 11.

  Further, the second terminal 122 only needs to be positioned on the inner peripheral portion of the lower surface 32 of the mold resin 30 when viewed from above the upper surface 11a of the island 11, and as shown in FIG. It is not necessary to penetrate into the lower part of the protruding portion. That is, the entire second terminal 122 may be located outside the IC chip 20 when viewed from above the upper surface 11 a of the island 11.

(Second Embodiment)
FIG. 2 is a diagram showing a mold package 101 according to a second embodiment of the present invention, and FIG. 2A is a diagram showing a schematic plan configuration when the package 101 is viewed from above the upper surface 11a of the island 11. (B) is a schematic sectional drawing of the part cut | disconnected along the BB line in (a). 2A is a top plan view of FIG. 2B.

  The difference from the first embodiment will be mainly described. Also in this mold package 101, as shown in FIG. 2, the portion of the second terminal 122 that enters the lower portion of the protruding portion of the IC chip 20 is thinner than the first terminal 121. Yes. As a result, the portion of the second terminal 122 that enters is away from the protruding portion of the IC chip 20.

  Here, in the present embodiment, as shown in FIG. 2B, the entire second terminal 122 is not made thinner than the first terminal 121, but enters the second terminal 122. The difference between the first embodiment and the first embodiment is that the thickness of the portion that is not included and the thickness of the portion that is not included is the same as that of the first terminal 121.

  That is, in this embodiment, only the portion of the second terminal 122 that substantially overlaps the IC chip 20 in plan view is made thinner than the first terminal 121. Also in this embodiment, when the second terminal 122 is inserted into the protruding portion of the IC chip 20, the contact between the second terminal 122 and the IC chip 20 can be easily prevented.

(Third embodiment)
FIG. 3 is a view showing a mold package 102 according to a third embodiment of the present invention, and FIG. 3A is a view showing a schematic planar configuration when the package 102 is viewed from above the upper surface 11a of the island 11. (B) is a schematic sectional drawing of the part cut | disconnected along CC line in (a). 3A is a top plan view of FIG. 3B.

  In the first embodiment, a part of the second terminal 122 is exposed at the outer peripheral end portion of the lower surface 32 of the mold resin 30, that is, the end surface 33 of the mold resin 30, but in this embodiment, the second terminal 122 is exposed. 122 is not exposed at the end surface 33 of the mold resin 30 and is completely disposed on the inner periphery of the lower surface 32 of the mold resin 30.

  In this case, compared to the first embodiment, the number of second terminals 122 can be increased with the same package size. In this case, since the suspension lead (see FIG. 1) is eliminated and the island 11 is also not retained from the periphery, the second terminal 122 is also disposed in the region where the suspension lead was present. Can do.

  The mold package 102 having the shape of the island 11 and the terminal 12 can be manufactured by a method described in, for example, Japanese Patent No. 3947750. Briefly, a plate material to be a lead frame is half-etched into a desired pattern from the surface side, and in that state, IC chips are mounted and wire bonding is performed, and this is molded with the mold resin 30.

  Then, the desired pattern is formed by etching the plate material from the back surface, and the mold package 102 of this embodiment is completed. The present package 102 also realizes a mold package 102 suitable for miniaturization of the printed circuit board 200 by reducing the formation area of the high current wiring on the mounting surface 210 of the printed circuit board 200 while suppressing the enlargement of the package as much as possible. it can.

  Further, in this type of mold package, in a multi-row terminal structure in which terminals are also arranged inside the lower surface of the mold resin, which is the back surface of the package, after the package is soldered and mounted on a printed circuit board, The solder connection cannot be observed directly from the outside. Therefore, a special device such as an X-ray device is required for the workmanship inspection of the soldered portion.

  In this regard, in the present package 102, since the area of the second terminal 122 which is an inner terminal is large, there is an advantage that the reliability of the soldering portion is improved and the workmanship inspection can be made unnecessary.

(Fourth embodiment)
FIG. 4 is a diagram illustrating a mounting state of the mold package 103 according to the fourth embodiment of the present invention on the printed circuit board 200, and FIG. 4A is a mounting in which the package 103 is mounted on the mounting surface 210 of the printed circuit board 200. The figure which shows a schematic planar structure when a structure is seen from the upper direction of the upper surface 11a of the island 11, (b) is a schematic plan view of the lower surface 11b of the island 11 in (a).

  5A is a schematic cross-sectional view of a portion cut along the line DD in FIG. 4A, and FIG. 5B is a cross-sectional view taken along line EE in FIG. It is a schematic sectional drawing of the part cut | disconnected along the line. 4A is a top plan view of FIGS. 5A and 5B. In FIG. 4A, the second surface layer wiring 222 located below the mold package 103 is indicated by a solid line.

  The difference from the first embodiment will be mainly described. In the mold package 103 of the present embodiment, the terminals 12 are the same as a general QFN package, and a plurality of terminals 12 having substantially the same area are arranged in the peripheral portion of the lower surface 32 of the mold resin 30. The lower surface 12 b of the terminal 12 is exposed at the lower surface 32 of the mold resin 30, and the mold package 103 is soldered to the printed circuit board 200 at the lower surface 12 b of the terminal 12.

  Here, in the mounting structure of this embodiment, the mounting surface 210 of the printed circuit board 200 is provided with the first surface layer wiring 221 and the second surface layer wiring 222 having a larger area than the first surface layer wiring 221. ing.

  As a result, the second surface layer wiring 222 is used as a wire that allows a larger current to flow than the first surface layer wiring 221. Each of the surface layer wirings 221 and 222 can be made of the same material as the surface layer wiring of the above embodiment.

  And these 1st surface layer wiring 221 and 2nd surface layer wiring 222, and the lower surface 12b of the terminal 12 in the mold package 103 are soldered via the solder 300. FIG.

  Here, the second surface layer wiring 222 having a large area is located on the inner peripheral portion of the lower surface 32 of the mold resin 30 when viewed from above the upper surface 11 a of the island 11. Therefore, the second surface layer wiring 222 as the large current wiring is arranged at a position overlapping the mold package 100 in a plan view, and the formation area of the large current wiring on the printed board 200 is reduced. .

  Thus, according to the present embodiment, the second surface layer wiring 222 having a large area may be connected to the terminal 12 for large current of the mold package 103, and the second surface layer wiring 222 is connected to the inner peripheral portion of the package. Therefore, it is possible to realize a mounting structure suitable for downsizing of the printed circuit board 200 by reducing the formation area of the large current wiring on the mounting surface 210 of the printed circuit board 200 while suppressing the enlargement of the package as much as possible.

  In this embodiment, as shown in FIGS. 4 and 5, the lower surface 11 b of the island 11 is discontinuously exposed at the lower surface 32 of the mold resin 30. Here, the lower surface 11b of the island 11 is partially etched or pressed, so that the thickness of the island 11 is partially changed to provide irregularities on the lower surface 11b. The exposed portion from the lower surface 32 of 30.

  Then, when viewed from above the upper surface 11 a of the island 11, a portion of the lower surface 32 of the mold resin 30 where the lower surface 11 b of the island 11 is not exposed and where the IC chip 20 is located has a second surface layer. The wiring 222 has entered.

  That is, as viewed from above the upper surface 11 a of the island 11, a part of the second surface layer wiring 222 is located at a position overlapping the IC chip 20, and the remaining part of the second surface layer wiring 222 is located outside the IC chip 20. is doing. As a result, the second surface layer wiring 222 enters the area where the IC chip 20 is arranged in a plane, and is further arranged at a position closer to the center of the lower surface 32 of the mold resin 30.

  As shown in FIGS. 4 and 5, in the printed circuit board 200, the first surface layer wiring 221 is electrically connected directly below the first surface layer wiring 221 and directly below the second surface layer wiring 222. A first via 241 and a second via 242 that is electrically connected to the second surface layer wiring 222 are provided. These vias 241 and 242 can be made of the same material as the vias of the above-described embodiment, and are intended to conduct with the inner layer wiring 230.

  The second via 242 that is electrically connected to the second surface layer wiring 222 that is a high-current wiring is made up of a larger number of wirings than the first via 241, so that the second via 242 is formed. Is configured to pass a larger current than the first via 241.

  In this embodiment, the portion of the lower surface 11 b of the island 11 that is not exposed on the lower surface 31 of the mold resin 30 is about half in the thickness direction so that the volume of the island 11 can be secured as much as possible inside the package 103. It is left without being removed.

  This is because the island 11 has a function of preventing a transient temperature rise of the IC chip 20 as a heat sink. For this purpose, it is desirable to leave the unexposed part of the island 11 so as to increase the volume as much as possible. .

  When the lower surface 11b of the island 11 is discontinuously exposed at the lower surface 32 of the mold resin 30, the island 11 may be divided into a plurality of divided bodies. Thus, the island 11 does not exist in a region where the lower surface of the island 11 is not exposed.

(Other embodiments)
In the mold packages 100 to 103 of the above embodiments, the lower surface 11b of the island 11 is also exposed from the lower surface 32 of the mold resin 30, but only the lower surface 12b of the terminal 12 is exposed from the lower surface 32 of the mold resin 30. The entire bottom surface 11b of the island 11 may be sealed with the mold resin 30 without being exposed.

(A) is a schematic plan view which shows the mounting structure to the printed circuit board of the mold package which concerns on 1st Embodiment of this invention, (b) is an AA schematic sectional drawing in (a). (A) is a schematic plan view of the mold package which concerns on 2nd Embodiment of this invention, (b) is BB schematic sectional drawing in (a). (A) is a schematic plan view of the mold package which concerns on 3rd Embodiment of this invention, (b) is CC schematic sectional drawing in (a). (A) is a schematic plan view which shows the mounting structure to the printed circuit board of the mold package which concerns on 4th Embodiment of this invention, (b) is a schematic plan view of the lower surface side of the island in (a). (A) is DD schematic sectional drawing in Fig.4 (a), (b) is EE schematic sectional drawing in Fig.4 (a). It is a figure which shows the structure of the QFN package which this inventor made as an experiment, (a) is a schematic plan view which shows the mounting structure to the printed circuit board of the said QFN package, (b) is FF schematic cross section in (a) FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 Island 11a Island upper surface 11b Island lower surface 12 Terminal 12a Terminal upper surface 12b Terminal lower surface 20 IC chip 30 Mold resin 32 Mold resin lower surface 50 Bonding wire 100-103 Mold package 121 First terminal 122 Second terminal 221 First surface layer wiring 222 Second surface layer wiring 241 First via 242 Second via

Claims (8)

Island (11),
An IC chip (20) mounted on the upper surface (11a) side of the island (11);
A terminal (12) located around the island (11) and electrically connected to the IC chip (20);
A mold resin (30) for sealing the IC chip (20), the island (11), and the terminal (12);
The lower surface (12b) of the terminal (12) is exposed at the lower surface (32) of the mold resin (30) located on the lower surface (11b) side of the island (11). In the mold package that is to be soldered to the outside on the lower surface (12b),
The terminal (12) includes a first terminal (121) and a second terminal (122) having a larger area than the first terminal (121),
The second terminal (122) is located on the inner periphery of the lower surface (32) of the mold resin (30) when viewed from above the upper surface (11a) of the island (11). Mold package. Island (11),
An IC chip (20) mounted on the upper surface (11a) side of the island (11);
A terminal (12) located around the island (11) and electrically connected to the IC chip (20);
A mold resin (30) for sealing the IC chip (20), the island (11), and the terminal (12);
The lower surface (12b) of the terminal (12) is exposed at the lower surface (32) of the mold resin (30) located on the lower surface (11b) side of the island (11). In the mold package that is to be soldered to the outside on the lower surface (12b),
The terminal (12) includes a first terminal (121) and a second terminal (122) having a larger area than the first terminal (121),
When viewed from above the upper surface (11a) of the island (11), the second terminal (122) is located on the inner periphery of the lower surface (32) of the mold resin (30),
The island (11) has a smaller area than the IC chip (20), and the peripheral portion of the IC chip (20) is located so as to protrude from the end of the upper surface (11a) of the island (11),
The second terminal (122) extends from the periphery of the lower surface (32) of the mold resin (30) to the lower part of the protruding portion from the upper surface (11a) of the island (11) in the IC chip (20). A mold package characterized in that it enters and is separated from the protruding portion at a lower portion of the protruding portion.   Of the second terminal (122), the portion of the IC chip (20) that enters the lower part of the protruding portion from the upper surface (11a) of the island (11) is more than the first terminal (121). 3. The mold package according to claim 2, wherein the mold package is in a state separated from the protruding portion by being thin.   The second terminal (122) and the IC chip (20) are a portion of the second terminal (122) that protrudes from the upper surface (11a) of the island (11) in the IC chip (20). The mold package according to claim 2 or 3, wherein the mold package is electrically connected by a wire (50) at a portion not entering the lower portion.   The second terminal (122) is located closer to the island (11) than the first terminal (121) at the inner peripheral portion of the lower surface (32) of the mold resin (30). The mold package according to any one of claims 1 to 4, characterized in that: An IC chip (20) is mounted on the upper surface (11a) side of the island (11), terminals (12) are arranged around the island (11), and the IC chip (20) and the terminals (12) are arranged. The electrically connected one is sealed with a mold resin (30), and at the lower surface (32) of the mold resin (30) located on the lower surface (11b) side of the island (11), the terminal ( 12) a mold package (103) formed by exposing the lower surface (12b) of
A printed circuit board (200) on which the mold package (103) is mounted,
In the mounting structure of the mold package formed by soldering the mold package (103) to the printed circuit board (200) at the lower surface (12b) of the terminal (12),
The mounting surface (210), which is the surface on which the mold package (103) is mounted, on the printed circuit board (200) has a larger area than the first surface wiring (221) and the first surface wiring (221). A large second surface wiring (222),
These first surface layer wiring (221) and second surface layer wiring (222) and the lower surface (12b) of the terminal (12) in the mold package (103) are soldered,
The second surface wiring (222) is located on the inner peripheral portion of the lower surface (32) of the mold resin (30) when viewed from above the upper surface (11a) of the island (11). Mold package mounting structure. The lower surface (11b) of the island (11) is discontinuously exposed on the lower surface (32) of the mold resin (30),
When viewed from above the upper surface (11a) of the island (11), the lower surface (32) of the mold resin (30) is a portion where the lower surface (11b) of the island (11) is not exposed, and 7. The mold package mounting structure according to claim 6, wherein the second surface layer wiring (222) is inserted into a portion where the IC chip (20) is located. Inside the printed circuit board (200), the first surface layer wiring (221) is electrically connected directly below the first surface layer wiring (221) and directly below the second surface layer wiring (222). 1 via (241), and a second via (242) electrically connected to the second surface wiring (222),
The second via (242) is made of a larger number of wirings than the first via (241), so that a larger current flows than the first via (241). The mounting structure for a mold package according to claim 6 or 7.

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