JP2009164955A - Imaging device - Google Patents

Abstract

An imaging apparatus capable of further shortening a pixel readout time by effectively using a column circuit is provided.
An imaging apparatus is two-dimensionally arranged and includes a plurality of pixels 300 to 302, 310 to 312 and 320 to 322 including photoelectric conversion elements, and the plurality of pixels 300 to 302, 310 to 312 and 320 to 320. The image sensor includes a plurality of column circuits 3100, 3101, and 3102 that are arranged in each column 322 and that transfer signals from the pixels for each column. The distribution means SEL100, 101, and 102 distribute and transfer signals from the pixels arranged in the column direction to the column circuit 3101 in the column in which the pixel is arranged and the other column circuits 3100 and 3102.
[Selection] Figure 3

Description

  The present invention relates to an imaging apparatus including an imaging element in which column circuits are arranged.

  FIG. 9 is a circuit diagram when a column circuit is arranged with respect to a conventional image sensor.

  In FIG. 9, a vertical scanning circuit 3000 is a circuit for sending out various signals necessary for reading signals of the pixels 300 to 302, 310 to 312, and 320 to 322. The column circuits 3100 to 3102 include an amplification amplifier that performs signal amplification, impedance conversion, and the like, and an AD converter that performs analog / digital conversion of the signal.

  The row selection signals PSEL0 to PSEL2 are signals for selecting the pixel to be transferred for each row when the signals of the pixels 300 to 302, 310 to 312 and 320 to 322 are transferred. The row selection switches SEL00 to SEL22 are switches for receiving the row selection signals PSEL0 to PSEL2 and transferring the signals of the pixels 300 to 302, 310 to 312 and 320 to 322 to the column circuits 3100 to 3102.

  When the image sensor receives light, electric charges are generated in the pixels 300 to 302, 310 to 312, and 320 to 322 of the image sensor, and electrical signals are converted into analog signals in the pixels 300 to 302, 310 to 312, and 320 to 322, respectively. Converted.

  Next, the row selection signals SEL0 to PSEL2 are sequentially sent from the vertical scanning circuit 3000, so that the row selection switches SEL00 to SEL22 are turned on. When the row selection switches SEL00 to SEL22 are turned on, the analog signals of the pixels 300 to 302, 310 to 312 and 320 to 322 arranged in the selected row are sent to the columns of the pixels via the vertical output lines to which the pixels belong. Are read by the column circuits 3100 to 3102 attached thereto.

  The analog signals read to the column circuits 3100 to 3102 are subjected to signal amplification processing, analog / digital conversion processing, and the like, and are output from the image sensor.

  The signal output from the image sensor is processed by a signal processing circuit (not shown) connected to the image sensor, as necessary, by adding a plurality of pixel signals, thinning out the pixel signals, filtering, and various correction processes. Etc. are given.

  In such an image pickup device, in general, when full-screen readout of a still image is performed, signals of all pixels are read out and used for image generation.

  On the other hand, at the time of moving image output (reading at a high frame rate is required), when transferring the pixel signal to the column circuit, the necessary pixels are selected and transferred (by skipping the pixels). The number of pixels to be read is reduced and the frame rate is increased.

Further, in the case of a reduced image of a still image, the number of pixels to be read is reduced by skipping the pixels described above, or after reading out the signals of all the pixels, thinning processing or addition processing is performed in the signal processing circuit. Generally, a reduced image is generated from the obtained signal.
JP 2003-51989

  However, as described above, when outputting a reduced image of a still image, when signals of all pixels are read out and then a reduced image is generated by processing in the signal processing circuit, reading of pixels of the still image of the entire screen is performed. It takes the same time to read out pixels.

  In addition, when outputting moving images, the readout time can be shortened according to the number of pixels skipped when transferring the pixel signal to the column circuit. The column circuits arranged in the arranged columns are not used. For this reason, the column circuit cannot be used effectively.

  SUMMARY An advantage of some aspects of the invention is that it provides an imaging apparatus capable of further shortening a pixel readout time by effectively using a column circuit.

  In order to achieve the above object, an imaging apparatus according to the present invention is two-dimensionally arranged, and includes a plurality of pixels including photoelectric conversion elements and columns of the plurality of pixels. An image pickup apparatus including an image pickup device having a plurality of column circuits transferred to a column circuit, a signal from a pixel arranged in a column direction, a column circuit of the column in which the pixel is arranged, and the column circuit Distributing means for distributing and transferring to different column circuits is provided.

  According to the present invention, a column circuit that has not been conventionally used when skipping pixels can be used effectively, which corresponds to the readout time for one row when skipping normal pixels. It is possible to read out pixels in a plurality of rows in the time required.

  This makes it possible to read out pixels at a higher speed than normal pixel skipping, and is particularly effective at the time of moving image output that requires pixel reading at a high frame rate. can do.

  Embodiments of the present invention will be described below with reference to the drawings.

(First embodiment)
FIG. 1 is a block diagram for explaining an imaging apparatus according to the first embodiment of the present invention. In the present embodiment, an imaging apparatus such as a digital still camera or a digital video camera is taken as an example.

  As shown in FIG. 1, the imaging apparatus according to the present embodiment includes an imaging element 3 and a timing signal generation circuit 5 that generates a signal for operating the imaging element 3. The drive circuit 6 drives the photographing optical system 1 including the lens and the diaphragm, the mechanical shutter 2, and the image sensor 3.

  The signal processing circuit 7 performs necessary signal processing on the captured image data, and the image memory 8 stores the signal processed image data. The recording circuit 10 records the signal-processed image data on a recording medium 9 that is detachably mounted.

  The display circuit 12 displays the signal processed image data on the image display device 11. The system control unit 13 controls the entire imaging apparatus.

  The ROM 14 stores a control program executed by the system control unit 13, control data such as parameters and tables used when executing the control program, and correction data such as defective pixel information.

  The RAM 15 transfers and stores a program, control data, and correction data stored in the ROM 14 for use when the system control unit 13 controls the imaging apparatus.

  A power switch 109, a shutter switch (SW 1) 110, and a shutter switch (SW 2) 111 are connected to the system control unit 13.

  The power switch 109 is a switch for starting the imaging apparatus. A shutter switch (SW1) 110 is a switch for instructing start of photographing preparation operations such as photometry processing and distance measurement processing.

  A shutter switch (SW2) 111 drives a mirror and a shutter (not shown), and instructs to start a series of imaging operations for writing a signal read from the imaging element 3 to the recording medium 9 via the signal processing circuit 7 and the recording circuit 10. It is a switch to do. When the mechanical shutter 2 and the image sensor 3 have an electronic shutter function, an electronic shutter (not shown) is driven instead of the shutter.

  Next, with reference to FIG. 2, an operation example of the imaging apparatus having the above configuration will be described. Each process in FIG. 2 is executed by the CPU or the like of the system control unit 13 after the control program stored in the ROM 14 is loaded into the RAM 15.

  In the present embodiment, there are a still image mode and a moving image mode as shooting modes of the imaging apparatus.

  The still image mode includes a mode in which image information (hereinafter referred to as RAW) is recorded, a mode in which an ornamental image (hereinafter referred to as JPEG) generated from the RAW is recorded, and a mode in which both RAW and JPEG are recorded ( Hereinafter, there is RAW + JPEG).

  In addition, JPEG includes high-resolution JPEG (hereinafter referred to as JPEG-L) having a resolution as recorded in the recorded image, and low-resolution JPEG (hereinafter referred to as JPEG-S) in which the capacity of the recorded image is reduced by reducing the resolution. )

  On the other hand, the moving image mode is used as a so-called EVF function that performs exposure and focus adjustment by measuring and measuring a subject in advance and displaying an image in real time so that a composition for still image shooting can be determined.

  In FIG. 2, first, in step S201, the system control unit 13 determines whether or not the power switch 109 is ON. If it is determined that the power switch 109 is ON, the process proceeds to step S202.

  In step S202, the system control unit 13 determines whether or not the shutter switch (SW1) 110, which is a switch for starting the shooting preparation operation, is ON. If it is determined that the shutter switch (SW1) 110 is ON, step S202 is performed. The process proceeds to S203.

  In step S203, the system control unit 13 resets the imaging signal accumulated in the imaging device 3, and proceeds to step S204.

  In step S204, the system control unit 13 exposes the image sensor 3 to accumulate charges by driving a shutter (an electronic shutter (not shown if the mechanical shutter 2 and the image sensor 3 have an electronic shutter function)). Then, the process proceeds to step S205.

  In step S205, the system control unit 13 reads out the signal accumulated in the image sensor 3 in the operation of the readout 1 mode described later, and proceeds to step S206.

  In step S206, the system control unit 13 performs known photometry processing and distance measurement processing in the signal processing circuit 7 based on the image signal read in step S205, and the process proceeds to step S207.

  In step S207, the system control unit 13 displays the image processed in step S206 on the image display device 11 via the display circuit 12, and proceeds to step S208.

  In step S208, the system control unit 13 determines whether the shutter switch (SW2) 111 that is a start switch for the still image shooting operation is ON. If the shutter switch (SW2) 111 is ON, the process proceeds to step S210, and if it is OFF, the process proceeds to step S209.

  In step S209, the system control unit 13 determines whether the shutter switch (SW1) 110, which is a moving image acquisition start switch, is ON. If it is ON, the process returns to step S203, and if OFF, the process returns to step S202.

  In step S210, the system control unit 13 resets the imaging signal accumulated in the imaging device 3, and proceeds to step S211.

  In step S211, the system control unit 13 exposes the image sensor 3 to accumulate charges by driving a shutter (an electronic shutter (not shown when the mechanical shutter 2 and the image sensor 3 have an electronic shutter function)). Then, the process proceeds to step S212.

  In step S212, the system control unit 13 determines the recording mode of the image signal.

  If the recording mode is full screen (RAW, RAW + JPEG, or JPEG-L), the process proceeds to step S213, and the system control unit 13 performs reading by an operation in a reading two mode described later, and then proceeds to step S215.

  On the other hand, if the recording mode is a reduced image (JPEG-S), the process proceeds to step S214, and the system control unit 13 performs reading by an operation in a reading 1 mode described later, and then proceeds to step S215.

  In step S215, the system control unit 13 performs various corrections and calculation processing of the image signal as necessary, and records the processed image on the recording medium 9 via the recording circuit 10 in step S216.

  FIG. 3 is a diagram simply showing a circuit diagram of the image sensor 3.

  In FIG. 3, a vertical scanning circuit 3000 is a circuit for sending out various signals necessary for reading out signals of each pixel. The column circuits 3100 to 3102 include an amplification amplifier that performs signal amplification, impedance conversion, and the like, and an AD converter that performs analog / digital conversion of the signal.

  The row selection signals (pulses) PSEL2, 0 to PSEL2, 2 are signals for selecting the pixel to be transferred for each row when the signals of the pixels 300 to 302, 310 to 312 and 320 to 322 are transferred. is there. The pixels 300 to 302, 310 to 312 and 320 to 322 are two-dimensionally arranged including photoelectric conversion elements.

  The row selection switches SEL200 to 202, 210 to 212, and 220 to 222 receive the row selection signals PSEL2, 0 to PSEL2, 2, and receive the signals of the pixels 300 to 302, 310 to 312, and 320 to 322 in the column circuit 3100. 3102 is a switch for transferring to 3102.

  The pixel selection signals (pulses) PSEL1 and 0 are signals for sequentially selecting only the pixels to be transferred, in this case, for three rows during the pixel skipping operation corresponding to the readout 1 mode. Here, the skipping operation refers to a reading operation in which, when signals are transferred from pixels, pixels that are not used for image generation do not transfer signals, and only necessary pixels are transferred.

  Pixel selection switches (distribution means) SEL100 to SEL102 are switches for distributing and transferring the signals of the respective pixels selected by the pixel selection signals PSEL1 and 0 to the column circuits 3100 to 3102.

  Here, in FIG. 3, for convenience of explanation, the case of the image sensor 3 in which pixels in 3 rows and 3 columns are arranged is illustrated, but the configuration of the column circuit is not limited to the illustration.

  First, with reference to FIG. 4, an operation example of the readout 1 mode in the image sensor 3 of FIG. 3 will be described.

  In FIG. 4, description will be made assuming that the number of pixels in the entire screen of the image sensor 3 is n. The readout 1 mode is a readout mode in which a pixel signal skip operation is performed. In the present embodiment, in the pixel signal skip operation, a pixel to be read is described as one pixel in one row × three columns.

  In FIG. 4, prior to accumulation of the optical signal, the reset pulse PRES for resetting all the pixels at once is turned on, the imaging signal accumulated in the imaging device 3 is reset, and then the imaging signal is obtained by releasing the reset. Accumulation starts.

  By turning on a transfer pulse PTx that collectively drives a switch (not shown) for transferring the output of each pixel to a charge storage unit (not shown) attached to each pixel after the image signal is accumulated for a predetermined time, The pixel output is transferred to the charge storage unit, and the storage ends.

  When the pixel selection pulses PSEL1, 0 to PSEL1, 3m are turned on, three pixels in the column direction are selected, and the stored imaging signals are sequentially transferred from the charge storage unit.

  The row selection pulses PSEL2, 0 to PSEL2, n are not driven, and the pixel selection pulses PSEL1, 0 to PSEL1, 3m cause m rows (in the case of 1/3 interlaced readout in the row direction, m = n / 3, n, m = integer) pixel signals are read out. The read pixel signals are distributed and transferred to the column circuits 3100 to 3102.

  In this distribution, for example, the signal of the pixel to be read is distributed and read to the column circuit 3101 of the column where the pixel is arranged and the other column circuits 3100 and 3102 arranged in the column of the pixel to be skipped. To.

  Thereby, the reading operation of the pixel signal of one frame is completed. Thereafter, a pixel signal reading operation for the next frame is performed as necessary.

  Next, with reference to FIG. 5, an operation example of the readout 2 mode in the image sensor 3 of FIG. 3 will be described.

  Note that the readout 2 mode refers to a readout mode in which full-screen readout is performed without skipping pixel signals. Also in FIG. 5, the image sensor 3 is described as having n pixel columns.

  In FIG. 5, the reset pulse PRES for collectively resetting each pixel is turned on prior to the accumulation of the optical signal, the imaging signal stored in the imaging device 3 is reset, and then the reset signal is released to cancel the imaging signal. Accumulation starts.

  After accumulation for a predetermined time, the pixel output is turned on by turning on a transfer pulse PTx that collectively drives a switch (not shown) for transferring each pixel output to a charge storage unit (not shown) attached to each pixel. The data is transferred to the charge storage unit and the storage is completed.

  When the row selection pulses PSEL2, 0 to PSEL2, n are sequentially turned on, a pixel is selected for each row, and the stored imaging signals are sequentially transferred from the charge storage unit.

  The pixel selection pulses PSEL1, 0 to PSEL1, 3m are not driven, and the row selection pulses PSEL2, 0 to PSEL2, n read out the signals of the pixels in the n rows corresponding to all the pixels of the image sensor 3, and the read pixels The signal is transferred to the column circuits 3100 to 3102.

  Thereby, the reading operation of the pixel signal of one frame is completed. Thereafter, the reading operation of the next frame is performed as necessary.

  Here, the time taken from the end of the pixel transfer signal after the reset operation to the end of the readout of the pixel signal of one frame is compared between the case of the readout 1 mode and the case of the readout 2 mode. .

  In the readout 2 mode, it takes time to send a total of n signals of the row selection pulses PSEL2, 0 to PSEL2, n until the readout of the pixel signal of one frame is completed.

  On the other hand, in the readout 1 mode, it is sufficient to send a total of m signals (m = n / 3, m = integer) of the pixel selection pulses PSEL1, 0 to PSEL1, 3m. Can be read.

  Therefore, in the readout 1 mode, signal readout at a higher frame rate is possible than in the readout 2 mode.

  Consider the case where the column circuit has an AD converter. In this case, the analog signal read from the pixel is digitally converted in the column circuit and then read out to the outside of the image sensor 3.

  Since digital signal calculations are easier than analog signal calculations, signal addition calculation processing and the like can be easily performed by an adding unit (not shown) even inside the image sensor if it is subsequent to the AD converter. It becomes like this.

  In addition, when the column circuit has a signal increase / decrease function such as an AD converter or an amplifier, it is possible to apply a different gain for each column to the signal read out inside the image sensor.

  For example, the amplification factor of the pixel signal distributed to each column circuit in the readout 1 mode can be made different for each column circuit.

  Using this, after applying an appropriate gain to the signal for each column, signal addition processing is performed, whereby signal processing such as a low-pass filter can be performed.

  For example, by setting the gain of the column circuit 3101 to 1 and the gains of the column circuits 3100 and 3102 to 1/2, the signals in the first row and the third row are set to the gain of the signal in the second row. Read with a gain of 1/2. After that, the signal processing corresponding to the low-pass filter is performed by adding the signals from the first row to the third row.

  In the present embodiment, in the pixel signal read-out operation, the pixel to be read is described as one pixel per 1 row × 3 columns, but more pixel columns may be skipped. It goes without saying that if a large number of pixel columns are skipped, the time taken to read out one frame of pixel signals can be shortened accordingly.

  Further, in this embodiment, when the signals that have passed through the column circuit are read out in the order as they are, the order of the signals is different from the actual order of the pixels. You will not be able to get.

  In this case, as shown in FIG. 8, a rearrangement circuit (rearrangement unit) 3200 may be arranged after the column circuit, and the signal order may be rearranged in the actual pixel arrangement order for output. Alternatively, in the signal processing circuit (rearranging means) 7 of FIG. 1, the signal order may be rearranged in the actual pixel arrangement order. In FIG. 8, an image pickup device having pixels of 3 rows and 6 columns is illustrated as an example.

  As described above, in the present embodiment, when pixel skipping in the column direction is performed, the signal of the pixel to be read out is the column circuit in which the corresponding pixel is arranged and the column of the other column where the skipping is performed. It can be transferred to the circuit.

  Accordingly, since a column circuit that has not been used in the past when pixels are skipped can be used effectively, a time corresponding to the readout time for one row at the time of skipping normal pixels is obtained. A plurality of rows of pixels can be read out.

  This makes it possible to read out pixels faster than normal pixel skipping, especially for moving image shooting that requires pixel reading at a high frame rate, and the need for high resolution. This can be very effective when taking a reduced image.

(Second Embodiment)
Next, an imaging apparatus according to the second embodiment of the present invention will be described with reference to FIGS. FIG. 6 is a diagram schematically illustrating a circuit diagram of an image sensor in the image pickup apparatus according to the second embodiment of the present invention, and FIG. 7 is a timing chart for explaining an operation example in the readout 1 mode.

  In the present embodiment, a case will be described in which one pixel is read out per 3 rows × 3 columns while the first embodiment reads out 1 pixel per 1 row × 3 columns.

  In FIG. 6, in the image sensor 3 having pixels of 9 rows and 3 columns, the pixel selection switches SEL1100 to SEL1102 selected by the pixel selection pulses PSEL1 and 0 are arranged in one pixel per 3 rows × 3 columns.

  Then, in the operation of the readout 1 mode, the signals of the pixels to be read out are, for example, the column circuit 3101 in the column in which the corresponding pixel is arranged, and the other column circuits 3100 and 3102 in the column in which the pixel to be skipped is arranged. To be read out. In this way, as shown in the timing chart of FIG. 7, signals for the entire screen can be read by reading pixel signals for m rows (m = n / 9, n, m = integer). it can.

  Therefore, as in the first embodiment, when reading out one pixel per 1 row × 3 columns, the reading time of the entire screen can be reduced to about 1/3, whereas in this embodiment, 1 frame It is possible to reduce the time required for the transfer of the signal to about 1/9 of the readout time of the entire screen.

  Here, in FIG. 6, for the sake of convenience of explanation, the image sensor 3 having 9 rows and 3 columns of pixels has been described, but the actual number of pixels of the image sensor 3 is not limited thereto. Further, the configuration of the column circuit may not be as illustrated. Other configurations and operational effects are the same as those of the first embodiment.

  In addition, this invention is not limited to what was illustrated by said each embodiment, In the range which does not deviate from the summary of this invention, it can change suitably.

It is a block diagram for demonstrating the imaging device which is the 1st Embodiment of this invention. It is a flowchart for demonstrating the operation example of the imaging device imaging device which is the 1st Embodiment of this invention. It is the figure which showed the circuit diagram of an image pick-up element simply. It is a timing chart for demonstrating the operation example of read 1 mode. It is a timing chart for demonstrating the operation example of read 2 mode. It is the figure which showed simply the circuit diagram of the image pick-up element in the imaging device which is the 2nd Embodiment of this invention. It is a timing chart for demonstrating the operation example of read 1 mode. It is a circuit diagram which shows the example of arrangement | positioning of the signal rearrangement circuit. It is a circuit diagram at the time of arrange | positioning a column circuit with respect to the conventional image pick-up element.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Optical system 2 Mechanical shutter 3 Image pick-up element 5 Timing signal generation circuit 6 Drive circuit 7 Signal processing circuit 8 Image memory 9 Recording medium 10 Recording circuit 11 Image display apparatus 12 Display circuit 13 System control part 14 ROM
15 RAM
109 Power switch 110 Shutter switch (SW1)
111 Shutter switch (SW2)
3000 vertical scanning circuit 3100-3105 column circuit 3200 rearrangement circuit SEL100-SEL102 pixel selection switch SEL200-SEL282 row selection switch

Claims (7)

An imaging device that includes a plurality of pixels that are two-dimensionally arranged and include photoelectric conversion elements, and a plurality of column circuits that are arranged in each column of the plurality of pixels and that transfer signals from the pixels for each column. An imaging device,
An image pickup apparatus comprising: a distribution unit that distributes and transfers a signal from a pixel arranged in a column direction to a column circuit of a column in which the pixel is arranged and a column circuit different from the column circuit .   The distribution means reads out signals from the pixels arranged in the row direction from the plurality of pixels and reads out signals from the pixels arranged in the column direction to the column circuit of the column in which the pixels are arranged. The image pickup apparatus according to claim 1, wherein the image pickup device is transferred after being distributed to a column circuit of another column.   The imaging apparatus according to claim 1, wherein the column circuit includes an AD converter.   The imaging apparatus according to claim 1, wherein the column circuit includes an amplification amplifier.   5. The imaging apparatus according to claim 3, wherein an amplification factor of a pixel signal distributed to the column circuit by the distribution unit is different for each column circuit.   The imaging apparatus according to claim 3, further comprising an adding unit that adds the pixel signals distributed to the column circuit by the distributing unit.   The imaging apparatus according to claim 1, further comprising a rearranging unit that rearranges the pixel signals distributed to the column circuit by the distributing unit.

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