JP2009148032A - Parallel power system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a parallel power system which can easily perform balanced operation even if heterogenous power units exist. <P>SOLUTION: The parallel power system 100 includes a plurality of power units 50A, 50B and 50C which are connected in parallel with a common load 60 and whose communication ports CO are connected with one another by a communication line 33. The power units each have a switching circuit 9 which converts an input AC power into DC power; an output current detecting circuit 19 which detects an output current; an output voltage detecting circuit 17 which detects an output voltage; a PWM controller 21 which controls the switching circuit 9 so that the output voltage value may keep the target voltage value; and a CPU apparatus 20 which is connected to the communication port CO and performs intercommunication among the plurality of power units and receives balance information and determines the target voltage value, based on the respective balance information. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a parallel power supply system in which outputs of a plurality of power supply apparatuses are connected in parallel to a common load.

  Conventionally, in a parallel power supply system having a plurality of power supply devices connected in parallel to a common load, the current balance terminals of the plurality of power supply devices are connected and the average current value of the output currents of the plurality of power supply devices is converted to a voltage. A parallel power supply system having a current bus for transmitting the signal has been proposed. In a parallel power supply system having such a configuration, in general, a voltage signal corresponding to the output current of the own device is superimposed on the voltage on the current bus, and the average power value flowing in the current bus and the voltage signal are It has a current balance circuit that detects the difference between the output voltage of the apparatus and the output voltage of the other power supply apparatus. And this current balance circuit makes the said difference act on a switching circuit, and balances the output voltage of each power supply device (for example, refer patent document 1).

  On the other hand, conventionally, a balance operation using the load factor as the balance information is performed instead of the balance operation using the average current value as the balance information. The load factor is a ratio to the total load current of the power supply device, that is, 100% load current. For example, in the case of a power supply device with a total load current of 100 A, a load factor of 50% means 50 A, and in a power supply device with a total load current of 60 A, a load factor of 40% means 24 A.

JP 2004-166437 A

  However, according to the current balance control based on the load factor described above, if there is a different type of power supply device that has a voltage level or output impedance corresponding to the load factor different from that of other power supply devices in the system, the load factor is balanced as balance information. When driving, the control becomes difficult. The same applies to a balance operation using the average current value as balance information.

  The present invention has been made in view of the above, and even if there are different types of power supply devices among a plurality of power supply devices in the system, for example, various operations such as balanced operation in which the load factor is the same rate, etc. An object of the present invention is to obtain a parallel power supply system that can easily perform more efficient balance operation using the balance information.

  In order to solve the above-described problems and achieve the object, the parallel power supply system of the present invention includes a plurality of power supply devices that are connected in parallel to a common load and whose communication ports are connected by communication lines, The power supply device includes a switching circuit that converts an input AC power source into a predetermined DC power source and outputs the same to a common load, an output current detection unit that detects an output current output toward the common load, and a common load Connected to the communication port, an output voltage detection means for detecting the output voltage output in output, a voltage control unit for controlling the switching circuit so that the output voltage value output toward the common load holds the target voltage value, and A plurality of power supply devices communicating with each other, generating balance information from at least one of output current and output voltage, and transmitting the balance information to another power supply device. A CPU device that receives balance information of another power supply device and determines a target voltage value so that the current flowing through the common load is balanced among the plurality of power supply devices based on the self-other balance information. Features.

  According to the present invention, each power supply device is equipped with a CPU device. The CPU devices are connected to each other to generate balance information such as the generated load factor and transmit / receive each other. Since the target voltage value is determined so that the current flowing through the common load is balanced among the plurality of power supply devices based on the balance information of the other, the different power supply devices among the plurality of power supply devices in the system Even if it exists, there exists an effect that more efficient balance driving | operation can be easily performed using various balance information including the balance driving | running which makes a load factor the same rate, for example.

  Embodiments of a parallel power supply system according to the present invention will be described below in detail with reference to the drawings. Note that the present invention is not limited to the embodiments.

Embodiment 1 FIG.
FIG. 1 is a schematic functional block diagram of Embodiment 1 of a parallel power supply system according to the present invention. In FIG. 1, a parallel power supply system 100 according to the present embodiment includes three power supply devices: a first power supply device 50A, a second power supply device 50B, and a third power supply device 50C. The output terminals of the three power supply devices 50A, 50B, and 50C are connected to the load 60 in parallel. The communication ports CO of the three power supply devices 50A, 50B, and 50C are connected to each other by a bus type communication line 33. The three power supply devices 50A, 50B, and 50C have the same configuration. Hereinafter, the configuration of the first power supply device 50A will be described as a representative, and the first power supply device 50A will be described as its own device, and the second power supply device 50B and the third power supply device 50C will be described as other devices.

  The first power supply device (hereinafter simply referred to as power supply device) 50 </ b> A is a switching power supply that generates a stable DC power supply from the AC commercial power supply 3 and supplies it to the load 60. That is, the power supply device 50A converts the commercial AC power supply 3 into a predetermined DC power supply and applies it to the load 60 connected to the output terminal.

  As shown in FIG. 1, an input rectifier circuit 5, an input smoothing capacitor 7, and a switching circuit 9 are provided in this order from the AC commercial power supply 3 side on the primary side of the transformer 11. On the other hand, on the secondary side of the transformer 11, from the transformer 11 to the load 60 side, an output rectifier circuit 13, an output smoothing capacitor 15, an output voltage detection circuit (output voltage detection means) 17, an output current detection circuit ( Output current detection means) 19 is provided in this order.

  The power supply device 50 </ b> A further includes a CPU device 20 and a PWM control unit (voltage control unit) 21. The CPU device 20 gives a target voltage value to the PWM control unit 21. The PWM control unit 21 captures the target voltage value from the CPU device 20, captures the output voltage detected by the output voltage detection circuit 17, and sets the switching circuit 9 so that the output voltage of the own power supply device 50A becomes the target voltage value. Feedback control. The feedback control of the switching circuit 9 performed by the PWM control unit 21 is a well-known technique in which the switching operation of the switching circuit 9 is controlled by PWM (Pulse Wide Modulation) and the output voltage becomes variable. The output voltage of the switching circuit 9 is detected by the output voltage detection circuit 17, and the detection signal is input to the PWM control unit 21. Based on the detection signal from the output voltage detection circuit 17 and the target voltage value fetched from the CPU device 20, the PWM control unit 21 switches the switching circuit 9 so that the current flowing through the load 60 is balanced between the power supply devices 50A, 50B, and 50C. Feedback control.

  The CPU device 20 is configured to be able to make a complicated process determination based on a stored program. The CPU device 20 connects an analog terminal to the communication port CO, and communicates with the CPU devices of the other power supply devices 50B and 50C through a bus-type communication line 33 using a predetermined protocol. The CPU device 20 of the present embodiment transmits and receives an output current value as balance information with the CPU devices of the other power supply devices 50B and 50C. That is, the CPU device 20 transmits the output current value fetched from the output current detection circuit 19 to the power supply devices 50B and 50C and receives the output current value sent from the power supply devices 50B and 50C. And while calculating an average current value from the output current value of self-other power supply apparatus 50A, 50B, 50C, the difference of this average current value and the output current value of self-power supply apparatus 50A is calculated | required, and a target voltage value is calculated from this difference. decide. Here, the CPU device 20 determines the target voltage value so that the output current value of the own power supply device 50A becomes the average current value.

  The operation of the CPU device 20 will be described with reference to FIG. When the operation of the system starts, the CPU device 20 first transmits balance information of the own power supply device 50A to the other power supply devices 50B and 50C (step S11). Here, the output current value is transmitted as balance information. Specifically, using a predetermined protocol, the transmission source, that is, the address of the own power supply device and the address of the transmission destination, that is, the address of the counterpart power supply device are added to the output current value.

  Next, the CPU device 20 receives the output current value sent from the other power supply devices 50B and 50C (step S12). Information from the other power supply devices 50B and 50C is buffered by buffer means that is held for a predetermined time, and real-time characteristics are maintained. The CPU device 20 can obtain the output current values of the other power supply devices 50B and 50C and know which power supply device is operating and which power supply device is stopped by this operation.

  Thereafter, the CPU device 20 calculates an average current value from the output current values of the own and other power supply devices 50A, 50B, and 50C (step S13), and obtains a target output current value of the own power supply device from the average current value (step S14). ). Here, the target output current value is made equal to the average current value. Next, the CPU device 20 determines a target voltage value so as to achieve the target output current value, and outputs the target voltage value to the PWM control unit 21 (step S15). Next, it is confirmed whether or not the operation of the self-power supply device 50A is finished. If it is not finished, the above processing is repeated (step S16).

  The PWM control unit 21 controls the switching circuit 9 based on a signal from the CPU device 20, and appropriately increases the output voltage of the switching circuit 9 so as to decrease the output current of the power supply device as much as possible. Thus, the output voltage is appropriately reduced.

  According to the parallel power supply system having such a configuration, it is possible to easily perform a balance operation in which the output current value of the power supply apparatus is the average current value. And according to this system, since balance information is transmitted / received by the operation | movement of communication performed between CPU apparatuses 20, and balance operation is performed based on this, multiple power supply device 50A, 50B which comprises a system, Balance operation can be easily performed even if different types of power supply devices exist within 50C.

Embodiment 2. FIG.
FIG. 3 is a flowchart showing the operation of the CPU device of the second embodiment of the parallel power supply system according to the present invention. The CPU device 20 according to the present embodiment transmits and receives the load factor instead of the output current value according to the first embodiment. Then, the average load factor of the system is calculated from the load factors of the own power supply devices 50A, 50B, and 50C, and the target voltage value is determined so that the load factor of the own power supply device 50A becomes the average load factor. The system configuration is the same as that of the first embodiment.

  The operation of the CPU device 20 will be described with reference to FIG. When the operation of the system starts, the CPU device 20 transmits the load factor of the own power supply device 50A as balance information (step S21). Next, the load factor sent from the other power supply devices 50B and 50C is received (step S22).

  Thereafter, the CPU device 20 calculates an average current value from the output current values of the own and other power supply devices 50A, 50B, and 50C (step S13), and obtains a target output current value of the own power supply device from the average current value (step S14). ). Here, the target output current value is assumed to be equal to the average current value. Next, the CPU device 20 determines a target voltage value so as to achieve the target output current value, and outputs the target voltage value to the PWM control unit 21 (step S15). Finally, it is confirmed whether or not the operation of the own power supply device 50A is finished. If not finished, the above processing is repeated (step S16).

  According to the parallel power supply system having such a configuration, even if different kinds of power supply devices exist among the plurality of power supply devices 50A, 50B, and 50C in the system, the load factor of the own power supply device is set as the average load factor. Balance operation can be easily performed.

Embodiment 3 FIG.
FIG. 4 is a schematic functional block diagram of Embodiment 3 of the parallel power supply system according to the present invention. FIG. 5 is a flowchart showing the operation of the CPU device of the present embodiment. In FIG. 4, in the parallel power supply system 101 of the present embodiment, each power supply device 50A, 50B, 50C has a temperature sensor 24 as temperature detecting means for detecting the temperature.

  The operation of the CPU device 20 will be described with reference to FIG. When the operation of the system starts, the CPU device 20 transmits the detected temperature of the own power supply device 50A as balance information (step S31). Next, the detected temperature sent from the other power supply devices 50B and 50C is received (step S32).

  Thereafter, the CPU device 20 calculates an average temperature from the detected temperatures of the own and other power supply devices 50A, 50B, and 50C (step S33), and the target voltage of the own power supply device from the difference between the average temperature and the detected temperature of the own device. Correct the value. For example, the target voltage value is lowered by a value proportional to the difference between the average temperature and the detected temperature of the device itself (step S34). Finally, it is confirmed whether or not the operation of the own power supply device 50A is finished. If not finished, the above processing is repeated (step S35).

  According to the parallel power supply system having such a configuration, the detected temperature is transmitted and received as balance information, the average temperature is calculated from the detected temperatures of the own and other devices, and based on the difference between the detected temperature and the average temperature of the own power device. Since the target voltage value is corrected, even if there are different types of power supply devices among the plurality of power supply devices 50A, 50B, and 50C in the system, it is possible to easily realize a balanced operation in consideration of temperature conditions.

Embodiment 4 FIG.
FIG. 6 is a flowchart showing the operation of the CPU device of the fourth embodiment of the parallel power supply system according to the present invention. The CPU device 20 according to the present embodiment transmits and receives the load factor and the detected temperature of the own power supply device 50A as balance information. Then, the average load factor of the system is calculated from the load factors of the own power supply devices 50A, 50B, and 50C, and the target voltage value is obtained so that the load factor of the own power supply device 50A becomes the average load factor. Correct the value with temperature. The system configuration is the same as that of the third embodiment.

  The operation of the CPU device 20 will be described with reference to FIG. When the operation of the system starts, the CPU device 20 transmits the load factor and the detected temperature of the own power supply device 50A as balance information (step S41). Next, the load factor and the detected temperature sent from the other power supply devices 50B and 50C are received (step S42).

  Thereafter, the CPU device 20 calculates an average load factor from the load factors of the own power supply devices 50A, 50B, and 50C, and calculates an average temperature (step S43). Thereafter, the target load factor of the own power supply device is obtained from the average load factor (step S44). Further, a target voltage value that achieves this target load factor is obtained, and thereafter, the target voltage value is corrected from the difference between the average temperature and the self-detected temperature, and is output to the PWM control unit 21. For example, the target voltage value is lowered by a value proportional to the difference between the average temperature and the detected temperature of the device itself (step S45). Finally, it is confirmed whether or not the operation of the self-power supply device 50A is finished. If it is not finished, the above processing is repeated (step S46).

  According to the parallel power supply system having such a configuration, it is possible to easily perform a balance operation in which the load factor of the self-power-supply device is the average load factor and the target voltage value is corrected.

Embodiment 5 FIG.
FIG. 7 is a flowchart showing the operation of the CPU device of the fifth embodiment of the parallel power supply system according to the present invention. The CPU device 20 according to the present embodiment transmits and receives the load factor and the detected temperature of the own power supply device 50A as balance information. Then, the average load factor of the system is calculated from the load factors of the own and other power supply devices 50A, 50B, and 50C, the load factor of the own power source device 50A is corrected with the temperature, and then the target voltage value is set to the corrected load factor. Ask for. The system configuration is the same as that of the third embodiment.

  The operation of the CPU device 20 will be described with reference to FIG. Steps S51 to S53 and step S56 are the same as steps S41 to S43 and step S46 of the fourth embodiment. In step S54, the CPU device 20 corrects the obtained target load factor based on the difference between the average temperature and the self-detected temperature, further obtains a target voltage value that achieves the corrected target load factor, and calculates this as PWM. It outputs to the control part 21 (step S55).

  Regarding the correction of the target load factor, specifically, as an example, the load factor multiplied by the difference between the average temperature and the self-detected temperature is subtracted from the original load factor. That is, the load factor decreases by a value proportional to the difference between the average temperature and the self-detected temperature. That is, the larger the difference between the average temperature and the self-detected temperature, the lower the load factor. At this time, the value subtracted from the load factor may not be a value proportional to the difference between the average temperature and the self-detected temperature, but may be a value obtained by multiplying an appropriate curve function.

  As described above, the CPU device 20 according to the present embodiment transmits and receives the load factor and the detected temperature as balance information, and corrects the target load factor with the coefficient of temperature. The target output current may be corrected with a temperature coefficient by transmitting and receiving the output current value and the detected temperature.

  According to the parallel power supply system having such a configuration, it is possible to easily perform a balance operation in which the load factor of the own power supply device is set as the average load factor and the obtained load factor is corrected by the temperature. It should be noted that the load factor may be lowered only when the detected temperature of the own power supply device is higher than the average temperature by a predetermined value or more. Further, the load factor may be lowered as the detected temperature of the own power supply device is larger than the average temperature.

  As described above, the parallel power supply system according to the present invention is useful for a parallel power supply system in which outputs of a plurality of power supply devices are connected in parallel to a load, and in particular, for example, a voltage level or an output impedance corresponding to a load factor. In a parallel power supply system including different types of power supply devices different from other power supply devices, the present invention is suitable for various balance operations.

1 is a schematic functional block diagram of a first embodiment of a parallel power supply system according to the present invention. It is a flowchart which shows operation | movement of CPU apparatus of Embodiment 1 of the parallel power supply system concerning this invention. It is a flowchart which shows operation | movement of CPU apparatus of Embodiment 2 of the parallel power supply system concerning this invention. It is a general | schematic functional block diagram of Embodiment 3 of the parallel power supply system concerning this invention. It is a flowchart which shows operation | movement of the CPU apparatus of Embodiment 3 of the parallel power supply system concerning this invention. It is a flowchart which shows operation | movement of CPU apparatus of Embodiment 4 of the parallel power supply system concerning this invention. It is a flowchart which shows operation | movement of the CPU apparatus of Embodiment 5 of the parallel power supply system concerning this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 3 Commercial AC power source 5 Input rectifier circuit 7 Input smoothing capacitor 9 Switching circuit 11 Transformer 13 Output rectifier circuit 15 Output smoothing capacitor 17 Output voltage detection circuit (output voltage detection means)
19 Output current detection circuit (output current detection means)
20 CPU device 21 PWM controller (voltage controller)
24 Temperature sensor (temperature detection means)
33 communication line 50A first power supply device 50B second power supply device 50C third power supply device 60 load 100, 101 parallel power supply system CO communication port

Claims (8)

A plurality of power supply devices connected in parallel to a common load and connected to each other via communication lines,
The power supply device
A switching circuit that converts an input AC power source into a predetermined DC power source and outputs the same toward the common load;
An output current detecting means for detecting an output current output toward the common load;
An output voltage detecting means for detecting an output voltage output toward the common load;
A voltage control unit that controls the switching circuit so that an output voltage value output toward the common load maintains a target voltage value;
A plurality of power supply devices connected to the communication port communicate with each other, generate balance information from at least one of output current and output voltage, and transmit the balance information to other power supply devices. A CPU device that receives the balance information of the power supply device and determines the target voltage value so that the current flowing through the common load is balanced among the plurality of power supply devices based on the balance information of the other power supply device. A parallel power supply system characterized by that. The CPU device transmits / receives an output current value as the balance information, calculates an average current value from an output current value of the own device and the target device so that the output current value of the own power supply device becomes the average current value. The parallel power supply system according to claim 1, wherein a voltage value is determined. The CPU device transmits / receives a load factor as the balance information, calculates an average load factor from the load factor of the own device, and sets the target voltage value so that the load factor of the own power supply device becomes the average load factor. The parallel power supply system according to claim 1, wherein the parallel power supply system is determined. The CPU device transmits and receives a load factor as the balance information, and determines the target voltage value so that the load factor of the own device becomes the maximum load factor among the load factors of the plurality of power supply devices. The parallel power supply system according to claim 1, wherein: The CPU device transmits and receives a load factor as the balance information, and determines the target voltage value so that the load factor of the own device becomes the minimum load factor among the load factors of the plurality of power supply devices. The parallel power supply system according to claim 1, wherein: It further comprises temperature detection means for detecting the temperature of the device itself,
The CPU device transmits and receives the detected temperature as the balance information, calculates an average temperature from the detected temperatures of the own and other devices, and calculates the target voltage value based on the difference between the detected temperature of the own power supply device and the average temperature. It correct | amends. The parallel power supply system of any one of Claim 1 to 5 characterized by the above-mentioned. It further comprises temperature detection means for detecting the temperature of the device itself,
The said CPU apparatus determines the said target voltage value so that the load factor of an own apparatus may be lowered | hung, when the detected temperature of an own apparatus is more than predetermined value more than the average temperature of these power supply devices. 6. The parallel power supply system according to any one of items 1 to 5. The said CPU apparatus determines the said target voltage value so that the load factor of an own apparatus may be reduced, so that the detected temperature of an own apparatus is larger than the average temperature of these power supply apparatuses. The parallel power supply system described.

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