JP2009147100A - Multilayer printed wiring board - Google Patents

Abstract

Provided is a multilayer printed wiring board that corrects a change in characteristic impedance of a signal line at a portion close to the signal line and a through conductor while preventing deterioration of noise characteristics.
According to a printed wiring board, a signal line and a through conductor having an end reaching a surface of a dielectric layer are provided. A dielectric member 7 having a relative dielectric constant different from that of the dielectric film 5 is disposed between the signal line 2 and the end 6 a of the through conductor 6 on the surface of the dielectric layer 4. As a result, the capacitance component is controlled by the dielectric member 7, and a small characteristic impedance drop that occurs in the vicinity of the signal line 2 and the through conductor 6 can be corrected, and the characteristic impedance can be matched.
[Selection] Figure 1

Description

  The present invention relates to a signal line formed on a surface layer of a substrate on which an IC is mounted, and relates to a multilayer printed wiring board having a signal line structure with improved signal transmission characteristics in a GHz band for communication between ICs and the like.

  With the recent increase in signal processing technology, the frequency band of signals communicated between ICs is increasing. For this reason, it is required to transmit a high-frequency signal with low loss in a signal line provided on a printed wiring board in order to perform signal communication between ICs. And in order to transmit this high frequency signal with low loss, it is necessary that there is no mismatch in the characteristic impedance of the signal line on the printed wiring board.

  Conventionally, a signal line in a high-speed compatible printed wiring board is formed by a distributed constant circuit such as a microstrip line. Here, the microstrip line is a line having a structure in which a conductor plane maintained at a constant potential is provided below the signal line and a dielectric layer is provided between the signal line and the conductor plane.

The characteristic impedance of the microstrip line is expressed by the following general formula (1). However, the characteristic impedance is Z ₀ , the width of the signal line is W, the thickness of the signal line is t, the thickness of the dielectric layer is h, and the relative dielectric constant of the dielectric layer is ε _r .

  In the signal line between ICs, the characteristic impedance must be kept constant by making the relative permittivity of the dielectric layer uniform and making the line structure constant such as the width and thickness of the signal line and the thickness of the dielectric layer. Can do. By adopting such a structure, the signal line is formed so that mismatch of characteristic impedance does not occur.

In actual printed wiring board manufacture, a dielectric film is generally disposed on a signal line so that solder does not adhere to the signal line provided on the wiring board. However, since the above general formula (1) does not consider the influence of the dielectric film, the calculation is performed by adjusting the relative dielectric constant ε _r of the general formula (1), or electromagnetic field simulation software is used. To reflect the influence of the dielectric film.

  Therefore, in order to confirm the influence on the characteristic impedance brought about by the dielectric film, when the dielectric film is provided at the section BB in FIG. 5A using commercially available electromagnetic field simulation software by the moment method An example in which calculation is performed with and without the case is shown. FIG. 5 shows an example of a conventional printed wiring board 50, and (a) is a plan view. FIG. 5B is a side cross-sectional view showing a calculation result in a state cut along the line AA in FIG. 5A and viewed in the direction of the arrow, and FIG. 5C is FIG. 5A. It is side surface sectional drawing which showed the calculation result in the state cut | disconnected to the BB line of and seeing in the arrow direction. The width of the signal line 2 is 0.2 mm, the thickness is 0.043 mm, the thickness of the dielectric layer 4 is 0.2 mm, the thickness of the dielectric film 5 is 0.058 mm, and the diameter of the through conductor 6 is The distance between the signal line 2 and the through conductor 6 was 0.3 mm. The relative dielectric constant of the dielectric layer 4 was 4.5, and the relative dielectric constant of the dielectric film 5 was 3.5.

  The calculation result of the characteristic impedance at the section BB in FIG. 5A was 61.17 ohm. Although not shown, the result of calculating the characteristic impedance in the shape without the dielectric film 5 is 65.51 ohm, which is 4.34 ohms higher than when the dielectric film 5 is provided. From the above results, it was shown that the dielectric film affects the characteristic impedance.

On the other hand, various devices have been miniaturized in response to high-speed signal processing. From the viewpoint of space saving, the printed wiring board has been made multilayered and the signal lines have high density for the purpose of reducing the printed circuit board size. The demand for wiring is increasing. In order to improve the wiring density in the signal line, in FIGS. 5A to 5C, the conductor member 3 and the other layer same potential conductor (not shown) are connected to the conductor member 3 in order to stabilize the potential. Opportunities for performing design in which the through conductor 6 provided in the circuit board is close to the signal line 2 are increasing. The characteristic impedance of the signal line is expressed by the following general formula (2). However, the characteristic impedance is Z ₀ , the signal line inductance component is L, and the signal line capacitance component is C.

  As described above, when the signal line and the through conductor are provided close to each other, it is known that unnecessary capacitance is generated between the signal line and the through conductor. The increase in the capacitance component of the signal line locally lowers the characteristic impedance as shown in Equation (2). Therefore, for such a structure, using the commercially available electromagnetic field simulation software by the moment method, the characteristic impedance at the location of the cross section AA and the location of BB in FIG. A change in characteristic impedance due to the through conductor 6 was confirmed. Similar to the above calculation, the width of the signal line 2 was 0.2 mm and the thickness thereof was 0.043 mm. The dielectric layer 4 has a thickness of 0.2 mm, the dielectric film 5 has a thickness of 0.058 mm, the through conductor 6 has a diameter of 0.3 mm, and the distance between the signal line 2 and the through conductor 6 is 0.3 mm. did. The relative dielectric constant of the dielectric layer 4 was 4.5, and the relative dielectric constant of the dielectric film 5 was 3.5.

  As a result, the signal line inductance component in cross section AA in FIG. 5A was 3.675 nH / cm, the capacitance component was 1.028 pF / cm, and the characteristic impedance was 59.77 ohm. FIG. 5B shows a calculation result of the electric force lines 51 in the section AA.

  In addition, the inductance component of the signal line in section BB in FIG. 5A was 3.787 nH / cm, the capacitance component was 1.012 pF / cm, and the characteristic impedance was 61.17 ohm. FIG. 5C shows the calculation result of the electric force lines 51 in the cross section BB.

  From the above calculated value and the AA cross section shown in FIG. 5B and the situation of the electric lines of force 51, an unnecessary capacitance component is present between the signal line 2 and the through conductor 6 in the cross section AA. It can be seen that the characteristic impedance is reduced by 1.40 ohms. Therefore, in a printed wiring board that ensures signal transmission characteristics and requires high wiring density, it is necessary to correct local characteristic impedance mismatch due to the proximity of the signal line and the through conductor.

  For this reason, as a correction method for eliminating the mismatch of the characteristic impedance of the signal line, a method of adjusting the coating thickness of the dielectric film on the entire substrate has been proposed in order to set the characteristic impedance of the signal line to a desired value ( Patent Document 1).

  In addition, a high-frequency wiring board has been proposed that can correct a local characteristic impedance change that may occur in a signal line due to a capacitance component generated at a position where the signal line and the through conductor are close to each other (see Patent Document 2). ). In this method, a conductor non-forming portion is formed on the ground conductor plane formed in the lower layer of the signal line, thereby canceling the increase in the capacitance component of the signal line and matching the characteristic impedance.

JP-A-2-164098 JP 2006-042098 A

  However, in the method described in Patent Document 1, since the coating thickness of the dielectric film is changed over the entire substrate, a minute characteristic impedance that is locally generated at a location where the signal line and the through conductor are close to each other. The change could not be corrected.

  Further, in the high-frequency wiring board of Patent Document 2 described above, it is possible to correct a characteristic impedance change that occurs at a position where the signal line and the through conductor are close to each other. However, for example, like the high-frequency wiring board 60 shown in FIG. 6, the conductor non-forming portion 62 that is a rectangular through hole must be formed in the conductor member 3 on the lower layer side of the signal line 2. As shown in FIG. 7, the conductor non-forming portion 62 blocks the signal feedback current path 64 that flows in pairs with the signal current 63 that flows through the signal line 2, and the signal current 63 and the signal feedback current path 64. The loop area of is increased. As a result, the magnetic field generated from the loop of the signal current 63 and the signal feedback current increases as the loop area increases, so that there is a problem that noise emission from the signal line 2 to the outside of the printed wiring board 1 increases. It was supposed to occur.

  Accordingly, the present invention has been made in view of such a current situation, and multilayer printed wiring that corrects a change in characteristic impedance of a signal line in a portion close to the signal line and a through conductor while preventing deterioration of noise characteristics. The purpose is to provide a board.

  The present invention relates to a multilayer printed wiring board in which a dielectric layer and a conductor layer are laminated, a signal line formed on the surface of the surface dielectric layer, and one end on the surface of the surface dielectric layer. A through conductor formed so that the other end reaches the conductor layer below the surface dielectric layer, and the one end of the signal line and the through conductor, A dielectric film coated with the surface of the dielectric layer of the surface layer, and the dielectric film between the signal line and the one end of the through conductor so as to be shielded from each other And a dielectric member having a relative dielectric constant different from that of the surface dielectric layer.

  According to the present invention, since the dielectric member having a relative dielectric constant different from that of the dielectric film is disposed between the signal line and the end portion of the through conductor, the characteristics of the signal line in the vicinity of the signal line and the through conductor Impedance changes can be corrected while preventing deterioration of noise characteristics.

  Hereinafter, a printed wiring board (multilayer printed wiring board) 1 according to the present embodiment will be described with reference to FIGS. 1 and 2. FIG. 1 shows a first example of a printed wiring board in the present embodiment, and (a) is a plan view thereof. 1B is a cross-sectional side view taken along the line AA in FIG. 1A and viewed in the direction of the arrow, and FIG. 1C is a cross-sectional view taken along the line B-B in FIG. It is side surface sectional drawing shown in the state cut | disconnected to the line and seen in the arrow direction. FIG. 2 shows a modified example of the printed wiring board of the first example. (A) is a plan view thereof, and (b) is cut along the line AA in FIG. It is side surface sectional drawing shown in the state seen in the direction.

  That is, as shown in FIGS. 1A to 1C, the printed wiring board 1 of this example has a microstrip line structure, and the signal line 2 and the dielectric layer 4 are formed on the surface of the dielectric layer 4. A planar conductor member 3 is provided at a lower layer position (that is, a bottom surface portion of the dielectric layer 4). The printed wiring board 1 is formed so as to penetrate the dielectric layer 4 so that one end 6a reaches the surface of the dielectric layer 4 and the other end 6b contacts the conductor member 3. A through conductor 6 is provided. Further, the printed wiring board 1 includes a dielectric film 5 in which the signal line 2 and the end 6 a of the through conductor 6 are both covered with the surface of the dielectric layer 4.

  The signal line 2 is a line through which a signal current flows, and the conductor member (conductor layer) 3 is a ground (GND) layer and serves as a path for signal feedback current due to the signal current. The dielectric layer 4 is a substrate made of an insulating material, and the signal line 2 and the conductor member 3 are conductor patterns formed on the dielectric layer 4 by a chemical method such as plating or etching. The dielectric film 5 is a solder resist formed so as to cover the signal line 2 and the end portion 6 a of the through conductor 6 with the surface of the dielectric layer 4.

  The printed wiring board 1 is provided with a dielectric member 7 having a relative dielectric constant different from that of the dielectric film 5 and which is a feature of the present invention. As shown in FIG. 1A, the dielectric member 7 is disposed between the signal line 2 and the through conductor 6 so as not to contact the two in the plan view. Further, as shown in FIG. 1B, the dielectric member 7 is formed with a thickness reaching from the surface of the dielectric layer 4 to the surface of the dielectric film 5 in a side view.

  The dielectric member 7 is arranged in the position and shape as described above, thereby shielding between the portion of the signal line 2 adjacent to the through conductor 6 and the through conductor 6. Thereby, in this printed wiring board 1, the capacitance component which generate | occur | produced between the signal track | line and the penetration conductor in the conventional printed wiring board which did not arrange | position the dielectric member like the dielectric member 7 is suppressed. Will be able to. The amount of the capacitance component generated between the signal line 2 and the conductor member 3 can be controlled by changing various elements such as the relative permittivity, shape, and arrangement position of the dielectric member 7 to be arranged. Become. In this way, if the capacitance component can be controlled by changing various elements of the dielectric member 7, it is possible to correct a small characteristic impedance drop that occurs in the vicinity of the signal line 2 and the through conductor 6, and to reduce the characteristic impedance. Can be matched.

  In the printed wiring board 1 of the present embodiment, since the dielectric film 5 on the surface of the dielectric layer 4 is partially replaced with the dielectric member 7, the processing of the inner layer of the dielectric layer 4 is performed. Therefore, it is possible to easily perform correction after manufacturing. In addition, since the printed wiring board 1 can be manufactured with the simple configuration as described above, it is possible to reduce costs for signal transmission and noise emission countermeasures, and to realize a printed wiring board with high wiring density at low cost. be able to. Furthermore, since the conductor member 3 provided in the lower layer of the signal line 2 is not processed such as a through hole, an increase in noise radiation is prevented without impeding the flow of the signal current and the signal feedback current flowing through the conductor member 3. Will be able to.

  On the other hand, in the printed wiring board 1 in the first example as described above, the space for arranging the dielectric member 7 is formed as a gap 11 as shown in FIGS. Can be arranged. In this case, the wall 11a, which is the outer shape of the gap 11, is formed by the dielectric film 5, so that the signal line 2 and the end 6a of the through conductor 6 provided on the surface of the dielectric layer 4 are formed. It is not exposed to air. For this reason, it becomes possible to improve the durability against deterioration (for example, corrosion) of the printed wiring board 1 due to oxidation of the signal line 2 and the through conductor 6. Such a configuration in which the gap 11 is formed in the dielectric film 5 can be manufactured by controlling the operation of the dielectric film 5 during printing so that the dielectric film 5 is not partially formed. It becomes. This eliminates the need for the step of replacing the dielectric film 5 with the dielectric member 7 made of a dielectric material, and thus is less than when the dielectric film 5 is replaced with a dielectric member 7 other than air. It becomes possible to manufacture with man-hours.

  Here, in order to experimentally confirm the result of this example, the change in characteristic impedance at the section AA and the section BB in FIG. 1A is represented by an electromagnetic field simulation using a commercially available moment method. Calculated by software.

  In this experiment, the above-described pattern in which air is arranged is used as the dielectric member 7. The width of the signal line 2 is 0.2 mm, the thickness of the signal line 2 is 0.043 mm, the thickness of the dielectric layer 4 is 0.2 mm, the thickness of the dielectric film 5 is 0.058 mm, and the diameter of the through conductor 6 is The distance between the signal line 2 and the through conductor 6 was 0.3 mm. The relative dielectric constant of the dielectric layer 4 was 4.5, and the relative dielectric constant of the dielectric film 5 was 3.5. These values are the same as the simulation conditions shown in FIG.

  In addition, the dielectric member 7 is air and the dielectric constant is 1.0, and the arrangement space of the dielectric member 7 is within a range in which the distance from both ends of the signal line 2 is 0.05 mm to 0.15 mm in the section AA. It was.

  As a result, the inductance component of the signal line 2 in the section AA in FIG. 1A was 3.675 nH / cm, the capacitance component was 0.980 pF / cm, and the characteristic impedance was 61.22 ohm.

  In addition, the signal line inductance component in section BB in FIG. 1A was 3.787 nH / cm, the capacitance component was 1.012 pF / cm, and the characteristic impedance was 61.17 ohms.

  When the dielectric member 7 is not disposed in the section AA in FIG. 1A, the inductance component of the signal line 2 is 3.675 nH / cm, as in the result of FIG. 5A described above. . The capacitance component was 1.028 pF / cm, and the characteristic impedance was 59.77 ohm.

  From the above simulation results, it is confirmed that the characteristic impedance mismatch is corrected from 1.40 ohms to 0.05 ohms by implementing this example, and the effect of the present invention can be confirmed. It was.

  Next, the printed wiring boards of the second and third examples having configurations other than the printed wiring board 1 will be described with reference to FIGS. 3 (a) to 3 (c) and FIGS. 4 (a) to 4 (c). FIG. 3 shows a second example of the printed wiring board in the present embodiment, and (a) is a plan view thereof. 3B is a side cross-sectional view showing a state cut along the line AA in FIG. 3A and viewed in the direction of the arrow, and FIG. 3C is a cross-sectional view taken along line BB in FIG. It is side surface sectional drawing shown in the state cut | disconnected to the line and seen in the arrow direction. FIG. 4 shows a third example of the printed wiring board in the present embodiment, and (a) is a plan view thereof. 4B is a side cross-sectional view taken along the line AA in FIG. 4A and viewed in the direction of the arrow, and FIG. 4C is a cross-sectional view taken along line BB in FIG. It is side surface sectional drawing shown in the state cut | disconnected to the line and seen in the arrow direction. 3 (a) to 3 (c) and FIGS. 4 (a) to 4 (c) having the same reference numerals as those in FIGS. 1 (a) to 1 (c) are omitted with the aid of the description. Shall.

  As shown in FIGS. 3A to 3C, the printed wiring board (multilayer printed wiring board) 10 in the second example is configured such that the signal line 2 is predetermined on the surface of the dielectric layer 4 in the printed wiring board 1 described above. A planar conductor member 8 that is sandwiched from the outside at intervals is arranged. Further, the through conductor 6 has an end 6b in contact with the conductor member 3 as in the case of the printed wiring board 1, but the end 6a further extends from the surface of the dielectric layer 4 to the surface of the conductor member 8 described above. It is formed so as to penetrate to reach. Since the through conductor 6 is formed in contact with the conductor member 3 and the conductor member 8, the conductor member 8 has a ground pattern with the same potential as that of the conductor member 3.

  The printed wiring board 10 is provided with a dielectric member 7 having a relative dielectric constant different from that of the dielectric film 5 and which is a feature of the present invention. As shown in FIG. 3A, the dielectric member 7 is disposed between the signal line 2 and the conductor member 8, that is, between the signal line 2 and the through conductor 6 in a plan view. Further, as shown in FIG. 3B, the dielectric members 7 are formed with thicknesses reaching from the surface of the dielectric layer 4 to the surface of the dielectric film 5 in a side view.

  The dielectric member 7 is arranged at the position and shape as described above on the printed wiring board 10, thereby shielding between the through conductor 6 and a portion of the signal line 2 adjacent to the through conductor 6. Thereby, in this printed wiring board 10, the capacitance component generated between the signal line 2 and the through conductor 6 is suppressed. When the capacitance component is suppressed by the dielectric member 7, it is possible to correct a small characteristic impedance drop that occurs in the vicinity of the signal line 2 and the through conductor 6, and to match the characteristic impedance.

  Next, the printed wiring board 20 of the third example will be described with reference to FIGS.

  As shown in FIGS. 4A to 4C, the printed wiring board (multilayer printed wiring board) 20 in the third example is configured such that the signal line 2 of the printed wiring board 10 described above is connected to two parallel differential signals. The structure is replaced with the line 9. And the conductor member 8 is arrange | positioned so that the differential signal track | line 9 may be pinched | interposed from the outer side at predetermined intervals similarly to the case of the printed wiring board 10 (refer Fig.3 (a)-(c)). Further, the end 6 b of the through conductor 6 is in contact with the conductor member 3 as in the case of the printed wiring board 10, but the end 6 a further extends from the surface of the dielectric layer 4 to the surface of the conductor member 8 described above. It is formed so as to penetrate to reach.

  The printed wiring board 20 is provided with three dielectric members 7 having a relative dielectric constant different from that of the dielectric film 5 and characterizing the present invention. The dielectric member 7 is disposed on the line connecting the through conductors 6 between the differential signal lines 9 in the plan view shown in FIG. Each of the other dielectric members 7 is on a line connecting the through conductors 6, and is provided between the differential signal line 9 and the conductor member 8 facing each outside of the differential signal line 9. Is arranged. As shown in FIG. 4B, the dielectric members 7 arranged at these three locations are formed with thicknesses that reach from the surface of the dielectric layer 4 to the surface of the dielectric film 5 in a side view, respectively. .

  The dielectric member 7 is arranged at the position and shape as described above on the printed wiring board 20, thereby shielding between the through conductor 6 and a portion of the differential signal line 9 adjacent to the through conductor 6. Thereby, in this printed wiring board 20, the capacitance component generated between the differential signal line 9 and the through conductor 6 is suppressed. When the capacitance component is suppressed by the dielectric member 7, it is possible to correct a small characteristic impedance drop that occurs in the vicinity of the differential signal line 9 and the through conductor 6, and to match the characteristic impedance. .

  In the printed wiring boards 10 and 20 shown in the second and third examples, the dielectric film 5 on the surface of the dielectric layer 4 is partially replaced with the dielectric member 7. There is no need to process the inner layer of the body layer 4, and correction after manufacture can be easily performed. In addition, since these printed wiring boards 10 and 20 can be manufactured with the simple configuration as described above, it is possible to suppress the cost for signal transmission and noise emission countermeasures, and a printed wiring board having a high wiring density at a low cost. Can be realized. Furthermore, since the conductor member 3 provided in the lower layer of the signal line 2 or the differential signal line 9 is not processed with a through hole or the like, the flow of the signal current and the signal feedback current flowing through the conductor member 3 is not hindered, and the noise is reduced. Increase in radiation can be prevented.

  On the other hand, similarly to the printed wiring board 1 shown in the first example, also in the printed wiring boards 10 and 20 shown in the second and third examples, by forming the arrangement space of the dielectric member 7 as a gap, Air can be disposed as the dielectric member. As described above, even when the dielectric members 7 in the printed wiring boards 10 and 20 are air, the same effects as those obtained in the printed wiring board 1 shown in the first example are obtained. Of course, it is obtained.

  Of course, the dielectric film 5 and the dielectric member 7 described in the present embodiment may be formed by any method such as printing or coating.

  The shape of the dielectric member 7 (mainly in plan view) may be a rectangle, a triangle, or a trapezoid, but it continuously extends in the signal line direction in accordance with the curved surface of the through conductor 6 such as an ellipse or a semicircle. It is preferable to reduce the local characteristic impedance mismatch.

  In addition to the printed wiring boards 1, 10, and 20 shown in the first to third examples, a large number of dielectric layers such as the dielectric layer 4 and conductor layers such as the conductor member 3 are stacked. Of course, it may be a printed wiring board of the form made. In a printed wiring board in which a large number of such dielectric layers are laminated, the signal line 2 and the dielectric member 7 shown in the first to third examples are arranged on the surface dielectric layer. It will be.

  As described above, the multilayer printed wiring board according to the present invention is useful for multilayer printed wiring boards that require matching of characteristic impedances, and in particular, multilayer printed wiring boards that are required to reduce the cost for measures against noise radiation. Suitable for

The 1st example of the printed wiring board in this Embodiment is shown, (a) is the top view, (b) is the state which cut | disconnected to the AA line | wire of FIG. (C) is side surface sectional drawing shown in the state which cut | disconnected to the BB line | wire of Fig.1 (a) and looked at the arrow direction. The modification of the printed wiring board of a 1st example is shown, (a) is the top view, (b) is the state which cut | disconnected to the AA line of FIG. It is side surface sectional drawing shown. The 2nd example of the printed wiring board in this Embodiment is shown, (a) is the top view, (b) is the state which cut | disconnected to the AA line | wire of FIG. (C) is side surface sectional drawing shown in the state which cut | disconnected by the BB line of Fig.3 (a) and looked at the arrow direction. The 3rd example of the printed wiring board in this Embodiment is shown, (a) is the top view, (b) is the state which cut | disconnected to the AA line | wire of FIG. (C) is side surface sectional drawing shown in the state which cut | disconnected by the BB line of Fig.4 (a) and looked at the arrow direction. The example of the conventional printed wiring board is shown, (a) is a top view, (b) showed the calculation result in the state cut | disconnected to the AA line of Fig.5 (a) and looked at the arrow direction. Side surface sectional drawing and (c) are side surface sectional views which showed the calculation result in the state cut | disconnected by the BB line of Fig.5 (a) and seeing in the arrow direction. It is a top view which shows the structural example of the conventional printed wiring board. It is a top view which shows the example of the signal current and signal feedback current in the conventional printed wiring board.

Explanation of symbols

1 Multilayer printed wiring board (printed wiring board)
2 Signal line 3 Conductor layer (conductor member)
DESCRIPTION OF SYMBOLS 4 Dielectric layer 5 Dielectric film 6 Through conductor 6a End part 6b End part 7 Dielectric member 9 Differential signal line 10 Multilayer printed wiring board (printed wiring board)
11 Gap 11a Wall 20 Multilayer Printed Wiring Board (Printed Wiring Board)

Claims (4)

In a multilayer printed wiring board in which a dielectric layer and a conductor layer are laminated,
A signal line formed on the surface of the surface dielectric layer;
A penetrating conductor formed so as to penetrate the surface of the surface dielectric layer so that one end reaches the other layer and the other end contacts the lower conductive layer than the surface dielectric layer;
A dielectric film that covers both the signal line and the one end of the through conductor with the surface of the surface dielectric layer; and
A dielectric member having a relative dielectric constant different from that of the dielectric film is disposed between the signal line and the end portion on the one side of the through conductor on the surface of the surface dielectric layer. A multilayer printed wiring board characterized by   The multilayer printed wiring board according to claim 1, wherein the dielectric member is disposed so as not to contact the signal line and the one end of the through conductor. In a multilayer printed wiring board in which a dielectric layer and a conductor layer are laminated,
A signal line formed on the surface of the surface dielectric layer;
A penetrating conductor formed so as to penetrate the surface of the surface dielectric layer so that one end reaches the other layer and the other end contacts the lower conductive layer than the surface dielectric layer;
A dielectric film that covers both the signal line and the one end of the through conductor with the surface of the surface dielectric layer; and
A multilayer printed wiring board, wherein a gap is formed in the dielectric film between the signal line and the one end of the through conductor.   The multilayer printed wiring board according to claim 3, wherein the gap has a wall surface that is an outer shape thereof formed by the dielectric film.

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