JP2009005306A - Information processing apparatus and method - Google Patents

Abstract

An overall delay time from the start of demodulation to obtaining effective digital data output in an OFDM receiver can be reduced as much as possible.
The switch 163 outputs the output data of the fixed value output unit 162, that is, “fixed value indicating 0, 1 equal probability” while the initial value output flag is output from the initial value output flag generation unit 161. Is output to the Viterbi decoding unit as output data Dout. In contrast, while the initial value output flag is not output from the initial value output flag generation unit 161, the switch 163 outputs the output data of the storage unit 51, that is, the reception data (carrier data) for the OFDM receiver. The output data Dout is output to the Viterbi decoding unit. The present invention is applicable to an OFDM receiver.
[Selection] Figure 11

Description

  The present invention relates to an information processing apparatus and method, and more particularly, to an information processing apparatus and method capable of reducing the overall delay time from the start of demodulation to obtaining effective digital data output as much as possible in an OFDM receiving apparatus.

  As a method for modulating digital data, a modulation method called orthogonal frequency division multiplexing (OFDM) (hereinafter referred to as OFDM method) is known.

  The OFDM system is often applied to terrestrial digital broadcasting that is strongly affected by multipath interference. As terrestrial digital broadcasting employing the OFDM system, for example, there are standards such as ISDB-T (Integrated Services Digital Broadcasting-Terrestrial) and ISDB-TSB (Integrated Services Digital Broadcasting-Terrestrial Sound Broadcasting) (Non-Patent Document 1). reference). Hereinafter, unless otherwise noted, both standards are collectively referred to as the ISDB-T standard.

  The ISDB-T standard stipulates that a large number of interleaves such as time interleaving, frequency interleaving, and bit interleaving are performed before error correction processing such as Viterbi decoding and RS decoding as transmission path coding methods. Has been.

For example, Patent Documents 1 to 4 disclose conventional time deinterleaving units provided corresponding to such error correction units according to the ISDB-T standard.
JP 2001-136497 A JP 2004-214735 A JP 2004-297216 A JP 2001-136497 A "Receiving equipment standard for terrestrial digital audio broadcasting (desired specification) ARIB STD-B30 1.1 version", Radio Industry, formulated on May 31, 2001, March 28, 2002 1 revision "

  In such an OFDM receiver, there is a problem of the overall delay time from the start of demodulation until obtaining effective digital data output, and there is a demand to reduce such delay time. It is a situation that cannot fully meet

  The present invention has been made in view of such a situation, and is intended to reduce the overall delay time from the start of demodulation to obtaining effective digital data output in an OFDM receiver as much as possible. .

  An information processing apparatus according to an aspect of the present invention is compliant with orthogonal frequency division multiplexing and ISDB-T (Integrated Services Digital Broadcasting-Terrestrial) or ISDB-TSB (Integrated Services Digital Broadcasting-Terrestrial Sound Broadcasting) standards. An information processing apparatus for receiving data, comprising: a deinterleaving unit that performs a predetermined deinterleaving process on the received data and outputs the data; and an error that performs a predetermined error correction process on the output data of the deinterleaving unit Correction means, and the deinterleaving means outputs a harmless value for the error correction process for a predetermined period after the start of the error correction process by the error correction means.

  The error correction processing by the error correction means is Viterbi decoding, the deinterleaving processing by the deinterleaving means is deinterleaving processing in a time direction, and the deinterleaving means is from the transmitting side to the receiving side. This is a case where each data of “0” and “1” is transmitted as the first transmission value and the second transmission value, respectively, and the output on the transmission side of “0” and “1” has equal probability. When the receiving side determines from the received value whether the data transmitted by the transmitting side is “0” or “1”, the probability of transmitting “0” and “1 The third transmission value on the transmission side corresponding to the received value is set as a fixed value, and the fixed value is output as the harmless value so that the value that can be determined to be equal to the probability of transmitting "" is the received value.

  The de-interleaving means writes each of a plurality of carrier data constituting the reception data of the information processing apparatus to a predetermined address and reads the storage data, and reads each of the plurality of carrier data at an input timing. Address generation means for generating a write address that is an address to be written to the storage means and a read address that is an address to be read from the storage means at an output timing, and after the start of the error correction processing by the error correction means The harmless value is output for the predetermined period, and the carrier data read from the storage means is output after the predetermined period has elapsed.

  The deinterleaving means further converts one of the harmless value generating means for generating the harmless value, the harmless value generated by the harmless value generating means, and the data read from the storage means to the error. An output means for outputting to the correction means, and determining that the predetermined period is during the initial value is read from the storage means, and performing control to output the harmless value from the output means, After completion of reading of the initial value from the storage means, output control means for performing control to output the carrier data read from the storage means from the output means.

  The deinterleaving means outputs data read from the storage means to the error correction means, and further generates a harmless value generation means for generating the harmless value, and the error correction process is started by the error correction means. And an initialization unit that performs an initialization process to set the initial value of the storage unit to the harmless value generated by the harmless value generation unit.

  An information processing method according to one aspect of the present invention is information processing corresponding to the above-described information processing apparatus according to one aspect of the present invention.

  In the information processing apparatus and method according to one aspect of the present invention, an orthogonal frequency division multiplexing system and ISDB-T (Integrated Services Digital Broadcasting-Terrestrial) or ISDB-TSB (Integrated Services Digital Broadcasting-Terrestrial Sound Broadcasting) standard An information processing apparatus for receiving data compliant with the above, a deinterleaving means for performing a predetermined deinterleaving process on the received data and outputting the data, and a predetermined error correction process for the output data of the deinterleaving means The following processing is performed in the information processing apparatus including the error correction means for performing the above. That is, the deinterleaving means outputs an innocuous value that is an explicit predetermined value that is treated as an erasure in the error correction process for a predetermined period after the start of the error correction process by the error correction means.

  As described above, according to one aspect of the present invention, a so-called OFDM receiver can be provided. In particular, the overall delay time from the start of demodulation to obtaining effective digital data output in the OFDM receiver can be shortened as much as possible.

  Embodiments of the present invention will be described below. Correspondences between the configuration requirements of the present invention and the embodiments described in the detailed description of the present invention are exemplified as follows. This description is to confirm that the embodiments supporting the present invention are described in the detailed description of the invention. Accordingly, although there are embodiments that are described in the detailed description of the invention but are not described here as embodiments corresponding to the constituent elements of the present invention, It does not mean that the embodiment does not correspond to the configuration requirements. Conversely, even if an embodiment is described herein as corresponding to a configuration requirement, that means that the embodiment does not correspond to a configuration requirement other than the configuration requirement. It's not something to do.

  Further, this description does not mean that all the inventions corresponding to the specific examples described in the embodiments of the invention are described in the claims. In other words, this description is an invention corresponding to the specific example described in the embodiment of the invention, and the existence of an invention not described in the claims of this application, that is, in the future, a divisional application will be made. Nor does it deny the existence of an invention added by amendment.

An information processing apparatus according to one aspect of the present invention (for example, the OFDM receiving apparatus 10 in FIG. 1)
In an information processing apparatus that receives data compliant with orthogonal frequency division multiplexing, ISDB-T (Integrated Services Digital Broadcasting-Terrestrial) or ISDB-TSB (Integrated Services Digital Broadcasting-Terrestrial Sound Broadcasting) standards,
Deinterleaving means (for example, the time deinterleaving unit 22 in FIG. 1) for performing a predetermined deinterleaving process on the received data and outputting the received data;
Error correction means (for example, the Viterbi decoding unit 26 of FIG. 1) that performs predetermined error correction processing on the output data of the deinterleave means,
The deinterleave means outputs a harmless value that is an explicit predetermined value that is treated as an erasure in the error correction process for a predetermined period after the start of the error correction process by the error correction means.

The error correction processing by the error correction means (for example, the Viterbi decoding unit 26 in FIG. 1) is Viterbi decoding,
The deinterleaving process by the deinterleaving means (for example, the time deinterleaving unit 22 in FIG. 1) is a deinterleaving process in the time direction,
The deinterleaving means includes
Each data of “0” and “1” is transmitted from the transmission side (for example, the transmitter 81 in FIG. 5) to the reception side (for example, the receiver 83 in FIG. 5) as a first transmission value (for example, one level in FIG. 5). ), When the transmission value is transmitted as the second transmission value (for example, -1 level in FIG. 5), and the transmission side outputs of “0” and “1” have equal probability (for example, in FIG. 5). The frequency distribution state of the reception level of the receiver 83 is the state shown in FIG.
On the receiving side, when determining whether the data transmitted by the transmitting side is “0” or “1” from the received value, the probability of transmitting “0” and “1” are transmitted. The third transmission value on the transmission side corresponding to the received value is set as a fixed value so that the value (for example, the level Lβ in FIG. 8) that can be determined to be equal to the probability becomes the received value.
The fixed value is output as the harmless value.

The deinterleaving means includes
Storage means (for example, the storage unit 51 in FIGS. 11 and 12) that writes and reads each of the plurality of carrier data constituting the reception data of the information processing apparatus at a predetermined address;
For each of the plurality of carrier data, address generation means (for example, FIG. 11 or FIG. 11) that generates a write address that is an address to be written to the storage means at an input timing and a read address that is an address to be read from the storage means at an output timing. 12 address generators 52), and
The harmless value is output for the predetermined period after the start of the error correction processing by the error correction means,
After the predetermined period, the carrier data read from the storage means is output.

The deinterleaving means (for example, the time deinterleaving unit 22 configured as shown in FIG. 11) further includes:
Harmless value generating means for generating the harmless value (for example, the fixed value output unit 162 in FIG. 11);
An output means (for example, switch 163 in FIG. 11) for outputting one of the harmless value generated by the harmless value generating means and the data read from the storage means to the error correction means;
While the initial value is being read from the storage means, it is determined that it is the predetermined period, the harmless value is output from the output means, and the reading of the initial value from the storage means is completed. Thereafter, it includes output control means (for example, an initial value output flag generation unit 161 in FIG. 11) that performs control for outputting the carrier data read from the storage means from the output means.

The deinterleaving means (for example, the time deinterleaving unit 22 configured as shown in FIG. 12)
Outputting data read from the storage means to the error correction means;
further,
Harmless value generating means for generating the harmless value (for example, the fixed value output unit 162 in FIG. 12);
When the error correction process is started by the error correction unit, an initialization unit (for example, FIG. 12) performs an initialization process in which the initial value of the storage unit is set to the harmless value generated by the harmless value generation unit. Initial value write address generation unit 191 to switch 193).

  An information processing method according to one aspect of the present invention is information processing corresponding to the information processing apparatus according to one aspect of the present invention described above (for example, the OFDM receiver 10 in FIG. 1).

  FIG. 1 is a block diagram of an OFDM receiving apparatus as an embodiment of an information processing apparatus to which the present invention is applied.

  1 employs the ISDB-T standard, and is configured to include an antenna 11 to an RS decoding unit 30.

  A transmission wave transmitted from an OFDM transmission device (not shown) is received by the antenna 11 of the OFDM reception device 10 and provided to the tuner unit 12 as an RF signal.

  The RF signal received by the antenna 11 is frequency-converted into an IF signal by the tuner unit 12 including the multiplication unit 12 a and the local oscillation unit 12 b and provided to the BPF unit 13. The oscillation frequency of the reception carrier signal oscillated from the local oscillating unit 12 b is switched according to the channel selection signal provided from the channel selection unit 32.

  The IF signal output from the tuner unit 12 is filtered by the BPF unit 13 and then digitized by the A / D conversion unit 14. The DC signal is removed from the digitized IF signal by the DC cancellation unit 15 and provided to the digital quadrature demodulation unit 16.

  The digital orthogonal demodulator 16 performs orthogonal demodulation on the digitized IF signal using a carrier signal having a predetermined frequency (carrier frequency), and outputs a baseband OFDM signal. As a result of orthogonal demodulation, the baseband OFDM signal becomes a complex signal composed of a real axis component (I channel signal) and an imaginary axis component (Q channel signal). The complex signal, that is, the baseband OFDM signal output from the digital quadrature demodulation unit 16 is provided to the FFT unit 17 and the synchronization unit 19.

  The FFT unit 17 performs an FFT operation on the baseband OFDM signal, and extracts and outputs a signal that is orthogonally modulated on each subcarrier. The FFT unit 17 extracts a signal corresponding to the effective symbol length from one OFDM symbol, and performs an FFT calculation process on the extracted signal. That is, the FFT unit 17 removes a signal corresponding to the guard interval length from one OFDM symbol, and performs an FFT calculation process on the remaining signal.

  Here, the signal modulated by each subcarrier extracted by the FFT unit 17 is a complex signal composed of a real axis component (I channel signal) and an imaginary axis component (Q channel signal). The signal extracted by the FFT unit 17 is provided to the frame detection unit 18, the transmission control information decoding unit 31, the synchronization unit 19, and the carrier demodulation unit 20, respectively.

  The frame detection unit 18 extracts a TMCC signal from a predetermined subcarrier of the signal demodulated by the FFT unit 17, detects a synchronization signal from the TMCC signal, detects a boundary of the OFDM transmission frame, and detects a boundary position of the detected frame Is provided to the synchronization unit 19 and the like.

  The synchronization unit 19 uses the baseband OFDM signal, the signal modulated on each subcarrier demodulated by the FFT unit 17, the boundary of the OFDM symbol, the channel selection signal from the channel selection unit 32, and the like. In addition, the synchronization processing such as the calculation range and timing of the FFT calculation processing and other various synchronization processing are executed.

  The carrier demodulator 20 is provided with an output signal from the FFT unit 17, that is, a signal after being demodulated from each subcarrier. Therefore, the carrier demodulation unit 20 performs carrier demodulation processing on the signal. Specifically, the carrier demodulator 20 performs differential demodulation processing on the differential modulation signal (DQPSK) and equalization processing on the synchronous modulation signal (QPSK, 16QAM, 64QAM).

  The output signal of the carrier demodulator 20, that is, the carrier demodulated signal, is deinterleaved in the frequency direction by the frequency deinterleaver 21, and subsequently deinterleaved in the time direction by the time deinterleaver 22. Thereafter, it is provided to the demapping unit 23.

  Note that details of the time deinterleaving unit 22 will be described later with reference to FIG.

  The demapping unit 23 restores the transmission data sequence by performing data reassignment processing (demapping processing) on the output signal of the time deinterleaving unit 22, that is, the carrier demodulated signal (complex signal). . For example, in the case of demodulating an ISDB-T standard OFDM signal, the demapping unit 23 executes demapping processing corresponding to QPSK, 16QAM, or 64QAM.

  The transmission data sequence output from the demapping unit 23 passes through a bit deinterleaving unit 24, a depuncture unit 25, a Viterbi decoding unit 26, a byte deinterleaving unit 27, and a spread signal removing unit 28. Deinterleaving processing corresponding to bit interleaving, depuncturing processing corresponding to puncturing processing for reducing transmission bits, Viterbi decoding processing for decoding a convolutionally encoded bit string, decimation in byte units Energy despreading processing corresponding to interleaving processing and energy diffusion processing is performed, respectively, and input to the transport stream generation unit 29.

  The transport stream generation unit 29 inserts data defined by each broadcasting system, such as a null packet, at a predetermined position in the stream. In addition, the transport stream generation unit 29 performs a so-called smoothing process in which the bit interval of the intermittently supplied stream is smoothed to obtain a temporally continuous stream. The transmission data sequence subjected to such smoothing processing, that is, the output signal of the transport stream generation unit 29 is provided to the RS decoding unit 30.

  The RS decoding unit 30 performs a Reed-Solomon decoding process on the input transmission data sequence, and outputs it as a transport stream defined by MPEG-2 Systems.

  The TMCC signal that has been synchronized by the frame detector 18 is input to the transmission control information decoder 31. Therefore, the transmission control information decoding unit 31 decodes the TMCC information (transmission control information) from the TMCC signal, and the decoded TMCC information is converted into the carrier demodulation unit 20, the time deinterleaving unit 22, the demapping unit 23, and the bit deinterleaving. By providing the data to the unit 24 and the transport stream generating unit 29, control of demodulation and reproduction of each unit is performed.

  Here, before describing the time deinterleaving unit 22 to which the present invention is applied, a conventional time deinterleaving unit will be described in order to facilitate understanding thereof. For example, the conventional time deinterleaving unit 41 in the example of FIG. 2 has the configuration disclosed in [Patent Document 2] described above.

  In the following, the OFDM receiving apparatus 10 of FIG. 1 is replaced with the time deinterleaving unit 22 to which the present invention is applied, in which the conventional time deinterleaving unit 41 is mounted, that is, the conventional OFDM receiving apparatus. think about.

  A conventional time deinterleaving unit 41 mounted on such a conventional OFDM receiver is configured to include a storage unit 51 configured by, for example, a RAM and an address generation unit 52.

  As described above, the output signal of the frequency deinterleave unit 21 (FIG. 1), that is, the carrier demodulated signal after the frequency direction deinterleave processing by the frequency deinterleave unit 21 is input to the conventional time deinterleave unit 41. Is done. An output signal of the frequency deinterleave unit 21 is input for each data of an OFDM modulation unit called an OFDM symbol. The OFDM symbol is divided into 13 segments, and nc = 96 (Mode 1), nc = 192 (Mode 2), and nc = 384 (Mode 3) are defined as the number of carriers nc in each segment. That is, an OFDM symbol is a set of 13 segments of nc carrier data. A signal in which a plurality of OFDM symbols are continuously arranged becomes an output signal of the frequency deinterleave unit 21.

  In this case, in FIG. 2, the input of the output signal of the frequency deinterleave unit 21 to the conventional time deinterleave unit 41 is as follows. That is, for each OFDM symbol, each of (nc × 13) carrier data constituting the OFDM symbol is sequentially input as input data Din to the conventional time deinterleaving unit 41.

  Specifically, for example, each of the 13 segments constituting the OFDM symbol is assigned segment numbers 0 to 13 and sequentially input to the conventional time deinterleave unit 41 in that order. . Further, each of the nc carrier data constituting each segment is also assigned with carrier numbers 0 to nc, and in that order, it is sequentially input to the conventional time deinterleave unit 41 as input data Din. come. Therefore, one predetermined carrier data can be uniquely specified by the segment number and the carrier number.

  Therefore, as will be described in detail later, the address generation unit 52, when one predetermined carrier data is input to the conventional time deinterleaving unit 41, of the plurality of addresses of the storage unit 51, the predetermined carrier data The address corresponding to the segment number and the carrier number is given to the storage unit 51 as the write address Adw. Hereinafter, this process is referred to as an address write control process.

  When the write address Adw is given by such address write control processing, the storage unit 51 writes (stores) the predetermined carrier data as the input data Din to the write address Adw.

  Specifically, for example, when the address generation unit 52 executes address write control processing, that is, when control is performed to write predetermined carrier data to the storage unit 51 as input data Din, another previous carrier data is stored. The address of the storage area output as the output data Dout, that is, the read address Adr of another previous carrier data is given to the storage unit 51 as the write address Adw.

  In this case, for example, when the read address Adr of another previous carrier data is described as Adr-k-1 and the write address Adw of the predetermined carrier data is described as Adw-k in particular, the write address Adw-k of the predetermined carrier data Is expressed as the following equation (1). The symbol k indicates an integer that is incremented by “1” each time carrier data is input from the frequency deinterleave unit 21.

  Adw-k = Adr-k-1 (1)

  In addition, in parallel with such address write control processing, the address generation unit 52 receives one predetermined carrier data from the conventional time deinterleaving unit 41 after a predetermined delay time (delay time calculated for each carrier data). Processing to output is executed. Hereinafter, this process is referred to as an address read control process. That is, the address generation unit 52 gives the address corresponding to the segment number and the carrier number of the predetermined carrier data to be read to the storage unit 51 as the read address Adr as the address read control process.

  When the read address Adr is given by such an address read control process, the storage unit 51 outputs the predetermined carrier data stored in the read address Adr as output data Dout to the demapping unit 23.

  Specifically, for example, when the address generation unit 52 executes the address reading control process, that is, when performing control to read predetermined carrier data from the storage unit 51 as the output data Dout, the input data Din (another carrier) The address shifted by the address width corresponding to the delay number set for the carrier number of the (data) in the direction toward the end of the write address Adw of the input data Din is given to the storage unit 51 as the read address Adr.

  In this case, for example, it is assumed that the storage unit 51 can store one carrier data for each address value “1”, the write address Adw of the input data Din is particularly described as Adw-k, and the read address Adr of the predetermined carrier data Is specifically described as Adr-k, the read address Adr-k of the predetermined carrier data is expressed by the following equation (2).

  Adr-k = Adw-k + D_BUF (i) (2)

  Note that D_BUF (i) indicates the number of delays of the predetermined carrier data. Specifically, the symbol i indicates the carrier number of the predetermined carrier data to be read, and is an integer value from 0 to (nc-1). In this case, if a preset parameter related to the interleaving length is described as I, D_BUF (i) can be expressed by the following equation (3).

  D_BUF (i) = I x {95-(i x 5) mod 96} (3)

  Note that (i × 5) mod 96 in Equation (3) indicates the remainder when “(i × 5)” is divided by “96”.

  However, when the read address Adr-k calculated by the expression (2) exceeds the end address Amax of the storage area of the storage unit 51, the calculation result of the expression (2) is not adopted, for example, as follows: Suppose that In other words, it is assumed that the address returned to the beginning of the storage area of the storage unit 51 and shifted by the excess address width toward the end of the start address Amin of the storage area is adopted as the read address Adr-k. Specifically, the read address Adr-k is expressed as the following equation (4).

Adr-k = Adw-k + D_BUF (i)-(Amax + 1) + Amin (4)
However, Adw-k + D_BUF (i) ≥ Amax + 1

  As described above, the address generation unit 52 executes the address write control process and the address read control process in parallel with respect to the ring-shaped address space in which the start address Amin and the end address Amax are connected. In the address write control process and the address read control process, an address that shifts in a certain direction in the ring-shaped address space is generated.

  Such an address generation unit 52 is configured to include a counting unit 61, an address holding unit 62, and an address generation unit 63, for example, as shown in FIG.

  The counting unit 61 counts predetermined carrier data from the frequency deinterleaving unit 21 (FIG. 1), that is, input data Din, and indicates a flag (hereinafter referred to as an OFDM symbol head flag) indicating that it is the first carrier data of the OFDM symbol. This count value is initialized each time a call is input. Assume that the carrier data is counted by, for example, counting clock signals (not shown) synchronized with the input timing of the carrier data.

  The address holding unit 62 holds the read address Adr-k calculated by the address generation unit 63. The held read address Adr-k is the previous read address Adr-k-1 for carrier data to be input next as input data Din. Therefore, as apparent from the above-described equation (1), the held read address Adr-k is used as the write address Adw-k of the carrier data to be input next as the input data Din.

  When reset from the outside, the address holding unit 62 returns the held contents to the initial state. This reset is mainly given to, for example, the transmission control information decoding unit 31 at the start of demodulation processing of the whole OFDM receiver 10 in FIG.

  The address generation unit 63 appropriately calculates the above-described formulas (1) to (4) according to the count value of the counting unit 61, so that the write address Adw-k and the read address Adr-k for the storage unit 51 are calculated. Are respectively calculated and given to the storage unit 51.

  Here, consider the processing of the conventional time deinterleaving unit 41 immediately after resetting, that is, immediately after the start of demodulation processing of the entire conventional OFDM receiver.

  In this case, the read address Adr-k is not given to the storage unit 51 by the conventional address generation unit 63, or even if the read address Adr-k is given, an initial value is stored in the read address Adr-k. Has been. Therefore, immediately after the reset, the initial value of the storage unit 51, that is, data unrelated to the carrier data from the frequency deinterleave unit 21 is output as the output data Dout. Note that this is not limited to the delay storage device configured by the RAM, as in the storage unit 51 of the conventional time deinterleaving unit 41 in FIG. The same applies to the delay storage device.

  In this case, from the viewpoint of the error correction unit in the subsequent stage, immediately after the start of the demodulation process, only the data transmitted and received from the OFDM transmitter, that is, the reception data (carrier data) for the receiver is input. Instead, the initial value of the storage device of the conventional time deinterleave unit is mixed and input. The initial value of the storage device of this conventional time deinterleaving unit is a value that varies depending on the implementation, and is regarded as a location to be corrected from the viewpoint of the error correction unit. Therefore, the error correction unit cannot output a correct processing result, that is, a consistent result in a time zone in which the initial values of the storage device are mixedly input.

  This will be further described with reference to FIGS. FIG. 3 is a schematic diagram showing only the conventional time deinterleaving unit 41 and the Viterbi decoding unit 26 in the conventional OFDM receiver. That is, the Viterbi decoding unit 26 corresponds to a subsequent error correction unit.

  FIG. 4 shows an example of each timing chart for the input signal Sa of the conventional time deinterleaving unit 41 and the input signal Sb and output signal Sc of the Viterbi decoding unit 26 shown in FIG.

  The top timing chart of FIG. 4, that is, the input signal Sa of the conventional time deinterleaving unit 41 is all applied in gray of the same gradation. The gray color of this gradation indicates received data (carrier data) for the OFDM receiver.

  On the other hand, the central timing chart of FIG. 4, that is, the input signal Sb of the Viterbi decoding unit 26 is applied in a gray gradation. This means the following. That is, in FIG. 4, the gray of the left gradation near the time t0 indicates the initial value of the storage unit 51 of the conventional time deinterleaving unit 41. On the other hand, in FIG. 4, the gray of the right gradation is the gray of the same gradation as above, and indicates reception data (carrier data) for the OFDM receiver. That is, for the Viterbi decoding unit 26, the initial value of the storage unit 51 is input immediately after the reset at time t0 (immediately after the start of operation), and then gradually for some time along with the initial value, the OFDM receiver Received data (carrier data) is also mixed and input. This is depicted in gradation. In other words, the gray level is gray according to the mixing ratio of the initial value of the storage unit 51 and the reception data (carrier data) for the OFDM receiver (circles with symbols Sb0 and Sba in FIG. 4). (See the gradation in the figure).

  As described above, the time zone Tan until the time ta at which the gray level indicating the received data (carrier data) for the OFDM receiving apparatus is gray is the initial value of the storage unit 51 and the received data ( Carrier data) is mixed.

  Therefore, at this time Tan, the Viterbi decoding by the Viterbi decoding unit 26 is hindered by the initial value of the storage unit 51 and cannot be performed correctly.

  That is, normal decoding of the Viterbi decoding unit 26 is not performed until the time zone Tay after the time ta. That is, the Viterbi decoding result corresponding to the reception data (carrier data) for the OFDM receiver is output from the Viterbi decoding unit 26.

  As described above, in the conventional OFDM receiving apparatus, the delay due to the deinterleaving unit including the conventional time deinterleaving unit 41 is the main factor of the overall delay time from the start of demodulation until the effective digital data output is obtained. ing.

  However, the delay itself due to the deinterleaving unit is defined by the ISDB-T standard, and therefore cannot be shortened.

  However, in the conventional OFDM receiving apparatus, the cause of the overall delay from the start of demodulation to obtaining effective digital data output is not only the delay by the deinterleave unit itself, but until a certain time elapses (see the above-described figure). In the example of 4, until the time zone Tan elapses), the initial value of the recording device is mixedly output from the deinterleave unit, and since the initial value is a fluctuation value, error correction in the subsequent stage is performed. The present inventor has conceived that there is also a factor that the result of consistency cannot be output. This content corresponds to the content described with reference to FIG.

  Therefore, the present inventor eliminates such a factor, and if there is a method for effectively using an error correction processing unit subsequent to the deinterleaving unit, as a result, effective digital data output from the start of demodulation in the OFDM receiver is obtained. It was thought that the overall delay time until obtaining could be shortened. The inventors have invented the following technique as such a technique.

  That is, the present inventor has invented a technique in which the deinterleave unit outputs a value that is harmless to the error correction unit in the subsequent stage instead of the initial value of the recording apparatus.

  Here, the harmless value means an explicit value that can be handled as an erasure by the subsequent error correction unit during the error correction process.

  Even when such a technique is applied, the deinterleaving unit does not provide the OFDM receiving apparatus with a certain amount of time until a certain period of time has elapsed (until the time zone Tan has elapsed in the example of FIG. 4 described above). Not only the received data (carrier data) but also “a harmless value for the error correction unit in the subsequent stage” is output in a mixed manner.

  However, according to the error correction unit in the subsequent stage, the data mixed with the reception data (carrier data) for the OFDM receiver is not the initial value (variation value) of the recording apparatus in the deinterleave unit, but the error in the subsequent stage. The value is harmless to the correction section. Therefore, the error correction unit in the subsequent stage is a stage before a certain period of time in which “a value that is harmless to the error correction unit in the subsequent stage” does not mix completely (in the above-described example of FIG. 4, the time zone Tan has elapsed). Thus, it is possible to execute a correction process with consistency. This means that the overall delay time from the start of demodulation to obtaining effective digital data output in the OFDM receiver can be shortened.

  Here, “a value that is harmless to the error correction unit in the subsequent stage” differs depending on the type of error correction processing in the error correction unit in the subsequent stage.

  For example, if the error correction processing is RS decoding, it is preferable to adopt a fixed value that is explicit for the error correction processing unit, such as an erasure flag, as “a harmless value for the subsequent error correction unit”.

  Further, for example, when the error correction process is Viterbi decoding, it is preferable to adopt “a fixed value indicating a probability of 0, 1 or the like” as “a harmless value for a subsequent error correction unit”.

  Here, the “fixed value indicating the 0,1 probability” will be described with reference to FIGS.

  For example, consider a transmission path as shown in FIG. 5, that is, a transmission path until data transmitted from the transmitter 81 is received by the receiver 83 via the communication path 82.

  Here, the data transmitted from the transmitter 81 means “0” or “1” data. However, it is assumed that the output form of the data transmitter 81 is a form of an electric signal having a predetermined level value (for example, a voltage value). Specifically, for example, in the example of FIG. 5, “0” is output from the transmitter 81 as a 1-level electrical signal (for example, 1 volt electrical signal), and “-1” is −1 level electrical signal (for example, -1 volt electrical signal) from the transmitter 81.

  In this case, if the communication path 82 is ideal, that is, if no attenuation occurs and no noise or the like is added, the signal is transmitted from the transmitter 81 as a one-level electric signal (for example, one volt electric signal). The received “0” should be received by the receiver 83 as an electric signal of one level. In other words, when only a large number of “0”, that is, a large number of one-level electrical signals (for example, 1-volt electrical signals) are transmitted from the transmitter 81, the frequency distribution of the reception level values on the receiver 83 side is: Although not shown, it should be concentrated on one level.

  However, the electrical signal transmitted through the communication path 82 is actually attenuated or added with noise or the like. Therefore, when only a large number of “0”, that is, a large number of electric signals of one level (for example, electric signals of 1 volt) are transmitted from the transmitter 81, the actual frequency distribution of the reception level value on the receiver 83 side is The distribution is as shown in FIG.

  The above description is similarly applied to the case where only a −1 level electric signal (for example, an electric signal of −1 volt) is transmitted from the transmitter 81. Specifically, for example, when only a large number of “1”, that is, a large number of −1 level electrical signals (for example, −1 volt electrical signals) are transmitted from the transmitter 81, the reception level value on the receiver 83 side. The actual frequency distribution is as shown in FIG.

  Therefore, when “0” and “1” are transmitted from the transmitter 81 with equal probability, that is, the level value of the electrical signal output from the transmitter 81 is equal to −1 level and 1 level. In this case, the actual frequency distribution of the reception level value on the receiver 83 side is as shown in FIG.

  In this case, when the electrical signal having the reception level Lα in FIG. 8 is received by the receiver 83, the receiver 83 has a higher probability that “1” (−1 level electrical signal) is transmitted from the transmitter 81. It can be determined that the probability that “0” (1 level electric signal) is transmitted from the transmitter 81 is higher.

  8 is received by the receiver 83, the receiver 83 receives “1” (−1 level electric signal from the transmitter 81). ) Is transmitted, and the probability that “0” (1 level electrical signal) is transmitted from the transmitter 81 is equal.

  Here, when the receiver 83 is the Viterbi decoding unit 26 (FIG. 1), such a reception signal of the reception level Lβ (substantially 0 level in the example of FIG. 8) is harmless for the Viterbi decoding.

  That is, the name of the reception level value is changed to “reception value”, the probability that “1” (−1 level electrical signal) is transmitted from the transmitter 81, and “0” (1 level electrical signal) from the transmitter 81. ) Is equal to the transmitted probability is referred to as “0, 1 equal probability”. According to such a name, it can be said that the received value Lβ in FIG. 8 is an example of a received value with a probability of 0, 1 or the like.

  Therefore, if the transmitter 81 side transmits a fixed value such that a reception value with a probability of 0, 1 or the like is received on the receiver 83 side, the Viterbi decoding process of the Viterbi decoding unit 26 as the receiver 83 is performed. The received value corresponding to the fixed value, that is, the received value with the probability of 0, 1, etc. is harmless. The fixed value transmitted from the transmitter 81 side is the “fixed value indicating the probability of 0, 1” so that the received value of the probability of 0, 1 is received at the receiver 83 side.

  In this case, when the receiver 83 is the Viterbi decoding unit 26 (FIG. 1), a convolutional encoder (not shown) corresponds to the transmitter 81. Therefore, the time deinterleaving unit 22 positioned between the convolutional encoder and the Viterbi decoding unit 26 immediately after resetting, that is, immediately after the start of decoding by the Viterbi decoding unit 26, the recording device (the storage unit 51 in FIG. 2). Instead of the initial value, the subsequent Viterbi decoding unit 26 outputs a harmless value “fixed value indicating the probability of 0, 1 and the like”.

  Of the OFDM receiver 10 of FIG. 1 to which the present invention is applied, a time deinterleaving unit 22 (hereinafter referred to as a time deinterleaving unit 22 of the present invention) and a Viterbi decoding unit 26 to which the present invention is applied. A schematic diagram showing only is shown in FIG. FIG. 10 shows an example of each timing chart for the input signal Sa ′ of the time deinterleaving unit 22 and the input signal Sb ′ and output signal Sc ′ of the Viterbi decoding unit 26 shown in FIG. ing.

  That is, FIG. 9 and FIG. 10 are diagrams for explaining one of the effects of the present invention in comparison with FIG. 3 and FIG. 4 showing the conventional problems.

  The top timing chart of FIG. 10, that is, the input signal Sa 'of the time deinterleave unit 22 of the present invention is all applied in gray of the same gradation. The gray color of this gradation indicates received data (carrier data) for the OFDM receiver.

  On the other hand, the central timing chart of FIG. 10, that is, the input signal Sb 'of the Viterbi decoding unit 26 is applied in a gray gradation. This means the following. That is, in FIG. 10, the gray of the left gradation near time t0 indicates “a fixed value indicating the probability of 0, 1 and so on”. On the other hand, in FIG. 10, the gray of the right gradation is the gray of the same gradation as that above, and indicates reception data (carrier data) for the OFDM receiver. In other words, the “fixed value indicating the probability of 0, 1 etc.” is input to the Viterbi decoding unit 26 immediately after the reset at time t0 (immediately after the start of operation), and for a while after that, the “0, 1 etc.” Along with the “fixed value indicating the probability”, the reception data (carrier data) for the OFDM receiver is gradually input in a mixed manner. This is depicted in gradation. In other words, the gray level is gray according to the mixing ratio of the “fixed value indicating the probability of 0, 1 and the like” and the reception data (carrier data) for the OFDM receiver (the symbol Sb′b in FIG. 10 is gray). (See the gradations in the circles attached.)

  As described above, the time zone Tan from the time t0 to the time ta is a time zone in which the “fixed value indicating the probability of 0, 1 and the like” and the reception data (carrier data) for the OFDM receiver are mixed. . The point that there is a time zone Tan in which such input is mixed is not different from the conventional one (see FIG. 4).

  However, in this time zone Tan, the data mixed with the received data (carrier data) for the OFDM receiver is conventionally a value harmful to the Viterbi decoding process by the Viterbi decoding unit 26, that is, the conventional time data. In contrast to the initial value of the storage unit 51 of the interleaving unit 41 (see FIGS. 2 to 4), in the present embodiment, a value that is harmless to the Viterbi decoding process by the Viterbi decoding unit 26, that is, “0 , A fixed value indicating a probability of 1 equal.

  As a result, the timing at which normal decoding of the Viterbi decoding unit 26 is performed is a time ta that passes this time zone ta as shown in FIG. As shown, the time tb is earlier than the time ta by the time Ts.

  That is, the time zone in which Viterbi decoding cannot be correctly performed by the Viterbi decoding unit 26 is the time zone Tan in the past, but is the time Tan in the present embodiment (see FIGS. 4 and 10). As a result, the Viterbi decoding unit 26 can perform normal output as early as the time Ts. As a result, the entire delay from the start of demodulation to obtaining effective digital data output in the entire OFDM receiver 10 (FIG. 1). The time can be shortened compared to the conventional method.

  The time deinterleaving unit 22 of the present invention capable of producing such an effect can output a “fixed value indicating a probability of 0, 1 or the like” immediately after resetting, that is, immediately after the start of decoding by the Viterbi decoding unit 26. If it has, the structure will not be specifically limited. For example, the time deinterleaving unit 22 of the present invention can be configured as shown in FIGS. That is, FIG. 11 and FIG. 12 respectively show detailed configuration examples of the time deinterleave unit 22 of the present invention.

  The time deinterleaving unit 22 in the example of FIG. 11 includes an initial value output flag generation unit 161, a fixed value output unit 162, and a storage unit 51 and an address generation unit 52 (see FIG. 2) that are the same as the conventional one. A switch 163 is provided.

  The initial value output flag generator 161 receives the same input signal as that of the address generator 52, that is, a reset and an OFDM symbol head flag. Therefore, the initial value output flag generation unit 161 determines whether or not the initial value is being output from the storage unit 51 based on these input signals. When the initial value output flag generation unit 161 determines that the initial value is being output from the storage unit 51, the initial value output flag generation unit 161 outputs a flag indicating the state (hereinafter referred to as an initial value output flag) to the switch 163. To do.

  The fixed value output unit 162 outputs the above-described “fixed value indicating the probability of equality of 0, 1”.

  While the initial value output flag is output from the initial value output flag generation unit 161, the switch 163 outputs the output data of the fixed value output unit 162, that is, the “fixed value indicating the probability of 0, 1 or the like” as the output data Dout. Is output to the Viterbi decoding unit 26 (see FIG. 1) via the demapping unit 23 or the like.

  In contrast, while the initial value output flag is not output from the initial value output flag generation unit 161, the switch 163 outputs the output data of the storage unit 51, that is, the reception data (carrier data) for the OFDM receiver. The output data Dout is output to the Viterbi decoding unit 26 (see FIG. 1) via the demapping unit 23 and the like.

  The operation of the time deinterleaving unit 22 in the example of FIG. 11 having such a configuration is as follows.

  The operation itself of the storage unit 51 and the address generation unit 52 after the reset input is basically the same as the conventional operation described with reference to FIG. That is, from the viewpoint of the output operation of the storage unit 51, the fact that the initial value is output immediately after resetting is not different from the conventional one.

  However, while the storage unit 51 outputs the initial value, the initial value output flag is output from the initial value output flag generation unit 161 as described above. Therefore, from the viewpoint of the output operation of the switch 163, that is, from the viewpoint of the final output operation of the time deinterleave unit 22 of the present invention, while the storage unit 51 outputs the initial value, the initial value is displayed. Instead, the “fixed value indicating the probability of 0, 1 or the like” from the fixed value output unit 162 is output as the output data Dout.

  When the storage unit 51 finishes outputting the initial value and starts outputting received data (carrier data) for the OFDM receiver, the output of the initial value output flag from the initial value output flag generating unit 161 is stopped. The As a result, from the switch 163, that is, from the time deinterleaving unit 22 of the present invention, reception data (carrier data) for the OFDM receiver is output as output data Dout.

  In contrast to the example of FIG. 11, the time deinterleave unit 22 of the example of FIG. 12 includes an initial value write address in addition to the storage unit 51 and the address generation unit 52 (see FIG. 2) similar to the conventional one. A generation unit 191, a switch 192, and a fixed value output unit 162 are provided.

  The initial value write address generation unit 191 generates an area where the initial value is inserted in the storage unit 51 as the initial value write address Adi, and when the reset is input, the initial value write address Adi is switched to the switch 192. Output to. The initial value write address generation unit 191 outputs a switch switching control signal to the switch 192 at each of the timing when the reset is input and the predetermined timing after the output of the initial value write address Adi.

  The switch 192 receives the initial value write address Adi from the initial value write address generator 191, the write address Adw from the address generator 52, and the read based on the switch switching control signal from the initial value write address generator 191. One of the addresses Adr is output to the storage unit 51.

  The switch 192 also outputs a switch switching control signal to the switch 193 at each of its own output switching timings.

  Based on the switch switching control signal from the switch 192, the switch 193 receives one of the input data Din, which is received data (carrier data) for the OFDM receiver, or the output data of the fixed value output unit 162, The data is output to the storage unit 51.

  The output data of the fixed value output unit 162 is the above-described “fixed value indicating the probability of 0, 1 and so on”.

  The operation of the time deinterleaving unit 22 in the example of FIG. 12 having such a configuration is as follows.

  The operation itself of the storage unit 51 and the address generation unit 52 after the reset input is basically the same as the conventional operation described with reference to FIG. That is, from the viewpoint of the output operation of the storage unit 51, the fact that the initial value is output immediately after resetting is not different from the conventional one.

  However, the initial value of the storage unit 51 in the example of FIG. 12 does not mean a conventional initial value but means a “fixed value indicating a probability of 0, 1 or the like”.

  That is, immediately after the reset, the switch 192 outputs the initial value write address Adi from the initial value write address generation unit 191 to the storage unit 51, and the switch 193 outputs “a fixed value indicating a probability of 0, 1 or the like”. Is output to the storage unit 51. As a result, immediately after resetting, that is, at the start of demodulation of the OFDM receiver 10 (FIG. 1), the content of the storage unit 51 is initialized to “a fixed value indicating a probability of 0, 1 or the like”. In other words, the “fixed value indicating the probability of 0, 1 and so on” is the initial value of the storage unit 51.

  Note that the output of the time deinterleaving unit 22 of the present invention immediately after resetting is assumed to be a “fixed value indicating a probability of 0, 1 or the like” because the Viterbi decoding unit 26 is assumed as an error correction unit in the subsequent stage in the above-described example. However, as a matter of course, the value is not limited to the above-described example, and any value that is harmless to the error correction unit in the subsequent stage is sufficient. In this case, this harmless value can be easily realized by outputting from the fixed value output unit 162 in FIG. 11 or 12 or a block not shown.

  Further, the present invention is not limited to the above-described example, and can be applied to various other devices. For example, the present invention can be applied to various apparatuses having a function of error correction for ISDB-T demodulation. In other words, an example of such a device can be said to be the example described above.

  In summary, according to the ISDB-T standard, there are a plurality of deinterleavers such as a time deinterleaver on the receiving side. Conventionally, in these deinterleavers, the received value (carrier data) and the initial value of the storage device (RAM, etc.) are mixed and read at the initial stage of operation.

  Therefore, the present invention distinguishes the latter, that is, the initial value of the deinterleaver storage device (RAM, etc.), and clearly shows it as erasure in subsequent error correction processing, for example, Viterbi decoding or RS decoding. In this way, one of the purposes is to improve the correction capability and make the output of the error correction unit consistent quickly. Therefore, the apparatus to which the present invention is applied is not particularly limited to the above-described example as long as it has a configuration capable of achieving such an object.

It is a block diagram which shows the structural example of the OFDM apparatus with which this invention is applied. It is a block diagram which shows the structural example of the conventional time deinterleaving part for comparing with this invention. FIG. 3 is a block diagram illustrating an outline of a configuration example of a conventional OFDM device including the conventional time deinterleave unit and the Viterbi decoding unit of FIG. 2. 4 is a timing chart showing an example of each signal in the conventional OFDM device of FIG. 3. It is an example of the data output from the time deinterleave part of FIG. 1, ie, the time deinterleave part to which this invention is applied, Comprising: It is a figure for demonstrating the received value with the same probability of 0,1. It is an example of the data output from the time deinterleave part of FIG. 1, ie, the time deinterleave part to which this invention is applied, Comprising: It is a figure for demonstrating the received value with the same probability of 0,1. It is an example of the data output from the time deinterleave part of FIG. 1, ie, the time deinterleave part to which this invention is applied, Comprising: It is a figure for demonstrating the received value with the same probability of 0,1. It is an example of the data output from the time deinterleave part of FIG. 1, ie, the time deinterleave part to which this invention is applied, Comprising: It is a figure for demonstrating the received value with the same probability of 0,1. It is the schematic of the structural example of the apparatus of FIG. 1, Comprising: It is a block diagram which shows the outline comparable with the structural example of the conventional FIG. FIG. 10 is a timing chart showing an example of each signal in the OFDM apparatus of FIG. 9, and a timing chart corresponding to the conventional FIG. It is a block diagram which shows the detailed structural example of the time deinterleaving part of FIG. 1, ie, the time deinterleaving part to which this invention is applied. FIG. 12 is a block diagram illustrating a detailed configuration example of the time deinterleaving unit in FIG. 1, that is, a time deinterleaving unit to which the present invention is applied, which is different from FIG. 11.

Explanation of symbols

  10 OFDM receiver, 11 antenna 11, 12 tuner, 12a multiplier, 12b local oscillator, 13 BPF, 14 A / D converter, 15 DC canceler, 16 digital quadrature demodulator, 17 FFT unit, 18 frame detection Unit, 19 synchronization unit, 20 carrier demodulation unit, 21 frequency deinterleave unit, 22 time deinterleave unit, 23 demapping unit, 24 bit deinterleave unit, 25 depuncture unit, 26 Viterbi decoding unit, 27 byte deinterleave unit, 28 Spreading signal removal unit, 29 transport stream generation unit, 30 RS decoding unit, 51 storage unit, 52 address generation unit, 61 counting unit, 62 address holding unit, 63 address generation unit, 161 initial value output flag generation unit, 162 fixed Value output section, 163 switch,

Claims (6)

In an information processing apparatus that receives data compliant with orthogonal frequency division multiplexing, ISDB-T (Integrated Services Digital Broadcasting-Terrestrial) or ISDB-TSB (Integrated Services Digital Broadcasting-Terrestrial Sound Broadcasting) standards,
Deinterleaving means for performing a predetermined deinterleaving process on the received data and outputting the received data;
Error correction means for performing predetermined error correction processing on the output data of the deinterleave means,
The deinterleaving unit outputs a harmless value that is an explicit predetermined value that is treated as an erasure in the error correction process for a predetermined period after the start of the error correction process by the error correction unit. The error correction processing by the error correction means is Viterbi decoding,
The deinterleaving process by the deinterleaving means is a deinterleaving process in a time direction,
The deinterleaving means includes
The case where each data of “0” and “1” is transmitted from the transmission side to the reception side as the first transmission value and the second transmission value, respectively, and the transmission side of “0” and “1” If the output of has equal probability,
On the receiving side, when determining whether the data transmitted by the transmitting side is “0” or “1” from the received value, the probability of transmitting “0” and “1” are transmitted. The third transmission value on the transmission side corresponding to the received value is set as a fixed value so that the value that can be determined to be equal to the probability is the received value.
The information processing apparatus according to claim 1, wherein the fixed value is output as the harmless value. The deinterleaving means includes
Storage means for writing and reading each of a plurality of carrier data constituting the reception data of the information processing apparatus at a predetermined address;
For each of the plurality of carrier data, an address generation unit that generates a write address that is an address to be written to the storage unit at an input timing and a read address that is an address to be read from the storage unit at an output timing is provided.
The harmless value is output for the predetermined period after the start of the error correction processing by the error correction means,
The information processing apparatus according to claim 1, wherein the carrier data read from the storage unit is output after the predetermined period has elapsed. The deinterleaving means further comprises:
Harmless value generating means for generating the harmless value;
An output means for outputting one of the harmless value generated by the harmless value generating means and the data read from the storage means to the error correction means;
While the initial value is being read from the storage means, it is determined that it is the predetermined period, the harmless value is output from the output means, and the reading of the initial value from the storage means is completed. The information processing apparatus according to claim 3, further comprising: an output control unit that performs control to output the carrier data read from the storage unit from the output unit. The deinterleaving means includes
Outputting data read from the storage means to the error correction means;
further,
Harmless value generating means for generating the harmless value;
And an initialization unit that performs an initialization process that sets the initial value of the storage unit as the harmless value generated by the harmless value generation unit when the error correction process is started by the error correction unit. Item 4. The information processing device according to Item 3. An information processing apparatus for receiving data compliant with the orthogonal frequency division multiplexing system and ISDB-T (Integrated Services Digital Broadcasting-Terrestrial) or ISDB-TSB (Integrated Services Digital Broadcasting-Terrestrial Sound Broadcasting) standards,
Deinterleaving means for performing a predetermined deinterleaving process on the received data and outputting the received data;
In an information processing method of an information processing apparatus comprising error correction means for performing predetermined error correction processing on output data of the deinterleave means,
The deinterleaving means outputs a harmless value that is an explicit predetermined value that is treated as an erasure in the error correction process for a predetermined period after the start of the error correction process by the error correction means.

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