JP2009094090A - Semiconductor element and electronic device equipped with the semiconductor element - Google Patents

Abstract

A semiconductor element capable of reliably performing direction identification and thereby preventing an electronic component chip from malfunctioning or failing to obtain correct characteristics and an electronic device equipped with the semiconductor element Provide equipment.
A light receiving chip mounted on a semiconductor chip mounting region on a GND pattern formed on an upper surface of a substrate, and a transparent resin covering a surface of the light receiving chip and a peripheral portion of the semiconductor chip mounting region on the upper surface of the substrate. A resist pattern 8 as a direction identification mark is formed on the upper surface of the substrate 2 so as to avoid a semiconductor chip mounting region.
[Selection] Figure 1

Description

  The present invention includes a semiconductor element which is a light receiving element (or light emitting element) formed by mounting a light receiving chip (or light emitting chip) on a substrate and sealing the chip with a transparent resin, and the semiconductor element mounted thereon. It relates to electronic equipment.

  Generally, a semiconductor element is provided with a direction identification means for indicating a direction in use. This is to prevent the electronic component chips constituting the element from malfunctioning or failing to obtain correct characteristics when the usage direction is wrong.

  FIG. 6 shows a conventional example 1 of a semiconductor element provided with direction identification means, where (a) is a top view, (b) is a front view, and (c) is a bottom view.

  2. Description of the Related Art Conventionally, among semiconductor elements, particularly in a package 101 having a large number of connection terminals 101a and a large size, as shown in the figure, one corner portion of a substrate 101b constituting the package 101 has a triangular shape as direction identification means. The direction identification notch 101b1 was cut out.

  An example of a semiconductor element having a notch for direction identification is an IC (Integrated Circuit) package disclosed in Japanese Patent Application Laid-Open No. 11-17061. In this IC package, the direction is identified by the index mark pattern formed by printing the conductive paste on the lower green sheet and the notch formed in the first green sheet disposed on the green sheet. Means were configured. That is, the index mark pattern is provided to indicate the direction in use, and the notch is provided to expose the index mark pattern so that the index mark pattern can be seen from the exterior when the IC package is used. It was.

  FIG. 7 shows a conventional example 2 of a semiconductor element provided with direction identification means, where (a) is a top view and (b) is a front view.

This semiconductor element is a small package 102 with a small number of connection terminals 102a, and a semiconductor chip 102c is die-bonded to the upper surface of a substrate 102b provided with the connection terminals 102a on the lower surface via a first electrode pattern 102f. . Furthermore, 102 g of electrode pads (shown only in FIG. 7A because it is a very thin member) 102 g formed on the upper surface of the substrate 102 b are wire-bonded using the wires 102 h. A second electrode pattern 102i is formed. Further, a direction identifying mark 102e as a direction identifying means is provided on the upper surface of the sealing resin portion 102d covering the surface of the semiconductor chip 102c by printing or the like.
JP-A-11-17061

  However, when the substrate 101b constituting the semiconductor element of the above-described conventional example 1 is a large substrate having a size (length L101a × width W101a) of about 10 mm × 10 mm, for example, the notch 101b1 cut into a triangle shape Since the size (length L101b) is about 2.5 mm, there was no problem with the direction identification. However, when the cutout is formed on a small-sized substrate such as the substrate constituting the photoelectric conversion element, the size of the cutout becomes very small. For example, the general size of the substrate constituting the photoelectric conversion element is about 1.5 mm × 2.0 mm, and in this case, the size of the notch is about 0.2 to 0.3 mm. For this reason, there is a problem that it becomes difficult to distinguish between chamfers for preventing chipping provided at all corners of the substrate and notches, and direction identification becomes impossible.

  In addition, when the index mark pattern and the cutout of the IC package disclosed in JP-A-11-17061 are provided in a small-sized semiconductor element such as a photoelectric conversion element, the index mark pattern and the cutout are provided. There is a problem that the direction cannot be identified because the size of the notch is reduced.

  Further, the semiconductor chip 102c constituting the semiconductor element of the above-described conventional example 2 receives the light 103 transmitted through the sealing resin portion 102d (or outputs the output light to the outside through the sealing resin portion 102d). In this case, since the direction identification mark 102e is provided on the surface of the sealing resin portion 102d, which is a light transmission region, a part of the light 103 is blocked by the direction identification mark 102e. There was a problem. For example, in a state where the light receiving chip is used as the semiconductor chip 102c, when the direction identification mark 102e is formed along the left end side of the upper surface of the sealing resin portion 102d, the light 103 incident from the diagonally upper left direction of the light receiving chip is used. The light receiving sensitivity to the light is lowered, and the directivity characteristic of the light receiving element is deteriorated. In addition, in the state where the light emitting element is used as the semiconductor chip 102c, even when the direction identification mark 102e is formed along the left end side of the upper surface of the sealing resin portion 102d, the light emitted in the diagonally upward left direction (not shown) ) Output light power decreases, and the directivity characteristics of the light emitting element deteriorate.

  In order to solve such a problem that light is blocked by the direction identification mark 102e, the size of the direction identification mark 102e may be reduced. However, when the semiconductor element is a photoelectric conversion element, the size of the direction identification mark 102e becomes very small because the size of the package (photoelectric conversion element) itself is small. For example, when the size of the substrate (vertical L102a × horizontal W102a) is about 1.5 mm × 2.0 mm, the size (vertical L102b × horizontal W102b) of the part for forming the direction identification mark is 1.0 mm × 0. It becomes very small with about 1 mm. Therefore, there is a problem that direction identification by the direction identification mark 102e becomes very difficult.

  In addition, in order to suppress deterioration of the directing directivity, a direction identification mark 102e may be provided near the ridge line of the sealing resin portion 102d. However, since all corner portions of the sealing resin portion 102d are provided with chamfers for preventing chipping, it is necessary to provide the direction identification mark 102e on the curved surface, which causes a problem that printing is difficult.

  Further, as in the IC package disclosed in Japanese Patent Laid-Open No. 11-17061, when the notch is provided to expose the index mark pattern, or as in the semiconductor element of the conventional example 2, the sealing resin portion 102d When the direction identification mark 102e is formed on the surface, there is a problem that the index mark pattern and the direction identification mark 102e are rubbed and disappear and the direction identification becomes difficult.

  The present invention was devised to solve such problems, and an object of the present invention is to provide a semiconductor element capable of reliably performing direction identification without deteriorating characteristics, and an electronic device equipped with the semiconductor element. There is.

  In order to solve the above problems, a semiconductor element of the present invention includes a light receiving chip 11 as a semiconductor chip mounted on a semiconductor chip mounting region on a GND pattern 6 formed on the upper surface of a substrate 2, as shown in FIG. A transparent resin portion 1 is provided to cover the surface of the light receiving chip 11 and the periphery of the semiconductor chip mounting area on the upper surface of the substrate 2, and a direction identification mark (for example, using a resist) on the upper surface of the substrate 2 while avoiding the semiconductor chip mounting area. The resist pattern 8) formed in this way is formed.

  That is, since the direction identification mark having a size that can be accurately recognized with the naked eye can be formed, the direction can be easily recognized. Further, when the direction identification mark is formed using a resist, the direction identification mark can be formed at the same time when a general manufacturing process of a semiconductor element is performed, so the direction identification mark is formed. There is no need to add a new process.

  Further, the direction identification mark may be formed in a region covered with a transparent resin portion on the upper surface of the substrate. In this case, since the direction identification mark is covered with the transparent resin portion, it can be prevented from rubbing and disappearing. The direction identification mark may be formed not only in the area covered with the transparent resin portion on the upper surface of the substrate but also outside this area. In this case, the size of the direction identification mark can be increased, and the direction can be recognized more easily.

  In general, if the dimension of each side of the part for forming the direction identification mark is 0.3 mm or more, the direction identification can be accurately performed with the naked eye. Therefore, the part in which the direction identification mark is formed It is preferable that the dimension of each side of is at least 0.3 mm.

  Moreover, the surface of the said transparent resin part may be mirror-finished. In this case, the direction identification mark can be easily recognized. Further, a portion of the surface of the transparent resin portion that covers the upper portion of the registration mark may be mirror-finished, and further, a portion of the surface of the transparent resin portion that excludes the portion that covers the upper portion of the registration mark is satin finish May be. In this case, only the direction identification mark can be shown more clearly.

  The electronic device of the present invention is any one of the above-described semiconductor elements or a combination thereof.

  In other words, it is possible to more reliably prevent the electronic component chip constituting the element from malfunctioning or failing to obtain correct characteristics by using the wrong direction of use.

  Since the present invention is configured as described above, light is not blocked by the direction identification means, so the characteristics are not deteriorated, and the size of the direction identification mark as the direction identification means can be increased. Therefore, since the direction of the semiconductor element can be reliably identified, it is possible to prevent the electronic component chip constituting the semiconductor element from malfunctioning or failing to obtain correct characteristics in the electronic device. .

  Hereinafter, embodiments of a semiconductor element of the present invention and an electronic apparatus equipped with the semiconductor element will be described.

<Embodiment 1>
First, Embodiment 1 of the semiconductor element of the present invention will be described with reference to the drawings.

  In addition, this invention is implemented especially with respect to a photoelectric conversion element among semiconductor elements, and there exist a light receiving element or a light emitting element etc. as this photoelectric conversion element, for example. In the present embodiment, a case where the present invention is implemented in a light receiving element will be described.

  1A and 1B are explanatory views showing Embodiment 1 of a semiconductor element of the present invention, in which FIG. 1A is a top view, FIG. 1B is a front view, and FIG. 1C is a bottom view.

  FIG. 2 is an explanatory view showing the semiconductor element shown in FIG. 1 with the transparent resin part omitted, in order to more clearly show the inside of the transparent resin part, (a) is a top view, and (b) ) Is a front view.

  In this semiconductor element, a light receiving chip 11 is fixed on a GND (ground) pattern 6 of a substrate 2. On the upper surface of the light receiving chip 11, electrode pads 10a, 10b, and 10c (which are very thin members and are shown only in FIGS. 1A and 2A) are formed. The electrode pads 10a, 10b, 10c and the electrode patterns 3a, 3b, 3c formed on the substrate 2 are wired by wire bonding using gold wires 12a, 12b, 12c. Further, after the wire bonding, the transparent resin portion 1 that seals the light receiving chip 11 and the gold wires 12a, 12b, and 12c is formed on the substrate 2.

  The electrode pad 10a is connected to the electrode pattern 3a via a gold wire 12a and is an Io terminal (terminal for taking out an output signal) of the light receiving chip 11. The electrode pad 10b is connected to the electrode pattern 3b via the gold wire 12b, and this electrode pattern 3b is connected to the GND pattern 6 via the connection pattern 4 on the substrate 2. That is, the electrode pad 10 b is a GND terminal of the light receiving chip 11. Furthermore, the electrode pad 10c is connected to the electrode pattern 3c through the gold wire 12c and is a Vcc terminal (terminal for applying a power supply voltage) of the light receiving chip 11.

  Through holes 7 a, 7 b, 7 c, 7 d are formed at the four corners of the substrate 2 for taking out the wiring to the outside of the transparent resin portion 1. These through holes 7a, 7b, 7c, and 7d penetrate from the upper surface to the lower surface of the substrate 2, and a conductive wiring pattern is formed on the inner surface. Furthermore, external terminals 5a, 5b, 5c, and 5d are formed in the through hole 7a, 7b, 7c, and 7d formation portions on the lower surface of the substrate 2, respectively. The electrode pattern 3a is connected to the external terminal 5a through the through hole 7a, and the electrode pattern 3c is connected to the external terminal 5b through the through hole 7b. The GND pattern 6 is connected to the external terminals 5c and 5d through the through holes 7c and 7d. These external terminals 5a, 5b, 5c and 5d are used as connection terminals when soldering a semiconductor element on a circuit board (not shown) by reflow mounting or the like.

  Furthermore, in this embodiment, a resist mark 8 as a direction identification mark is provided in an area covered with the transparent resin portion 1 on the upper surface of the substrate 2 so as to avoid the light receiving chip 11 (that is, a semiconductor chip mounting area). It has been. Specifically, a resist mark 8 is provided on the left side of the semiconductor chip mounting region on the upper surface of the substrate 2 inside the transparent resin portion 1, and a part of the resist mark 8 extends to the GND pattern 6.

  The resist mark 8 is a material generally used in a semiconductor element manufacturing process, for example, a solder resist (a short of the conductive paste occurs when the light receiving chip 11 is fixed on the substrate 2 with the conductive paste). In order to prevent this, the resist is generally used. The color of the resist mark 8 is the color (for example, gold) of the pattern (GND pattern 6, connection pattern 4, and electrode patterns 3a, 3b, 3c) formed on the substrate 2, or the color of the substrate 2 (for example, white or light). Any color that can be distinguished from yellow) may be used, and in the present embodiment, the color is green because it is formed using the solder resist.

  Further, in the semiconductor element of the above-described conventional example 2, since the direction identification mark is formed on the upper surface of the sealing resin portion, a process of newly forming the direction identification mark after forming the sealing resin portion is added. It was necessary to carry out. However, in this embodiment, since a resist mark can be formed at the same time when performing a general manufacturing process of a semiconductor element, it is not necessary to add a new process to form the direction identification means.

  Furthermore, in the semiconductor element of the above-described conventional example 2, since the direction identification mark is formed on the upper surface of the sealing resin portion, a part of the incident light from the outside of the sealing resin portion is blocked by the direction identification mark. It was. However, in the present embodiment, since the incident light 9 from the outside of the transparent resin portion is not shielded by the resist mark 8 at all, the size of the resist mark 8 can be increased. In the semiconductor device of Conventional Example 2, as shown in FIG. 7, for example, when the size of the substrate (vertical L102a × horizontal W102a) is 1.5 mm × 2.0 mm, the size of the part for forming the direction identification mark 102e (Vertical L102b × Horizontal W102b) becomes as small as about 1.0 mm × 0.1 mm. Generally, in order to accurately identify the direction with the naked eye, the dimension of each side of the part where the direction identification mark is formed needs to be 0.3 mm or more. Therefore, when the lateral width is smaller than 0.3 mm, it is difficult for the naked eye to identify whether the mark is the direction identification mark 102e, the dirt, or the shadow. Therefore, in the semiconductor element of Conventional Example 2, a microscope or the like is necessary to recognize the direction identification mark. In the semiconductor device of this embodiment, as shown in FIG. 1, for example, when the size of the substrate (vertical L0 × horizontal W0) is 1.5 mm × 2.0 mm, the resist mark 8 is formed as shown in FIG. Since the size (L1 × W1) of the area to be measured can be increased to 1.3 mm × 0.4 mm, the registration mark 8 as the direction identification means can be accurately recognized with the naked eye, and direction recognition is easy. Can be done.

  Further, in the semiconductor element of Conventional Example 2, since the direction identification mark is provided in the vicinity of the ridge line of the sealing resin portion, there is a problem that it is difficult to attach the direction identification mark due to the effect of chamfering, or once provided. There was a problem that the direction identification mark was easily rubbed off. In the semiconductor element of this embodiment, since the resist mark 8 is provided inside the transparent resin portion 1, the resist mark 8 can be provided on a flat surface instead of a curved surface, and further, the resist mark 8 is rubbed because it is formed inside the transparent resin portion 1. Can also be prevented from disappearing.

  In the present embodiment, the case where the number of electrode pads formed on the surface of the light receiving chip is three has been described. However, in the present invention, the number of electrode pads is not limited to this. Two or four or more may be used.

<Embodiment 2>
Next, Embodiment 2 of the semiconductor device of the present invention will be described. FIG. 3 is an explanatory view showing Embodiment 2 of the semiconductor device of the present invention, (a) is a top view, and (b) is a front view. It is.

  The semiconductor element according to the present embodiment is different from the semiconductor element according to the first embodiment described above only in that a resist mark 38 is formed also in a region on the upper surface of the substrate 2 that is not covered with the transparent resin portion 1. Except this point, the semiconductor device has the same configuration as that of the semiconductor device of the first embodiment. In FIG. 3, the same reference numerals are used for the same components as those of the semiconductor element of the first embodiment.

  According to the semiconductor element of the present embodiment, the size of the part where the resist mark 38 is formed can be increased. For example, the size of the substrate 2 (length L0 × width W0) is 1.5 mm × 2.0 mm. In this case, the size (length L31 × width W31) of the part where the resist mark 38 is formed can be increased to 1.5 mm × 0.6 mm. Therefore, the registration mark 38 as the direction identification means can be accurately recognized with the naked eye, and the direction can be easily recognized.

<Embodiment 3>
Next, a semiconductor device according to a third embodiment of the present invention will be described.

  4A and 4B are explanatory views showing Embodiment 3 of the semiconductor element of the present invention, wherein FIG. 4A is a top view and FIG. 4B is a front view.

  Compared with the semiconductor element of the first embodiment, the semiconductor element of the present embodiment is mirror-finished only on the surface 41a of the transparent resin portion 41 that covers the top of the resist mark 8, and the other part 41b (see FIG. The only difference is that the part (shown using hatching) is satin-finished, and the structure is the same as that of the semiconductor device of the first embodiment except for this point. In FIG. 4, the same components as those of the semiconductor element of Embodiment 1 are denoted by the same reference numerals.

  As described above, by mirror-finishing the surface of the portion 41a covering the upper portion of the registration mark 8, the inside of the transparent resin portion 41 can be seen more clearly (clearly), and thus the registration mark 8 can be easily recognized. On the other hand, the part 41b other than the upper part of the registration mark 8 has a satin finish, so that the light is scattered on the surface, and the inside of the transparent resin part 41 is not clearly seen compared with the mirror-finished part 41a. For this reason, patterns such as a light receiving chip, an electrode pattern, a connection pattern, a GND pattern, and an electrode pad are difficult to see. As a result, since only the registration mark 8 is easily visible and conspicuous, the registration mark 8 can be recognized in a shorter time, and direction identification can be performed efficiently in a shorter time.

  The mirror finish and the satin finish can be easily realized by mirror finishing and a satin finish on the concave surface of the transfer mold molding die used when the transparent resin portion 41 is molded (this is the case of the mold finish). This is because the surface state of the recess is directly transferred to the surface of the transparent resin portion 41).

  In this embodiment, only the upper part of the resist mark 8 is mirror-finished. However, even when the entire surface of the transparent resin portion 41 is mirror-finished, the resist mark 8 can be clearly seen, so that the resist mark 8 can be easily recognized. Will be able to.

<Embodiment 4>
Next, a semiconductor device according to a fourth embodiment of the present invention will be described.

  In addition, although the above-mentioned Embodiment 1-3 demonstrated the case where this invention was implemented in the light receiving element, in this embodiment, the case where this invention is implemented in a light emitting element is demonstrated.

  5A and 5B are explanatory views showing a semiconductor device according to a fourth embodiment of the present invention, in which FIG. 5A is a top view, FIG. 5B is a cross-sectional view along line AA in FIG. It is.

  This semiconductor element includes a light emitting chip 51. The light emitting chip 51 is disposed on a first electrode pattern 56 formed on the upper surface of the substrate 2, and a cathode electrode (not shown) formed on the back surface of the light emitting chip 51 is connected to the first electrode pattern 56. Has been.

  Further, the anode electrode 50 formed on the upper surface of the light-emitting chip 51 (which is a very thin member and is illustrated only in FIG. 5A) is formed on the upper surface of the substrate 2 via the gold wire 52. It is connected to the second electrode pattern 53.

  Further, the light emitting chip 51 and the gold wire 52 are covered with a transparent resin portion 1 formed on the upper surface of the substrate 2.

  In addition, through holes 57a and 57b are formed in two of the four corners of the substrate 2 (the lower left corner and the upper right corner in FIG. 5A) for taking out the wiring to the outside of the transparent resin portion 1, respectively. ing. These through holes 57a and 57b penetrate from the upper surface to the lower surface of the substrate 2, and a conductive wiring pattern is formed on the inner surface. Further, on the lower surface of the substrate 2, external terminals 55a and 55b are formed at the left end and the right end, respectively. The first electrode pattern 56 is connected to the external terminal 55a through a through hole 57a, and the second electrode pattern 53 is connected to the external terminal 55b through a through hole 57b.

  Further, in the present embodiment, a resist mark 8 as a direction identification means is provided in an area covered with the transparent resin portion 1 on the upper surface of the substrate 2 so as to avoid the light emitting chip 51 (that is, the semiconductor chip mounting area). ing. Specifically, a registration mark 8 for direction identification is provided on the left side of the semiconductor chip mounting region on the upper surface of the substrate 2 inside the transparent resin portion 1.

  According to the present embodiment, even when the semiconductor element is configured using a light emitting chip, the registration mark 8 for direction identification can be recognized with the naked eye without blocking the emitted light 59 as in the case where the light receiving chip is used. Since it can be formed in any size, direction identification can be easily performed.

  Note that, here, a resist mark constituting the semiconductor element shown in Embodiment 1 is used as a resist mark, but a resist mark constituting the semiconductor element shown in Embodiment 2 may be used.

  The electronic device of the present invention is one in which any one of the semiconductor elements of Embodiments 1 to 4 described above or a combination of them is mounted.

  The semiconductor element of the present invention and an electronic device equipped with the semiconductor element can be used when a semiconductor element having a small package such as a photoelectric conversion element such as a light receiving element or a light emitting element is required.

BRIEF DESCRIPTION OF THE DRAWINGS It is explanatory drawing which shows Embodiment 1 of the semiconductor element of this invention, (a) is a top view, (b) is a front view, (c) is a bottom view. It is explanatory drawing which showed the semiconductor element shown in FIG. 1 in the state which abbreviate | omitted the transparent resin part, (a) is a top view, (b) is a front view. It is explanatory drawing which shows Embodiment 2 of the semiconductor element of this invention, (a) is a top view, (b) is a front view. It is explanatory drawing which shows Embodiment 3 of the semiconductor element of this invention, (a) is a top view, (b) is a front view. It is explanatory drawing which shows Embodiment 4 of the semiconductor element of this invention, (a) is a top view, (b) is sectional drawing, (c) is a bottom view. It is explanatory drawing which shows the prior art example 1 of the semiconductor element provided with the direction identification means, (a) is a top view, (b) is a front view, (c) is a bottom view. It is explanatory drawing which shows the prior art example 2 of the semiconductor element provided with the direction identification means, (a) is a top view, (b) is a front view.

Explanation of symbols

1, 41 Transparent resin part 2 Substrate 3a, 3b, 3c Electrode pattern 5a, 5b, 5c, 5d External terminal 6 GND pattern 7a, 7b, 7c, 7d Through hole 9 Incident light 8, 38 Resist mark 10a, 10b, 10c Electrode Pad 11 Light receiving chip 12a, 12b, 12c Gold wire 51 Light emitting chip

Claims (8)

A semiconductor chip comprising a semiconductor chip mounted in a semiconductor chip mounting region on the upper surface of the substrate, and a transparent resin portion covering the semiconductor chip surface and the periphery of the semiconductor chip mounting region on the upper surface of the substrate,
A semiconductor element in which a direction identification mark is formed on the upper surface of the substrate so as to avoid the semiconductor chip mounting region.   2. The semiconductor element according to claim 1, wherein the direction identification mark is formed using a resist.   3. The semiconductor element according to claim 1, wherein the direction identification mark is formed in a region of the upper surface of the substrate covered with a transparent resin portion.   4. The semiconductor element according to claim 1, wherein a dimension of each side of a portion where the direction identification mark is formed is at least 0.3 mm.   5. The semiconductor element according to claim 1, 2, 3, or 4, wherein a surface of the transparent resin portion is mirror-finished.   6. The semiconductor element according to claim 5, wherein a portion of the surface of the transparent resin portion that covers the upper portion of the resist mark is mirror-finished.   7. The semiconductor element according to claim 6, wherein a portion of the surface of the transparent resin portion excluding a portion covering the upper portion of the resist mark is satin-finished.   The electronic device carrying the semiconductor element as described in any one of Claims 1-7.

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