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JP2009092581A - Wiring board for electronic component inspection device - Google Patents

Wiring board for electronic component inspection device Download PDF

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Publication number
JP2009092581A
JP2009092581A JP2007265239A JP2007265239A JP2009092581A JP 2009092581 A JP2009092581 A JP 2009092581A JP 2007265239 A JP2007265239 A JP 2007265239A JP 2007265239 A JP2007265239 A JP 2007265239A JP 2009092581 A JP2009092581 A JP 2009092581A
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layers
power supply
layer
wiring
electronic component
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Kazuya Nozu
一哉 野津
Yoshitoshi Nomura
俊寿 野村
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Niterra Co Ltd
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NGK Spark Plug Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board used for an electronic component inspection device and excelling in electric characteristics, arrangement accuracy of connecting conductors and production facility. <P>SOLUTION: The wiring board 1 for the electronic component inspection device includes a plurality of insulating layers s1-s9 laminated along a thickness direction; a signal wiring layers S arranged between the plurality of insulating layers s3, s4; a plurality of power supply wiring layers P1, P2 electrically conductive to each other; and the connecting conductors v linearly arranged along the thickness direction between a pair of power supply wiring layers P1, P2 in vertical layers closest to the signal wiring layers S to connect the plurality of power supply wiring layers P1, P2 to each other. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、プローブカードなどの電子部品検査装置に用いられ、特に電気的特性、内部導体の配置精度、および製作容易性に優れた電子部品検査装置用配線基板に関する。   The present invention is used in an electronic component inspection apparatus such as a probe card, and particularly relates to a wiring board for an electronic component inspection apparatus having excellent electrical characteristics, internal conductor placement accuracy, and ease of manufacture.

電源騒音およびコストを抑制するため、複数の絶縁層の間において、電源層とグラント層との間に信号層を配置し、かかる信号層の領域にグランド電位となる配線領域および電源電位となる配線領域の少なくとも一方を備えた印刷配線板などが提案されている(例えば、特許文献1参照)。
特開2007−115772号公報(第1〜20頁、図1〜3)
In order to suppress power supply noise and cost, a signal layer is arranged between a power supply layer and a grant layer between a plurality of insulating layers, and a wiring region that becomes a ground potential and a wiring that becomes a power supply potential in the region of the signal layer A printed wiring board having at least one of the regions has been proposed (for example, see Patent Document 1).
Japanese Unexamined Patent Publication No. 2007-115772 (pages 1 to 20, FIGS. 1 to 3)

ところで、前記特許文献1の印刷配線板のように、厚み方向に沿って、電源層、信号層、グラント層の順で配置した場合、例えば、電源層と接続する電源ビア導体が、干渉しそうな信号層を回避するため、かかる電源ビア導体の位置を平面方向に移動する方法が採られている。この際、電源層が1層であり、信号層の上層または下層の何れにしか配置されていない場合、以下の対策を採らざるを得なかった。
例えば、(1)上下層に位置する電源ビア導体同士の間に、複数の接続配線を設けて、一部の電源ビア導体の位置をずらすことで、信号層との干渉を回避する。
(2)印刷配線板における一方の表面に形成された電源用パッドに接続すべき電源ビア導体の位置を、上記パッドの中心側から周辺側にずらして接続する。
しかしながら、前記対策(1)のように、電源ビア導体の位置を配線板の平面方向に沿ってシフトした場合、かかる電源ビア導体およびこれに導通する電源層の回路におけるインダクタンスなどの電気的特性が低下するおそれがある。
By the way, when it arrange | positions in order of a power supply layer, a signal layer, and a grant layer along the thickness direction like the printed wiring board of the said patent document 1, for example, the power supply via conductor connected with a power supply layer is likely to interfere. In order to avoid the signal layer, a method of moving the position of the power supply via conductor in the plane direction is adopted. At this time, when the power supply layer is one layer and is disposed only in either the upper layer or the lower layer of the signal layer, the following measures have to be taken.
For example, (1) interference with the signal layer can be avoided by providing a plurality of connection wirings between the power supply via conductors located in the upper and lower layers and shifting the positions of some of the power supply via conductors.
(2) The position of the power supply via conductor to be connected to the power supply pad formed on one surface of the printed wiring board is shifted from the center side of the pad to the peripheral side.
However, when the position of the power supply via conductor is shifted along the plane direction of the wiring board as in the measure (1), electrical characteristics such as inductance in the circuit of the power supply via conductor and the power supply layer conducted to the power supply via conductor are reduced. May decrease.

更に、前記対策(2)のように、電源ビア導体が接続する位置を、電源用パッドの中心側から周辺側にずらした場合、かかるパッドの成膜工程で当該パッドから上記ビア導体が外れ易くなり、両者間の導通が不安定になるおそれがある。
特に、複数の電子部品ごとの電極に、表面側のパッドに取り付けたプローブを電気的に接続させて、個々の電子部品の電気的特性を検査するプローブカードのような電子部品検査装置に用いられる配線基板では、以上のような電気的特性の低下によって、検査精度の信頼性が損なわれるおそれが高くなる。
しかも、前記配線によりビア導体の導通経路をずらしたり、前記パッドの周辺側にビア導体を接続しようとすると、目標とする配線基板を設計および製造するに際し、著しく複雑な内部配線を形成せざるを得ないため、長時間、複雑な工程、および多くの工数を要し、コスト高になる、という問題もあった。
Further, when the position where the power supply via conductor is connected is shifted from the center side of the power supply pad to the peripheral side as in the measure (2), the via conductor is likely to be detached from the pad in the pad forming process. Therefore, there is a possibility that conduction between the two becomes unstable.
In particular, it is used in an electronic component inspection apparatus such as a probe card for inspecting electrical characteristics of individual electronic components by electrically connecting a probe attached to a pad on the surface side to an electrode for each of the plurality of electronic components. In the wiring board, there is a high possibility that the reliability of the inspection accuracy is impaired due to the deterioration of the electrical characteristics as described above.
In addition, if the conductive path of the via conductor is shifted by the wiring or if the via conductor is connected to the peripheral side of the pad, it is necessary to form a remarkably complicated internal wiring when designing and manufacturing the target wiring board. Since it cannot be obtained, there is a problem that a long time, a complicated process, and a large number of man-hours are required, resulting in an increase in cost.

本発明は、背景技術において説明した各問題点を解決し、電子部品検査装置に用いられ、電気的特性、接続導体の配置精度、および製作容易性に優れた電子部品検査装置用配線基板を提供する、ことを課題とする。   The present invention solves each of the problems described in the background art and provides a wiring board for an electronic component inspection device that is used in an electronic component inspection device and has excellent electrical characteristics, connection conductor placement accuracy, and ease of manufacture. Do that.

課題を解決するための手段および発明の効果Means for Solving the Problems and Effects of the Invention

本発明は、前記課題を解決するため、互いに導通する電源配線層を複数とし、その間に対向して信号配線層を配置すると共に、かかる信号配線層に最接近する上下層一対の電源配線層同士の間を、厚み方向に沿って直線状に配置された接続導体によって接続する、ことに着想して成されたものである。
即ち、本発明の電子部品検査装置用配線基板(請求項1)は、厚み方向に沿って積層された複数の絶縁層と、かかる複数の絶縁層の間に配置された信号配線層と、上記複数の絶縁層を介し且つ上記信号配線層と対向して配置され、相互に電気的に導通している複数の電源配線層と、上記信号配線層に最接近する上下層一対の電源配線層の間を厚み方向に沿って直線状に配置され、上記複数の電源配線層同士を接続する接続導体と、を含む、ことを特徴とする。
In order to solve the above problems, the present invention provides a plurality of power supply wiring layers that are electrically connected to each other, arranges a signal wiring layer so as to face each other, and a pair of upper and lower power supply wiring layers closest to the signal wiring layer. The connection is established by connecting conductors arranged linearly along the thickness direction.
That is, a wiring board for an electronic component inspection apparatus according to the present invention (Claim 1) includes a plurality of insulating layers laminated along a thickness direction, a signal wiring layer disposed between the plurality of insulating layers, A plurality of power supply wiring layers arranged through a plurality of insulating layers and opposite to the signal wiring layer and electrically connected to each other, and a pair of power supply wiring layers of upper and lower layers closest to the signal wiring layer And a connection conductor that is arranged linearly along the thickness direction and connects the plurality of power supply wiring layers to each other.

これによれば、複数の絶縁層の厚み方向において、信号配線層の上下層に複数の電源配線層が配置され、これらのうち上記信号配線層に最接近する上下層一対の電源配線層同士の間を、厚み方向に沿って直線状に接続する接続導体が配置されている。このため、上記複数の電源配線層、これらの間を接続する接続導体、かかる接続導体を介して導通する最上層の絶縁層の表面に形成されたパッド、および最下層の絶縁層の裏面に形成された外部端子にわたる電源用回路を可及的に短くし得る。更に、複数の電源配線層のうち、最下層の電源配線層と、最下層の絶縁層の裏面に形成された外部端子との間を接続する接続導体の接続位置を、かかる外部端子における所要の位置に容易に設定可能となる。しかも、上記接続導体は、上下層一対の電源配線層同士の間を、直線状に配置されるので、本配線基板の回路設計において、複数の接続導体を配置する際の自由度が高められ、係る設計の正確および迅速性は基より、製作工程も容易化することも可能となる。
従って、前記電源用回路およびこれに隣接する信号用回路のインダクタンスなどの電気的特性を低下させず、接続導体の配置精度、および製作容易性に優れた電子部品検査装置用配線基板を提供することができる。
According to this, in the thickness direction of the plurality of insulating layers, a plurality of power supply wiring layers are arranged on the upper and lower layers of the signal wiring layer, and among these, a pair of upper and lower power supply wiring layers closest to the signal wiring layer Connection conductors that connect the gaps linearly along the thickness direction are arranged. For this reason, the plurality of power supply wiring layers, connection conductors connecting them, pads formed on the surface of the uppermost insulating layer conducted through the connection conductors, and formed on the back surface of the lowermost insulating layer Therefore, the power supply circuit extending over the external terminals can be shortened as much as possible. Further, among the plurality of power supply wiring layers, the connection position of the connection conductor that connects between the lowermost power supply wiring layer and the external terminal formed on the back surface of the lowermost insulating layer is determined according to the required external terminal. The position can be easily set. In addition, since the connection conductor is linearly arranged between the pair of upper and lower power supply wiring layers, in the circuit design of the present wiring board, the degree of freedom when arranging a plurality of connection conductors is increased, In addition to the accuracy and speed of such a design, the manufacturing process can be facilitated.
Accordingly, it is possible to provide a wiring board for an electronic component inspection apparatus which is excellent in the arrangement accuracy of connection conductors and the ease of manufacture without deteriorating electrical characteristics such as inductance of the power supply circuit and the signal circuit adjacent thereto. Can do.

尚、前記接続導体には、前記絶縁層を貫通する貫通孔に沿って、全体がほぼ円筒形を呈するスルーホール導体や、全体が円柱形を呈するビア導体が含まれる。
また、前記信号配線層は、任意のパターンにして前記絶縁層間に配置される。
更に、前記信号配線層には、直線状である複数の接続導体を任意の位置で絶縁を確保しつつ貫通させるため、各接続導体の外径よりも大きな内径を有する貫通孔が予め形成されている。
The connection conductor includes a through-hole conductor having a substantially cylindrical shape and a via conductor having a generally cylindrical shape along a through-hole penetrating the insulating layer.
The signal wiring layer is arranged between the insulating layers in an arbitrary pattern.
Further, in the signal wiring layer, through holes having a larger inner diameter than the outer diameter of each connection conductor are formed in advance in order to allow a plurality of linear connection conductors to penetrate while securing insulation at an arbitrary position. Yes.

また、本発明には、前記複数の電源配線層は、前記複数の絶縁層の間において平面形状に形成されている、電子部品検査装置用配線基板(請求項2)も含まれる。
これによれば、前記複数の電源配線層は、前記複数の絶縁層の間において、平面視におけるかかる絶縁層間の面積のうち、その大半を占めてほぼ矩形を呈する、通称ベタ状と称する平面形状にして形成されている。そのため、前記信号配線層に最接近する上下層一対の電源配線層同士の間を接続する前記接続導体を、厚み方向に沿って直線状にして配置することが容易となる。
The present invention also includes an electronic component inspection device wiring board (Claim 2) in which the plurality of power supply wiring layers are formed in a planar shape between the plurality of insulating layers.
According to this, the plurality of power supply wiring layers occupy most of the area between the insulating layers in a plan view between the plurality of insulating layers and have a substantially rectangular shape, which is generally called a solid shape. Is formed. Therefore, it is easy to arrange the connection conductors connecting the pair of upper and lower power supply wiring layers that are closest to the signal wiring layer in a straight line along the thickness direction.

更に、本発明には、前記複数の絶縁層のうち、最下層の絶縁層の裏面には、最下層の前記電源配線層と導通する接続導体がほぼ中心部に接続する外部端子が形成されている、電子部品検査装置用配線基板(請求項3)も含まれる。
これによれば、最下層の前記電源配線層と導通する接続導体が、最下層の絶縁層の裏面に形成された外部端子のほぼ中心部に接続されている。そのため、本配線基板と外部回路基板などとの導通が確実に取れるので、電源電流の給電や検査情報の出力などを、正確且つ確実に成さしめることが可能となる。
尚、前記外部端子には、例えば、ランド・グリッド・アレイ(LGA)パッドの他、ピン・グリッド・アレイ(PGA)パッド、ボール・グリッド・アレイ(BGA)パッドが挙げられる。
Furthermore, in the present invention, an external terminal is formed on the back surface of the lowermost insulating layer among the plurality of insulating layers, and a connection conductor that is electrically connected to the lowermost power supply wiring layer is connected to the central portion. In addition, a wiring board for an electronic component inspection apparatus (claim 3) is also included.
According to this, the connection conductor that is electrically connected to the lowermost power supply wiring layer is connected to the substantially central portion of the external terminal formed on the back surface of the lowermost insulating layer. For this reason, since the electrical connection between the wiring board and the external circuit board can be reliably obtained, it is possible to accurately and surely supply power supply current and output inspection information.
Examples of the external terminal include a land grid array (LGA) pad, a pin grid array (PGA) pad, and a ball grid array (BGA) pad.

また、本発明には、前記複数の電源配線層とは電気的に導通しない複数の電源配線層が、前記絶縁層とは異なる絶縁層を介して、上記複数の電源配線層に対向して配置されている、電子部品検査装置用配線基板(請求項4)も含まれる。
これによれば、前記複数の電源配線層とは電気的に導通せず、別の電源回路を形成する複数の電源配線層が、前記絶縁層とは異なる絶縁層を介して、上記複数の電源配線層に対向して配置されている。このため、複数の電源回路を形成する互いに導通しない複数組である複数の電源配線層を配置しているので、例えば、検査すべき電子部品の電気的特性などに応じて、異なる電圧の電流などを平行して給電するなどの電気的に複雑で且つ緻密な作用を行わしめることが可能となる。
尚、複数組である複数の電源配線層は、各組ごとに前記信号配線層および接地配線層を配置する形態のほか、例えば、接地配線層を各組に共用としても良い。
Further, in the present invention, a plurality of power supply wiring layers that are not electrically connected to the plurality of power supply wiring layers are arranged to face the plurality of power supply wiring layers via an insulating layer different from the insulating layer. Also included is an electronic component inspection device wiring board (claim 4).
According to this, the plurality of power supply wiring layers that are not electrically connected to the plurality of power supply wiring layers and form another power supply circuit pass through the insulating layer different from the insulating layer, and the plurality of power supply wiring layers. It is arranged to face the wiring layer. For this reason, a plurality of power supply wiring layers, which are a plurality of sets that do not conduct each other, that form a plurality of power supply circuits are arranged, for example, currents of different voltages depending on the electrical characteristics of the electronic component to be inspected, etc. It is possible to perform an electrically complicated and precise action such as feeding power in parallel.
In addition to the form in which the signal wiring layer and the ground wiring layer are arranged for each set, the plurality of power supply wiring layers as a plurality of sets may share the ground wiring layer for each set, for example.

更に、本発明には、前記信号配線層は、その上層側および下層側の前記複数の絶縁層の間に配置された複数の接地配線層の間に配置されていると共に、かかる複数の接地配線層は、前記電源配線層と上記信号配線層との間に配置されている、電子部品検査装置用配線基板(請求項5)も含まれる。
これによれば、上層側および下層側の配置された複数の接地配線層の間に前記信号配線層が配置され、何れの接地配線層も前記電源配線層と上記信号配線層との間に配置されている。そのため、信号配線層の配線幅および隣接する接地配線層との間に位置する絶縁層の厚みなどを調整することで、該信号配線層のインピーダンス値を容易にコントロールできる。更に、信号配線層を上下層の接地配線層によって、例えば、電源回路から漏洩した電流や磁界などから確実に防護できるので、信号の処理および送信を正確に成さしめることができる。
尚、接地配線層も、電源配線層と同様に、前記複数の絶縁層間に平面形状にして配置されると共に、前記接続導体を任意の位置で絶縁を確保しつつ貫通させるため、該接続導体の外径よりも大きな内径を有する貫通孔が予め形成されている。
Furthermore, in the present invention, the signal wiring layer is disposed between the plurality of ground wiring layers disposed between the plurality of insulating layers on the upper layer side and the lower layer side thereof, and the plurality of ground wirings. The layer also includes an electronic component inspection device wiring board (Claim 5) disposed between the power wiring layer and the signal wiring layer.
According to this, the signal wiring layer is disposed between a plurality of ground wiring layers disposed on the upper layer side and the lower layer side, and any ground wiring layer is disposed between the power supply wiring layer and the signal wiring layer. Has been. Therefore, the impedance value of the signal wiring layer can be easily controlled by adjusting the wiring width of the signal wiring layer and the thickness of the insulating layer positioned between the adjacent ground wiring layers. Furthermore, since the signal wiring layer can be reliably protected from, for example, current leaked from the power supply circuit or magnetic field by the upper and lower ground wiring layers, signal processing and transmission can be accurately performed.
Similarly to the power supply wiring layer, the ground wiring layer is also arranged in a planar shape between the plurality of insulating layers and penetrates the connection conductor while ensuring insulation at an arbitrary position. A through hole having an inner diameter larger than the outer diameter is formed in advance.

また、本発明には、前記複数の絶縁層のうち、最上層の絶縁層の表面には、前記電源配線層、信号配線層、接地配線層と個別に導通する複数のパッドが形成され、かかるパッド上にはプローブが取り付けられる、電子部品検査装置用配線基板(請求項6)も含まれる。
これによれば、プローブが表面側の各パッドごとに取り付けられるため、例えば、Siウェハに形成された多数の電子部品ごとの電極との確実な電気的接続が可能となり、正確且つ確実な検査が可能となる。
加えて、本発明には、前記複数の絶縁層は、セラミックおよび樹脂の少なくとも一方からなる、電子部品検査装置用配線基板(請求項7)も含まれる。
これによれば、前記電源配線層、信号配線層、および接地配線層の間を確実に絶縁し、電子部品の検査を確実に行わしめることができる。
Further, according to the present invention, a plurality of pads individually connected to the power supply wiring layer, the signal wiring layer, and the ground wiring layer are formed on the surface of the uppermost insulating layer among the plurality of insulating layers. Also included is an electronic component inspection device wiring board on which the probe is attached on the pad.
According to this, since the probe is attached to each pad on the surface side, for example, it is possible to ensure electrical connection with electrodes for each of a large number of electronic components formed on the Si wafer, and accurate and reliable inspection is possible. It becomes possible.
In addition, the present invention includes an electronic component inspection device wiring board (claim 7) in which the plurality of insulating layers are made of at least one of ceramic and resin.
According to this, it is possible to reliably insulate the power supply wiring layer, the signal wiring layer, and the ground wiring layer, and to inspect the electronic component reliably.

尚、前記セラミックには、アルミナなどの高温焼成セラミック、およびガラス成分を約50wt%程度含む低温焼成セラミックが含まれ、高温焼成セラミックの場合、前記各配線層や接続導体などの導体にWやMoなどが用いられ、低温焼成セラミックの場合、AgやCuなどが用いられる。
また、前記セラミックには、マシナブルセラミック、AlN、またはムライトの何れかからなるものとしても良く、上記マシナブルセラミックは、SiOとAlとの混合物、あるいは、AlNとBNとの混合物からなり、熱膨張係数が約3.0×10−6/℃のSiウェハとも、熱膨張係数がほぼ近似している。
更に、前記樹脂には、エポキシ系のほか、前記プローブを表面側のパッドに取り付けるプローフビング時の熱に耐える耐熱性のポリイミドなどが用いられる。
加えて、コア基板を前記セラミック製とし、その両面に複数の樹脂層および電源配線層などを積層した形態としても良い。
The ceramic includes a high-temperature fired ceramic such as alumina, and a low-temperature fired ceramic containing about 50 wt% of a glass component. In the case of a high-temperature fired ceramic, W or Mo is used as a conductor such as each wiring layer or connection conductor. In the case of a low-temperature fired ceramic, Ag, Cu, or the like is used.
The ceramic may be made of any of machinable ceramic, AlN, or mullite, and the machinable ceramic is a mixture of SiO 2 and Al 2 O 3 , or a mixture of AlN and BN. The thermal expansion coefficient of the Si wafer having a thermal expansion coefficient of approximately 3.0 × 10 −6 / ° C. is approximately similar.
In addition to the epoxy resin, heat-resistant polyimide that can withstand heat during probing for attaching the probe to the surface-side pad is used as the resin.
In addition, the core substrate may be made of the ceramic, and a plurality of resin layers, power supply wiring layers, and the like may be laminated on both surfaces thereof.

以下において、本発明を実施するための最良の形態について説明する。
図1は、本発明による一形態の電子部品検査装置用配線基板(以下、単に検査装置用配線基板と称する)1の概略を示す断面図である。
検査装置用配線基板1は、図1に示すように、同図で上下方向である厚み方向に沿って積層された複数のセラミック層(絶縁層)s1〜s9からなり、表面3および裏面4を有する基板本体2を備えている。かかる基板本体2のセラミック層s3,s4の間には、所定のパターンを有する信号配線層Sが配置されている。
また、上記信号配線層Sの上層側のセラミック層s2,s3間および下層側のセラミック層s4,s5間には、一対(複数)の接地配線層G1,G2が、上記信号配線層Sと対向し且つセラミック層s3,s4を介して配置されている。
更に、上記信号配線層Sおよび接地配線層G1,G2と平面視において対向して、上層側のセラミック層s1,s2間および下層側のセラミック層s5,s6間に、一対(複数)の電源配線層P1,P2が、セラミック層s2,s5などを介して配置されている。
In the following, the best mode for carrying out the present invention will be described.
FIG. 1 is a cross-sectional view showing an outline of a wiring board for an electronic component inspection apparatus (hereinafter simply referred to as an inspection apparatus wiring board) 1 according to an embodiment of the present invention.
As shown in FIG. 1, the inspection apparatus wiring board 1 is composed of a plurality of ceramic layers (insulating layers) s <b> 1 to s <b> 9 stacked in the thickness direction which is the vertical direction in FIG. A substrate body 2 is provided. Between the ceramic layers s3 and s4 of the substrate body 2, a signal wiring layer S having a predetermined pattern is disposed.
A pair (a plurality) of ground wiring layers G1 and G2 are opposed to the signal wiring layer S between the upper ceramic layers s2 and s3 and between the lower ceramic layers s4 and s5. And disposed via ceramic layers s3 and s4.
Further, a pair (a plurality) of power supply wirings are opposed to the signal wiring layer S and the ground wiring layers G1 and G2 in a plan view, between the upper ceramic layers s1 and s2 and between the lower ceramic layers s5 and s6. The layers P1 and P2 are arranged via the ceramic layers s2 and s5.

前記セラミック層s1〜s9は、例えばアルミナなどの高温焼成セラミック、またはガラス成分を約40〜60wt%含む低温焼成セラミックからなる。
また、前記電源配線層P1,P2、および接地配線層G1,G2は、セラミックs1〜s3の間、あるいはセラミック層s4〜s6の間において、平面視でかかるセラミック層s1〜s3、s4〜s6間の面積の大半を占め、例えば矩形(正方形または長方形)などの平面形状(いわゆるベタ状)にして形成されている。
図1に示すように、上下層一対の電源配線層P1,P2間の厚み方向に沿って、これらを直線状に接続する複数のビア導体(接続導体)vが配置されている。かかるビア導体vは、電源配線層P1,P2間に位置する信号配線層S、接地配線層G1,G2、およびセラミック層s2〜s5を貫通している。この際、ビア導体vは、信号配線層Sのパターン間および接地配線層G1,G2に設けた貫通孔hの内側を貫通することで、これらとの短絡を防いでいる。
The ceramic layers s1 to s9 are made of a high-temperature fired ceramic such as alumina, or a low-temperature fired ceramic containing about 40 to 60 wt% of a glass component.
The power supply wiring layers P1 and P2 and the ground wiring layers G1 and G2 are between the ceramic layers s1 to s3 and between the ceramic layers s4 to s6 and between the ceramic layers s1 to s3 and s4 to s6 in the plan view. Is formed in a planar shape (so-called solid shape) such as a rectangle (square or rectangle).
As shown in FIG. 1, a plurality of via conductors (connection conductors) v for connecting them in a straight line are arranged along the thickness direction between the pair of upper and lower power supply wiring layers P1 and P2. The via conductor v penetrates the signal wiring layer S, the ground wiring layers G1 and G2, and the ceramic layers s2 to s5 located between the power supply wiring layers P1 and P2. At this time, the via conductor v penetrates between the patterns of the signal wiring layer S and the inside of the through holes h provided in the ground wiring layers G1 and G2, thereby preventing a short circuit therebetween.

図1に示すように、セラミック層s6〜s9には、前記信号配線層S、下層側の電源配線層P2、および下層側の接地配線層G2の何れかと、最下層のセラミック層s9の裏面4に形成した複数の外部端子(例えば、LGAパッド)6との間を直線状にして接続する複数のビア導体(接続導体)Vが配置されている。かかるビア導体Vの下端は、外部端子6のほぼ中心部に接続されている。
また、最上層のセラミック層sの表面3には、複数のパッド5が形成され、該パッド5は、上層側の電源配線層P1、上層側の接地配線層G1、および前記信号配線層Sの何れかと、ビア導体v1,7,8を介して導通している。
更に、図1に示すように、上下層一対の接地配線層G1,G2間もビア導体7を介して導通している。かかるビア導体7は、電源配線層P1,P2に設けた貫通孔hの内側および信号配線層Sのパターン間を貫通することで、これらとの短絡を防いでいる。加えて、信号配線層Sと接続される上記ビア導体8は、電源配線層P1,P2および接地配線層G1,G2に設けた貫通孔hの内側を貫通することで、これらとの短絡を防いでいる。
As shown in FIG. 1, the ceramic layers s6 to s9 include any one of the signal wiring layer S, the lower power wiring layer P2, and the lower ground wiring layer G2, and the back surface 4 of the lowermost ceramic layer s9. A plurality of via conductors (connection conductors) V that are connected to the plurality of external terminals (for example, LGA pads) 6 in a straight line are disposed. The lower end of the via conductor V is connected to the substantially central portion of the external terminal 6.
Further, a plurality of pads 5 are formed on the surface 3 of the uppermost ceramic layer s. The pads 5 are formed of the upper power wiring layer P1, the upper ground wiring layer G1, and the signal wiring layer S. Any one of them is electrically connected via via conductors v1, 7, and 8.
Further, as shown in FIG. 1, the pair of upper and lower ground wiring layers G <b> 1 and G <b> 2 are also electrically connected via the via conductor 7. The via conductor 7 penetrates the inside of the through hole h provided in the power supply wiring layers P1 and P2 and between the patterns of the signal wiring layer S, thereby preventing a short circuit therebetween. In addition, the via conductor 8 connected to the signal wiring layer S penetrates through the through holes h provided in the power supply wiring layers P1 and P2 and the ground wiring layers G1 and G2, thereby preventing a short circuit therewith. It is out.

図1に示すように、基板本体2の表面3に形成された複数のパッド5には、追ってプローブ9が個別に取り付けられる。かかるプローブ9の先端側を、例えば図示しないSiウェハに形成された複数の電子部品ごとの電極と電気的に接続させることで、各電子部品の電気的特性を正確に検出することが可能となる。
尚、セラミック層s1〜s9がアルミナなどの高温焼成セラミックの場合、前記電源配線層P1,P2、信号配線層S、およびビア導体v,Vなどの導体は、WまたはMoにて形成され、セラミック層s1〜s9がガラス−セラミックなどの低温焼成セラミックの場合、上記導体は、AgまたはCuにて形成される。
また、本検査装置用配線基板1の基板本体2において、前記電源配線層P1,P2、信号配線層S、および接地配線層G1,G2が配置されたセラミック層s1〜s5の上部は、いわゆる配線層領域であり、前記ビア導体Vのみが貫通するセラミック層s6〜s9の下部は、基板本体2の厚みを調整する領域である。
As shown in FIG. 1, probes 9 are individually attached to a plurality of pads 5 formed on the surface 3 of the substrate body 2. By electrically connecting the tip side of the probe 9 to, for example, an electrode for each of a plurality of electronic components formed on a Si wafer (not shown), it is possible to accurately detect the electrical characteristics of each electronic component. .
When the ceramic layers s1 to s9 are high-temperature fired ceramics such as alumina, the power wiring layers P1 and P2, the signal wiring layer S, and the conductors such as the via conductors v and V are formed of W or Mo. When the layers s1 to s9 are low-temperature fired ceramics such as glass-ceramics, the conductor is made of Ag or Cu.
Further, in the substrate body 2 of the wiring board 1 for the inspection apparatus, the upper portions of the ceramic layers s1 to s5 where the power wiring layers P1 and P2, the signal wiring layer S, and the ground wiring layers G1 and G2 are arranged are so-called wirings. The lower part of the ceramic layers s6 to s9 through which only the via conductor V passes is an area for adjusting the thickness of the substrate body 2.

以上のような検査装置用配線基板1によれば、絶縁層s1〜s9の厚み方向において、信号配線層Sの上下層に一対(複数)の電源配線層P1,P2が配置され、これらの電源配線層P1,P2同士の間を、厚み方向に沿って直線状に接続するビア導体(接続導体)vが配置されている。このため、上記電源配線層P1,P2、これらの間を接続するビア導体v、ビア導体V,v1を介して導通する最上層の絶縁層s1の表面3に形成されたパッド5、および最下層の絶縁層s9の裏面4に形成された外部端子6にわたる電源用回路を可及的に短くし得る。更に、下層側の電源配線層P2と、最下層の絶縁層s9の裏面4に形成された外部端子6との間を接続するビア導体(接続導体)Vの接続位置を、かかる外部端子6のほぼ中心部に容易に設定できる。
しかも、前記ビア導体vは、上下層一対の電源配線層P1,P2の間を、直線状に配置されるので、本配線基板1の回路設計において、複数のビア導体vを配置するための自由度が高められ、係る設計の正確および迅速性は基より、製作工程を容易化することも可能となる。
According to the wiring board 1 for an inspection apparatus as described above, a pair (plurality) of power wiring layers P1 and P2 are arranged on the upper and lower layers of the signal wiring layer S in the thickness direction of the insulating layers s1 to s9. Via conductors (connection conductors) v that connect the wiring layers P1 and P2 linearly along the thickness direction are arranged. For this reason, the power supply wiring layers P1, P2, the via conductor v connecting between them, the pad 5 formed on the surface 3 of the uppermost insulating layer s1 conducting through the via conductors V, v1, and the lowermost layer The power supply circuit over the external terminals 6 formed on the back surface 4 of the insulating layer s9 can be made as short as possible. Further, the connection position of the via conductor (connection conductor) V connecting the lower power supply wiring layer P2 and the external terminal 6 formed on the back surface 4 of the lowermost insulating layer s9 is set to the external terminal 6 It can be easily set at the center.
In addition, since the via conductors v are linearly arranged between the pair of upper and lower power supply wiring layers P1 and P2, in the circuit design of the wiring board 1, freedom for arranging a plurality of via conductors v is provided. The degree of accuracy is increased, and the manufacturing process can be facilitated based on the accuracy and speed of the design.

更に、上下層一対の接地配線層G1,G2の間に前記信号配線層Sが配置され、且つ接地配線層G1,G2が上記信号配線層Sと前記電源配線層P1,P2との間に配置されているので、信号配線層Sの配線幅および隣接する絶縁層s3,s4の厚みなどを調整することで、該信号配線層Sのインピーダンス値を容易にコントロールできる。加えて、信号配線層Sを上下層の接地配線層G1,G2によって、例えば、電源回路から漏洩した電流や磁界などから確実に防護できるので、信号の処理および送信を正確に行わせられる。このため、プローブ9が電気的に接続した電極を有する電子部品の電気的特性を、正確且つ確実に検出し、外部端子6を介して、図示しない外部回路基板などに出力することができる。
従って、前記電源用回路およびこれに隣接する信号用回路のインダクタンスなどの電気的特性を低下させず、ビア導体v,v1,Vの配置精度、および製作容易性に優れた検査装置用配線基板1とすることができる。
Further, the signal wiring layer S is disposed between a pair of upper and lower ground wiring layers G1, G2, and the ground wiring layers G1, G2 are disposed between the signal wiring layer S and the power wiring layers P1, P2. Therefore, by adjusting the wiring width of the signal wiring layer S and the thicknesses of the adjacent insulating layers s3 and s4, the impedance value of the signal wiring layer S can be easily controlled. In addition, the signal wiring layer S can be reliably protected from, for example, a current leaked from the power supply circuit or a magnetic field by the upper and lower ground wiring layers G1 and G2, so that signal processing and transmission can be performed accurately. For this reason, it is possible to accurately and reliably detect the electrical characteristics of the electronic component having the electrode to which the probe 9 is electrically connected, and to output it to the external circuit board (not shown) or the like via the external terminal 6.
Therefore, the wiring board 1 for an inspection apparatus excellent in the placement accuracy of the via conductors v, v1, and V and in the ease of manufacturing without deteriorating the electrical characteristics such as the inductance of the power supply circuit and the signal circuit adjacent thereto. It can be.

前記検査装置用配線基板1は、以下のようにして製造した。
予め、アルミナ粉、所要の有機バインダ、および溶剤などを、所要量ずつ瓶量・混合してセラミックスラリを製作し、これをドクターブレード法によって、シート状を呈する複数のグリーンシート(図示せず)に成形した。
次いで、複数の上記グリーンシートにおける所定の位置ごとに、打ち抜き加工によって貫通孔を穿孔した。この際、追って形成する電源配線層P1,P2間に配置すべきビア導体vを、複数のグリーンシートの厚み方向に沿って直線状とするので、上記貫通孔の位置を設計段階において、容易且つ正確に設定できる。
次に、各グリーンシートの上記貫通孔ごとに、W粉末またはMo粉末を含む導電性ペーストを充填して、未焼成のビア導体v,v1,V,7,8を形成した。
The inspection apparatus wiring board 1 was manufactured as follows.
A ceramic slurry is prepared in advance by mixing and mixing required amounts of alumina powder, required organic binder, and solvent, and a plurality of green sheets (not shown) exhibiting a sheet shape by the doctor blade method. Molded into.
Next, through holes were punched by punching at predetermined positions in the plurality of green sheets. At this time, since the via conductors v to be arranged between the power wiring layers P1 and P2 to be formed later are linear along the thickness direction of the plurality of green sheets, the position of the through hole can be easily and easily set in the design stage. It can be set accurately.
Next, each through hole of each green sheet was filled with a conductive paste containing W powder or Mo powder to form unfired via conductors v, v1, V, 7, and 8.

更に、追って前記セラミック層s1〜s6となるグリーンシートの表面と、最下層のセラミック層s9となるグリーンシートの裏面とに対し、導電性ペーストをそれぞれスクリーン印刷を施して、所要パターンである未焼成の信号配線層S、平面形状の電源配線層P1,P2、接地配線層G1,G2、パッド5、および外部端子6を個別に形成した。
そして、以上のような複数のグリーンシートを厚み方向に沿って積層・圧着した後、所定の温度帯で焼成した。
Further, a conductive paste is screen-printed on the surface of the green sheet to be the ceramic layers s1 to s6 and the back surface of the green sheet to be the lowermost ceramic layer s9. Signal wiring layer S, planar power supply wiring layers P1, P2, ground wiring layers G1, G2, pads 5, and external terminals 6 were individually formed.
And after laminating | stacking and crimping | bonding the above several green sheets along the thickness direction, it baked in the predetermined | prescribed temperature range.

その結果、前記図1に示したように、複数のセラミック層s1〜s9が一体に積層され、表・裏面3,4を有する基板本体2が形成され、セラミック層s1〜s9間の何れかにおいて、相互に対向して配置された信号配線層S、電源配線層P1,P2、接地配線層G1,G2、表面3側のパッド5、裏面4側の外部端子6、およびこれらの間を接続するビア導体(接続導体)v,v1,V,7,8を有する検査装置用配線基板1を得ることができた。
以上のような検査装置用配線基板1の製造方法によれば、電源配線層P1,P2間に配置すべきビア導体vを、追ってセラミック層s2〜s5となるグリーンシートに直線状に形成するため、回路設計が容易となり、その自由度が高められるので、正確で且つ迅速な回路設計ができ、これに応じて製造工程全体も短期間にすることが可能となる。従って、回路設計および製造工程の効率を向上させることにも寄与することが可能である。
As a result, as shown in FIG. 1, a plurality of ceramic layers s1 to s9 are integrally laminated to form a substrate body 2 having front and back surfaces 3 and 4, and any one of the ceramic layers s1 to s9. The signal wiring layer S, the power supply wiring layers P1 and P2, the ground wiring layers G1 and G2, the pad 5 on the front surface 3 side, the external terminal 6 on the back surface 4 side, and these are connected to each other. A wiring board 1 for an inspection apparatus having via conductors (connection conductors) v, v1, V, 7, and 8 could be obtained.
According to the method for manufacturing the inspection apparatus wiring board 1 as described above, the via conductors v to be arranged between the power supply wiring layers P1 and P2 are formed in a straight line on the green sheets to be the ceramic layers s2 to s5 later. Since the circuit design is facilitated and the degree of freedom is increased, an accurate and quick circuit design can be performed, and accordingly, the entire manufacturing process can be performed in a short time. Therefore, it is possible to contribute to improving the efficiency of circuit design and manufacturing process.

図2は、前記検査装置用配線基板1の応用形態である検査装置用配線基板1aの要部を示す断面図である。
かかる検査装置用配線基板1aは、図2に示すように、厚み方向に沿って積層された前記同様の複数のセラミック層(絶縁層)s1〜s13からなり、表面3および裏面4を有する基板本体2aを備えている。かかる基板本体2aのセラミック層s4,s5の間には、前記同様の信号配線層Sが配置されている。
また、上記信号配線層Sの上層側のセラミック層s3,s4間および下層側のセラミック層s5,s6間に、一対(複数)の接地配線層G1,G2が、上記信号配線層Sと対向し且つセラミック層s4,s5を介して配置されている。
更に、上記信号配線層Sおよび接地配線層G1,G2と平面視で対向しつつ、上層側のセラミック層s1〜s3間および下層側のセラミック層s6〜s8間に、上下層二対(複数)の電源配線層P1〜P4が、セラミック層s3〜s6などを介して配置されている。尚、信号配線層S、接地配線層G1,G2、および電源配線層P1〜P4は、前記同様の材料からなる。
FIG. 2 is a cross-sectional view showing a main part of an inspection apparatus wiring board 1a, which is an applied form of the inspection apparatus wiring board 1. As shown in FIG.
As shown in FIG. 2, the inspection apparatus wiring board 1 a includes a plurality of ceramic layers (insulating layers) s <b> 1 to s <b> 13 stacked in the thickness direction and has a front surface 3 and a back surface 4. 2a. Between the ceramic layers s4 and s5 of the substrate body 2a, a signal wiring layer S similar to the above is disposed.
A pair (a plurality) of ground wiring layers G1 and G2 are opposed to the signal wiring layer S between the upper ceramic layers s3 and s4 and between the lower ceramic layers s5 and s6. In addition, they are arranged via ceramic layers s4 and s5.
Further, two pairs of upper and lower layers (a plurality) between the upper layer ceramic layers s1 to s3 and the lower layer ceramic layers s6 to s8 while facing the signal wiring layer S and the ground wiring layers G1 and G2 in plan view. Power supply wiring layers P1 to P4 are arranged via ceramic layers s3 to s6 and the like. The signal wiring layer S, the ground wiring layers G1 and G2, and the power supply wiring layers P1 to P4 are made of the same material as described above.

本検査装置用配線基板1aは、図2に示すように、上層側に一対の電源配線層P1,P3と、下層側に一対の電源配線層P2,P4とを配置している点で、前記配線基板1と相違している。
図2に示すように、信号配線層Sに最接近する上下層の電源配線層P1,P2の厚み方向に沿って、これらを直線状に接続する複数のビア導体(接続導体)vが前記同様に配置されている。上層側の電源配線層P1,P3間、および下層側の電源配線層P2,P4間は、ビア導体v1,v2を介して導通されている。
また、下層側のセラミック層s8〜s13には、前記信号配線層S、最下層の電源配線層P4、および下層側の接地配線層G2の何れかと、最下層のセラミック層s13の裏面4に形成した複数の外部端子6との間を直線状にして接続する複数のビア導体(接続導体)Vが配置されている。かかるビア導体Vの下端は、最下層のセラミック層s13の裏面4に形成された外部端子6のほぼ中心部に接続されている。
As shown in FIG. 2, the wiring board 1a for the inspection apparatus includes a pair of power wiring layers P1, P3 on the upper layer side and a pair of power wiring layers P2, P4 on the lower layer side. This is different from the wiring board 1.
As shown in FIG. 2, a plurality of via conductors (connection conductors) v for connecting them in a straight line along the thickness direction of the upper and lower power supply wiring layers P1 and P2 closest to the signal wiring layer S are the same as described above. Is arranged. The upper power supply wiring layers P1 and P3 and the lower power supply wiring layers P2 and P4 are electrically connected via via conductors v1 and v2.
The lower ceramic layers s8 to s13 are formed on any one of the signal wiring layer S, the lowermost power wiring layer P4, and the lower ground wiring layer G2 and the back surface 4 of the lowermost ceramic layer s13. A plurality of via conductors (connection conductors) V that are connected to the plurality of external terminals 6 in a straight line are arranged. The lower end of the via conductor V is connected to the substantially central portion of the external terminal 6 formed on the back surface 4 of the lowermost ceramic layer s13.

図2に示すように、最上層のセラミック層1sの表面3には、複数のパッド5が前記同様に形成され、かかるパッド5は、最上層の電源配線層P3、上層側の接地配線層G1、および前記信号配線層Sの何れかと、ビア導体v3,7,8を介して導通している。尚、ビア導体7,8の下端とビア導体Vとは、図示しない接続パッドを介して接続されている。更に、上下層一対の接地配線層G1,G2間も、ビア導体7を介して相互に導通している。   As shown in FIG. 2, a plurality of pads 5 are formed in the same manner as described above on the surface 3 of the uppermost ceramic layer 1s. The pads 5 are the uppermost power wiring layer P3 and the upper ground wiring layer G1. , And any one of the signal wiring layers S through via conductors v3, 7, and 8. Note that the lower ends of the via conductors 7 and 8 and the via conductor V are connected via a connection pad (not shown). Further, the pair of upper and lower ground wiring layers G1 and G2 are also electrically connected to each other via the via conductors 7.

加えて、基板本体2aの表面3に形成された複数のパッド5には、追ってプローブ9が個別に取り付けられ、かかるプローブ9の先端側を、前記同様の電子部品ごとの電極と電気的に接続させることで、各電子部品の電気的特性を正確に検出することが可能となる。
以上のような検査装置用配線基板1aは、前記配線基板1と同様な方法によって製造され、前述した配線基板1の効果と同様な効果を奏することができる。しかも、上下層二対の電源配線層P1〜P4を有するため、検査すべき複数の電子部品ごとへの検査に要する電流の給電や、信号配線層Sへの給電を一層確実に行うことができる。
In addition, probes 9 are individually attached to the plurality of pads 5 formed on the surface 3 of the substrate body 2a, and the tip side of the probes 9 is electrically connected to the electrodes for the same electronic components as described above. By doing so, it becomes possible to accurately detect the electrical characteristics of each electronic component.
The inspection apparatus wiring board 1a as described above is manufactured by the same method as the wiring board 1, and can exhibit the same effects as those of the wiring board 1 described above. In addition, since the power supply wiring layers P1 to P4 of the upper and lower layers are provided, it is possible to more reliably supply the current required for the inspection of each of the plurality of electronic components to be inspected and the power supply to the signal wiring layer S. .

図3は、異なる形態の検査装置用配線基板1bの要部を示す断面図である。
かかる検査装置用配線基板1bは、図3に示すように、厚み方向に沿って積層された前記同様の複数のセラミック層(絶縁層)s1〜s15からなり、表面3および裏面4を有する基板本体2bを備えている。かかる基板本体2bのセラミック層s4,s5およびセラミック層s6,s7の間には、前記同様で上下層一対の信号配線層Sa,Sbが配置されている。かかる信号配線層Sa,Sbは、相互に導通せず、それぞれ異なる信号回路の一部を構成している。
また、上記信号配線層Saの上層側のセラミック層s3,s4間および下層側のセラミック層s5,s6間には、一対(複数)の接地配線層G1,G2が、上記信号配線層Saと対向しつつ、セラミック層s4,s5を介して配置されている。
FIG. 3 is a cross-sectional view showing a main part of a wiring board 1b for an inspection apparatus having a different form.
As shown in FIG. 3, the inspection apparatus wiring board 1 b includes a plurality of ceramic layers (insulating layers) s <b> 1 to s <b> 15 stacked in the thickness direction, and has a front surface 3 and a back surface 4. 2b. Between the ceramic layers s4 and s5 and the ceramic layers s6 and s7 of the substrate body 2b, a pair of upper and lower signal wiring layers Sa and Sb are disposed in the same manner as described above. Such signal wiring layers Sa and Sb are not electrically connected to each other and constitute parts of different signal circuits.
In addition, between the ceramic layers s3 and s4 on the upper layer side of the signal wiring layer Sa and between the ceramic layers s5 and s6 on the lower layer side, a pair (a plurality) of ground wiring layers G1 and G2 are opposed to the signal wiring layer Sa. However, they are arranged via the ceramic layers s4 and s5.

一方、前記信号配線層Sbの上層側のセラミック層s5,s6間および下層側のセラミック層s7,s8間には、一対(複数)の接地配線層G2,G3が、上記信号配線層Sbと対向しつつ、セラミック層s6,s7を介して配置されている。尚、上記接地配線層G2は、信号配線層Saの下層側および信号配線層Sbの上層側に配置すべき接地配線層を兼ねている。
更に、平面視において、前記信号配線層Sa,Sbおよび接地配線層G1〜G3と対向して、上層側のセラミック層s1〜s3間および下層側のセラミック層s8〜s10間に、上下層二対(複数)の電源配線層Pa1,Pb1,Pa2,Pb2が、相互に異なるセラミック層s3〜s8,s2〜s9を介して配置されている。
On the other hand, between the ceramic layers s5 and s6 on the upper layer side of the signal wiring layer Sb and between the ceramic layers s7 and s8 on the lower layer side, a pair (a plurality) of ground wiring layers G2 and G3 are opposed to the signal wiring layer Sb. However, they are arranged via the ceramic layers s6 and s7. The ground wiring layer G2 also serves as a ground wiring layer to be disposed on the lower layer side of the signal wiring layer Sa and the upper layer side of the signal wiring layer Sb.
Furthermore, in plan view, two pairs of upper and lower layers are provided between the upper ceramic layers s1 to s3 and the lower ceramic layers s8 to s10 so as to face the signal wiring layers Sa and Sb and the ground wiring layers G1 to G3. A plurality of power supply wiring layers Pa1, Pb1, Pa2, and Pb2 are arranged via ceramic layers s3 to s8 and s2 to s9 that are different from each other.

このうち、前記信号配線層Saの上下に最接近する電源配線層Pa1と電源配線層Pa2とは、セラミック層s3〜s8を厚み方向沿って直線状に配置されたビア導体(接続導体)vを介して相互に導通され、同じ電源回路の一部を構成している。
一方、前記信号配線層Sbの上下に最接近する電源配線層Pb1と電源配線層Pb2とは、前記と異なるセラミック層s2〜s9を厚み方向沿って、図3中の破線で示す直線状に配置された別のビア導体(接続導体)vを介して相互に導通されている。かかる電源配線層Pb1,Pb2は、上記電源配線層Pa1,Pa2を含む電源回路とは異なる電源回路の一部を構成している。
尚、信号配線層Sa,Sb、接地配線層G1〜G3、および電源配線層Pa1,Pb1,Pa2,Pb2は、前記同様の金属材料からなる。
Among these, the power supply wiring layer Pa1 and the power supply wiring layer Pa2 that are closest to the top and bottom of the signal wiring layer Sa include via conductors (connection conductors) v in which the ceramic layers s3 to s8 are linearly arranged along the thickness direction. And are part of the same power supply circuit.
On the other hand, the power supply wiring layer Pb1 and the power supply wiring layer Pb2 that are closest to the top and bottom of the signal wiring layer Sb are arranged in a straight line as shown by broken lines in FIG. Are connected to each other via another via conductor (connection conductor) v. The power supply wiring layers Pb1 and Pb2 constitute part of a power supply circuit different from the power supply circuit including the power supply wiring layers Pa1 and Pa2.
The signal wiring layers Sa and Sb, the ground wiring layers G1 to G3, and the power supply wiring layers Pa1, Pb1, Pa2, and Pb2 are made of the same metal material as described above.

また、セラミック層s8〜s10には、前記信号配線層Sa,Sb、下層側の電源配線層Pa2,Pb2、または最下層の接地配線層G3と接続するビア導体v2,7,8が直線状に貫通している。
更に、図3に示すように、下層側のセラミック層s11〜s15には、上記ビア導体v2,7,8を介して、信号配線層Sa,Sb、下層側の電源配線層Pa2,Pb2、および最下層の接地配線層G3の何れかと、最下層のセラミック層s15の裏面4に形成した複数の外部端子6との間を、直線状にして接続する複数のビア導体(接続導体)Vが配置されている。これらのビア導体Vは、複数の外部端子6ごとのほぼ中心部に接続されている。尚、ビア導体v2,7,8とビア導体Vとは、図示しない接続パッドを介して接続されている。
In addition, via conductors v2, 7, and 8 connected to the signal wiring layers Sa and Sb, the lower power wiring layers Pa2 and Pb2, or the lowermost ground wiring layer G3 are linearly formed on the ceramic layers s8 to s10. It penetrates.
Further, as shown in FIG. 3, the lower ceramic layers s11 to s15 are connected to the signal wiring layers Sa and Sb, the lower power supply wiring layers Pa2 and Pb2, and the lower vias v2, 7, and 8, respectively. A plurality of via conductors (connection conductors) V that connect in a straight line between any one of the lowermost ground wiring layers G3 and the plurality of external terminals 6 formed on the back surface 4 of the lowermost ceramic layer s15 are arranged. Has been. These via conductors V are connected to substantially the center of each of the plurality of external terminals 6. The via conductors v2, 7, and 8 and the via conductor V are connected via connection pads (not shown).

図3で最上層のセラミック層s1の表面3には、複数のパッド5が前記同様に形成され、かかるパッド5は、前記信号配線層Sa,Sb、上層側の電源配線層Pa1,Pb1、および最上層の接地配線層G1の何れかと、ビア導体v1,7,8、および図3中の破線で示すビア導体を介して導通している。
加えて、基板本体2bの表面3に形成された複数のパッド5には、追ってプローブ9が個別に取り付けられ、かかるプローブ9の先端側を、前記同様の電子部品ごとの電極と電気的に接続させることで、検査すべき各電子部品の電気的特性を正確に検出することが可能となる。
In FIG. 3, a plurality of pads 5 are formed in the same manner as described above on the surface 3 of the uppermost ceramic layer s1, and the pads 5 include the signal wiring layers Sa and Sb, the upper power supply wiring layers Pa1 and Pb1, and It is electrically connected to any one of the uppermost ground wiring layers G1 via via conductors v1, 7, 8 and via conductors indicated by broken lines in FIG.
In addition, probes 9 are individually attached to the plurality of pads 5 formed on the surface 3 of the substrate body 2b, and the tip side of the probes 9 is electrically connected to the electrodes for the same electronic components as described above. By doing so, it becomes possible to accurately detect the electrical characteristics of each electronic component to be inspected.

以上のような検査装置用配線基板1bも、前記配線基板1と同様な方法によって製造される。
また、検査装置用配線基板1bも、前記配線基板1と同様なと同様な効果を奏する。更に、複数の電源回路を形成する互いに導通しない電源配線層Pa1,Pa2と電源配線層とPa1,Pb2との2組を、異なる絶縁層を介して対向させつつ配置しているので、例えば、検査すべき電子部品ごとの電気的特性などに応じて、異なる電圧の電流などを平行して送信するなどの電気的に複雑で且つ緻密な検査を行わせることが可能となる。
The wiring board 1b for an inspection apparatus as described above is also manufactured by the same method as that for the wiring board 1.
Further, the inspection apparatus wiring board 1b has the same effects as the wiring board 1. Furthermore, since two sets of the power supply wiring layers Pa1 and Pa2 and the power supply wiring layers Pa1 and Pb2, which form a plurality of power supply circuits, are arranged to face each other through different insulating layers, for example, inspection According to the electrical characteristics of each electronic component to be performed, it is possible to perform an electrically complicated and precise inspection such as transmitting currents of different voltages in parallel.

本発明は、以上において説明した各形態に限定されるものではない。
例えば、本発明に用いる接続導体は、前記ビア導体v,Vなどの形態に限らず、全体がほぼ円筒形を呈し内部に樹脂などが封止されたスルーホール導体の形態としても良い。
また、本発明に用いる絶縁層は、アルミナやAlNなどの高温焼成セラミックからなる前記セラミック層s1などのほか、ガラス−セラミックなどの低温焼成セラミックの一種からなるものや、各種のエポキシ樹脂、あるいはポリイミドなどの耐熱性樹脂からなるものとしても良い。
更に、複数の電源配線層は、互いに導通し合い且つ各組ごとの間では導通しない3組以上とし、基板本体の内部に各々異なる絶縁層を介して形成しても良い。
加えて、前記検査装置用配線基板1,1a,1bにおいて、前記ビア導体Vのみが貫通する下層側のセラミック層を省略し、最下層の電源配線層が表面に形成されるセラミック層の裏面に外部端子を形成した形態としても良い。
The present invention is not limited to the embodiments described above.
For example, the connection conductor used in the present invention is not limited to the form of the via conductors v and V, but may be a form of a through-hole conductor having a substantially cylindrical shape as a whole and sealed with resin or the like inside.
The insulating layer used in the present invention includes the ceramic layer s1 made of high-temperature fired ceramic such as alumina or AlN, or the like, or a kind of low-temperature fired ceramic such as glass-ceramic, various epoxy resins, or polyimide. It is good also as what consists of heat resistant resins, such as.
Furthermore, the plurality of power supply wiring layers may be formed in three or more sets that are electrically connected to each other and that are not electrically connected to each other, and may be formed inside the substrate body via different insulating layers.
In addition, in the inspection apparatus wiring boards 1, 1a, 1b, the lower ceramic layer through which only the via conductor V passes is omitted, and the lowermost power wiring layer is formed on the back surface of the ceramic layer formed on the surface. An external terminal may be formed.

本発明による一形態の検査装置用配線基板を示す断面図。Sectional drawing which shows the wiring board for inspection apparatuses of one form by this invention. 図1の検査装置用配線基板の応用形態の要部を示す断面図。Sectional drawing which shows the principal part of the application form of the wiring board for test | inspection apparatuses of FIG. 異なる形態の検査装置用配線基板の要部を示す断面図。Sectional drawing which shows the principal part of the wiring board for test | inspection apparatuses of a different form.

符号の説明Explanation of symbols

1,1a,1b…………………………………検査装置用配線基板
3…………………………………………………表面
4…………………………………………………裏面
5…………………………………………………パッド
6…………………………………………………外部端子
9…………………………………………………プローブ
v,V……………………………………………ビア導体(接続導体)
s1〜s15……………………………………セラミック層(絶縁層)
S,Sa,Sb…………………………………信号配線層
P1〜P4,Pa1,Pa2,Pb1,Pb2…電源配線層
G1〜G3………………………………………接地配線層
1, 1a, 1b ………………………………… Wiring board for inspection equipment 3 …………………………………………………… Surface 4 …………… …………………………………… Back 5 ………………………………………………… Pad 6 ………………………………… ……………… External terminal 9 ………………………………………………… Probe v, V ……………………………………………… Via Conductor (connection conductor)
s1 to s15 …………………………………… Ceramic layer (insulating layer)
S, Sa, Sb .............................................. signal wiring layers P1 to P4, Pa1, Pa2, Pb1, Pb2 ... power supply wiring layers G1 to G3. ………… Grounding wiring layer

Claims (7)

厚み方向に沿って積層された複数の絶縁層と、
上記複数の絶縁層の間に配置された信号配線層と、
上記複数の絶縁層を介し且つ上記信号配線層と対向して配置され、相互に電気的に導通している複数の電源配線層と、
上記信号配線層に最接近する上下層一対の電源配線層の間を厚み方向に沿って直線状に配置され、上記複数の電源配線層同士を接続する接続導体と、を含む、
ことを特徴とする電子部品検査装置用配線基板。
A plurality of insulating layers stacked along the thickness direction;
A signal wiring layer disposed between the plurality of insulating layers;
A plurality of power supply wiring layers disposed through the plurality of insulating layers and facing the signal wiring layer, and electrically connected to each other;
A connection conductor that is arranged linearly along the thickness direction between the pair of upper and lower power supply wiring layers closest to the signal wiring layer, and that connects the plurality of power supply wiring layers;
A wiring board for an electronic component inspection apparatus.
前記複数の電源配線層は、前記複数の絶縁層の間において平面形状に形成されている、
ことを特徴とする請求項1に記載の電子部品検査装置用配線基板。
The plurality of power supply wiring layers are formed in a planar shape between the plurality of insulating layers.
The wiring board for an electronic component inspection apparatus according to claim 1.
前記複数の絶縁層のうち、最下層の絶縁層の裏面には、最下層の前記電源配線層と導通する接続導体がほぼ中心部に接続する外部端子が形成されている、
ことを特徴とする請求項1または2に記載の電子部品検査装置用配線基板。
Of the plurality of insulating layers, on the back surface of the lowermost insulating layer, an external terminal connected to the central portion of the connecting conductor that is electrically connected to the lowermost power wiring layer is formed.
The wiring board for an electronic component inspection apparatus according to claim 1 or 2.
前記複数の電源配線層とは電気的に導通しない複数の電源配線層が、前記絶縁層とは異なる絶縁層を介して、上記複数の電源配線層に対向して配置されている、
ことを特徴とする請求項1乃至3の何れか一項に記載の電子部品検査装置用配線基板。
A plurality of power supply wiring layers that are not electrically connected to the plurality of power supply wiring layers are arranged to face the plurality of power supply wiring layers via an insulating layer different from the insulating layer.
The wiring board for an electronic component inspection apparatus according to any one of claims 1 to 3.
前記信号配線層は、その上層側および下層側の前記複数の絶縁層の間に配置された複数の接地配線層に挟まれていると共に、
上記複数の接地配線層は、前記電源配線層と上記信号配線層との間に配置されている、
ことを特徴とする請求項1乃至4の何れか一項に記載の電子部品検査装置用配線基板。
The signal wiring layer is sandwiched between a plurality of ground wiring layers disposed between the plurality of insulating layers on the upper layer side and the lower layer side,
The plurality of ground wiring layers are disposed between the power supply wiring layer and the signal wiring layer.
The wiring board for an electronic component inspection apparatus according to any one of claims 1 to 4, wherein:
前記複数の絶縁層のうち、最上層の絶縁層の表面には、前記電源配線層、信号配線層、接地配線層と個別に導通する複数のパッドが形成され、かかるパッド上にはプローブが取り付けられる、
ことを特徴とする請求項1乃至5の何れか一項に記載の電子部品検査装置用配線基板。
Among the plurality of insulating layers, a plurality of pads individually connected to the power wiring layer, the signal wiring layer, and the ground wiring layer are formed on the surface of the uppermost insulating layer, and a probe is attached on the pads. Be
The wiring board for an electronic component inspection apparatus according to any one of claims 1 to 5.
前記複数の絶縁層は、セラミックおよび樹脂の少なくとも一方からなる、
ことを特徴とする請求項1乃至6の何れか一項に記載の電子部品検査装置用配線基板。
The plurality of insulating layers are made of at least one of ceramic and resin.
The wiring board for an electronic component inspection apparatus according to any one of claims 1 to 6.
JP2007265239A 2007-10-11 2007-10-11 Wiring board for electronic component inspection device Pending JP2009092581A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016114170A1 (en) * 2015-01-15 2016-07-21 株式会社村田製作所 Probe card and multilayer wiring board with which said probe card is provided
WO2024135182A1 (en) * 2022-12-21 2024-06-27 株式会社ヨコオ Connection device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016114170A1 (en) * 2015-01-15 2016-07-21 株式会社村田製作所 Probe card and multilayer wiring board with which said probe card is provided
WO2024135182A1 (en) * 2022-12-21 2024-06-27 株式会社ヨコオ Connection device

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