JP2009081192A - Method for fabricating semiconductor optical device and method for growing III-V compound semiconductor crystal - Google Patents

Abstract

A surface of a semiconductor layer grown on a III-V compound semiconductor layer without taking over the surface morphology of the III-V compound semiconductor layer containing at least a group V constituent element and a group III constituent element for N and As. Flatness can be improved.
A in the growth period _t 5 ~t _6, it was fed to the growth reactor 11 to TEGa and TBAs alternately grown GaAs barrier layer GaInNAs layer. Specifically, in the growth of the second III-V compound semiconductor layer 19, at time t _5, and it starts the supply of the gallium source, at time t _51, to stop the supply of the gallium source. Then, it starts the supply of the arsenic starting material at time t _52, to stop the supply of the arsenic starting material at time t _53. The second III-V compound semiconductor layer 19 is grown by repeating the first step of supplying the group V source and the second step of supplying the group III source.
[Selection] Figure 2

Description

  The present invention relates to a method for producing a semiconductor optical device and a method for growing a III-V compound semiconductor crystal.

  Non-Patent Document 1 describes a method of forming a GaInNAs-based multiple quantum well structure. In the GaInNAs-based multiple quantum well structure, in order to avoid a decrease in light emission efficiency from the quantum well structure, the GaAsP layer is replaced with a GaAs barrier layer in order to alleviate the distortion of the quantum well layer instead of the normally grown GaAs barrier layer. Placed inside.

Patent Document 1 describes a method for growing a compound semiconductor crystal. In this crystal growth method, a nitrogen material of a second III-V compound semiconductor containing at least one kind of a group V element other than nitrogen and nitrogen as a group V composition on the first III-V compound semiconductor. An intermediate layer made of a third group III-V compound semiconductor that controls the reactivity with respect to is formed. Thereafter, a second compound semiconductor is subsequently formed. This suppresses nitrogen pileup at the interface when a III- (N, V) group compound semiconductor crystal is grown on a semiconductor substrate.
Jpn. J. Appl. Phys. (2004) Vol.43 pp.L267 JP 2001-185497 A

  When a thin film layer of a III-V compound semiconductor is grown by metal organic vapor phase epitaxy, the supply of the constituent element source gas is switched according to the composition ratio of the III-V compound semiconductor, and the desired composition of III-V V compound semiconductor is grown. An example of a stacked structure in which a plurality of very thin semiconductor layers are stacked is a quantum well structure. In forming this structure, semiconductor layers having different compositions are alternately grown. In the quantum well structure, excellent flatness of the surface of each semiconductor layer and a sharp change in composition at the boundary of the semiconductor layer are required.

  As an example, the growth of a double quantum well structure including a GaAs barrier layer and a GaInNAs well layer will be described. In this growth, TEGa (triethylgallium), TMIn (trimethylindium), TBAs (tertiary butylarsine), and DMHy (dimethylhydrazine) are used as raw materials. A GaAs buffer layer is grown. Thereafter, if necessary, the growth is interrupted, and during this growth interruption, only TBAs are supplied in order to suppress the evaporation of As. Subsequently, a GaInNAs well layer is grown by supplying TEGa, TMIn, TBAs and DMHy simultaneously. After this, if necessary, the growth is interrupted while supplying only TBAs. Next, TEGa and TBAs are supplied to grow a GaAs barrier layer. Thereafter, the growth is interrupted in the same manner, and then the second GaInNAs well layer is grown. If necessary, the growth is interrupted, and then a GaAs cap layer is grown. Thereby, a double quantum well structure is completed. The supply amounts of TEGa and TBAs are changed as necessary.

  However, when a diluted nitrogen-based III-V compound semiconductor typified by GaInNAs is grown, the flatness of the epitaxial surface is impaired at the growth interface where a thin film layer such as a well layer is grown. For this reason, the semiconductor optical device having this quantum well structure does not exhibit good characteristics in the conventional method of switching the gas supply amount.

  The present invention has been made in view of such circumstances, and an object thereof is to provide a method for producing a semiconductor optical device and a method for growing a III-V compound semiconductor crystal. According to these methods, the surface morphology of the III-V compound semiconductor layer containing at least a group V constituent element and a group III constituent element for nitrogen and arsenic can be improved and grown on the III-V compound semiconductor layer. The flatness of the surface of the semiconductor layer to be formed can be improved.

  One aspect of the present invention is a method for fabricating a semiconductor optical device. This method includes (a) supplying a raw material containing at least a group V constituent element and a group III constituent element for nitrogen and arsenic to a growth reactor to grow a first III-V compound semiconductor layer; ) Growing a second III-V compound semiconductor layer in the growth furnace on the first III-V compound semiconductor layer. The step of growing the second III-V compound semiconductor layer includes a first step of supplying one of a group V material and a group III material for the second III-V compound semiconductor layer, A second step of supplying one of the group V material and the group III material for the III-V compound semiconductor layer, and a step of repeating the first step and the second step.

  In the growth of a III-V compound semiconductor layer containing at least a group V constituent element and a group III constituent element for nitrogen and arsenic, three-dimensional growth is likely to occur. Therefore, the flatness of the growth surface of the III-V compound semiconductor layer Is easily damaged. Therefore, when another III-V compound semiconductor layer is continuously grown on this III-V compound semiconductor layer, the surface of the growth surface of the underlying III-V compound semiconductor layer in the growth of the other III-V compound semiconductor layer. The morphology is inherited, and as a result, the flatness of the second III-V compound semiconductor layer is also impaired. However, in the step of growing the second III-V compound semiconductor layer, the supply of the group V raw material for the second III-V compound semiconductor layer and the group III for the second III-V compound semiconductor layer are performed. Since it is alternately repeated with the supply of the raw material, the surface morphology at the growth surface of the first III-V compound semiconductor layer is improved in the growth of the second III-V compound semiconductor layer.

  In a preferred example of the method according to the present invention, the first III-V compound semiconductor layer may be a well layer for a quantum well structure. The influence of the surface form of the well layer on the surface form of the layer on the well layer is reduced. In addition, the second III-V compound semiconductor layer may be a barrier layer for a quantum well structure. The surface form of the barrier layer is not easily affected by the lower layer of the barrier layer.

  The method according to the present invention may include a first interruption step between the first step and the second step in the growth of the second III-V compound semiconductor layer. In the first interruption step, the Group V material and Group III material are not supplied. According to this method, the time for the microphone or the like is provided to the constituent of the source gas supplied to the semiconductor surface in the first step.

  In the method according to the present invention, the growth of the second III-V compound semiconductor layer may include a second interruption step between the second step and the first step. In the second interruption step, according to this method in which the group V raw material and the group III raw material are not supplied, the time for the microphone or the like is reduced to the constituents of the raw material gas supplied to the semiconductor surface in the second step. Provided.

  In the method according to the present invention, molecular beam epitaxy can be used in the growth furnace. Alternatively, in the method according to the present invention, metal organic vapor phase epitaxy can be used in the growth furnace. In this organometallic vapor phase growth method, at least one of a group V hydride and a group V organic compound is used as the group V raw material other than nitrogen. By using at least one of group V hydride and group V organic compound, in the growth of the second III-V compound semiconductor layer, it is possible to take over the surface morphology from the growth surface of the first III-V compound semiconductor layer. Can be reduced.

  In the method according to the present invention, for example, the first III-V compound semiconductor layer may include any one of GaInNAs, GaNAs, GaNPAs, GaInNPAs, GaInNAsSb, GaNAsSb, GaNPAsSb, and GaInNPAsSb.

  In the method according to the present invention, a raw material containing at least group V constituent elements and group III constituent elements for nitrogen and arsenic is supplied to a growth reactor to form a third III-V compound semiconductor layer in the second III-V. A step of growing on the compound semiconductor layer can be further provided. The third III-V compound semiconductor layer is a well layer having the quantum well structure. According to this method, the third III-V compound semiconductor layer can be grown on the second III-V compound semiconductor layer without taking over the surface morphology from the surface of the first III-V compound semiconductor layer.

  The method according to the present invention may further include a step of annealing the first III-V compound semiconductor layer after the quantum well structure is completed. According to this method, the optical properties are improved by annealing.

  Another aspect of the present invention is a method for growing a III-V compound semiconductor crystal. This method is a step of growing a III-V compound semiconductor crystal containing no nitrogen as a group V constituent element on a III-V compound semiconductor layer containing at least a group V constituent element and a group III constituent element for nitrogen and arsenic. Is provided. The step of growing the III-V compound semiconductor crystal includes a first step of supplying one of a group V material and a group III material for the III-V compound semiconductor crystal, and a step of growing the III-V compound semiconductor crystal. A second step of supplying one of the group V raw material and the group III raw material and a step of repeating the first step and the second step.

  In the step of growing the second III-V compound semiconductor layer, supply of the group V raw material for the second III-V compound semiconductor layer, and supply of the group III raw material for the second III-V compound semiconductor layer Since it repeats alternately with supply, in the growth of the second III-V compound semiconductor layer, the surface morphology at the growth surface of the first III-V compound semiconductor layer is improved.

  The above and other objects, features, and advantages of the present invention will become more readily apparent from the following detailed description of preferred embodiments of the present invention, which proceeds with reference to the accompanying drawings.

  As described above, according to the present invention, a method for fabricating a semiconductor optical device and a method for growing a III-V compound semiconductor crystal are provided. According to these methods, a group V configuration for nitrogen and arsenic is provided. The flatness of the surface of the semiconductor layer grown on the III-V compound semiconductor layer can be improved without taking over the surface morphology of the III-V compound semiconductor layer containing at least the element and the group III constituent element.

  The knowledge of the present invention can be easily understood by considering the following detailed description with reference to the accompanying drawings shown as examples. Subsequently, embodiments of the method for producing a semiconductor optical device and the method for growing a III-V compound semiconductor crystal of the present invention will be described with reference to the accompanying drawings. Where possible, the same parts are denoted by the same reference numerals.

  FIG. 1 is a drawing schematically showing a layer structure of an epitaxial wafer in main steps in an embodiment of the present invention. FIG. 2 is a drawing showing a sequence in supplying main raw materials in the embodiment of the present invention. In the exemplified epitaxial crystal growth, a quantum well structure is formed using, for example, a metal organic chemical vapor deposition method. The quantum well structure is a double quantum well structure including a GaAs barrier layer and a GaInNAs well layer. The formation of the double quantum well structure is an exemplification, and a quantum well structure including a number of well layers equal to or greater than this number can be produced in the same manner as in this embodiment. For example, triethylgallium (TEGa), trimethylindium (TMIn), tertiary butylarsine (TBAs), or dimethylhydrazine (DMHy) is used as a raw material.

A substrate 13 is set in the growth furnace 11. The substrate 13 is, for example, a semiconductor substrate. In the following description, a GaAs substrate is used as the semiconductor substrate. Raising the temperature of the growth furnace, it starts supplying the arsenic starting material at time t ₀ in FIG. As shown in FIG. 1A, in order to grow the buffer layer 15 on the main surface 13a of the substrate 13, for example, the temperature of the growth furnace 11 is raised to 600 degrees Celsius. At time t _1, the start of supply of the gallium source in addition to the arsenic starting material. In time t _2, the stopping the supply of the gallium source. Specifically, during the growth period t _{1 to} t ₂ , TEGa and TBAs are supplied to the growth reactor 11 to grow a GaAs buffer layer on the GaAs substrate. The thickness of the GaAs buffer layer is, for example, 200 nm. In the growth interruption period t _{2 to} t ₃ , only the arsenic raw material is supplied without supplying the group III raw material. If necessary, for example, temperature and pressure can be changed.

Next, as shown in FIG. 1B, a raw material containing at least a group V constituent element and a group III constituent element for nitrogen and arsenic is supplied to the growth reactor 11 to supply the first III-V compound semiconductor layer 17. Is grown on the III-V compound semiconductor region 15. The III-V compound semiconductor layer 17 includes at least a group V constituent element and a group III constituent element for nitrogen and arsenic, and is sometimes referred to as a diluted nitrogen-based III-V compound semiconductor. In a preferred example, the first III-V compound semiconductor layer 17 can be a well layer for a quantum well structure. The GaAs layer grown as the buffer layer 15 can be, for example, a barrier layer or a light guide layer for a quantum well structure. In order to grow the first III-V compound semiconductor layer 17 on the main surface 15a of the buffer layer 15, for example, the temperature of the growth reactor 11 is changed to 500 degrees Celsius. At time t _3, in addition to arsenic raw material starts to supply nitrogen source and group III source. Group III materials include gallium materials and indium materials. At time t _4, it stops nitrogen source, the supply of the gallium source and the indium source. Specifically, in the growth period t _{3 to} t ₄ , TEGa, TMIn, DMHy, and TBAs are supplied to the growth reactor 11 to grow a GaInNAs layer on the GaAs layer. The thickness of the GaInNAs layer is, for example, 6 nm. The range of the growth temperature of the GaInNAs layer is, for example, 450 degrees Celsius to 600 degrees Celsius.

  In the present embodiment, for example, the first III-V compound semiconductor layer can include, for example, any one of GaInNAs, GaNAs, GaNPAs, GaInNPAs, GaInNAsSb, GaNAsSb, GaNPAsSb, and GaInNPAsSb.

In the growth interruption period t _{4 to} t ₅ , only the carrier gas is supplied without supplying the arsenic, the nitrogen raw material and the group III raw material. The carrier gas is, for example, hydrogen. If necessary, for example, temperature and pressure can be changed.

As shown in FIG. 1C, the second III-V compound semiconductor layer 19 is subsequently grown on the main surface 17 a of the first III-V compound semiconductor layer 17. In a preferred embodiment, the second III-V compound semiconductor layer 19 can be a barrier layer for a quantum well structure. A period of time t _{5 to} t ₆ is provided to form the barrier layer. In the growth period _t 5 ~t _6, it was fed to the growth reactor 11 to TEGa and TBAs alternately grown GaAs barrier layer GaInNAs layer. The total thickness of the GaAs layer is, for example, 20 nm. The growth temperature range of the GaAs layer is, for example, 400 degrees Celsius to 550 degrees Celsius.

Specifically, in the growth of the second III-V compound semiconductor layer 19, as shown in FIG. 2, at time t _5, and starts the supply of the gallium source, at time t _51, the supply of the gallium source To stop. At time _t 51 _{~t 52,} and supplies only the carrier gas. Then, it starts the supply of the arsenic starting material at time t _52, to stop the supply of the arsenic starting material at time t _53. Subsequently, at time t _54, and it starts the supply of the gallium source, at time t _55, to stop the supply of the gallium source. Similarly, it switches the supply of gas at time _{t 56, t 57, t 58} , t 59, t 61, t 6. As described above, the first step of supplying one of the group V raw material and the group III raw material for the second III-V compound semiconductor layer 19, and the V for the second III-V compound semiconductor layer 19 are provided. The second III-V compound semiconductor layer 19 is grown by repeating the second step of supplying one of the group III material and the group III material. In the present embodiment, the second III-V compound semiconductor layer 19 is not grown by continuous raw material supply. Such a raw material can be supplied by switching a valve of the growth furnace.

  In general, in the growth of a diluted nitrogen-based III-V compound semiconductor layer (for example, the GaInNAs layer in this embodiment), three-dimensional growth is likely to occur. Therefore, the flatness of the diluted nitrogen-based III-V compound semiconductor surface is easily impaired. . Therefore, when a semiconductor layer made of another III-V compound semiconductor, for example, a barrier layer, is grown on the underlying well layer made of a diluted nitrogen-based III-V compound semiconductor by continuous material supply, the underlying layer is grown in the growth of the barrier layer. The surface morphology at the surface of the well layer is inherited, and as a result, the flatness of the barrier layer is also impaired.

  However, when the second III-V compound semiconductor layer 19 is grown, supply of a group V raw material for the second III-V compound semiconductor layer 19 and for the second III-V compound semiconductor layer 19 are performed. Thus, the surface morphology of the growth surface of the first III-V compound semiconductor layer 17 is improved in the growth of the second III-V compound semiconductor layer.

In growth interruption period t ₆ ~t _7, without supplying arsenic raw material, a nitrogen source and group III source, to supply only the carrier gas. An arsenic feed may be added. If necessary, the temperature, pressure, etc. can be changed during this period.

Next, as shown in FIG. 1D, a raw material containing at least a group V constituent element and a group III constituent element for nitrogen and arsenic is supplied to the growth reactor 11, and the third III-V compound semiconductor layer is supplied. 21 is grown on the main surface 19 a of the second III-V compound semiconductor layer 19. According to this method, the third III-V compound semiconductor layer 21 is placed on the second III-V compound semiconductor layer 19 without taking over the surface morphology from the surface 17 a of the first III-V compound semiconductor layer 17. Can grow into. The third III-V compound semiconductor layer 21 contains at least a group V constituent element and a group III constituent element for nitrogen and arsenic, and is sometimes called a diluted nitrogen-based III-V compound semiconductor. In a preferred example, the third III-V compound semiconductor layer 21 can be a well layer for a quantum well structure. At time t _7, in addition to arsenic raw material starts to supply nitrogen source and group III source. Group III materials include gallium materials and indium materials. At time t _8, it stops nitrogen source, the supply of the gallium source and the indium source. Specifically, in the growth period _{t 7 ~t 8, TEGa, TMIn} , were fed to the growth reactor 11 to DMHy and TBAs, growing a GaInNAs layer on a GaAs barrier layer. The thickness of the GaInNAs layer is, for example, 6 nm.

  In the present embodiment, the third III-V compound semiconductor layer 21 can include, for example, any of GaInNAs, GNAs, GaNPAs, GaInNPAs, GaInNAsSb, GaNAsSb, GaNPAsSb, and GaInNPAsSb.

In growth interruption period t ₈ ~t _9, without supplying nitrogen source and group III source, supplies only arsenic raw material. If necessary, the temperature, pressure, etc. can be changed during this period.

  When the additional well layer and the barrier layer are grown, similarly to the growth of the III-V compound semiconductor layer 19 shown in FIG. 1B and FIG. A III-V compound semiconductor layer is grown.

When an additional well layer is not grown, a cap layer 23 made of a III-V compound semiconductor is then formed on the main surface 21a of the third III-V compound semiconductor layer 21 as shown in FIG. grow up. In a suitable example, the cap layer 23 can be a barrier layer or a light guide layer for a quantum well structure. In order to grow the cap layer on the well layer, for example, the temperature of the growth furnace 11 is raised to 600 degrees Celsius. At time t _9, in addition to arsenic raw material starts supply of the gallium raw material. At time _{t 10,} to stop the supply of the gallium raw materials. Specifically, the growth period _t 9 _{~t 10,} by supplying TEGa and TBAs into the growth reactor 11 to grow an GaAs layer on the GaInNAs well layer. The thickness of this GaAs layer is, for example, 100 nm.

If necessary, further crystal growth can be performed after this. In the growth interruption period t _{10 to} t ₁₁ , only the arsenic raw material is supplied without supplying the nitrogen raw material and the group III raw material. In this embodiment, the temperature of the growth furnace 11 is lowered. After the temperature of the growth furnace 11 is sufficiently lowered, the epitaxial substrate E1 is taken out from the growth furnace 11.

  After the quantum well structure is completed, the first and third III-V compound semiconductor layers 17 and 21 can be annealed. The annealing temperature is, for example, 650 degrees Celsius. According to this method, optical characteristics are improved by annealing.

  The following items are technical items applied to bring out the effects of the present invention. However, as shown in FIG. 2, it is necessary to arrange a process for interrupting the supply of raw materials between the alternating supply of raw materials. . By this step, it is possible to prevent unintended overlap of raw material supply.

  For example, in the growth of the second III-V compound semiconductor layer 19, a first interruption step is performed between the first step (for example, step S1 in FIG. 2) and the second step (for example, step S2 in FIG. 2). (For example, step S3 in FIG. 2) needs to be included. This time is preferably 5 seconds or more, for example. At this time, the raw material supplied in the first step is swept away from the growth furnace, and the constituents of the raw material gas supplied to the semiconductor surface in the first step are micronized. Further, this time is preferably 60 seconds or less, for example. This is because if the growth interruption time longer than necessary is provided, the components supplied to the surface are detached from the surface.

In the growth of the second III-V compound semiconductor layer 19, the second growth interruption is performed between the second step (for example, step S2 in FIG. 2) and the first step (for example, step S1 in FIG. 2). It is necessary to include a step (for example, step S4 in FIG. 2).
At this time, the raw material supplied in the first step is swept away from the growth furnace, and the constituents of the raw material gas supplied to the semiconductor surface in the first step are micronized. Further, this time is preferably 60 seconds or less, for example. This is because if the growth interruption time longer than necessary is provided, the components supplied to the surface are detached from the surface.

  Only the first interruption step can be incorporated into the growth sequence. Alternatively, only the second interruption step can be incorporated into the growth sequence.

In this embodiment of the present invention, at the time of crystal growth by metal organic vapor phase epitaxy, at least one of group V hydrides and group V organic compounds is used as the group V raw material other than nitrogen. Even when at least one of Group V hydride and Group V organic compound is used, surface morphology is inherited from the surface of the underlying diluted nitrogen III-V compound semiconductor layer in the growth of the diluted nitrogen III-V compound semiconductor layer. Can be reduced. For example, arsine (AsH ₃ ) may be used without being limited to TBAs as an arsenic raw material.

(Example)
In the metalorganic vapor phase epitaxy, a multiple quantum well structure was fabricated. In preliminary experiments, after growing a GaInNAs well layer, the following steps were performed:
(1) First source purge period of 5 seconds (2) Group III source supply period of 5 seconds (TEGa supply)
(3) Second material purge period of 5 seconds (4) Group V material supply period of 5 seconds (TBAs supplied)
By performing these four steps, GaAs having a thickness of 0.28 nm was grown.

  Based on this preliminary experiment, a multi-quantum well structure was grown using the raw material supply sequence of the embodiment of the present invention, and a photoluminescence (PL) spectrum in the quantum well structure was measured.

  For comparison, a quantum well structure having a similar structure was fabricated using the sequence shown in FIG. The manufacturing sequence will be briefly described with reference to FIG.

A GaAs substrate is set in the growth furnace 11. It starts supplying the arsenic starting material at time s ₀ in FIG. In the growth period s _{1 to} s ₂ , TEGa and TBAs are supplied to the growth reactor 11 and a GaAs buffer layer is grown on the GaAs substrate as in the embodiment. The thickness of the GaAs buffer layer is, for example, 200 nm. In the growth interruption period s _{2 to} s ₃ , only the arsenic raw material is supplied without supplying the group III raw material. In the growth periods s _{3 to} s ₄ , TEGa, TMIn, DMHy, and TBAs are supplied to the growth reactor 11 to grow a GaInNAs layer on the GaAs buffer layer. The thickness of the GaInNAs layer is, for example, about 6 nm. In the growth interruption period s _{4 to} s ₅ , only the arsenic raw material is supplied without supplying the nitrogen raw material and the group III raw material. Subsequently, in the growth period s _{5 to} s ₆ , TEGa and TBAs are simultaneously supplied to the growth reactor 11 to grow a GaAs barrier layer on the GaInNAs layer. The thickness of the GaAs layer is, for example, 20 nm. In the growth interruption period s _{6 to} s ₇ , only the arsenic raw material is supplied without supplying the nitrogen raw material and the group III raw material. Next, in the growth periods s _{7 to} s ₈ , TEGa, TMIn, DMHy, and TBAs are supplied to the growth reactor 11 to grow a GaInNAs layer on the GaAs barrier layer. The thickness of the GaInNAs layer is, for example, 6 nm. In the growth interruption period s _{8 to} s ₉ , only the arsenic raw material is supplied without supplying the nitrogen raw material and the group III raw material. Thereafter, in the growth periods s _{9 to} s ₁₀ , TEGa and TBAs are supplied to the growth reactor 11 to grow a GaAs layer on the GaInNAs well layer. The thickness of this GaAs layer is, for example, 100 nm. In the growth interruption period s _{10 to} s ₁₁ , only the arsenic raw material is supplied without supplying the nitrogen raw material and the group III raw material. After the temperature of the growth furnace 11 is sufficiently lowered, the epitaxial substrate is taken out from the growth furnace 11.

The quantum well structure according to the present embodiment and the comparative experiment includes the following layers formed on a GaAs substrate:
GaAs buffer layer: 200 nm
GaInNAs well layer: 6 nm
GaAs barrier layer: 20 nm
GaInNAs well layer: 6 nm
GaAs cap layer: 100 nm.

FIG. 4 is a drawing showing the relationship between the PL spectrum intensity of a quantum well structure and the number of well layers included in the quantum well structure. Characteristic line C _A indicates the characteristics of the quantum well structure according to the present embodiment. Characteristic line C _B shows the characteristics of the quantum well structure for comparison.
Number of well layers Characteristic line C _A Characteristic line C _B
1 well layer: 1, 1
2 well layers: 1.87, 0.95
3 well layers: 2.75, 0.8
Is a concrete value.

Compared with the characteristics of C _B according to the characteristic line C _A according to this embodiment to the comparative experiment, the characteristic line C _A indicates the following. Even when the number of well layers is increased, the light emission efficiency is not deteriorated, and the light emission intensity increases in proportion to the increase in the number of well layers. That is, the crystallinity of the second or higher GaInNAs well layer is maintained. This characteristic diagram shows that good PL emission characteristics can be obtained for a multiple quantum well structure including two and three well layers. From these results, it is considered that the same effect can be obtained even in a multiple quantum well structure including the number of well layers of 4 or more.

  As described above, according to the present embodiment, it is possible to form a multiple quantum well structure in which the light emission efficiency does not decrease even when the number of well layers increases.

On the other hand, the characteristic line C _B indicates the following. When the raw material supply sequence for the comparative experiment was used, the PL intensity gradually decreased with the increase in the number of well layers although the increase in the light emission efficiency was expected by increasing the number of well layers.

  Diluted nitrogen-based III-V compound semiconductor crystals such as GaInNAs are likely to grow three-dimensionally during epitaxial growth, and the flatness of the GaInNAs surface is inferior to the flatness of the surface of the GaAs crystal. Therefore, the underlying semiconductor layer (that is, the barrier layer) of the second and subsequent GaInNAs well layers inherits the flatness of the first GaInNAs well layer as it is. The second and subsequent GaInNAs well layers are grown on a barrier layer having poor flatness. For this reason, it has been clarified that the crystallinity of the second and subsequent GaInNAs well layers is impaired.

  In this embodiment, when growing a well layer and a barrier layer sandwiched between well layers, atomic layer epitaxy (ALE) or migration enhanced epitaxy (MEE) in which raw materials are alternately supplied and grown is employed. . In the growth by ALE (or MEE), the surface non-planarity generated by the growth of the GaInNAs layer is recovered. By alternately supplying the group III material and the group V material, the migration at the surface is promoted, and the surface roughness generated by the GaInNAs growth is flattened. Thereby, the second and subsequent GaInNAs well layers are also grown on the base barrier layer having good flatness. As described above, according to the growth method of the barrier layer according to the present embodiment, the surface roughness generated by the GaInNAs growth is recovered by the growth of the GaAs barrier layer, and as a result, the surface of the GaAs barrier layer is flattened. Therefore, even if the well layer is repeatedly grown, the surface flatness of the underlying barrier layer is equally good. A grown semiconductor layer (eg, a GaAs barrier layer) that alternately supplies raw materials reduces the influence of the morphology of the underlying GaInNAs layer surface. In addition, the growth semiconductor layer in which the raw materials are alternately supplied provides a good crystal surface for subsequent growth without taking over the surface form of the base of the semiconductor layer.

  FIG. 5 is a drawing showing main steps in a method of manufacturing a semiconductor light emitting element such as a semiconductor laser. In step S101, a Si-doped GaAs substrate is prepared. For the crystal growth, a metal organic chemical vapor deposition (MOVPE) method is used. TEGa is used as the Ga source gas. TMAl (trimethylaluminum) is used as the Al source gas. TMIn is used as the In source gas. TBAs is used as the As source gas. DMHy is used as the N source gas. If necessary, an n-type GaAs buffer layer having a thickness of 200 nm is grown on the GaAs substrate. In step S103, an n-type AlGaAs cladding layer having a thickness of 1.5 μm is grown on the GaAs buffer layer. In step S105, an active layer was grown on the AlGaAs cladding layer. Specifically, an undoped GaAs guide layer having a thickness of 140 nm is grown in step S105-1, and an undoped GaInNAs well layer having a thickness of 7 nm is grown in step S105-2. In step S105-3, an undoped GaAs barrier layer having a thickness of 8 nm is grown. This growth is performed by alternately supplying raw materials according to the present embodiment. In step S105-4, an undoped GaInNAs well layer having a thickness of 7 nm is grown, and in step S105-5, an undoped GaAs guide layer having a thickness of 140 nm is grown. In step S107, a p-type AlGaAs cladding layer having a thickness of 1.5 μm is grown on the active layer. In step S109, a p-type GaAs contact layer is grown on the AlGaAs cladding layer. If necessary, in step S111, annealing is performed for 20 minutes while supplying tertiary butylarsine in a metal organic chemical vapor deposition reactor. The annealing temperature is 650 degrees Celsius. In step S113, an anode electrode and a cathode electrode are formed. In this manner, a light emitting diode and a semiconductor laser can be manufactured.

  Moreover, although the growth of the GaInNAs well layer by the metal organic vapor phase epitaxy has been described, the same effect can be obtained in the growth using the molecular beam epitaxy (MBE) method. In the MBE method, for example, metal gallium can be used as the Ga material, metal indium can be used as the In material, nitrogen radicals can be used as the nitrogen material, and metal arsenic can be used as the As material.

  As described above, according to the present embodiment, the III-V compound semiconductor layer in the semiconductor stack including the III-V compound semiconductor layer containing at least the group V constituent element and the group III constituent element for nitrogen and arsenic The flatness at the interface between the adjacent semiconductor layers can be improved.

  Further, according to the present embodiment, the surface form of the III-V compound semiconductor layer including at least the group V constituent element and the group III constituent element for nitrogen and arsenic is not inherited on the III-V compound semiconductor layer. The flatness of the surface of the grown semiconductor layer can be improved.

  While the principles of the invention have been illustrated and described in the preferred embodiments, it will be appreciated by those skilled in the art that the invention can be modified in arrangement and detail without departing from such principles. The present invention is not limited to the specific configuration disclosed in the present embodiment. In this embodiment, a semiconductor optical device such as a semiconductor laser or a light emitting diode is described. However, the semiconductor optical device is not limited to this, and may be a semiconductor sensor, a solar cell, or the like. We therefore claim all modifications and changes that come within the scope and spirit of the following claims.

FIG. 1 is a drawing schematically showing a layer structure of an epitaxial wafer in main steps in an embodiment of the present invention. FIG. 2 is a drawing showing a sequence in main raw material supply in the embodiment of the present invention. FIG. 3 is a diagram showing a sequence in main raw material supply for a comparative experiment. FIG. 4 is a drawing showing the relationship between the PL spectrum intensity of a quantum well structure and the number of well layers included in the quantum well structure. FIG. 5 is a drawing showing main steps in a method of manufacturing a semiconductor light emitting element such as a semiconductor laser.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 ... Growth furnace, 13 ... Substrate, 13a ... Main surface of substrate, 15 ... Buffer layer, 17 ... First III-V compound semiconductor layer, 19 ... Second III-V compound semiconductor layer, 21 ... Third III-V compound semiconductor layer, 23 ... cap layer

Claims (10)

A method for producing a semiconductor optical device, comprising:
Supplying a raw material containing at least a group V constituent element and a group III constituent element for nitrogen and arsenic to a growth reactor to grow a first III-V compound semiconductor layer;
Growing a second III-V compound semiconductor layer in the growth furnace on the first III-V compound semiconductor layer,
The step of growing the second III-V compound semiconductor layer includes:
A first step of supplying one of a group V material and a group III material for the second III-V compound semiconductor layer;
A second step of supplying one of a group V material and a group III material for the second III-V compound semiconductor layer;
And repeating the first step and the second step. The first III-V compound semiconductor layer is a well layer for a quantum well structure;
The method according to claim 1, wherein the second III-V compound semiconductor layer is a barrier layer for a quantum well structure.   The method according to claim 2, further comprising annealing the first III-V compound semiconductor layer after the quantum well structure is completed.   A raw material containing at least a group V constituent element and a group III constituent element for nitrogen and arsenic is supplied to a growth reactor to grow a third III-V compound semiconductor layer on the second III-V compound semiconductor layer. The method according to any one of claims 1 to 3, further comprising a step. The growth of the second III-V compound semiconductor layer includes a first interruption step between the first step and the second step,
5. The method according to claim 1, wherein in the first interruption step, the group V material and the group III material are not supplied. The growth of the second III-V compound semiconductor layer includes a second interruption step between the second step and the first step,
6. The method according to claim 1, wherein in the second interruption step, the group V raw material and the group III raw material are not supplied.   The method according to any one of claims 1 to 6, wherein a metal organic vapor phase epitaxy is used in the growth furnace.   The method according to any one of claims 1 to 7, wherein at least one of a group V hydride and a group V organic compound is used as the group V raw material other than nitrogen.   The first III-V compound semiconductor layer includes any one of GaInNAs, GNAs, GaNPAs, GaInNPAs, GaInNAsSb, GANASSb, GaNPAsSb, and GaInNPAsSb. The method described in. A method for growing a III-V compound semiconductor crystal, comprising:
A step of growing a III-V compound semiconductor crystal containing no nitrogen as a group V constituent element on a III-V compound semiconductor layer containing at least a group V constituent element and a group III constituent element for nitrogen and arsenic;
The step of growing the III-V compound semiconductor crystal comprises:
A first step of supplying one of a group V material and a group III material for the III-V compound semiconductor crystal;
A second step of supplying one of a group V material and a group III material for the III-V compound semiconductor crystal;
And repeating the first step and the second step.

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