JP2009070873A - Compound semiconductor substrate - Google Patents

Abstract

Disclosed is a compound semiconductor substrate capable of suppressing the occurrence of cracks, crystal defects, and the like in a nitride semiconductor single crystal layer and improving the crystallinity of the nitride semiconductor single crystal layer.
A metal formed on a Si single crystal substrate 100 whose crystal plane orientation is a {111} plane and composed of a 3C-SiC single crystal layer 110a and any one of TiC, TiN, VC, and VN. The compound layers 110b are stacked on each other in this order, and the uppermost layer α includes the first intermediate layer 110 formed of either the 3C—SiC single crystal layer 110a or the metal compound layer 110b.
[Selection] Figure 1

Description

  The present invention relates to a compound semiconductor substrate suitably used for a light emitting device or an electronic device.

  Nitride semiconductors typified by gallium nitride (GaN) and aluminum nitride (AlN) have excellent characteristics such as high electron mobility and high heat resistance, enabling light-emitting devices and high-speed, high-temperature operation. Application to various electronic devices is expected.

  Conventionally, sapphire, silicon (Si), zinc oxide (ZnO), or the like is used as a substrate on which such a nitride semiconductor is formed. Among these substrates, the Si single crystal substrate is preferably used because it has excellent crystallinity, a large area, high purity, and low cost compared to other substrates. Moreover, since the subsequent device process can use the current device process as it is by using the Si single crystal substrate, it is advantageous in terms of development cost, and its practical use is required.

  However, when the thermal expansion coefficients of the Si single crystal substrate and the nitride semiconductor are compared, the nitride semiconductor has a value nearly twice as high, and tensile stress is generated in the nitride semiconductor single crystal layer. Cracks occur. Furthermore, crystal defects are caused due to the difference in crystal lattice constant between Si and the nitride semiconductor. Therefore, a technique for forming a nitride semiconductor single crystal layer on an Si single crystal substrate via an intermediate layer made of 3C-SiC or AlN is known (for example, Patent Document 1).

However, there is a limit to the suppression of the above-described generation of cracks, crystal defects, etc. even through the intermediate layer. Therefore, there has been a limit to forming a thick nitride semiconductor single crystal layer (for example, 1 μm or more).
Further, improving the crystallinity of the nitride semiconductor single crystal layer is a very important factor. The improvement of the crystallinity of the layer improves the light emission efficiency and the luminance in the light emitting device, and improves the device characteristics in the electronic device. In order to improve the crystallinity of the nitride semiconductor single crystal layer, it can be achieved by increasing the film thickness. However, when the nitride semiconductor single crystal layer is thickened, it becomes more difficult to suppress the above-described cracks, crystal defects, and the like.

In providing a nitride-based light emitting device having high luminous efficiency, low operating voltage, and excellent heat dissipation capability, a metal, oxide, or nitride on a substrate containing sapphire, silicon, zinc oxide, or gallium arsenide. , A seed material layer made of carbide, etc., a multifunctional substrate containing Al—O, Al—N, Al—N—O, etc., a good quality Group 3 element and nitrogen, and a temperature of 600 ° C. or less. And a low temperature buffer layer grown in an atmosphere of hydrogen and ammonia gas, and a n-type upper portion of a single crystal nitride multilayer thin film or a nitride low temperature buffer layer grown in a reducing atmosphere such as high temperature of 1000 ° C. and hydrogen and ammonia gas A nitride-based light emitting device is proposed that includes a light-emitting structure for a light-emitting device in which a nitride-based cladding layer, a nitride-based active layer, and a p-type nitride-based cladding layer are sequentially stacked (for example, , Patent Document 2).
JP 2006-216576 A JP 2007-53373 A

However, although the invention described in Patent Document 2 prevents mechanical and thermal deformation and decomposition generated from the upper part of the substrate, it suppresses the generation of cracks and crystal defects, and the nitride semiconductor single crystal layer It is not intended to improve the crystallinity of.
In Patent Document 2, there is a limit to the suppression of cracks, crystal defects, and the like of the nitride semiconductor single crystal layer in that various materials can be applied to the seed material layer and the multifunctional substrate.

  Therefore, the present invention has been made to solve the above technical problem, and suppresses the occurrence of cracks, crystal defects, and the like in the nitride semiconductor single crystal layer, and the nitride semiconductor single crystal layer. An object of the present invention is to provide a compound semiconductor substrate capable of improving the crystallinity.

The compound semiconductor substrate according to the present invention is formed on a Si single crystal substrate whose crystal plane orientation is {111} plane, and is composed of a 3C—SiC single crystal layer and any one of TiC, TiN, VC, and VN. And a first intermediate layer in which the uppermost layer is formed of either the 3C-SiC single crystal layer or the metal compound layer, and the first intermediate layer on the first intermediate layer. A second intermediate layer formed of In _W Ga _x Al _1-wx N single crystal (0 ≦ w <1, 0 ≦ x <1, w + x <1), and on the second intermediate layer is formed, comprising: the _{in y Ga z Al 1-yz} N single crystal (0 ≦ y <1,0 ≦ z <1, y + z <1) nitride was formed of a semiconductor single crystal layer, the And
With such a configuration, it is possible to suppress the occurrence of cracks, crystal defects, and the like of the nitride semiconductor single crystal layer, and to improve the crystallinity of the nitride semiconductor single crystal layer.

The uppermost layer is preferably the metal compound layer.
With such a configuration, when this compound semiconductor substrate is applied as a light emitting device, light emission efficiency and luminance can be improved.
More preferably, the metal compound layer is made of either TiC or VC.
With such a configuration, when this compound semiconductor substrate is applied as a light emitting device, the light emission efficiency and the luminance can be further improved.

The compound semiconductor substrate according to the present invention is formed on a Si single crystal substrate whose crystal plane orientation is {111} plane, and is any one of 3C-SiC single crystal layer, TiC, TiN, VC, and VN. And a second metal compound layer composed of any one of TiC, TiN, VC, and VN different from the first metal compound layer in this order. A first intermediate layer in which the uppermost layer is one of the 3C-SiC single crystal layer, the first metal compound layer, and the second metal compound layer, and the first intermediate layer. A second intermediate layer formed of In _W Ga _x Al _1-wx N single crystal (0 ≦ w <1, 0 ≦ x <1, w + x <1), and on the second intermediate layer It is formed _{on, in y Ga z Al 1-} yz N single crystal (0 ≦ y <1,0 ≦ z <1, y + z 1) and the nitride semiconductor single crystal layer composed of, characterized by comprising a.
With such a configuration, it is possible to suppress the occurrence of cracks, crystal defects, and the like of the nitride semiconductor single crystal layer, and to improve the crystallinity of the nitride semiconductor single crystal layer.

The uppermost layer is preferably either the first metal compound layer or the second metal compound layer.
With such a configuration, when this compound semiconductor substrate is applied as a light emitting device, light emission efficiency and luminance can be improved.

More preferably, the first metal compound layer or the second metal compound layer is composed of either TiC or VC.
With such a configuration, when this compound semiconductor substrate is applied as a light emitting device, the light emission efficiency and the luminance can be further improved.

  The present invention provides a compound semiconductor substrate capable of suppressing the occurrence of cracks, crystal defects and the like in a nitride semiconductor single crystal layer and improving the crystallinity of the nitride semiconductor single crystal layer. .

Embodiments of a compound semiconductor substrate according to the present invention will be described in detail with reference to the drawings.
(First embodiment)
1 and 2 are sectional views showing a compound semiconductor substrate according to a first embodiment of the present invention.
As shown in FIG. 1 or FIG. 2, the compound semiconductor substrate according to the present embodiment includes a first intermediate layer 110, a second intermediate layer 120, a compound semiconductor single crystal layer 130 on a Si single crystal substrate 100. Are sequentially stacked.

  As the Si single crystal substrate 100, a substrate whose surface crystal plane orientation is the {111} plane is used. Here, the plane orientation {111} includes a crystal plane orientation {111} fine tilt (about tens of degrees) or a crystal plane orientation of a higher-order plane index such as {211}. As described above, by setting the crystal plane orientation of the surface of the Si single crystal substrate 100 to {111}, the occurrence of anti-phase boundary defects is reduced, and the electric field concentration on the defects can be reduced.

The Si single crystal substrate 100 is preferably manufactured by a CZ (Czochralski) method, but the present invention is not limited to this, and is manufactured by an FZ (floating zone) method. Or an Si single crystal layer formed by vapor phase growth on a Si single crystal substrate manufactured using these methods can be used.
As the Si single crystal substrate 100, for example, a carrier concentration of 10 ¹⁶ to 10 ²¹ / cm ³ (resistivity of about 1 to 0.00001 Ωcm) and a conductive n-type substrate are used.

As shown in FIG. 1 or FIG. 2, the first intermediate layer 110 includes a 3C-SiC single crystal layer 110a and a metal compound layer 110b stacked in this order, and the uppermost layer α is a 3C-SiC single crystal layer. 110a (FIG. 2) or metal compound layer 110b (FIG. 1).
That is, when the first intermediate layer 110 according to the present embodiment counts each of the 3C—SiC layer 110a and the metal compound layer 110b as one layer, as shown in FIG. 1, the 3C—SiC single crystal layer 110a, FIG. 2 shows a stacked structure of even-numbered layers (the uppermost layer α in contact with the second intermediate layer 120 is the metal compound layer 110b) in which the metal compound layers 110b are alternately and continuously stacked in this order. As shown, the 3C-SiC single crystal layer 110a and the metal compound layer 110b are alternately and successively stacked in this order, and the odd-numbered layer not including 1 (the uppermost layer α in contact with the second intermediate layer 120 is It includes both stacked structures of 3C-SiC single crystal layer 110a).

In other words, when each of the 3C-SiC single crystal layer 110a and the metal compound layer 110b is counted as one layer, the concept includes “a stacked structure of at least three layers”, and the 3C-SiC single crystal layer 110a, The first intermediate layer 110 composed of only two layers each formed with the metal compound layer 110b is excluded.
The 3C—SiC single crystal layer 110a is composed of a hexagonal 3C—SiC single crystal.
The 3C—SiC single crystal layer 110a preferably has a thickness of 1 nm to 100 nm.

If the thickness of the 3C—SiC single crystal layer 110a is less than 1 nm, it cannot function as one layer of the first intermediate layer 110 formed by stacking different materials. On the other hand, if the film thickness exceeds 100 nm, the above-described distortion or cracking occurs from the own layer, which is not preferable.
As the 3C—SiC single crystal layer 110a, for example, a carrier concentration of 10 ¹⁵ to 10 ²⁰ / cm ³ and a conductivity type n type is used.

The metal compound layer 110b is made of any one of titanium carbide (TiC), titanium nitride (TiN), vanadium carbide (VC), and vanadium nitride (VN).
Conventionally, as a metal compound that can be used for an intermediate layer of a compound semiconductor substrate, as shown in Patent Document 2 described above, Ti, Si, W, Co, Ni, Mo, Sc, Mg, Ge, Cu, Be, Examples thereof include oxides such as Zr, Fe, Al, Cr, Nb, Y, and V, nitrides, and carbides. However, normally, as described in Patent Document 1 described above, 3C-SiC is suitably used as a material having a thermal expansion coefficient and crystal lattice constant close to those of Si and capable of stacking GaN and AlN on the upper layer. It has been. TiC, TiN, VC, and VN all have thermal expansion coefficients and crystal lattice constants close to 3C-SiC, and there is no problem in terms of differences in thermal expansion coefficients and crystal lattice constants. .

The metal compound layer 110b preferably has a thickness of 1 nm to 50 nm.
When the thickness of the metal compound layer 110b is less than 1 nm, the metal compound layer 110b cannot function as one layer of the first intermediate layer 110 formed by stacking different materials. On the other hand, if the film thickness exceeds 50 nm, the above-described distortion or cracking occurs from the own layer, which is not preferable.

The second intermediate layer 120 is formed on the first intermediate layer 110, more specifically, on the uppermost layer α of the first intermediate layer 110, and an In _W Ga _x Al _1-wx N single crystal (0 ≦ w < 1, 0 ≦ x <1, w + x <1).
The thickness of the second intermediate layer 120 is preferably in the range of 1 to 200 nm. If the film thickness is less than 1 nm, the layer is too thin to function as an intermediate layer. Further, if the film thickness exceeds 200 nm, the above-described cracks and the like are generated from the own layer, which is not preferable.

Nitride semiconductor single crystal layer 130 is formed on the second intermediate layer 120, formed of _{In y Ga z Al 1-yz} N single crystal (0 ≦ y <1,0 ≦ z <1, y + z <1) ing.
_{Incidentally, In W Ga x Al 1-} wx N single crystal of the second intermediate layer 120 is AlN (w = 0, x = 0), the nitride semiconductor single-crystal layer 130 In _y Ga _z Al _{1- The yz} N single crystal is preferably GaN (y = 0, z = 1). This is because the lattice constants of AlN and GaN are 3.112Å (a-axis conversion) and 3.18Å, and the lattice mismatch is small. Generation of crystal defects (misfit dislocation defects) can be reduced.

  The first intermediate layer 110, the second intermediate layer 120, and the nitride semiconductor single crystal layer 130 are formed by, for example, a CVD method such as MOCVD (metal organic chemical vapor deposition) or PECVD (plasma enhanced chemical vapor deposition), or a laser. It can be formed by an evaporation method using a beam, a sputtering method using an atmospheric gas, or the like. In the present invention, the MOCVD method is used.

  As described above, the compound semiconductor substrate according to the present embodiment includes a 3C-SiC single crystal layer and a metal compound layer composed of any one of TiC, TiN, VC, and VN stacked in this order. The uppermost layer includes a first intermediate layer composed of either a 3C—SiC single crystal layer or a metal compound layer.

  Since the lattice constant of TiC, TiN, VC, and VN constituting the metal compound layer 110b of the first intermediate layer 110 is smaller than that of 3C-SiC, the crystal lattice of TiC, TiN, VC, and VN is lateral. (The γ direction in FIGS. 1 and 2) tries to spread (tensile stress), and conversely, the 3C—SiC crystal lattice tends to shrink in the lateral direction γ. That is, compressive stress acts on the 3C—SiC single crystal layer 110a. Further, TiC, TiN, VC, and VN have a larger thermal expansion coefficient, and a compressive stress is applied to the 3C—SiC single crystal layer 110a. The compressive stress of the 3C—SiC single crystal layer 110a relaxes the tensile stress of the second intermediate layer 120, and thus the nitride semiconductor single crystal 130, which is an upper layer. Therefore, with such a configuration, the occurrence of cracks, crystal defects, and the like in nitride semiconductor single crystal layer 130 can be suppressed.

In addition, with the first intermediate layer 110 having such a structure, the 3C-SiC single crystal layer 110a can be accumulated and formed thick in the first intermediate layer 110. For this reason, the crystallinity of the 3C—SiC single crystal layer 110a can be improved, and accordingly, the crystallinity of the second intermediate layer 120 as an upper layer, and thus the nitride semiconductor single crystal layer 130 is also improved. be able to.
Therefore, the compound semiconductor substrate according to the present embodiment can improve the crystallinity of the nitride semiconductor single crystal layer 130 without increasing the thickness of the nitride semiconductor single crystal layer 130.

The uppermost layer α is preferably the metal compound layer 110b.
More preferably, the metal compound layer 110b is preferably made of either TiC or VC.
Usually, when a compound semiconductor substrate having a Si single crystal as a substrate according to the present embodiment is used as a light emitting device, a known light emitting structure is formed on the Si single crystal substrate (not shown).

In the case of such a configuration, the direction in which light is emitted as the light emitting device is the stacking direction of the compound semiconductor substrate (β direction in FIGS. 1 and 2). However, the light emitted from the light emitting structure is emitted not only in the light emitting direction (stacking direction β) but also in the direction opposite to the light emitting direction (that is, the direction opposite to the stacking direction β).
In this case, in order to increase luminous efficiency as a light emitting device, usually, a reflective layer that reflects light traveling in the opposite direction in the light emitting direction (stacking direction β) is provided as a lower layer of the light emitting structure, that is, a compound It is preferable to provide in the laminated structure of the semiconductor substrate.

Note that a metal compound layer composed of any one of TiC, TiN, VC, and VN has a higher function (reflectance) as a reflective layer than a layer composed of 3C—SiC. This is because TiC, TiN, VC, and VN are metal compounds, whereas 3C-SiC has a band gap of 2.2 eV and absorbs visible light. Of TiC, TiN, VC, and VN, TiC and VC have a higher function (reflectance) as a reflective layer than TiN and VN.
Therefore, at least the uppermost layer α of the first intermediate layer 110 that is in contact with the second intermediate layer 120 as a reflective layer is made of any one metal compound of TiC, TiN, VC, and VN, and more preferably TiC and VC. By comprising any one metal compound, when this compound semiconductor substrate is applied as a light emitting device, the light emission efficiency and the luminance can be further improved.

In addition, since the compound semiconductor substrate according to the present embodiment includes the first intermediate layer 110 as described above, the nitride semiconductor single crystal layer 130 is limited to the extent that cracks, crystal defects, and the like do not occur. It can also be formed thick. Forming the nitride semiconductor single crystal 130 thick can further improve the crystallinity of its own layer.
In the present embodiment, the number of stacked first intermediate layers 110 is designed and changed as appropriate depending on the thicknesses of the second intermediate layer 120 and the nitride semiconductor single crystal 130. The thickness of the nitride semiconductor single crystal layer 130 at the limit at which cracks, crystal defects, etc. do not occur is the number of stacked first intermediate layers 110, the second intermediate layer 120, and the nitride semiconductor single crystal. Although it cannot be generally defined because of the 130 thickness relationship, the film thickness can be increased to about 8.0 μm at the maximum.

(Second Embodiment)
3 to 5 are sectional views showing a compound semiconductor substrate according to the second embodiment of the present invention.
The compound semiconductor substrate according to the present embodiment has a configuration in which the metal compound layer 110b in the first embodiment is replaced with a first metal compound layer 110b1 and a second metal compound layer 110b2. Since other configurations are the same as those of the first embodiment, description thereof is omitted.

  That is, the first intermediate layer 110 according to the present embodiment includes a 3C—SiC single crystal layer 110a, a first metal compound layer 110b1, and a second metal compound layer 110b2, as shown in FIGS. Are stacked in this order, and the uppermost layer is any of the 3C—SiC single crystal layer 110a (FIG. 5), the first metal compound layer 110b1 (FIG. 4), and the second metal compound layer 110b2 (FIG. 3). It is made up of.

  Specifically, the first intermediate layer 110 according to the present embodiment is shown in FIG. 3 when the 3C—SiC layer 110a, the first metal compound layer 110b1, and the second metal compound layer 110b2 are counted as one layer. As described above, the 3C-SiC single crystal layer 110a, the first metal compound layer 110b1, and the second metal compound layer 110b2 are alternately stacked in this order, and the 3n layer not including 3 (n = 2), 3) (the uppermost layer α in contact with the second intermediate layer 120 is the second metal compound layer 110b2), and as shown in FIG. 4, the 3C—SiC single crystal layer 110a, The first metal compound layer 110b1 and the second metal compound layer 110b2 are 3n−1 layers (n = 2, 3,...) Not including 2 in which the first metal compound layer 110b2 and the second metal compound layer 110b2 are alternately and continuously stacked in this order. The top that touches the middle layer 120 α is a stacked structure of the first metal compound layer 110b1), and as shown in FIG. 5, the 3C-SiC single crystal layer 110a, the first metal compound layer 110b1, and the second metal compound layer 110b2 3n-2 layers (n = 2, 3,...) That do not include 1 stacked alternately and successively in order (the uppermost layer α in contact with the second intermediate layer 120 is a 3C—SiC single crystal layer 110a) Both of the laminated structures are included.

In other words, when the 3C—SiC layer 110a, the first metal compound layer 110b1, and the second metal compound layer 110b2 are counted as one layer, this concept includes “a stacked structure of at least four layers” The first intermediate layer 110 composed of only three layers each including the 3C-SiC layer 110a, the first metal compound layer 110b1, and the second metal compound layer 110b2 is excluded.
The first metal compound layer 110b1 and the second metal compound layer 110b2 are each composed of any one of titanium carbide (TiC), titanium nitride (TiN), vanadium carbide (VC), and vanadium nitride (VN). ing.

  Conventionally, as a metal compound that can be used for an intermediate layer of a compound semiconductor substrate, as shown in Patent Document 2 described above, Ti, Si, W, Co, Ni, Mo, Sc, Mg, Ge, Cu, Be, Examples thereof include oxides such as Zr, Fe, Al, Cr, Nb, Y, and V, nitrides, and carbides. However, normally, as described in Patent Document 1 described above, 3C-SiC is suitably used as a material having a thermal expansion coefficient and crystal lattice constant close to those of Si and capable of stacking GaN and AlN on the upper layer. It has been. TiC, TiN, VC, and VN all have thermal expansion coefficients and crystal lattice constants close to 3C-SiC, and there is no problem in terms of differences in thermal expansion coefficients and crystal lattice constants. .

The first metal compound layer 110b1 and the second metal compound layer 110b2 are composed of different metal compounds.
In addition, when the lamination | stacking of the 1st metal compound layer 110b1 and the 2nd metal compound layer 110b2 is comprised with the same metal compound, since it becomes the structure by which the layer of the same metal compound becomes thick film, self This is not preferable because cracks and the like are generated from the layer.
As described above, the combination of the first metal compound layer 110b1 and the second metal compound layer 110b2 is preferably TiC-VC, TiC-VN, TiN-VC, or TiN-VC.

The first metal compound layer 110b1 and the second metal compound layer 110b2 preferably have a film thickness of 1 nm to 50 nm.
If the film thickness of the first metal compound layer 110b1 and the second metal compound layer 110b2 is less than 1 nm, it cannot function as one layer of the first intermediate layer 110 formed by stacking different metal compounds. On the other hand, if the film thickness exceeds 50 nm, the above-described distortion or cracking occurs from the own layer, which is not preferable.

  Since the lattice constants of TiC, TiN, VC, and VN constituting the first metal compound layer 110b1 and the second metal compound 110b2 of the first intermediate layer 110 are smaller than those of 3C-SiC, TiC, TiN, VC, The crystal lattice of VN tends to expand in the lateral direction (γ direction in FIGS. 3 to 5) (tensile stress), and conversely, the crystal lattice of 3C—SiC tends to shrink in the lateral direction γ. That is, compressive stress acts on the 3C—SiC single crystal layer 110a. Further, TiC, TiN, VC, and VN have a larger thermal expansion coefficient, and a compressive stress is applied to the 3C—SiC single crystal layer 110a.

In the present embodiment, compared to the first embodiment, the metal compound layer that causes the compressive stress to be added to the 3C-SiC single crystal layer 110a is provided in two layers compared to the first embodiment. Therefore, compressive stress is further applied to the 3C—SiC single crystal layer 110a.
The compressive stress of the 3C—SiC single crystal layer 110a relaxes the tensile stress of the second intermediate layer 120, and thus the nitride semiconductor single crystal 130, which is an upper layer. Therefore, with such a configuration, the occurrence of cracks, crystal defects, and the like in nitride semiconductor single crystal layer 130 can be suppressed.

  In addition, with the first intermediate layer 110 having such a structure, the 3C-SiC single crystal layer 110a can be accumulated and formed thick in the first intermediate layer 110. For this reason, the crystallinity of the 3C—SiC single crystal layer 110a can be improved, and accordingly, the crystallinity of the second intermediate layer 120 as an upper layer, and thus the nitride semiconductor single crystal layer 130 is also improved. be able to.

The uppermost layer α is preferably either the first metal compound layer 110b1 (FIG. 4) or the second metal compound layer 110b2 (FIG. 3).
More preferably, the first metal compound layer 110b1 or the second metal compound layer 110b2 is preferably composed of either TiC or VC.
Usually, when a compound semiconductor substrate having a Si single crystal as a substrate according to the present embodiment is used as a light emitting device, a known light emitting structure is formed on the Si single crystal substrate (not shown).

In the case of such a configuration, the direction in which light is emitted as the light emitting device is the stacking direction of the compound semiconductor substrate (the β direction in FIGS. 3 to 5). However, the light emitted from the light emitting structure is emitted not only in the light emitting direction (stacking direction β) but also in the direction opposite to the light emitting direction (that is, the direction opposite to the stacking direction β).
In this case, in order to increase luminous efficiency as a light emitting device, usually, a reflective layer that reflects light traveling in the opposite direction in the light emitting direction (stacking direction β) is formed as a lower layer of the light emitting structure, that is, a compound. It is preferable to provide in the laminated structure of the semiconductor substrate.

  Note that a metal compound layer composed of any one of TiC, TiN, VC, and VN has a higher function (reflectance) as a reflective layer than a layer composed of 3C—SiC. This is because TiC, TiN, VC, and VN are metal compounds, whereas 3C-SiC has a band gap of 2.2 eV and absorbs visible light. Of TiC, TiN, VC, and VN, TiC and VC have a higher function (reflectance) as a reflective layer than TiN and VN.

  Therefore, the uppermost layer α of at least the first intermediate layer 110 that is in contact with the second intermediate layer 120 as the reflective layer is more preferably the first metal compound layer 110b1 or the second metal compound layer 110b2. Since the first metal compound layer 110b1 or the second metal compound layer 110b2 is composed of either TiC or VC, when this compound semiconductor substrate is applied as a light emitting device, the light emission efficiency and the luminance are further improved. Can be made.

  In addition, since the compound semiconductor substrate according to the present embodiment includes the first intermediate layer 110 as described above, the nitride semiconductor single crystal layer 130 is limited to the extent that cracks, crystal defects, and the like do not occur. It can also be formed thick. Forming the nitride semiconductor single crystal 130 thick can further improve the crystallinity of its own layer.

  In the present embodiment, the number of stacked first intermediate layers 110 is designed and changed as appropriate depending on the thicknesses of the second intermediate layer 120 and the nitride semiconductor single crystal 130. The thickness of the nitride semiconductor single crystal layer 130 at the limit at which cracks, crystal defects, etc. do not occur is the number of stacked first intermediate layers 110, the second intermediate layer 120, and the nitride semiconductor single crystal. Although it cannot be generally defined because of the 130 thickness relationship, the film thickness can be increased to about 8.0 μm at the maximum.

EXAMPLES Hereinafter, although this invention is demonstrated further more concretely based on an Example, this invention is not restrict | limited by the following Example.
[Example 1]
The compound semiconductor substrate (FIG. 1) described in the embodiment was manufactured by the following method.
Crystal surface orientation {111}, carrier concentration 10 ¹⁸ / cm ³ , conductivity type n-type, 500 μm thick Si single crystal substrate 100 manufactured by CZ method is heat-treated at 1000 ° C. in a hydrogen atmosphere. Was cleaned.

  Next, propane is supplied, the substrate temperature is set to 1150 ° C., and the surface of the Si single crystal substrate 100 is carbonized. Then, propane and silane are supplied, and then a 3C—SiC single crystal layer 110a having a thickness of 20 nm is formed. On the 3C—SiC single crystal layer 110a, titanium tetrachloride and propane were supplied at the same substrate temperature to form a TiC layer having a thickness of 20 nm as the metal compound layer 110b. These formations were repeated to form a first intermediate layer 110 in which 50 layers were stacked, a total of 100 layers. The uppermost layer α when formed is a TiC layer.

Next, a hexagonal AlN layer having a thickness of 5 nm was formed as the second intermediate layer 120 on the first intermediate layer 110 by using trimethylaluminum and ammonia as source gases and a substrate temperature of 1100 ° C.
Further, trimethylgallium and ammonia were used as source gases, the substrate temperature was set to 1000 ° C., and a hexagonal GaN single crystal layer having a thickness of 5 μm was formed as the compound semiconductor single crystal layer 130 on the second intermediate layer 120. .

The thicknesses of the first intermediate layer 110, the second intermediate layer 120, and the compound semiconductor layer 130 were adjusted by the flow rate of the source gas and the heat treatment time.
The surface of the compound semiconductor single crystal layer 130 of the compound semiconductor substrate manufactured by the above method was analyzed by X-ray to confirm the occurrence of cracks, crystal defects, and the like.
As a result, almost no cracks were observed. Crystal defects were suppressed below 10 ⁸ / cm ² .

[Example 2]
As the metal compound layer 110b, a VC layer having a thickness of 5 nm was formed. The VC layer was formed by setting the substrate temperature of the Si single crystal substrate 100 to 1150 ° C. and supplying biscyclopentadienyl vanadium and propane. Others were performed in the same manner as in Example 1. That is, the uppermost layer α when formed is a VC layer.
The surface of the compound semiconductor single crystal layer 130 of the compound semiconductor substrate manufactured by the above method was analyzed by X-ray to confirm the occurrence of cracks, crystal defects, and the like.
As a result, almost no cracks were observed. Crystal defects were suppressed below 10 ⁸ / cm ² .

[Example 3]
A TiN layer having a thickness of 10 nm was formed as the metal compound layer 110b. The TiN layer was formed by setting the substrate temperature of the Si single crystal substrate 100 to 1150 ° C. and supplying titanium tetrachloride and ammonia. Others were performed in the same manner as in Example 1. That is, the uppermost layer when formed is a TiN layer.
The surface of the compound semiconductor single crystal layer 130 of the compound semiconductor substrate manufactured by the above method was analyzed by X-ray to confirm the occurrence of cracks, crystal defects, and the like.
As a result, almost no cracks were observed. Crystal defects were suppressed below 10 ⁸ / cm ² .

[Example 4]
A VN layer having a thickness of 5 nm was formed as the metal compound layer 110b. The VN layer was formed by setting the substrate temperature of the Si single crystal substrate 100 to 1150 ° C. and supplying biscyclopentadienyl vanadium and ammonia. Others were performed in the same manner as in Example 1. That is, the uppermost layer when formed is the VN layer.
The surface of the compound semiconductor single crystal layer 130 of the compound semiconductor substrate manufactured by the above method was analyzed by X-ray to confirm the occurrence of cracks, crystal defects, and the like.
As a result, almost no cracks were observed. Crystal defects were suppressed below 10 ⁸ / cm ² .

[Example 5]
A compound semiconductor substrate was produced in the same manner as in Example 1. However, the first intermediate layer 110 was 99 layers, and the 100th metal compound layer 110b was not formed. That is, the uppermost layer α when formed is a 3C—SiC layer.
The surface of the compound semiconductor single crystal layer 130 of the compound semiconductor substrate manufactured by the above method was analyzed by X-ray to confirm the occurrence of cracks, crystal defects, and the like.
As a result, almost no cracks were observed. Crystal defects were suppressed below 10 ⁸ / cm ² .

[Comparative Example 1]
A compound semiconductor substrate was produced in the same manner as in Example 1. However, the 1st intermediate | middle layer 110 made only 3 layers each of the 3C-SiC single crystal layer 110a and the metal compound layer 110b, and performed it by the total 2 layers.
The surface of the compound semiconductor single crystal layer 130 of the compound semiconductor substrate manufactured by the above method was analyzed by X-ray to confirm the occurrence of cracks, crystal defects, and the like.
As a result, generation of cracks was observed on the entire surface. A crystal defect of about 10 ¹¹ / cm ^{2 was} recognized.

[Example 6]
The compound semiconductor substrate (FIG. 3) described in the embodiment was manufactured by the following method.
Crystal surface orientation {111}, carrier concentration 10 ¹⁸ / cm ³ , conductivity type n-type, 500 μm thick Si single crystal substrate 100 manufactured by CZ method is heat-treated at 1000 ° C. in a hydrogen atmosphere. Was cleaned.

  Next, propane is supplied, the substrate temperature is set to 1150 ° C., and the surface of the Si single crystal substrate 100 is carbonized. Then, propane and silane are supplied, and then a 3C—SiC single crystal layer 110a having a thickness of 20 nm is formed. On the 3C—SiC single crystal layer 110a, the substrate temperature of the Si single crystal substrate 100 is set to 1150 ° C., titanium tetrachloride and propane are supplied, and a TiC layer having a thickness of 20 nm is formed as the first metal compound layer 110b1. Further, subsequently, biscyclopentadienyl vanadium and propane were supplied onto the first metal compound layer 110b1 to form a VC layer having a thickness of 5 nm as the second metal compound layer 110b2. These formations were repeated to form the first intermediate layer 110 in which 33 layers were stacked in total, 99 layers in total. Other conditions were the same as in Example 1.

The surface of the compound semiconductor single crystal layer 130 of the compound semiconductor substrate manufactured by the above method was analyzed by X-ray to confirm the occurrence of cracks, crystal defects, and the like.
As a result, almost no cracks were observed. Crystal defects were suppressed below 10 ⁸ / cm ² .

[Comparative Example 2]
A compound semiconductor substrate was produced in the same manner as in Example 6. However, the first metal compound layer 110b1 and the second metal compound layer 110b2 were each composed of a TiC layer.
The surface of the compound semiconductor single crystal layer 130 of the compound semiconductor substrate manufactured by the above method was analyzed by X-ray to confirm the occurrence of cracks, crystal defects, and the like.
As a result, cracks and crystal defects were almost the same, although improved compared to Comparative Example 1.

[Comparative Example 3]
A compound semiconductor substrate was produced in the same manner as in Example 6. However, the first intermediate layer 110 was formed in a total of three layers, with the 3C—SiC single crystal layer 110a, the first metal compound layer 110b1, and the second metal compound layer 110b2 each having only one layer.
The surface of the compound semiconductor single crystal layer 130 of the compound semiconductor substrate manufactured by the above method was analyzed by X-ray to confirm the occurrence of cracks, crystal defects, and the like.
As a result, cracks were observed on the entire surface. Crystal defects were confirmed to be approximately 10 ¹¹ / cm ² .

[Examples of light emitting devices]
Using the compound semiconductor substrates manufactured in Examples 1 to 5, a light emitting structure having a known structure was formed on the surface, and the luminance (cd / mm ² ) was evaluated. The results are shown in Table 1. In addition, Table 1 shows the contrast when Example 5 is 1.0.

  As shown in Table 1, the brightness is improved in Examples 3 and 4 in which TiN and VN are configured, compared to Example 5 in which the uppermost layer α is configured with 3C—SiC. In addition, better brightness is observed in Examples 1 and 2 in which the uppermost layer α is made of TiC and VC than in Examples 3 and 4 in which the uppermost layer α is made of TiN and VN.

1 is a cross-sectional view showing a compound semiconductor substrate according to a first embodiment of the present invention. 1 is a cross-sectional view showing a compound semiconductor substrate according to a first embodiment of the present invention. It is sectional drawing which shows the compound semiconductor substrate which concerns on the 2nd Embodiment of this invention. It is sectional drawing which shows the compound semiconductor substrate which concerns on the 2nd Embodiment of this invention. It is sectional drawing which shows the compound semiconductor substrate which concerns on the 2nd Embodiment of this invention.

Explanation of symbols

100 Si single crystal substrate 110 First intermediate layer 110a 3C-SiC single crystal layer 110b Metal compound layer 110b1 First metal compound layer 110b2 Second metal compound layer 120 Second intermediate layer 130 Compound semiconductor single crystal layer

Claims (6)

A 3C-SiC single crystal layer formed on a Si single crystal substrate whose crystal plane orientation is {111} plane and a metal compound layer composed of any one of TiC, TiN, VC, and VN are in this order. A first intermediate layer composed of one of the 3C-SiC single crystal layer and the metal compound layer,
A second intermediate layer formed on the first intermediate layer and composed of In _W Ga _x Al _1-wx N single crystal (0 ≦ w <1, 0 ≦ x <1, w + x <1);
Is formed on the second intermediate layer, and the _{In y Ga z Al 1-yz} N single crystal (0 ≦ y <1,0 ≦ z <1, y + z <1) nitride was formed of a semiconductor single crystal layer A compound semiconductor substrate comprising:   The compound semiconductor substrate according to claim 1, wherein the uppermost layer is the metal compound layer.   The compound semiconductor substrate according to claim 2, wherein the metal compound layer is made of either TiC or VC. A 3C-SiC single crystal layer formed on a Si single crystal substrate whose crystal plane orientation is {111} plane, and a first metal compound layer composed of any one of TiC, TiN, VC, and VN; A second metal compound layer composed of any one of TiC, TiN, VC, and VN different from the first metal compound layer is stacked on each other in this order, and the uppermost layer is the 3C-SiC single crystal. A first intermediate layer composed of any one of a layer, the first metal compound layer, and the second metal compound layer;
A second intermediate layer formed on the first intermediate layer and composed of In _W Ga _x Al _1-wx N single crystal (0 ≦ w <1, 0 ≦ x <1, w + x <1);
Is formed on the second intermediate layer, and the _{In y Ga z Al 1-yz} N single crystal (0 ≦ y <1,0 ≦ z <1, y + z <1) nitride was formed of a semiconductor single crystal layer A compound semiconductor substrate comprising:   5. The compound semiconductor substrate according to claim 4, wherein the uppermost layer is either the first metal compound layer or the second metal compound layer.   6. The compound semiconductor substrate according to claim 5, wherein the first metal compound layer or the second metal compound layer is composed of either TiC or VC.

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