JP2009044067A - Semiconductor light emitting element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor light emitting element which maintains a high polarization ratio. <P>SOLUTION: The semiconductor light emitting element includes a substrate 2 and an active layer 12 which has a nonpolar or semi-polar surface as a growth principal surface 12a and is made of a group III nitride semiconductor, and has a light emission portion 3 which emits polarized light from the active layer 12, and side end surfaces 1a are mirror planes. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a semiconductor light emitting device including an active layer made of a group III nitride semiconductor.

  Conventionally, a semiconductor light emitting device made of a group III nitride semiconductor has been used for a light emitting diode (LED). Examples of group III nitride semiconductors include aluminum nitride (AlN), gallium nitride (GaN), and indium nitride (InN). A typical group III nitride semiconductor is represented by AlxInyGa1-x-yN (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1). Gallium nitride (GaN) is a well-known group III nitride semiconductor among hexagonal compound semiconductors containing nitrogen.

A semiconductor light emitting device using GaN generally has a structure in which an n-type GaN layer, an active layer (light emitting layer), and a p-type GaN layer are stacked on a GaN substrate, and outputs light generated in the active layer to the outside. . In recent years, use of a light-emitting element in which output light is deflected light has been promoted (for example, see Non-Patent Document 1). If a semiconductor light emitting element that outputs polarized light is used as a liquid crystal backlight or projector light source, it is expected that the light component cut by the polarizing plate is reduced, and the efficiency of the liquid crystal backlight or projector light source is improved.
T. Takeuchi, et al., “Japanese Journal of Applied Physics vol.39”, 2000, p. 413-416

  In a group III nitride semiconductor light emitting device having a nonpolar plane or a semipolar plane as a main surface, polarized light is emitted. In a conventional semiconductor light emitting device, the roughened rough surface has a larger light extraction effect, so that the lateral end surface formed in the chip is not a mirror surface, and the rough surface is extracted by irregular reflection. There was a problem of disturbing the polarization direction by using light as random light.

  In view of the above problems, an object of the present invention is to provide a semiconductor light emitting device that maintains a high polarization ratio.

  According to one aspect of the present invention, a substrate and an active layer formed on a surface of the substrate and made of a group III nitride semiconductor having a nonpolar plane or a semipolar plane as a main growth surface, and deflected light from the active layer And a light emitting part for generating the active layer, wherein the lateral end surface of the active layer is a mirror surface.

  According to the present invention, it is possible to provide a semiconductor light emitting device that maintains a high polarization ratio.

  Embodiments of the present invention will be described below with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between the thickness and the planar dimensions, the ratio of the thickness of each layer, and the like are different from the actual ones. Therefore, specific thicknesses and dimensions should be determined in consideration of the following description. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings.

(First embodiment)
As shown in FIG. 1, the semiconductor light emitting device according to the first embodiment of the present invention is provided on the substrate 2 and the surface 2a of the substrate 2, and the nonpolar or semipolar surface is the growth main surface 12a. It has an active layer 12 made of a group III nitride semiconductor, and includes a light emitting unit 3 that generates polarized light from the active layer 12, and the lateral end face 1a is a mirror surface. The lateral end surface 1 a is configured by a surface adjacent to the surface 2 a of the substrate 2 and the surface 3 a of the light emitting unit 3. Here, the “mirror surface” is a surface in which the difference in surface irregularities is equal to or less than the wavelength of light emitted from the active layer 12. Furthermore, the semiconductor light emitting device according to the first embodiment includes a first electrode portion (anode electrode) 4 and a second electrode (cathode electrode) 6.

  The substrate 2 has a hexagonal crystal structure and is made of conductive n-type GaN doped with silicon as an n-type dopant. It is preferable that the board | substrate 2 is the thickness which can be cleaved in a manufacturing process. Specifically, the substrate 2 preferably has a thickness of about 100 μm or less. Moreover, the surface which comprises the horizontal end surface 1a adjacent to the surface 2a among the surfaces of the board | substrate 2 is a mirror surface. As an example, the surface constituting the lateral end surface 1a adjacent to the surface 2a among the surfaces of the substrate 2 is mirror-finished so that the unevenness difference is about 100 nm or less.

  The surface 2 a of the substrate 2 is a surface for epitaxially growing the light emitting portion 3. The surface 2a of the substrate 2 is an m-plane that is a nonpolar plane.

  Here, a hexagonal crystal structure of a group III nitride semiconductor such as GaN will be described with reference to FIG.

  As shown in FIG. 2A, in a group III nitride semiconductor having a hexagonal crystal structure, four nitrogen atoms are bonded to one group III atom. Four nitrogen atoms are arranged at four vertices of a regular tetrahedron having a group III atom arranged at the center. Of these four nitrogen atoms, one nitrogen atom is arranged in the + c axis direction with respect to the group III atom, and the other three nitrogen atoms are arranged on the −c axis side with respect to the group III atom. Thereby, in the hexagonal group III nitride semiconductor, polarization is formed along the c-axis direction.

  As shown in FIG. 2B, the c-axis is along the direction of the central axis of the hexagonal column, and the surface (the top surface of the hexagonal column) having the c-axis as a normal line is the c-plane (0001). When a group III nitride semiconductor crystal is cleaved on two planes parallel to the c plane, the + c plane becomes a crystal plane on which group III atoms are arranged, and the -c plane becomes a crystal plane on which nitrogen is arranged. Therefore, the + c plane and the −c plane are polar planes having different properties.

  A side surface of the hexagonal column is an m-plane (1-100), and a plane passing through a pair of ridge lines that are not adjacent to each other is an a-plane (11-20). Since these are crystal planes adjacent to the c-plane and are orthogonal to the polarization direction, they are nonpolar planes, that is, nonpolar planes. Furthermore, as shown in FIG. 2 (c), the crystal plane that is inclined with respect to the c-plane (not parallel or orthogonal) crosses the polarization direction obliquely, and therefore has a slight polarity. It is a certain plane, that is, a semipolar plane. Specific examples of the semipolar plane include planes such as (10-11) plane, (10-13) plane, and (11-22) plane.

  The light emitting portion 3 is formed by epitaxially growing a group III nitride semiconductor having a hexagonal crystal structure on the surface 2 a of the substrate 2. The light emitting unit 3 includes, in order from the substrate 2 side, a first semiconductor layer (n-type contact layer) 11, an active layer 12, a final barrier layer 13, a p-type electron blocking layer 14, and a second semiconductor layer (p-type). Contact layer) 15 is laminated. Here, as described above, since the surface 2a of the substrate 2 is composed of m-planes, the surface 3a of the light emitting section 3 and the growth main surface 12a of the active layer 12 stacked on the surface 2a of the substrate 2 are also active. The layer 12 is configured as an m-plane that is a nonpolar plane that emits polarized light.

The first semiconductor layer 11 is made of an n-type GaN layer having a thickness of about 3 μm or more doped with silicon having a concentration of about 1 × 10 ¹⁸ cm ⁻³ as an n-type dopant.

The active layer 12 has a quantum well structure in which an In _Z Ga ₁ -Z N layer having a thickness of about 3 nm doped with silicon and a GaN layer having a thickness of about 9 nm are alternately stacked for five periods. The active layer 12 emits blue light (for example, a wavelength of about 430 nm). Here, Z, which is the ratio of In to Ga in the In _Z Ga _1-Z N layer, is configured as “0.05 ≦ Z ≦ 0.2”. When green light is emitted, “Z ≧ 0.2” is set.

  The final barrier layer 13 is composed of a GaN layer having a thickness of about 40 nm. The doping may be any of p-type, n-type, and non-doped, but non-doped is preferred.

The p-type electron blocking layer 14 is made of an AlGaN layer having a thickness of about 28 nm doped with magnesium having a concentration of about 3 × 10 ¹⁹ cm ⁻³ as a p-type dopant.

The second semiconductor layer 15 is made of a p-type GaN layer having a thickness of about 70 nm doped with magnesium having a concentration of about 1 × 10 ²⁰ cm ⁻³ as a p-type dopant. The light extraction surface 15 a of the second semiconductor layer 15 is for extracting light emitted from the active layer 12 from the light emitting unit 3. The surface of the light extraction surface 15a is preferably a mirror surface so that the unevenness is about 100 nm or less in order to suppress light scattering and suppress a decrease in the polarization ratio. The light extraction surface 15a and the surface 3a of the light emitting unit 3 are the same surface.

  The first electrode portion 4 is made of ZnO that can transmit light. The first electrode unit 4 is ohmically connected to the second semiconductor layer 15 and is arranged on the second semiconductor layer 15 in order to allow a current to flow uniformly in the entire region in the horizontal direction (direction perpendicular to the stacking direction) of the light emitting unit 3. Is formed so as to cover substantially the entire surface. The first electrode portion 4 has a thickness of about 200 nm to about 300 nm that can transmit the light emitted by the active layer 12. The light extraction surface 4a of the first electrode unit 4 is a surface from which light emitted by the active layer 12 is extracted, and the surface unevenness is about 100 nm or less, like the light extraction surface 15a of the second semiconductor layer 15. It is preferable that the mirror surface treatment is performed. For example, if the electron beam evaporation method is used, the mirror surface as described above can be obtained. In this way, light emitted from the active layer 12 is suppressed by the light extraction surface 15a and the light extraction surface 4a in the mirror surface state, and thus the light is extracted while maintaining a high polarization ratio. A connection portion 5 in which a titanium (Ti) layer and an Au layer are stacked is provided in a partial region on the first electrode portion 4.

  The second electrode 6 is formed by laminating a Ti layer and an aluminum (Al) layer. The second electrode 6 is formed in an ohmic connection with the exposed region of the upper surface of the first semiconductor layer 11.

  Next, the operation of the semiconductor light emitting element according to the first embodiment described above will be described. In this semiconductor light emitting device, when a voltage is applied in the forward direction, holes are supplied from the first electrode portion 4 and electrons are supplied from the second electrode 6. Then, electrons are injected into the active layer 12 through the first semiconductor layer 11, and holes are injected into the active layer 12 through the semiconductor layers 13 to 15. The electrons and holes injected into the active layer 12 are combined to emit light of about 430 nm. Here, since the surface 3a of the light emitting portion 3 is an m-plane which is a nonpolar plane, the light emitted from the active layer 12 is polarized.

  Of the light emitted from the active layer 12, the light traveling toward the first electrode unit 4 is transmitted through the first electrode unit 4 and irradiated to the outside. In addition, light that travels toward the substrate 2 among the light emitted from the active layer 12 passes through the first semiconductor layer 11 and the substrate 2 and reaches the back surface 2 b of the substrate 2. Here, a part of the light is reflected in the direction of the first electrode portion 4 by the back surface 2b of the substrate 2, and a part of the light is transmitted through the back surface 2b and irradiated to the outside. Of the light emitted from the active layer 12, the light traveling to the lateral end surface 1a is irradiated from the lateral end surface 1a to the outside. The light radiated to the outside from the lateral end surface 1a is a mirror surface with the lateral end surface 1a being mirror-finished, so that it is possible to maintain the polarization state by suppressing irregular reflection by the rough surface. Can be taken out.

  Hereinafter, a method for manufacturing the semiconductor light emitting device according to the first embodiment will be described with reference to FIG.

  First, a substrate 2 made of a single crystal of GaN and having a surface 2a of non-polar m-plane and a thickness of about 300 μm is prepared. Here, after the substrate 2 having the m-plane as the surface 2a is first cut out from a GaN single crystal having the c-plane as the main surface, the orientation error with respect to both the (0001) direction and the (11-20) direction is ± 1. It is manufactured by polishing by a chemical mechanical polishing method (CMP method) so that it is within ± (preferably within ± 0.3 °). As a result, the substrate 2 can be obtained in which the m-plane is the surface 2a, crystal defects such as dislocations and stacking faults are small, and the unevenness of the surface 2a is suppressed to the atomic level.

  Next, the light emitting portion 3 is epitaxially grown on the surface 2a of the substrate 2 described above by metal organic chemical vapor deposition (MOCVD). Specifically, the substrate 2 is introduced into a processing chamber of an MOCVD apparatus (not shown) and placed on a susceptor that can be heated and rotated. Note that the atmosphere in the processing chamber is exhausted so that the processing chamber is 1/10 atm to normal pressure.

Next, in order to suppress the roughness of the surface 2 a of the substrate 2, the temperature of the substrate 2 is raised to about 1000 ° C. to about 1100 ° C. while supplying ammonia gas with a carrier gas (H ₂ gas) into the processing chamber. . Here, since the substrate 2 has a thickness of about 300 μm, the deformation of the substrate 2 due to the above-described temperature is suppressed.

  Next, ammonia gas, trimethylgallium (TMG) gas, and silane are supplied to the processing chamber by a carrier gas, and the first semiconductor layer 11 made of an n-type GaN layer doped with silicon is epitaxially grown on the surface 2 a of the substrate 2. .

  Next, after the temperature of the substrate 2 is set to about 700 ° C. to about 800 ° C., the active layer 12 is formed on the first semiconductor layer 11. Specifically, ammonia gas and TMG gas are supplied into the processing chamber by a carrier gas, and a barrier layer (not shown) made of a non-doped GaN layer is epitaxially grown. In addition, a well layer (illustrated) consisting of an n-type InGaN layer doped with silicon by supplying ammonia gas, TMG gas, trimethylindium (TMI) gas, and silane gas with a carrier gas while keeping the substrate 2 at the same temperature. Abbreviation) is epitaxially grown. Then, the active layer 12 is formed by alternately forming the barrier layer and the well layer a desired number of times by the method described above. Thereafter, ammonia and trimethylgallium are supplied to the processing chamber by the carrier gas, and the final barrier layer 13 made of the GaN layer is grown.

  Next, after the temperature of the substrate 2 is raised to about 1000 ° C. to about 1100 ° C., ammonia gas, TMG gas, trimethylaluminum (TMA) gas, and biscyclopentadienyl magnesium (Cp 2 Mg) gas are treated with a carrier gas. The p-type electron blocking layer 14 made of a p-type AlGaN layer doped with magnesium is epitaxially grown on the final barrier layer 13.

  Next, in a state where the temperature of the substrate 2 is maintained at about 1000 ° C. to about 1100 ° C., ammonia gas, TMG gas, and Cp 2 Mg gas are supplied to the processing chamber by a carrier gas, and then from the p-type GaN layer doped with magnesium The second semiconductor layer 15 to be formed is epitaxially grown on the p-type electron blocking layer 14. As a result, the main growth surface 12a of the active layer 12 and the main surfaces of the first semiconductor layer 11, the final barrier layer 13, and the p-type electron blocking layer 14 are formed on the non-polar m-plane.

  Next, the 1st electrode part 4 which consists of ZnO is formed in the whole surface 15a of the 2nd semiconductor layer 15 by sputtering method or a vacuum evaporation method.

  Next, a resist is formed in a desired pattern, and the first electrode portion 4 and the light emitting portion 3 are etched, whereby a partial region of the first semiconductor layer 11 is mesa-etched to expose the electrode surface. Then, a Ti layer and an Al layer are sequentially laminated on the exposed electrode surface by a vacuum evaporation method such as a resistance heating method or an electron beam method to form the second electrode 6.

  Next, the back surface 2b side of the substrate 2 is ground by mechanical polishing so that the substrate 2 has a thickness of about 100 μm or less.

  Next, as shown in FIG. 3A, the back surface 2b of the substrate 2 is ground by using a scriber 30 such as diamond, and a ruled line 20 for element division is entered. After the ruled line 20 is formed on the back surface 2b of the substrate 2, as shown in FIG. 3B, stress is applied to the portion where the ruled line 20 is formed using a breaker 31 such as ceramic. By applying stress to the location where the ruled lines 20 are formed, it can be divided into element units as shown in FIG.

  In the lateral end surface 1a formed by the division, the c-plane is a cleaved surface and becomes a mirror surface, but the a-plane is not a cleaved surface, and thus becomes a rough surface. Moreover, the part which put the ruled line 20 in the horizontal end surface 1a of the board | substrate 2 is also a rough surface, as shown with the electron micrograph of FIG. Therefore, a portion roughened by the ruled lines 20 on the lateral end surface 1a of the substrate 2 is polished and mirrored. Since the thickness of the substrate 2 is as thin as about 100 μm, as shown in FIG. 3D, the divided elements are attached to the dummy substrate 37, and the dummy substrate 37 to which the elements are attached is placed on the jig 36, and the substrate 2 The horizontal end face 1a is polished by a polishing apparatus 35 using a polishing sheet 34, and the horizontal end face 1a is mirror-finished. When the surface of the polishing sheet having a roughness of about 100 nm is used, the side surface 1a of the substrate 2 can have a mirror surface with a roughness of about 100 nm. As shown in the electron micrograph of FIG. 5, the rough end surface 1a of the polished substrate 2 is polished to be a mirror surface. The semiconductor light emitting element according to the first embodiment is completed through the above steps.

  In the step of polishing the lateral end face 1a, the method using the polishing sheet 34 has been described. However, the polishing may be performed using the CMP method, or a combination of both may be used.

  According to the semiconductor light emitting device according to the first embodiment of the present invention, the entire surface of the lateral end surface 1a is a mirror surface, so that the light irradiated from the entire surface of the lateral end surface 1a to the outside like the LED is a rough surface. Therefore, it is possible to keep the polarization state and to take out the light maintaining a high polarization ratio to the outside.

  In addition, according to the semiconductor light emitting device according to the first embodiment of the present invention, the substrate 2 is made of conductive GaN, so that the light emitting portion 3 with few stacking faults and high crystallinity is formed. can do. Thereby, luminous efficiency can be improved.

  Further, according to the semiconductor light emitting device according to the first embodiment of the present invention, the surface 2a of the substrate 2 is constituted by the m-plane which is a nonpolar surface, so that the polarization of the growth surface of the light emitting unit 3 during growth is achieved. Can be suppressed. Thereby, since the light emission part 3 can be made to grow on a stable growth surface, the crystallinity of the light emission part 3 can be improved. As a result, the active layer 12 can increase the light emission efficiency and improve the polarization ratio of light.

  In addition, according to the semiconductor light emitting device according to the first embodiment of the present invention, the substrate 2 is ground so as to have a thickness of about 100 μm or less before being divided into device units. it can. Thereby, the semiconductor light emitting element can be easily divided into element units.

(Second Embodiment)
A method for manufacturing a semiconductor light emitting device according to the second embodiment of the present invention will be described with reference to FIG. The semiconductor light emitting device according to the second embodiment has substantially the same configuration as the semiconductor light emitting device described in the first embodiment, and thus redundant description is omitted.

  First, a substrate 2 made of a single crystal of GaN and having a surface 2a of non-polar m-plane and a thickness of about 300 μm is prepared. Next, the light emitting portion 3 is epitaxially grown on the surface 2a of the substrate 2 described above by MOCVD.

  Next, the 1st electrode part 4 which consists of ZnO is formed in the whole surface 15a of the 2nd semiconductor layer 15 by sputtering method or a vacuum evaporation method.

  Next, a resist is formed in a desired pattern, and the first electrode portion 4 and the light emitting portion 3 are etched, whereby a partial region of the first semiconductor layer 11 is mesa-etched to expose the electrode surface. Then, a Ti layer and an Al layer are sequentially laminated on the exposed electrode surface by a vacuum evaporation method such as a resistance heating method or an electron beam method to form the second electrode 6.

  Next, as shown in FIG. 6A, dicing is performed for each element unit using a tool for cutting a wafer such as a dicing blade 38. By dicing, as shown in FIG. 6B, the element unit can be divided.

  Since the lateral end surface 1a of the divided element is cut by dicing, it is a rough surface. Therefore, the entire surface of the lateral end surface 1a of the substrate 2 is polished and mirrored. Since the thickness of the substrate 2 is as thin as about 100 μm, as shown in FIG. 6C, the divided elements are attached to the dummy substrate 37, and the dummy substrate 37 to which the elements are attached is placed on the jig 36, The horizontal end surface 1a of 2 is polished by a polishing apparatus 35 using a polishing sheet 34, and the horizontal end surface 1a is mirror-finished. The semiconductor light emitting element according to the second embodiment is completed through the above steps.

  In the step of polishing the lateral end face 1a, the method using the polishing sheet 34 has been described. However, the polishing may be performed using the CMP method, or a combination of both may be used.

  According to the semiconductor light emitting device according to the second embodiment of the present invention, since the substrate 2 may be thick because it is divided into device units by dicing, the back surface 2b side of the substrate 2 is ground by mechanical polishing. The process to perform can also be omitted.

(Third embodiment)
A method for manufacturing a semiconductor light emitting device according to the third embodiment of the present invention will be described with reference to FIGS. The semiconductor light emitting device according to the third embodiment has substantially the same configuration as the semiconductor light emitting device described in the first embodiment, and thus redundant description is omitted.

  First, a substrate 2 made of a single crystal of GaN and having a surface 2a of non-polar m-plane and a thickness of about 300 μm is prepared. Next, the light emitting portion 3 is epitaxially grown on the surface 2a of the substrate 2 described above by MOCVD.

  Next, the 1st electrode part 4 which consists of ZnO is formed in the whole surface 15a of the 2nd semiconductor layer 15 by sputtering method or a vacuum evaporation method.

  Next, a resist is formed in a desired pattern, and the first electrode portion 4 and the light emitting portion 3 are etched, whereby a partial region of the first semiconductor layer 11 is mesa-etched to expose the electrode surface. Then, a Ti layer and an Al layer are sequentially laminated on the exposed electrode surface by a vacuum evaporation method such as a resistance heating method or an electron beam method to form the second electrode 6.

  Next, the back surface 2b side of the substrate 2 is ground by mechanical polishing so that the substrate 2 has a thickness of about 100 μm or less. FIG. 7A shows a plan view of the element formed so far from above. FIG. 7B shows a cross-sectional view in the AA direction shown in FIG.

Next, as shown in FIGS. 8A and 8B, a resist 40 is patterned on the element in order to form a groove to be divided for each element unit. The element provided with the resist 40 is placed in a vacuum vessel (not shown), a reaction gas such as silicon tetrachloride (SiCl ₄ ) or chlorine (Cl ₂ ) is introduced, and the gas is excited by high frequency, microwave, or the like. Then, plasma is generated to generate radicals, ions, electrons, and the like. As shown in FIG. 9, radicals, ions, electrons, and the like generated by plasma react with the light-emitting portion 3 and the substrate 2 that are to be etched to divide them into element units. At this time, the horizontal end face 1a formed by dividing is subjected to a mirror finishing process by dry etching. Then, as shown in FIG. 10, by removing the resist 40, the semiconductor light emitting device according to the third embodiment is completed.

  According to the semiconductor light emitting element according to the third embodiment of the present invention, the element unit division and the mirror finish processing of the lateral end face 1a can be performed simultaneously.

  In addition, according to the semiconductor light emitting device according to the third embodiment of the present invention, since it is divided into device units by dry etching, it is possible to divide them at once.

(Other embodiments)
As mentioned above, although this invention was described by embodiment, it should not be understood that the description and drawings which form a part of this disclosure limit this invention. From this disclosure, various alternative embodiments, examples and operational techniques should be apparent to those skilled in the art.

  For example, in the first to third embodiments, the lateral end surface 1a of the semiconductor light emitting element is described as being orthogonal to the surface 2a of the substrate 2 and the surface 3a of the light emitting unit 3, but as shown in FIG. As described above, there may be a taper angle with respect to the surface 2 a of the substrate 2 and the surface 3 a of the light emitting unit 3. Due to the taper angle, a part of the light irradiated to the outside of the lateral end surface 1a is reflected by the lateral end surface 1a and travels in the direction of the first electrode unit 4, so that the light is collected in the direction of the first electrode unit 4. The light rate can be increased. As a method of forming the horizontal end surface 1a having a taper angle and a mirror surface, a jig 36 is installed in the polishing apparatus 35 shown in FIGS. 3D and 6C to have a desired angle and polished. There is a way to do it. Further, as a method of forming the lateral end surface 1a having a taper angle and being a mirror surface, it can be formed by utilizing the isotropic property of wet etching.

  Furthermore, in the third embodiment, the dry etching method is described as a method for dividing the semiconductor light emitting device into device units, but wet etching may be employed.

  Thus, it should be understood that the present invention includes various embodiments and the like not described herein. Therefore, the present invention is limited only by the invention specifying matters in the scope of claims reasonable from this disclosure.

FIG. 1A is a cross-sectional view of a configuration example of a semiconductor light emitting device according to the first embodiment of the present invention, and FIG. 1B is a cross-sectional view of the semiconductor light emitting device according to the first embodiment of the present invention. It is a top view of an example of composition. It is a figure for demonstrating the unit cell of the hexagonal crystal structure. It is process sectional drawing for manufacturing the semiconductor light-emitting device based on the 1st Embodiment of this invention. It is the electron micrograph which copied the location which put the ruled line. It is the electron micrograph which copied after grind | polishing the location which put the ruled line. It is process sectional drawing for manufacturing the semiconductor light-emitting device based on the 2nd Embodiment of this invention. FIG. 7A is a plan view for illustrating a method for manufacturing a semiconductor light emitting device according to the third embodiment of the present invention, and FIG. 7B is a semiconductor according to the third embodiment of the present invention. It is sectional drawing (the 1) for demonstrating the manufacturing method of a light emitting element. FIG. 8A is a plan view for illustrating a method for manufacturing a semiconductor light emitting device according to the third embodiment of the present invention, and FIG. 8B is a semiconductor according to the third embodiment of the present invention. It is sectional drawing (the 2) for demonstrating the manufacturing method of a light emitting element. It is sectional drawing (the 3) for demonstrating the manufacturing method of the semiconductor light-emitting device based on the 3rd Embodiment of this invention. It is sectional drawing (the 4) for demonstrating the manufacturing method of the semiconductor light-emitting device based on the 3rd Embodiment of this invention. It is sectional drawing of the structural example of the semiconductor light-emitting device which concerns on other embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1a ... Lateral end surface 2 ... Board | substrate 2a ... Front surface 2b ... Back surface 3 ... Light emission part 3a ... Surface 4 ... 1st electrode part 5 ... Connection part 6 ... 2nd electrode 11 ... 1st semiconductor layer 12 ... Active layer 12a ... Growth main surface DESCRIPTION OF SYMBOLS 13 ... Final barrier layer 14 ... p-type electron blocking layer 15 ... 2nd semiconductor layer 30 ... Scriber 31 ... Breaker 34 ... Polishing sheet 35 ... Polishing apparatus 36 ... Jig 37 ... Dummy board 38 ... Dicing blade 40 ... Resist

Claims (5)

A substrate,
A light-emitting portion provided on the surface of the substrate, having an active layer made of a group III nitride semiconductor having a nonpolar plane or a semipolar plane as a main growth surface, and generating polarized light from the active layer, and A semiconductor light-emitting element, wherein a lateral end surface of the active layer is a mirror surface.   The semiconductor light emitting device according to claim 1, wherein the substrate is made of GaN.   The semiconductor light-emitting element according to claim 1, wherein a growth main surface of the group III nitride semiconductor is an m-plane.   The thickness of the said board | substrate is 100 micrometers or less, The semiconductor light-emitting device of any one of Claims 1-3 characterized by the above-mentioned.   5. The semiconductor light emitting element according to claim 1, wherein the lateral end surface has a taper angle with respect to the growth main surface. 6.