JP2008301449A - Image coding apparatus and control method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve encoding efficiency by encoding after excluding lines existing redundantly in a block when encoding in block units.
A line comparison unit (103) inputs line data in order from the target block, compares the target line with the line input immediately before, stores a flag indicating coincidence / non-coincidence in the buffer memory (108) as identification information, The data is output to the integration unit 104. The integration unit 104 stores lines having identification information that does not match in its own internal memory. As a result, a new block from which consecutively matching lines are excluded is constructed in the internal memory of the integration unit 104. The encoding unit 106 encodes the block constructed in the integration unit 104. The code string forming unit 107 outputs the identification information stored in the buffer memory 108 and the encoded data obtained from the encoding unit 106 as the encoded data of the block of interest.
[Selection] Figure 1

Description

  The present invention relates to an image encoding technique.

  Conventionally, several proposals have been made for the purpose of efficiently encoding image data, such as characters, line drawings, and CG images, in which the same pixel value or the same pixel arrangement is frequently observed.

  Among them, whether the pixel data of the encoding target line and the pixel data of the immediately preceding (immediately above) line completely match, and when the preceding line is shifted by one or more pixels There is a proposal for determining whether or not the line of interest matches completely, and encoding pixel data based on the determination result (Patent Document 1).

In addition, there is a proposal that determines whether it corresponds to repetition of encoding, copying, or replacement of raw data, and thereby calculating the data length (Patent Document 2).
Japanese Patent Laid-Open No. 08-272978 JP 2001-053620 A

  In the case of a device that encodes images in parallel, the image is divided into blocks of an arbitrary size and processed. In such an encoding apparatus, encoding is started for each block, so that encoding efficiency may be poor in the first line of an image or the like.

  The present invention has been made in view of such a problem, and an object of the present invention is to provide a technique for further increasing the coding efficiency of each block and further increasing the compression rate.

In order to solve this problem, for example, an image encoding device of the present invention has the following configuration. That is,
An image encoding device that encodes image data in units of a block composed of a plurality of pixels,
Input means for inputting image data in units of lines from the image data of the block of interest;
Whether a line that matches the line of interest input by the input unit exists in the already input line, and a determination unit that generates identification information for identifying the matching line if present,
An integration unit that generates a new block by integrating each line determined to have no matching line based on the identification information generated by the determination unit;
Encoding means for encoding the image data of the new block integrated by the integrating means;
And output means for outputting the identification information of each line of the block of interest generated by the determination unit and the encoded data generated by the encoding unit as encoded data of the block of interest.

  According to the present invention, when encoding is performed in units of blocks, it is possible to increase the encoding efficiency by performing encoding after excluding lines that overlap in the block.

  Hereinafter, embodiments according to the present invention will be described in detail with reference to the accompanying drawings.

[First Embodiment]
FIG. 1 is a block diagram of an image encoding apparatus that performs lossless encoding of image data according to the present embodiment. The image encoding apparatus of this embodiment includes a control unit 100 that controls the entire apparatus, a stripe buffer 101, a block cutout unit 102, a line comparison unit 103, an integration unit 104, a slice division unit 105, an encoding unit 106, and a code string. A forming unit 107 and a buffer memory 108 are provided. In the figure, reference numerals 109 and 110 denote signal lines.

  Image data to be encoded by the image encoding apparatus according to the present embodiment is color image data composed of R, G, and B color components. The component of each pixel is represented by 8 bits (256 gradations). It is assumed that the image data to be encoded is arranged in dot order, that is, in a raster scan order. Each pixel is configured by arranging component data in the order of R, G, and B. The size of the image to be encoded is assumed to be W pixels in the horizontal direction and H pixels in the vertical direction.

  This apparatus encodes image data to be encoded in units of blocks each composed of horizontal Bw pixels and vertical Bh pixels.

  For the sake of simplicity, the horizontal pixel count W of the image is an integral multiple of Bw, and the vertical pixel count H is an integral multiple of Bh, which is incomplete when divided into blocks. An explanation will be given on the assumption that no block is generated. The block sizes Bw and Bh can be set to various values. In the following description, Bw = Bh = 32.

  Note that the above is an example, and the color space of the image data to be encoded is not limited to RGB, but may be a CMYK or monochrome image, and the number of bits of each component is not limited to 8 bits. In the embodiment, the source of the image data to be encoded is an uncompressed image data file stored in a storage medium, but may be an image scanner or a rendering processing unit that renders based on print data. The type is irrelevant.

Hereinafter, with reference to FIG. 1, the content of the encoding process of the image encoding device according to the present embodiment will be described.
First, image data to be encoded is sequentially input from the signal line 109. The input order of the pixel data is the raster scan order as described above, and the component data is input in the order of R, G, B at each pixel. R, G, and B are defined by component numbers 0, 1, and 2, respectively, and the pixel position x in the horizontal (right) direction and the pixel position y in the vertical (down) direction with the upper left corner of the image as coordinates (0, 0) The value of the component number C of the pixel is represented as P (x, y, C). For example, if the pixel at the position (x, y) = (3,4) has a value of (R, G, B) = (255, 128, 0), P (3,4, 0) = 255, P (3,4,1) = 128 and P (3,4,2) = 0.

  The stripe buffer 101 stores Bh lines of image data input from the image input unit 101, that is, 32 lines. The memory capacity of the stripe buffer 101 is at least 32 × W × 3 bytes. Hereinafter, the Bh line image data stored in the stripe buffer 101 is referred to as stripe data.

  The block cutout unit 102 cuts out the 32 × 32 pixel size block of the encoding processing unit in order from the left to the right in the stripe data stored in the stripe buffer 101 in synchronization with the encoding processing described later. Store in the internal storage area.

  The line comparison unit 103 compares the target line in the block stored in the block cutout unit 102 with the line input immediately before (hereinafter, the previous line), and determines whether the target line matches the previous line. Identification information (hereinafter referred to as flag FI) for identification is generated. Since the target to be compared with the target line is the immediately preceding line, when this identification information indicates that it matches, it also means that the target line matches with the immediately preceding line.

Here, the two lines coincide with each other when the variables i = 0, 1,..., 30, 31 are: P (x + i, y, C) = P (x + i, y-1, C)
This is the case when the relationship is established. Inconsistency is when one of the above conditions is not satisfied. In the embodiment, the flag FI = "1" is generated when they match, and the flag FI = "0" is generated when they do not match. Since the flag FI is one of {0, 1}, it is represented by 1 bit. In the embodiment, since the height Wh of one block is “32”, the line FI generated by the line comparison unit 103 is 32, that is, 32 bits. Since there is no immediately preceding line for the first line in the block, the flag FI = 0 is set for the first line. In the following description, 32 (32-bit) flags FI stored in the buffer memory 108 are collectively referred to as flag information.

  The buffer memory 108 temporarily stores and holds the 32-bit flag information output from the line comparison unit 103 as described above. FIG. 3 shows an example of flag information stored in the buffer memory 108.

  The integration unit 104 inputs the flag FI from the line comparison unit 103 and also inputs the image data of each line from the block cutout unit 102 in order from the top. Then, the integration unit 104 discards the image data of the line corresponding to the flag FI = 1, and stores the image data of the line indicated by the flag FI = 0 in the internal memory.

  FIG. 2 shows the processing contents of the integration unit 104. As shown in the figure, since the line having the same pixel as the previous line is discarded, in the case shown in the figure, four lines are stored in the internal memory of the integration unit 104. That is, a new block of 4 rows and 8 columns is successfully constructed from the 8 × 8 pixel block shown in the upper part of FIG. FIG. 2 shows an example of 8 × 8 pixel image data. In the embodiment, since this processing is performed on a 32 × 32 pixel block, the size of the generated integrated block in the horizontal direction is 32. It becomes.

  The encoding unit 106 in the embodiment is assumed to have a function of encoding n pieces of encoded data in parallel. For simplicity of explanation, it is assumed that n = 2.

  The slice division unit 105 divides the image data stored in the internal memory of the integration unit 104 into “2” slices that can be encoded in parallel by the encoding unit 106. As a result, the slice division unit 105 divides the integrated image data stored in the internal memory of the integration unit 104 into two slices as shown in FIG. 2, and outputs each of the slices to the encoding unit 106. Encoding is performed.

  The encoding unit 106 encodes each input slice image in parallel. Note that the encoding unit 106 performs encoding processing using a known multilevel lossless encoding method, for example, JPEG-LS, PNG, or JPEG2000. For example, when encoding is performed using JPEG-LS encoding, the run-length encoding mode and the regular mode are switched according to the state of four pixels around the pixel of interest.

  In the case of an image processing apparatus that performs parallel processing in units of slices, an encoding code is dynamically changed according to an image and an optimal codeword is assigned. However, in this case, the division efficiency is reduced mainly in the first line of the slice by dividing the data into smaller units. In order to minimize this load, line integration is performed before encoding.

  Prior to image coding, the code string forming unit 107 adds additional information necessary for decoding processing such as the number of pixels in the horizontal and vertical directions of the image, the number of components constituting the pixels, the accuracy of each component, and the block size. Output as header. The code string forming unit 107 outputs the 32-bit flag information stored in the buffer memory 108, the encoded data for each line from the encoding unit 106, and the encoded data of the block of interest. When the output destination is a storage device, it is output as a file.

  FIG. 4 shows the structure of encoded data generated by the code string forming unit 107. As shown in the figure, there is a header (file header) at the head of the encoded image data, followed by storing flag information (32 bits) of one block, and subsequently, flag FI = 0. The number of line-coded data continues.

  FIG. 5 is a flowchart illustrating a processing procedure of the control unit 100 of the image encoding device according to the present embodiment. Hereinafter, the flow of the encoding process will be described with reference to FIG.

  First, in step S <b> 501, the control unit 100 stores image data for 32 lines from the image data to be encoded from the signal line 109 in the stripe buffer 101. Next, the control unit 100 controls the block cutout unit 102 in step S502. As a result, the block cutout unit 102 takes out one of the 32 × 32 pixel blocks in order from the left to the right of the stripe data stored in the stripe buffer 101 and stores it in the internal memory of the block cutout unit 102.

  Subsequently, in step S503, the control unit 100 causes the line comparison unit 103 and the integration unit 104 to start processing on the block data in the internal memory of the block cutout unit 102. The line comparison unit 103 reads line data in one block (32 pixels in the embodiment) stored in the internal memory of the block cutout unit 102 as a unit, and compares the line read this time with the line read last time. Then, the flag FI of the comparison result is generated. The line comparison unit 103 stores the flag FI in the buffer memory 108 and outputs it to the integration unit 104. The integration unit 104 inputs line data in one block stored in the internal memory of the block cutout unit 102 when the flag FI output from the line comparison unit 103 is “0”. The line data is sequentially stored in the memory.

  In the embodiment, since one block is composed of 32 lines, the above process is performed 32 times. The line comparison unit 103 sets the flag FI to “0” for the first line of the block.

  As described above, when the generation and integration processing of the flag FI for one block is completed, the processing proceeds to step S504. In step S504, the control unit 100 controls the slice dividing unit 105, the encoding unit 106, and the code string forming unit 107 to perform encoding processing. Since the encoding unit 106 in the embodiment has a function of processing two encoding processes in parallel, the slice dividing unit 105 converts the integrated image data stored in the internal memory of the integration unit 104 into two slices. The data are divided and output to the encoding unit 106. The encoding unit 106 encodes each slice and outputs encoded data of each line to the code string forming unit 107. First, the code string forming unit 107 outputs 32-bit flag information from the buffer memory 108 via the signal line 110, and then sequentially encodes the encoded data of the lines whose flag FI is “0”. Output to.

  As described above, output of encoded data of image data of one block (32 × 32 pixels) is completed.

  When the encoding and output of the image data for one block is completed, the control unit 100 proceeds to step S505, and determines whether or not the encoded block is the last block (rightmost block) of the stripe data. . If not, the processing after step S502 is performed.

  On the other hand, if it is determined that the last block of the stripe data has been encoded, the process advances to step S506 to determine whether or not the target stripe data is the last stripe of the image data to be encoded. If NO, the process returns to step S501 and the next stripe data is encoded.

  If it is determined in step S506 that encoding of the final stripe has been completed, encoding of all blocks of the image data to be encoded has been completed, and thus this processing ends.

  As described above, according to the present embodiment, prior to encoding one block, matching / mismatching between adjacent lines is determined, line integration processing is performed based on the determination result, and the number of slices is determined. Encoding is performed in a reduced state. As a result, by reducing the load on the first line of the slice, lossless encoding with high compression performance can be realized for images such as characters, line drawings, and CG images in which many patterns with the same pixel arrangement appear. Note that the image processing apparatus of the present embodiment is characterized by being capable of partial decoding and parallel encoding / decoding because independent encoding is performed in units of blocks.

  In the decoding apparatus, the flag information (32 bits) at the head of each block is first determined, and the number of “0” s in the 32 bits is counted. The encoded data of the counted number of lines is decoded as following the flag information. Then, in the line where the flag FI is “0”, the decoding result is output. When the flag FI is “1”, the decoding result of the immediately preceding line may be output as the decoding result of the target line.

[Modification of First Embodiment]
The above embodiment can also be realized by a computer program by an information processing apparatus such as a personal computer. The following is a variation thereof.

  FIG. 11 is a block configuration diagram of an information processing apparatus (for example, a personal computer) in the present modification.

  In the figure, reference numeral 1401 denotes a CPU which controls the entire apparatus using programs and data stored in a RAM 1402 and a ROM 1403 and executes application programs for image encoding processing and decoding processing described later. A RAM 1402 includes an area for storing programs and data downloaded from the external device via the external storage device 1407, the storage medium drive 1408, or the I / F 1409. The RAM 1402 also includes a work area used when the CPU 1401 executes various processes. Reference numeral 1403 denotes a ROM which stores a boot program, a setting program for the apparatus, and data. Reference numerals 1404 and 1405 denote a keyboard and a mouse, respectively. Various instructions can be input to the CPU 1401.

  A display device 1406 includes a CRT, a liquid crystal screen, and the like, and can display information such as images and characters. Reference numeral 1407 denotes a large-capacity external storage device such as a hard disk drive device. The external storage device 1407 stores an OS (operating system), a program for image encoding and decoding processing described later, image data to be encoded, encoded data of an image to be decoded, and the like as files. The CPU 1401 loads these programs and data into a predetermined area on the RAM 1402 and executes them.

  A storage medium drive 1408 reads programs and data recorded on a storage medium such as a CD-ROM or DVD-ROM and outputs them to the RAM 1402 or the external storage device 1407. In addition, a program for image encoding and decoding processing described later, image data to be encoded, encoded data of an image to be decoded, and the like may be recorded on the storage medium. In this case, the storage medium drive 1408 loads these programs and data into a predetermined area on the RAM 1402 under the control of the CPU 1401.

  Reference numeral 1409 denotes an I / F, which connects an external device to the present apparatus through the I / F 1409 and enables data communication between the present apparatus and the external apparatus. For example, image data to be encoded, encoded data of an image to be decoded, and the like can be input to the RAM 1402, the external storage device 1407, or the storage medium drive 1408 of this apparatus. A bus 1410 connects the above-described units.

  In the above configuration, when the power of this apparatus is turned on, the CPU 1401 loads the OS from the external storage device 1407 to the RAM 1402 in accordance with the boot program stored in the ROM 1403. As a result, the keyboard 1404 and the mouse 1405 can be input, and the GUI can be displayed on the display device 1406. When the user operates the keyboard 1404 or the mouse 1405 to instruct the activation of the image encoding application program stored in the external storage device 1407, the CPU 1401 loads the program into the RAM 1402 and executes it. As a result, the present apparatus functions as an image encoding apparatus.

  The image encoding application process may be a process substantially equivalent to that shown in FIG. 5 in the first embodiment. That is, the function corresponding to each processing unit in FIG. 1 is realized by a function (subroutine) executed by the CPU 1401. Further, internal memory in each processing unit including the stripe buffer 101 and the buffer memory 108 can be realized by securing the RAM 1402.

  As described above, it is obvious that functions equivalent to those of the apparatus according to the first embodiment can be realized by a computer program executed by a computer.

[Second Embodiment]
In the second embodiment, line matching / non-coincidence determination is performed before encoding and line integration is performed as in the first embodiment. However, the second embodiment is different in that it is not a comparison of only the target line and the previous line, but is compared with an arbitrary line input before the target line. Then, identification information for identifying whether there is a matching line and which line matches if there is a matching line is generated. The identification information in the second embodiment is an array number or array number information described later.

  The apparatus configuration is the same as in FIG. The main difference from the first embodiment is the processing content of the line comparison unit 103 and the integration unit 104. Therefore, the processing contents of the line comparison unit 103 in the second embodiment will be described below with reference to the flowchart of FIG.

  In starting this process, it is assumed that image data (32 × 32 pixel data) for one block has already been stored in the internal memory of the block cutout unit 102.

  First, in step S701, the block cutout unit 102 inputs line data (32 pixels) of the first line of image data from the internal memory of the block cutout unit 102, and indicates the line data and the array number “1”. Keep information in internal memory.

  Next, in step S702, the block cutout unit 102 reads the next line data (target line data), and determines whether the line data matches any of the already registered line data (possibly a plurality of line data).

  If line data that matches the target line data is found in the registered line data, the process proceeds to step S703, and in order to identify the line determined to match, the array number is used as the array number of the target line. sign up. Thereafter, the process proceeds to step S706. Therefore, when the target line data is the second line data of the block and is equal to the first line, the array number of the target line is “1”.

  On the other hand, if no line data matching the target line data is found in the already registered line data, the process proceeds to step S704. The process proceeds to step S704 because the line of interest is a new pattern. Therefore, the array element number is incremented by “1” and the array element number is stored in the internal memory. In step S705, the target line data is also registered in the internal memory. Therefore, when the target line data is the second line data of the block and does not match the first line, the array number of the target line is “2”, and the target line data is held in the internal memory.

  In step S706, it is determined whether the line of interest is the last line of the block. If not, the processes after step S702 are repeated.

  When the process for all the lines of the block of interest is completed, the process proceeds to step S707, and the 32 array numbers stored therein are output to the buffer memory 108 and the integration unit 104 in line order.

  The above processing is shown in a more understandable manner as follows. In order to simplify the description, it is assumed that one block is 8 × 8 pixels and is composed of two types of pixels as shown in FIG. The array number of the first line is “1”. Since the second line coincides with the first line, the array element number is “1”. Since the third line does not match any of the previous lines, the sequence number is “2”. Hereinafter, when this is repeated, after all, in the case of the image shown in FIG. 6, there are only two types of array numbers “1” and “2”. That is, in the case of FIG. 6, the array number information output by the line comparison unit 103 is as shown in FIG.

  When integrating the image data for 32 lines stored in the internal memory of the block cutout unit 102, the integration unit 104 in the second embodiment checks in order from the top of the 32 array numbers. Only when a new sequence number is found, the line data is read from the block cutout unit 102 and stored in the internal memory in the integration unit 104. The integration result is not limited to the internal memory in the integration unit 104, and a buffer memory may be separately prepared as a storage unit and stored therein.

  FIG. 10 is a flowchart showing the processing contents of the integration unit 104 in the second embodiment.

  Hereinafter, the processing of the integration unit 104 will be described with reference to FIG. In the following description, the variable i is the variable of the position of the target line in the block. FI (i) represents the array element number of the i-th line among the 32 array element numbers stored in the buffer memory 108. Fmax is a variable that holds the maximum value of the array element number.

  First, in step S1001, variables i and Fmax are initialized to “0”. Next, the process proceeds to step S1002, and the array element number FI (i) of the i-th line is compared with Fmax.

  When FI (i)> Fmax, it indicates that the line data of interest (pixel data of the i-th line) does not match any previous line. Therefore, the line-of-interest data is read from the block cutout unit 102 and stored in the internal memory in the integration unit 104 in step S1003. Then, the value of Fmax is updated with FI (i) (step S1004), and the process proceeds to step S1005.

  On the other hand, determining that FI (i) ≦ Fmax in step S1002 indicates that the focused i-th line matches any of the already processed lines. Therefore, the process of steps S1003 and 1004 is not performed, and the process proceeds to step S1005.

  In step S1005, the variable i is incremented by “1” and updated. Thereafter, in step S1006, the variable i is compared with “32” which is the number of lines of the block. If i <32, there is an unprocessed line, and therefore the processing from step S1002 is repeated.

  As a result of the above processing, when the upper image in FIG. 6 is an encoding target, the image data stored in the internal memory of the integration unit 104 is image data for two lines as shown in the lower portion of FIG. Can do. Compared to the first embodiment, the number of lines to be stored can be halved.

  The image data after the integration is encoded by the slice dividing unit 105 and the encoding unit 106 in the same manner as in the first embodiment.

  The code string forming unit 107 simply outputs the 32 array number information stored in the buffer memory 108 at the head of each block, and then simply outputs the encoded data on a line. FIG. 9 shows a structure of encoded data generated by the encoding apparatus according to the second embodiment. The difference from the first embodiment is that array number information is stored at the head of each block. Further, the number of encoded data of the line following the array number information is equal to the array number value.

  The maximum value of one sequence number is theoretically “32”. That is, the possible range of one sequence number can be any of 32 values. Since 32 patterns can be expressed with 5 bits, in the case of the second embodiment, 32 array numbers require 32 × 5 = 160 bits in total. This is a value larger than 32 bits of flag data in the first embodiment. However, in the case of the second embodiment, there is a high possibility that the number of lines of the integrated image is sufficiently smaller than that of the first embodiment. Assume that the integrated image can be generated by one line fewer than the process of the first embodiment by the process of the second embodiment. One line data is composed of 32 pixels, and each pixel has three components of R, G, and B, and each component is 8 bits. Therefore, the fact that one line data can be omitted means that image data of 32 × 3 × 8 = 768 bits can be excluded from the encoding target, so that an array number is stored in the encoded data. However, it is clear that a sufficient effect can be expected.

  In addition, the process of the apparatus which decodes the encoding data produced | generated by the 2nd Embodiment should just perform a process contrary to the above. That is, when one block is decoded, the first array element number information (160 bits) is read and analyzed. As a result, it can be seen which of the 32 lines is the same as which line, and how many lines of encoded data exist after the array element number information. Therefore, the encoded data of the line is first decoded, and array element numbers “1”, “2”... Are assigned from the first line. Thereafter, the decoded line data may be output in order according to the array element number.

  It will be apparent that the processing according to the second embodiment can also be realized by a computer program that is executed by a computer, as in the modification of the first embodiment described above.

[Third Embodiment]
In the first embodiment and the second embodiment, the condition to be subjected to the integration process requires that the line of interest completely matches the already processed line. In the third embodiment, an example in which integration is performed when the number of different pixels is equal to or smaller than a preset allowable value will be described.

  In order to simplify the description, the block size is 8 × 8 pixels. Assume that the block of interest is the image shown in the upper part of FIG. In the illustrated image, it is assumed that only two types of pixels exist in the region excluding the two pixels at the right end of each line. The rightmost pixels X1 to X16 are pixels of different colors.

  It is assumed that “2” is set as an allowable value. Then, a line having the smallest number of pixels different from the previous lines is searched for among the pixels of the target line, and when the number is two pixels or less, the target line is determined as an integration target. However, the first line of the block is unconditionally a non-integrated line. Further, when a line that matches the target line that satisfies the condition of the allowable value or less is not found, the target line is registered as a line to be integrated.

  In the case shown in the figure, if the two pixels at the right end of each line are excluded, the eight lines are composed of two types. Therefore, the two types of lines shown in the lower part of FIG. 12 are registered as part of the integrated image. In addition, the code | symbol "D" of the lower part of FIG. 12 is dummy data for earning a run. This dummy data is generated by replacing with data of a pixel adjacent to the corresponding pixel.

  Then, the pixels X1 to X16 determined to be different from the integrated line are collected for each line, and the line is reconfigured and added. At this time, the added line needs information indicating that each line is composed of pixels determined to be different. However, the number of pixels determined to be different is not necessarily an integer multiple of 8. If it is not an integer multiple of 8, dummy data is added to make a multiple of 8.

  In the case shown in the figure, an example is shown in which the two pixels at the right end of each line are different from each other. However, in practice, the positions of different pixels are not necessarily the same for each line. Therefore, the encoded data is composed of array number information indicating which integrated line matches, the encoded data of each line, the number of pixels different for each integrated line for each line, and position information thereof. It is necessary to newly provide encoded data.

  Although the embodiment has been described above, as described above, the present embodiment can also realize the above-described function by being read and executed by a computer. Usually, a computer program is stored in a computer-readable storage medium such as a CD-ROM, and can be executed by setting it in a reader (CD-ROM drive or the like) and copying or installing it in the system. Therefore, it is obvious that such a computer readable storage medium falls within the scope of the present invention.

It is a block block diagram of the image coding apparatus in embodiment. It is a figure which shows the example of the integration process of the image data in 1st Embodiment. It is a figure which shows the example of the flag data FI stored in the buffer memory in 1st Embodiment. It is a figure which shows the data structure of the coding data produced | generated in 1st Embodiment. It is a flowchart which shows the process sequence of the encoding process in 1st Embodiment. It is a figure which shows the example of the integration process of the image data in 2nd Embodiment. It is a flowchart which shows the processing content of the line comparison part in 2nd Embodiment. It is a figure which shows the example of the arrangement | sequence number information stored in the buffer memory in 2nd Embodiment. It is a figure which shows the data structure of the coding data produced | generated in 2nd Embodiment. It is a flowchart which shows the process sequence of the integration part in 2nd Embodiment. It is a block block diagram of the information processing apparatus in the modification of 1st Embodiment. It is a figure which shows the example of the integration process in 3rd Embodiment.

Claims (7)

An image encoding device that encodes image data in units of a block composed of a plurality of pixels,
Input means for inputting image data in units of lines from the image data of the block of interest;
Whether a line that matches the line of interest input by the input unit exists in the already input line, and a determination unit that generates identification information for identifying the matching line if present,
An integration unit that generates a new block by integrating each line determined to have no matching line based on the identification information generated by the determination unit;
Encoding means for encoding the image data of the new block integrated by the integrating means;
Characterized by comprising: identification information for each line of the block of interest generated by the determining means; and output means for outputting the encoded data generated by the encoding means as encoded data of the block of interest. An image encoding device. A division unit that divides the new block integrated by the integration unit into n slices when the encoding unit encodes n pieces of data in parallel;
The image encoding apparatus according to claim 1, wherein the encoding unit performs parallel encoding on each slice divided by the dividing unit.   The image coding apparatus according to claim 1, wherein the determination unit determines whether or not the line of interest matches a line input immediately before. The determination unit includes a storage unit for storing a line to be compared with the target line,
When the line of interest is compared with the line stored in the storage means, and there is a matching line, the matching line exists, and information that identifies the matching line is generated as the identification information,
When the line of interest is compared with the line stored in the storage means, and there is no matching line, the line of interest is newly registered in the storage means, and information for specifying the registered line of interest is The image encoding device according to claim 1, wherein the image encoding device is generated as identification information. A control method for an image encoding device that encodes image data in units of blocks each composed of a plurality of pixels,
An input process for inputting image data in units of lines from the image data of the block of interest;
A determination step of generating identification information for specifying whether or not a line that matches the line of interest input in the input step already exists in the input line, and if there is a match,
Based on the identification information generated by the determination step, an integration step of generating a new block by integrating each line determined to have no matching line;
An encoding step of encoding the image data of the new block integrated in the integration step;
And an output step of outputting the identification information of each line of the target block generated in the determination step and the encoded data generated in the encoding step as encoded data of the target block. Control method for an image encoding device.   A computer program that causes a computer to function as the image encoding device according to claim 1 by being read and executed by a computer.   A computer-readable storage medium storing the computer program according to claim 6.

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