JP2008218753A - Electronic component and method for manufacturing electronic component - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electronic component which can be easily reduced in size and thickness and has a function of a built-in element and a manufacturing method thereof.
A first electrode formed on an insulating layer containing a resin as a main component, a dielectric layer formed on the first electrode, and a second electrode formed on the dielectric layer. And a capacitor having a higher melting point than the first metal that is a main component of the first electrode and lower thermal conductivity than the first metal. 2. An electronic component, wherein a buffer layer including a metal-based layer is formed between the lower electrode and the dielectric layer.
[Selection] Figure 5K

Description

  The present invention relates to an electronic component including a capacitor and a method for manufacturing the same.

  In recent years, along with the downsizing and thinning of mounting parts such as semiconductor chips mounted on a board, electronic parts (wiring boards) for mounting the above mounting parts have become smaller, higher performance and more multifunctional. It is requested. For this reason, for example, it is desired that elements (passive elements) having various passive functions that are conventionally surface-mounted on a wiring board are integrated and built into the wiring board.

  For example, a capacitor (that is, a coupling capacitor) for stabilizing the operation by suppressing fluctuations in the power supply voltage of a semiconductor chip is generally surface-mounted on a wiring board at present. For this reason, the above-described surface-mounted element sometimes becomes a problem in reducing the size and thickness of the wiring board.

For example, the decoupling capacitor is preferably installed in the vicinity of the mounting component in order to reduce the inductance of the connection path with the mounting component (semiconductor chip). In other words, in addition to the demands for miniaturization and thinning, it is sometimes required from the functional point of view that an element that has been conventionally surface-mounted is incorporated in the wiring board.
JP-A-56-079425 JP-A-1-189998 JP-A-7-030257 JP 54-039874 A JP 2000-243873 A

  However, the ceramic material constituting the dielectric layer of the capacitor has a high firing temperature, and the resin material constituting the wiring board cannot withstand the firing temperature. For this reason, it has been substantially difficult to incorporate a conventional capacitor in a substrate made of a general resin material.

  In order to solve this problem, a method of forming a dielectric layer using a composite material in which ceramic powder or the like is mixed in a resin material has been attempted. However, in such a composite material, it is difficult to increase the dielectric constant of the dielectric layer, and the relative dielectric constant is limited to about 100, and there are cases where the required relative dielectric constant is not satisfied.

  Therefore, in the present invention, it is a general object to provide a new and useful electronic component and a method for manufacturing the electronic component that solve the above-described problems.

  A specific problem of the present invention is to provide an electronic component that can be easily reduced in size and thickness and has a good function of a built-in element, and a method for manufacturing the same.

  In the first aspect of the present invention, the above-described problem is solved by a first electrode formed on an insulating layer mainly composed of a resin, a dielectric layer formed on the first electrode, and the dielectric An electronic component including a capacitor having a second electrode formed on the body layer, the melting point being higher than that of the first metal that is a main component of the first electrode, and the first electrode A buffer layer including a layer mainly composed of a second metal having a thermal conductivity lower than that of the first metal is formed between the first electrode and the dielectric layer. ,Resolve.

  Further, in the second aspect of the present invention, the above-described problem is solved by causing the melting point of the first electrode on the insulating layer containing a resin as a main component to be higher than that of the first metal that is the main component of the first electrode. Forming a buffer layer including a layer mainly composed of a second metal having a high thermal conductivity lower than that of the first metal, and forming a dielectric layer on the buffer layer by collision of aerosol The problem is solved by a method of manufacturing an electronic component, comprising: a step of forming; a step of irradiating the dielectric layer with a laser; and a step of forming a second electrode on the dielectric layer.

  ADVANTAGE OF THE INVENTION According to this invention, it becomes possible to provide the electronic component which is easy to reduce in size and thickness, and in which the function of the built-in element is favorable, and its manufacturing method.

  The electronic component according to the present invention is an electronic component having a built-in capacitor, and is characterized in that a dielectric layer constituting the capacitor is formed by aerosol collision.

  Aerosol refers to fine particles (fine particles) floating in a gas. For example, by dispersing fine particles made of an inorganic material in a predetermined gas and transporting the gas in which the fine particles are dispersed to collide with a film formation target (for example, a substrate), a film made of an inorganic material is formed on the film formation target. Can be formed. Such a film forming method may be referred to as aerosol deposition (ASD). In aerosol deposition, the particles are accelerated to the sound velocity level and collide with the film formation target. For this reason, the particles themselves are plastically deformed to become flat, and the particles are deformed so that anchors (wedges) are driven into the film formation target.

  For this reason, in the film formation by the collision of the aerosol, there is an effect that the adhesion between the formed film and the film formation target becomes good. In addition, since the film formation temperature may be about room temperature, it is possible to perform film formation while suppressing the impact of heat even on materials and structures that are vulnerable to heating. Therefore, if the film formation by aerosol is used, it is possible to incorporate a capacitor by forming a dielectric layer by film formation by aerosol on an electronic component such as a wiring board containing a resin material.

  If a passive element such as a capacitor can be built in the wiring board, the wiring board can be made thinner and smaller. Furthermore, it becomes possible to install a passive element (capacitor) in the vicinity of the mounting component (semiconductor chip) mounted on the wiring board, and the passive element is improved by reducing the inductance of the connection path between the passive element and the mounting component. It becomes possible to make it function.

  FIG. 1 is a diagram schematically showing a film forming apparatus for performing film formation by aerosol. Referring to FIG. 1, a film forming apparatus 500 shown in this drawing includes a processing container (film forming chamber) 501 and a holding table that is installed in the processing container 501 and holds a substrate S to be processed on which film formation is performed. 502. Further, the inside of the processing vessel 501 is evacuated from the exhaust line 511 by an exhaust unit 512 such as a pump, and can be in a reduced pressure state.

  A raw material container 508 in which powder (fine particles) P that is a raw material for film formation is held is installed in a vibrator 509. The vibrator 509 is configured to apply vibration (ultrasonic waves) to the raw material container 508 and to heat the raw material container 508 by a heating means (not shown).

  Connected to the raw material container 508 are an exhaust line 506 for reducing the pressure inside, and a gas line 507 for introducing a carrier gas such as oxygen inside. A gas tank 513 is connected to the gas line 507, and the carrier gas is introduced into the raw material container 508 by opening the valve 510.

  In addition, a nozzle 504 for injecting aerosol is installed in the processing container 501, and the aerosol is supplied from the raw material container 508 to the nozzle 504 through a supply line 505.

  When film formation is performed by the film formation apparatus 500 described above, first, moisture attached to the powder surface by heating the powder P in the raw material container 508 by applying vibration (ultrasonic waves) by the vibrator 509. Etc. are removed.

  Next, carrier gas is introduced into the raw material container 508 from the gas line 507 to aerosolize the powder P. The aerosolized powder P is sprayed from the nozzle 504 onto the substrate S in the processing container 501 through the supply line 505 to form a film. Further, it is preferable that the inside of the processing container 501 is evacuated from the exhaust line 511 to be in a reduced pressure state during film formation.

  However, a film formed by aerosol collision (hereinafter referred to as ASD film) is a ceramic (so-called bulk ceramic) that is fired at a high temperature because the conveyed fine particles are impact-solidified on the substrate and formed at room temperature. ) And the following points.

  For example, the ASD film has fine particles in the film (no grain growth due to heat treatment) compared to bulk ceramic, and the particles in the film are distorted (the particles become flat). ), The crystal structure is destroyed.

  For this reason, the ASD film has a problem that the dielectric constant becomes lower than that of the bulk ceramic. In order to increase the dielectric constant, there is a method of introducing a conductive component such as a metal into the film. However, in order to meet the demand for improvement in the capacitance of the capacitor, such a metal material is used. There is a limit to the method of mixing. In addition, when the dielectric thickness is reduced to increase the capacitance of the capacitor, problems with the withstand voltage and leakage of the film occur. Further, when the method of increasing the capacitance of the capacitor by changing the number of dielectric layers, etc., there is a problem that the film yield increases and the process yield decreases.

As the above solution, the inventors of the present invention focused on a method of improving the dielectric constant by modifying the film by laser heating the ASD film (dielectric layer). The dielectric layer is generally formed on an electrode made of metal. For example, various lasers (excimer, YAG, UV-YAG, YVO4 , YLF, CO 2) are known to be reflected by the metal. On the other hand, the ASD film absorbs laser energy and rises in temperature. For this reason, it is possible to selectively anneal the ASD film by irradiating the ASD film formed on the metal with a laser.

  However, when the temperature of the ASD film rises due to the annealing by the laser described above, the temperature of the metal (electrode) serving as the base on which the ASD film is formed rises due to heat conduction. For this reason, as shown below, the problem that the said metal melt | dissolves and also the resin material of the said metal base | substrate changes will generate | occur | produce.

  FIG. 2A to FIG. 2F are diagrams illustrating a manufacturing method for manufacturing an electronic component having a capacitor, following a procedure. However, the parts described above may be denoted by the same reference numerals and description thereof may be omitted (the same applies to the following drawings and examples).

First, in the step shown in FIG. 2A, on the electrode 2 made of metal (Cu) formed on the insulating layer 1 made of a resin material, the film forming apparatus 500 shown in FIG. Then, a dielectric layer (ASD film) 3a made of BaTiO ₃ is formed.

  Next, in the steps shown in FIGS. 2B to 2C, the dielectric layer 3a is annealed by irradiating the dielectric layer 3a with a laser. Here, in the dielectric layer 3a, grain growth is caused by heating, and crystallization proceeds to increase the dielectric constant of the dielectric layer 3a, whereby the modified dielectric layer 3 is formed. Since most of the laser applied to the dielectric layer 3a is reflected by the electrode 2, the influence of the electrode 2 being directly heated by the laser is small. However, the electrode 2 may be heated by heat conduction from the heated dielectric layer 3 (3a) and melt as shown in FIG. 2C.

  Further, when the power of the laser is large or when the heating is continued, for example, the electrode (Cu) 2 diffuses into the dielectric layer 3 (FIG. 2D) or is heated by the molten electrode 2 The insulating layer (resin material) 1 may be altered (burned) (FIG. 2E), and the dielectric layer 3 may be peeled off from the resin material 1 (electrode 2) (FIG. 2F).

  Therefore, the inventor of the present invention provides a buffer layer (thermal buffer layer) between the electrode and the dielectric layer, as described below, thereby melting the electrode and modifying the insulating layer (resin material) ( It has been found that combustion) can be suppressed.

  3A to 3B, the buffer layer 13 is formed on the electrode 12 made of metal (Cu) formed on the insulating layer 11 made of a resin material. For example, the buffer layer 13 is formed so as to be in contact with the electrode 12, the first buffer layer 13A mainly composed of Pt, and the second buffer mainly composed of Pt formed on the buffer layer 13A. It is comprised by the laminated structure with the layer 13B. Moreover, you may comprise the buffer layer 13 by a single layer.

Next, in the step shown in FIG. 3C, a dielectric layer (ASD film) 14a made of, for example, BaTiO ₃ is formed using the film forming apparatus 500 shown in FIG. 1 described above.

  3D to 3E, the dielectric layer 14a is annealed by irradiating the dielectric layer 14a with a laser. Here, the modified dielectric layer 14 is formed as described above. Since most of the laser irradiated to the dielectric layer 14a is reflected by the buffer layer 13, the influence of the electrode 12 being directly heated by the laser is small.

  In the above case, since the buffer layer 13 is formed, heat transfer from the dielectric layer 14 (14a) to the electrode 12 can be suppressed. For this reason, it becomes possible to suppress melting of the electrode 12 and alteration (combustion) of the insulating layer 11. Thereafter, by forming an electrode (second electrode) on the dielectric layer 14, a capacitor can be formed.

  The buffer layer 13 has a melting point higher than that of a metal (first metal, for example, Cu) that is a main component constituting the capacitor electrode (first electrode) 12 and has a thermal conductivity higher than that of the first metal. It may be configured so as to include a layer mainly composed of a second metal having a low thickness.

  For example, when the electrode 12 is mainly composed of Cu, the buffer layer is configured to include at least a layer mainly composed of a material selected from the group consisting of Ti, Cr, Mo, W, Ru, and Pt. It is preferable. The material corresponding to the second metal may be an alloy formed by mixing different metals. In this case, the alloy may have a higher melting point than the first metal and a lower thermal conductivity than the first metal.

  By providing the buffer layer 13 between the dielectric layer 14 (14a) and the electrode 12, the material constituting the electrode 12 is relatively inexpensive, has a low electrical resistance, and is generally used as a wiring material. It is possible to select the target Cu. Moreover, Cu can be easily ionized and can be easily formed by plating. Moreover, since pattern wiring and via plugs used for a wiring board are generally formed of Cu, there is a merit that compatibility with an existing manufacturing method is increased.

  The buffer layer 13 may be composed of a plurality of layers containing different metals as main components. In this case, the metal that is the main component of at least one of the plurality of layers has a higher melting point than the first metal and a lower thermal conductivity than the first metal. What should I do.

  Further, for example, a metal that is a main component of each of the plurality of layers, such as a combination of Pt and Ti, has a melting point higher than that of the first metal and has a higher heat than the first metal. More preferably, the conductivity is lowered.

  For example, since Ti has a higher reactivity with Cu than Pt, forming a layer mainly composed of Ti (first buffer layer 13A) so as to be in contact with Cu allows adhesion between the buffer layer and Cu. There is an effect of improving the property. Moreover, Pt is a stable substance, and even when the temperature rises, there is little concern that it reacts excessively with Cu or interdiffusions with Cu. Therefore, the buffer layer 13 is formed by laminating the layer mainly containing Pt (second buffer layer 13B) on the layer mainly containing Ti (first buffer layer 13A). Adhesiveness with (Cu) is good and a stable structure can be formed.

  For example, as shown in FIG. 4, a layer (third buffer layer 13C) containing Ti as a main component may be further stacked on the second buffer layer 13B. As described above, the buffer layer can be formed in various structures using various metals or alloys.

  Next, a result of forming a dielectric layer by forming a film by aerosol, further annealing the dielectric layer by laser irradiation, and examining the characteristics will be described.

  First, the processing corresponding to FIGS. 2A to 2C (to FIG. 2F) described above was performed to examine the characteristics of the dielectric layer. That is, the characteristics of the dielectric layer when the buffer layer was not formed and the presence or absence of damage to the electrode and the insulating layer were examined.

  First, an electrode made of Cu was formed on an insulating layer made of an epoxy resin material. Next, the dielectric layer was formed on the electrode by colliding with aerosol under the following conditions. This will be described below with reference to FIG.

The raw material container 508 is filled with powder P made of BaTiO ₃ having an average particle diameter of 0.5 μm, and further, the raw material container 508 is heated by applying vibration (ultrasonic waves) with a vibrator 509 and heated. Then, moisture adhering to the powder surface was removed.

  Next, high-purity oxygen gas (gas pressure 2 kg / cm 2, gas flow rate 4 L / min) was introduced into the raw material container 508 as a carrier gas from the gas line 507 to aerosolize the powder P. Further, the inside of the processing vessel 501 was exhausted from the exhaust line 511 by the exhaust means 512, and the pressure was set to 10 Pa or less. Here, the aerosolized powder P was sprayed from the nozzle 504 onto the substrate (Cu on the insulating layer) in the processing container 501 through the supply line 505 to form a dielectric layer. . The film thickness of the formed dielectric layer was 2 μm, and Ra indicating the surface roughness was 0.02 μm.

The capacity density of the formed film was 40 nF / cm ₂ , and the leakage current (10 V) was 1 × 10 ⁻⁸ A / cm ₂ .

Further, the dielectric layer was irradiated with a CO ₂ laser and a YAG laser, and changes in relative permittivity, tan δ, and appearance were examined. An increase in tan δ of the dielectric layer is considered to indicate diffusion of the electrode (Cu) into the dielectric layer, and represents the magnitude of damage to the electrode and the dielectric layer. The above results are shown in the following table.

上記の表を参照するに、レーザの照射前の誘電体層の比誘電率は８０であった。これに対し、例えばＣＯ_２レーザを出力５Ｊ／ｃｍ_２で誘電体層に照射すると、比誘電率は３５０となるもののｔａｎδが５となっており、Ｃｕが誘電体層に明らかに拡散していることが確認された。また、レーザ出力を１０Ｊ／ｃｍ_２とした場合には、絶縁層を構成する樹脂材料が燃焼し、誘電体層が破壊されることが確認された。また、レーザ出力を０．５Ｊ／ｃｍ_２とした場合には、ｔａｎδは１．５程度に抑えられるが、比誘電率は８５程度にとどまっており、比誘電率の増大の効果は小さくなっている。

Referring to the above table, the dielectric constant of the dielectric layer before laser irradiation was 80. In contrast, for example, when a dielectric layer is irradiated with a CO ₂ laser at an output of 5 J / cm ₂ , tan δ is 5 although the relative dielectric constant is 350, and Cu is clearly diffused in the dielectric layer. It was confirmed. Moreover, when the laser output was 10 J / cm ₂ , it was confirmed that the resin material constituting the insulating layer burned and the dielectric layer was destroyed. When the laser output is 0.5 J / cm ₂ , tan δ can be suppressed to about 1.5, but the relative dielectric constant is only about 85, and the effect of increasing the relative dielectric constant is reduced. Yes.

Further, regarding the result when using the YAG laser, when the output of the YAG laser is 10 to 15 J / cm ₂ , the diffusion of the metal into the dielectric layer indicated by the increase in tan δ, Combustion of the resin material constituting the insulating layer, destruction of the dielectric layer, etc. were confirmed. When the laser output is 5 J / cm ₂ , tan δ can be suppressed to about 2, but the relative dielectric constant is only about 120, and the effect of increasing the relative dielectric constant is reduced.

  Next, the processing corresponding to FIGS. 3A to 3E described above was performed to examine the characteristics of the dielectric layer. That is, the characteristics of the dielectric layer when the buffer layer was formed and the presence or absence of damage to the electrode and the insulating layer were examined.

  First, an electrode made of Cu was formed on an insulating layer made of an epoxy resin material. Next, a Ti film (first buffer layer) is formed on the electrode so as to have a thickness of 750 nm by sputtering, and a Pt film (second buffer layer) is further formed on the Ti film. Was formed to be 2 μm.

Next, a dielectric layer is formed by the same method as described above (when the buffer layer is not formed), and the above dielectric layer is irradiated with a CO ₂ laser and a YAG laser to obtain a dielectric constant. The rate, tan δ, and appearance changes were examined. The above results are shown in the following table.

上記の表を参照するに、例えばＣＯ_２レーザを照射した場合には、出力を０．５〜１０Ｊ／ｃｍ_２とした場合に、比誘電率は８５〜５００となり、レーザの出力の増大に伴って、比誘電率が増大していることが確認された。また、この場合、金属の誘電体層への拡散の程度を示すｔａｎδは、１．５〜２程度であった。また、外観上の変化は特にみられなかった。このことから、緩衝層が形成されたことによって、電極や絶縁層へのダメージを抑制しつつ、誘電体層の比誘電率を増大させることが可能となっていることが確認された。

Referring to the above table, for example, when CO ₂ laser is irradiated, the relative dielectric constant is 85 to 500 when the output is 0.5 to 10 J / cm ₂ , and the laser output increases. Thus, it was confirmed that the relative dielectric constant increased. In this case, tan δ indicating the degree of diffusion of the metal into the dielectric layer was about 1.5 to 2. There was no particular change in appearance. From this, it was confirmed that the formation of the buffer layer makes it possible to increase the relative dielectric constant of the dielectric layer while suppressing damage to the electrode and the insulating layer.

Further, regarding the result when using the YAG laser, when the output of the YAG laser is 5 to 15 J / cm ₂ , the relative dielectric constant becomes 120 to 600, and the ratio increases as the output of the laser increases. It was confirmed that the dielectric constant increased. Further, tan δ is about 1.5 to 2, and there is no particular change in appearance, and as in the case of the CO ₂ laser, the ratio of the dielectric layer is suppressed while suppressing damage to the electrodes and the insulating layer. It was confirmed that the dielectric constant can be increased.

  Next, in the same experiment (formation of a structure comprising an insulating layer, an electrode, a buffer layer, and a dielectric layer and annealing of the dielectric layer), the thickness and configuration of the buffer layer were changed variously, The damage to the electrode and insulating layer due to the configuration was examined.

As a laser for irradiating the dielectric layer, a CO ₂ laser and a YAG laser were used as in the previous case. Moreover, the thickness (configuration) of the buffer layer is as follows: when there is no buffer layer, when the thickness of Ti is 500 nm and the thickness of Pt is 2 μm (denoted as Ti (500 nm) / Pt (2 μm), and so on) In the case of Ti (1 μm) / Pt (2 μm), in the case of Ti (1 μm) / Pt (3 μm), in the case of Ti (1 μm) / Pt (3 μm), in the case of Ti (10 nm) / Pt (10 nm) Each was examined. The above results are shown in the following table. For comparison, the table below also shows the results when the buffer layer is not formed and the laser annealing process is not performed and when the laser annealing process is performed without forming the buffer layer. is doing.

上記の表を参照するに、緩衝層を形成しない場合や、または、緩衝層の厚さ（構成）が、Ｔｉ（１０ｎｍ）／Ｐｔ（１０ｎｍ）と薄い場合について、樹脂が燃焼したり、または、ｔａｎδが増大し、電極や誘電体層がダメージを受けたことが確認された。

Referring to the above table, when the buffer layer is not formed, or when the thickness (configuration) of the buffer layer is as thin as Ti (10 nm) / Pt (10 nm), the resin burns, or It was confirmed that tan δ increased and the electrode and the dielectric layer were damaged.

On the other hand, when the structure of the buffer layer is Ti (500 nm) / Pt (2 μm), Ti (1 μm) / Pt (2 μm), Ti (1 μm) / Pt (3 μm), Ti (1 μm) / Pt (3 μm) Respectively, when the laser output is 10 to 50 J / cm ₂ , it is confirmed that the relative dielectric constant of the dielectric layer is 400 to 680, and damage to the dielectric layer and the electrode is suppressed. It was done.

From the above results, it was confirmed that the output of the laser irradiating the dielectric layer is a region where 1 J / cm _{2 to} 50 J / cm ₂ is preferable. Further, it is considered that the thickness of the buffer layer is preferably 50 nm or more in order to suppress damage to the electrode and the dielectric layer. Further, since the thickness of the buffer layer is difficult to reduce the thickness of the capacitor itself, the thickness of the buffer layer is preferably 500 μm or less. That is, the thickness of the buffer layer is preferably 50 nm to 500 μm.

  Next, an example of a method for manufacturing an electronic component (wiring board) including the capacitor including the buffer layer will be described with reference to FIGS. 5A to 5K. However, the parts described above are denoted by the same reference numerals, and description thereof may be omitted.

  First, in the step shown in FIG. 5A, a structure in which pattern wirings and via plugs are formed in a laminated insulating layer was formed by a known method. In the above structure, the insulating layers 201 and 101 made of an epoxy resin material are laminated, the via plug 202 made of Cu is embedded in the insulating layer 201, and the via plug 102 made of Cu is buried in the insulating layer 101. Yes. Further, in the insulating layer 201, a pattern wiring 100 made of Cu connected to the via plug 101 and the via plug 202 is embedded.

  Further, a pattern wiring (first electrode) 103 made of Cu connected to the via plug 102 is formed on the insulating layer 101, and a pattern wiring made of Cu connected to the via plug 202 (first electrode) 103 is connected on the insulating layer 201 (first electrode). A first electrode 203 is formed.

  Next, in the step shown in FIG. 5B, a first buffer layer 104A made of Ti was formed on the pattern wiring (first electrode) 103 so as to have a film thickness of 750 nm by sputtering. Next, a second buffer layer 104B made of Pt was formed on the first buffer layer 104A by sputtering to have a thickness of 2 μm. In this manner, the buffer layer 104 formed by laminating the first buffer layer 104A and the second buffer layer 104B was formed.

  Similarly, the first buffer layer 204A made of Ti is formed to have a thickness of 750 nm by sputtering on the pattern wiring (first electrode) 203 on which the capacitor is formed in a later step. Formed. Next, a second buffer layer 204B made of Pt was formed on the second buffer layer 204A by sputtering to have a thickness of 2 μm. In this way, the buffer layer 204 formed by laminating the first buffer layer 204A and the second buffer layer 204B was formed.

  The buffer layers 104 and 204 are not limited to the sputtering method, and may be formed by other film forming methods such as a CVD method and an aerosol deposition.

Next, in the process shown in FIG. 5C, a dielectric layer 105a made of BaTiO ₃ was formed on the buffer layer 104 by the collision of aerosol. The dielectric layer 105a was formed as follows using the film forming apparatus 500 shown in FIG. This will be described below with reference to FIG.

First, the raw material container 508 is filled with a powder P made of BaTiO ₃ having an average particle size of 0.5 μm, and the raw material container 508 is heated by applying vibration (ultrasonic waves) by a vibrator 509 and heating. Carefully removed water adhering to the powder surface.

  Next, high-purity oxygen gas (gas pressure 2 kg / cm 2, gas flow rate 4 L / min) was introduced into the raw material container 508 as a carrier gas from the gas line 507 to aerosolize the powder P. Further, the inside of the processing vessel 501 was exhausted from the exhaust line 511 by the exhaust means 512, and the pressure was set to 10 Pa or less. Here, the aerosolized powder P is sprayed onto the substrate in the processing container 501 decompressed from the nozzle 504 through the supply line 505, and the dielectric layer is formed so that the thickness of the dielectric layer becomes 2 μm. 105a was formed.

  In addition, the dielectric layer 205a was formed on the buffer layer 204 in the same manner as when the dielectric layer 105a was formed.

  Next, in the step shown in FIG. 5D, the dielectric layer 105a was irradiated with a YAG laser and annealed to form a dielectric layer 105 obtained by annealing the dielectric layer 105a. The relative dielectric constant of the dielectric layer 105a (before annealing) was 80, but the relative dielectric constant of the dielectric layer 105 (after annealing) was 600. In this case, since the buffer layer 104 is formed, damage to the first electrode 103 due to laser irradiation is suppressed.

  Similarly, the dielectric layer 205a was irradiated with a YAG laser and annealed to form a dielectric layer 205 obtained by annealing the dielectric layer 205a.

  Next, in the step shown in FIG. 5E, a second electrode 106 made of Cu was formed on the dielectric layer 105 by sputtering. Here, it is a capacitor in which a dielectric layer 105 is formed between a first electrode (lower electrode) 103 and a second electrode (upper electrode) 106, and further, the dielectric layer 105 and the first electrode A capacitor 107 in which the buffer layer 104 is formed between the capacitors 103 is formed.

  Similarly, a second electrode 206 made of Cu was formed on the dielectric layer 205, and a capacitor 207 having the same structure as the capacitor 107 was formed.

  5F to 5G, an insulating layer 111 made of an epoxy resin material is pasted on the capacitor 107, and the capacitor 107 is embedded in the insulating layer 111 by pressing and heating as necessary. . In addition, a via plug 112 made of Cu was previously formed in the insulating layer 111, and a conductive layer 113a made of Cu was formed on the side of the insulating layer 111 opposite to the side facing the capacitor 107. When the insulating layer 111 was attached and pressed, the via plug 112 was pressed against the second electrode 106, and the via plug 112 and the second electrode 106 were electrically connected.

  Similarly, an insulating layer 211 made of an epoxy resin material was pasted on the capacitor 207, and the capacitor 207 was embedded in the insulating layer 211 by pressing and heating as necessary. In addition, a via plug 212 made of Cu was previously formed in the insulating layer 211, and a conductive layer 213a made of Cu was formed on the side of the insulating layer 211 opposite to the side facing the capacitor 207. When the insulating layer 211 is attached and pressed, the via plug 212 is pressed against the second electrode 206 or the pattern wiring 203 where no capacitor is formed, and electrical connection with the via plug 212 is made. It was.

Further, the insulating layers 111 and 211 may be formed by aerosol collision in the same manner as when the dielectric layers 105a and 205b are formed. For example, the insulating layers 111 and 211 can be formed by using fine particles made of a metal oxide such as Al ₂ O ₃ instead of fine particles made of BaTiO ₃ . In aerosol deposition, the particles are accelerated to the sound velocity level and collide with the film formation target, so that the particles themselves are plastically deformed and become flat. In addition, the particles are deformed so that anchors (wedges) are driven into the film formation target, and the adhesion is improved.

  Next, in the step shown in FIG. 5H, the conductive layer 113a on the insulating layer 111 was pattern-etched to form a pattern wiring (first electrode) 113. Similarly, the conductive layer 213a on the insulating layer 211 was pattern-etched to form a pattern wiring 213.

  Next, in the step shown in FIG. 5I, the buffer layer 114 (the first buffer layer 114A, 114A, etc.) is formed on any of the pattern wirings 113 in the same manner as the steps of FIGS. 5B to 5E described above. A second buffer layer 114B), a dielectric layer 115, and a second electrode 116 were formed. In this case, the buffer layer 114 (the first buffer layer 114A and the second buffer layer 114B), the dielectric layer 115, and the second electrode 116 are respectively formed of the buffer layer 104 (the first buffer layer 104A and the second buffer layer 114). The buffer layer 104B), the dielectric layer 105, and the second electrode 106 can be formed by the same method.

  Next, in a step shown in FIG. 5J, an insulating layer 120 made of a solder resist mainly composed of an epoxy resin material was formed on the insulating layer 111 so as to embed the capacitor 117. A part of the pattern wiring (electrode pad) 113 and a part of the second electrode 116 were exposed from the opening 120A formed in the insulating layer 120.

  Similarly, an insulating layer 220 made of a solder resist mainly composed of an epoxy resin material was formed on the insulating layer 211. A part of the pattern wiring (electrode pad) 213 was exposed from the opening 120 </ b> A formed in the insulating layer 220.

  Next, in the step shown in FIG. 5K, the mounting component (semiconductor chip) 130 is connected using the solder bumps 131 so as to be connected to the pattern wiring 113 exposed from the opening of the insulating layer 120 and the second electrode 116. Flip chip connected. The mounting component 130 was connected to the capacitor 117 via the solder bump 131 and to the capacitor 107 via the multilayer wiring structure (pattern wiring 113, via plug 112).

  In this manner, an electronic component (wiring board) 300 having a multilayer wiring structure and incorporating passive elements (capacitors 107, 207, 117) connected to the multilayer wiring structure could be manufactured. .

  According to the above manufacturing method, it is possible to manufacture an electronic component having a large capacity and a thin high-performance capacitor built therein. In addition, according to the above manufacturing method, the capacitor can be installed at various places on the electronic component (wiring board), and the capacitor has a high degree of freedom in installation.

  For example, in the future, the operating frequency of the semiconductor chip is expected to increase in order to further improve the operating speed of the semiconductor chip. For this reason, it is preferable that the inductance of the connection of the decoupling capacitor is reduced as much as possible. According to the above manufacturing method, it is possible to install the decoupling capacitor in the vicinity of the semiconductor chip in response to such a request.

Although the present invention has been described with reference to the preferred embodiments, the present invention is not limited to the specific embodiments described above, and various modifications and changes can be made within the scope described in the claims.
(Appendix 1)
A first electrode formed on an insulating layer mainly composed of a resin;
A dielectric layer formed on the first electrode;
An electronic component comprising a capacitor having a second electrode formed on the dielectric layer,
A buffer layer including a layer mainly composed of a second metal having a melting point higher than that of the first metal that is the main component of the first electrode and lower thermal conductivity than the first metal, An electronic component formed between the first electrode and the dielectric layer.
(Appendix 2)
The electronic component according to appendix 1, wherein the first metal is Cu, and the second metal is selected from the group consisting of Ti, Cr, Mo, W, Ru, and Pt.
(Appendix 3)
The electronic component according to appendix 2, wherein the buffer layer has a thickness of 50 nm to 500 μm.
(Appendix 4)
The buffer layer further includes a layer mainly composed of a third metal different from the second metal and having a melting point higher than that of the first metal and lower thermal conductivity than the first metal. The electronic component according to any one of supplementary notes 1 to 3, wherein the electronic component is included.
(Appendix 5)
The electronic component according to appendix 4, wherein the first metal is Cu, the second metal is Ti, and the third metal is Pt.
(Appendix 6)
6. The device according to any one of appendices 1 to 5, wherein the first metal is used as a main component and a multilayer wiring structure is connected to the first electrode or the second electrode. Electronic components.
(Appendix 7)
7. The supplementary note 1 to 6, wherein the insulating layer constitutes an interlayer insulating layer of a wiring board, and the capacitor is embedded in another interlayer insulating layer laminated on the interlayer insulating layer. Electronic components.
(Appendix 8)
The electronic component according to appendix 7, wherein the electronic component includes a mounting component mounted on the wiring board and connected to the capacitor.
(Appendix 9)
On the first electrode on the insulating layer containing resin as a main component, the melting point is higher than that of the first metal that is the main component of the first electrode, and the thermal conductivity is higher than that of the first metal. Forming a buffer layer including a layer composed mainly of a low second metal;
Forming a dielectric layer on the buffer layer by aerosol collision;
Irradiating the dielectric layer with a laser;
And a step of forming a second electrode on the dielectric layer.
(Appendix 10)
10. The method of manufacturing an electronic component according to appendix 9, further comprising a step of forming a multilayer wiring structure connected to the first electrode or the second electrode.
(Appendix 11)
Item 11. The supplementary note 9 or 10, further comprising a step of embedding a capacitor including the first electrode, the dielectric layer, and the second electrode with another insulating layer stacked on the insulating layer. Manufacturing method for electronic parts.
(Appendix 12)
The method of manufacturing an electronic component according to appendix 11, wherein the another insulating layer is formed by aerosol collision.
(Appendix 13)
In the step of forming the buffer layer,
A layer mainly composed of a third metal different from the second metal and having a melting point higher than that of the first metal and lower thermal conductivity than the first metal; 13. The method for manufacturing an electronic component according to any one of appendices 9 to 12, which is characterized by the following.
(Appendix 14)
14. The supplementary notes 9 to 13, wherein the first metal is Cu, and the second metal is selected from the group consisting of Ti, Cr, Mo, W, Ru, and Pt. Manufacturing method for electronic parts.
(Appendix 15)
15. The method of manufacturing an electronic component according to appendix 14, wherein the output of the laser is 1 J / cm _{2 to} 50 J / cm ₂ .

  ADVANTAGE OF THE INVENTION According to this invention, it becomes possible to provide the electronic component which is easy to reduce in size and thickness, and in which the function of the built-in element is favorable, and its manufacturing method.

It is a figure which shows an example of the film-forming apparatus which performs the film-forming using an aerosol. It is a figure (the 1) which shows an example of the manufacturing method of an electronic component. It is FIG. (2) which shows an example of the manufacturing method of an electronic component. It is FIG. (3) which shows an example of the manufacturing method of an electronic component. It is FIG. (4) which shows an example of the manufacturing method of an electronic component. It is FIG. (5) which shows an example of the manufacturing method of an electronic component. It is FIG. (6) which shows an example of the manufacturing method of an electronic component. It is FIG. (1) which shows the example of another manufacturing method of an electronic component. It is a figure (the 2) which shows the example of another manufacturing method of an electronic component. It is FIG. (3) which shows the example of another manufacturing method of an electronic component. It is FIG. (4) which shows the example of another manufacturing method of an electronic component. It is FIG. (5) which shows the example of another manufacturing method of an electronic component. It is a figure which shows the modification of another manufacturing method of an electronic component. FIG. 6 is a diagram (No. 1) illustrating a method for manufacturing an electronic component according to the first embodiment. FIG. 6 is a diagram (No. 2) illustrating the method for manufacturing the electronic component according to the first embodiment. FIG. 3 is a diagram (No. 3) illustrating the method for manufacturing the electronic component according to the first embodiment. FIG. 6 is a diagram (No. 4) illustrating the method for manufacturing the electronic component according to the first embodiment. FIG. 10 is a diagram (No. 5) illustrating the method for manufacturing the electronic component according to the first embodiment. FIG. 6 is a view (No. 6) illustrating the method for manufacturing the electronic component according to the first embodiment. FIG. 7 is a view (No. 7) showing a method for manufacturing an electronic component according to Example 1. FIG. 8 is a view (No. 8) illustrating the method for manufacturing the electronic component according to the first embodiment. FIG. 9 is a diagram (No. 9) illustrating a method for manufacturing an electronic component according to Example 1. FIG. 10 is a view (No. 10) illustrating the method for manufacturing the electronic component according to the first embodiment. FIG. 11 is a view (No. 11) illustrating the method for manufacturing the electronic component according to the first embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 Insulating layer 12 1st electrode 13 Buffer layer 13A 1st buffer layer 13B 2nd buffer layer 14a, 14 Dielectric layer 100,213 Pattern wiring 101,111,120,201,211,220 Insulating layer 103,203 113 First electrode (pattern wiring)
104, 114, 204 Buffer layer 104A, 114A, 204A First buffer layer 104B, 114B, 204B Second buffer layer 105, 105a, 115, 115a, 205, 205a Dielectric layer 106, 116, 206 Second electrode 130 Mounting parts 131 Solder bumps

Claims (6)

A first electrode formed on an insulating layer mainly composed of a resin;
A dielectric layer formed on the first electrode;
An electronic component comprising a capacitor having a second electrode formed on the dielectric layer,
A buffer layer including a layer mainly composed of a second metal having a melting point higher than that of the first metal that is the main component of the first electrode and lower thermal conductivity than the first metal, An electronic component formed between the first electrode and the dielectric layer.   2. The electronic component according to claim 1, wherein the first metal is Cu, and the second metal is selected from the group consisting of Ti, Cr, Mo, W, Ru, and Pt.   The buffer layer further includes a layer mainly composed of a third metal different from the second metal and having a melting point higher than that of the first metal and lower thermal conductivity than the first metal. The electronic component according to claim 1, further comprising: On the first electrode on the insulating layer containing resin as a main component, the melting point is higher than that of the first metal that is the main component of the first electrode, and the thermal conductivity is higher than that of the first metal. Forming a buffer layer including a layer composed mainly of a low second metal;
Forming a dielectric layer on the buffer layer by aerosol collision;
Irradiating the dielectric layer with a laser;
And a step of forming a second electrode on the dielectric layer.   5. The method according to claim 4, further comprising: embedding a capacitor including the first electrode, the dielectric layer, and the second electrode with another insulating layer stacked on the insulating layer. Manufacturing method of electronic components.   6. The method of manufacturing an electronic component according to claim 5, wherein the another insulating layer is formed by aerosol collision.

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