JP2008218464A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device capable of improving its reliability in durability while avoiding complication of manufacturing processes, complication of a structure and cost increase. <P>SOLUTION: The semiconductor device has: a semiconductor substrate 13(12) formed on any one of p- and n-types; a wiring pattern 17 of the other side of the p- and n-types formed on a front surface region of the semiconductor substrate 13; an insulating layer 20 laminated and formed on the front surface of the semiconductor substrate 13 so as to cover the wiring pattern 17; a contact hole 21 formed so as to pierce through the insulating layer portion on the upper side of the end position of the wiring pattern 17; and conductor patterns 18, 19 formed on the insulating layer 20 by connecting their one ends to the end of the wiring pattern 17 via the contact hole 21. A dummy pattern 25 electrically connected to the wiring pattern 17 is oppositely to the conductive patterns 18, 19 on the front surface side region of the semiconductor substrate 13 on the lower part side of the conductive patterns 18, 19. <P>COPYRIGHT: (C)2008,JPO&amp;INPIT

Description

  The present invention relates to a semiconductor device having a configuration in which a conductor pattern is formed on a semiconductor substrate.

2A is a schematic plan view showing main components of an acceleration sensor that is one of the semiconductor devices, and FIG. 2B is a schematic diagram of the AA portion of FIG. 2A. A cross-sectional view is shown. The acceleration sensor 1 includes a base 2, a weight part 3, a fixing part 4, a beam 5, an acceleration detection part 6, and external connection means 7. That is, the base 2 is formed of an insulator such as glass. The weight part 3 is arranged in a state of floating above the base 2, and is an SOI (Silicon-On-Insulator) substrate (that is, a support layer (Si layer) 10) and an insulating layer (SiO 2). ₂ layers) 11 and an active layer (Si layer) 12 are laminated and integrated in that order. The fixing portion 4 has a frame shape surrounding the weight portion 3 with a space therebetween, and is formed of the same SOI substrate 13 as the weight portion 3 and fixed to the base 2 by an anodic bonding method.

  The beam 5 supports and fixes the weight part 3 to the fixing part 4, and is formed thinner than the weight part 3 on the same SOI substrate 13 as the weight part 3 and the fixing part 4, and extends in the Z-axis direction shown in FIG. It can be bent and deformed. For this reason, in the acceleration sensor 1, when acceleration in the Z-axis direction occurs, the beam 5 is bent and deformed by a force resulting from the acceleration, and the weight portion 3 is displaced in the Z-axis direction. The amount of bending deformation of the beam 5 and the amount of displacement of the weight portion 3 in the Z-axis direction increase in accordance with the magnitude of acceleration in the Z-axis direction, such that the magnitude increases as the acceleration in the Z-axis direction increases. It is.

  The acceleration detector 6 has the following configuration for detecting the amount of bending deformation of the beam 5 and detecting the magnitude of acceleration in the Z-axis direction. That is, the acceleration detection unit 6 includes four piezoresistive units 15 (15a to 15d) formed on the beam 5. Each of the piezoresistive portions 15a to 15d is made of a p-type semiconductor formed by doping impurities on the surface side of the active layer 12 made of, for example, an n-type semiconductor constituting the beam 5, and has a stress. It has an electrical property that the electrical resistance value changes due to the change. These four piezoresistive portions 15 (15a to 15d) form a bridge circuit. In the bridge circuit, when the weight portion 3 and the beam 5 are in the reference state as shown in FIG. The electric resistance value of the piezoresistor 15 (15a to 15d) is configured to be in an equilibrium state.

  In the bridge circuit, the connection portion Vdd of the piezoresistive portions 15a and 15d is a voltage source connection portion, the connection portion Vo1 of the piezoresistive portions 15a and 15b and the connection portion Vo2 of the piezoresistive portions 15c and 15d are output portions, The connection part Vgnd of the piezoresistive parts 15b and 15c is a grounding part. A predetermined constant voltage is applied to the connection portion Vdd from an external voltage supply source via an external connection means 7 to be described later, and the weight portion 3 and the beam 5 are connected to each other while the connection portion Vgnd is grounded to the ground. In the reference state as shown in FIG. 2B, when the electric resistance values of the four piezoresistive portions 15 (15a to 15d) are in an equilibrium state, there is no potential difference between the connecting portion Vo1 and the connecting portion Vo2. None or very small. In contrast, when the beam 5 is bent and deformed due to the generation of acceleration in the Z-axis direction and the weight portion 3 is displaced, the electrical resistance values of the piezoresistive portions 15a to 15d are in the formation position and the formation direction, respectively. Will change accordingly. As a result, the equilibrium state of the electric resistance values of the four piezoresistive portions 15 (15a to 15d) of the bridge circuit is lost, and a potential difference is generated between the connecting portions Vo1 and Vo2. The potential difference between the connection portions Vo1 and Vo2 can be detected, and the magnitude of acceleration in the Z-axis direction can be detected based on the detected voltage.

  The external connection means 7 is for connecting the connection portions Vdd, Vo1, Vo2, and Vgnd of the bridge circuit of the acceleration detection unit 6 to the outside. In this example, the external connection means 7 is shown in the schematic enlarged sectional view of FIG. Such a wiring pattern 17, a wiring pattern 18 that is a conductor pattern, and an electrode pad 19 are configured. That is, the wiring pattern 17 is made of, for example, a p-type semiconductor (p ++) formed in the surface side region of the active layer 12 made of an n-type semiconductor, and one end side of the wiring pattern 17 is connected to the bridge circuit. It is connected to the piezoresistive portion 15 via the connecting portion Vdd (Vo1, Vo2, Vgnd). In this example, the wiring pattern 17 is made of a p-type semiconductor having a higher hole content than that of the p-type semiconductor constituting the piezoresistive portion 15, and has a smaller electric resistance value than the piezoresistive portion 15. Is easy to conduct. Further, since a depletion layer is formed at the PN junction between the wiring pattern 17 made of p-type semiconductor and the active layer 12 made of n-type semiconductor, the wiring pattern 17 is insulated from the active layer 12 by the depletion layer. Yes.

  An insulating film 20 is formed on the entire surface of the active layer 12. In the insulating film 20, a contact hole 21 is formed penetratingly at an end portion of the wiring pattern 17 opposite to the connection end portion with the piezoresistive portion 15.

  The wiring pattern 18 is formed on the surface of the insulating layer 20 with one end connected to the end of the wiring pattern 17 through the contact hole 21. In this example, four wiring patterns 18 are formed, and the end of each wiring pattern 18 opposite to the connection end with the wiring pattern 17 is individually associated with an electrode pad 19 (Vdd, Vo1). , Vgnd, Vo2).

  The electrode pads 19 (Vdd, Vo1, Vgnd, Vo2) are respectively formed on the surface of the insulating film 20 in the formation region of the fixing portion 4, and each electrode pad 19 (Vdd, Vo1, Vgnd, Vo2) is Each is electrically connected to the connection Vdd, Vo1, Vgnd, Vo2 of the corresponding bridge circuit via the corresponding wiring pattern 18 and wiring pattern 17, respectively. In this example, the electrode pad 19 (Vdd, Vo1, Vgnd, Vo2) is made of the same conductive material as the wiring pattern 18, and the thickness of the electrode pad 19 is larger than the thickness of the wiring pattern 18. . Each electrode pad 19 (Vdd, Vo1, Vgnd, Vo2) can be connected to the outside by connecting a bonding wire 33 as shown in FIG. 4, for example.

JP 2004-158758 A

  By the way, in this acceleration sensor 1, a predetermined voltage (for example, 5 V) is applied to the active layer 12 in order to stably operate the piezoresistor 15 of the acceleration detector 6. On the other hand, a current based on the operation of the bridge circuit of the acceleration detector 6 is applied to the wiring pattern 18, and the potential of the wiring pattern 18 is different from the potential of the active layer 12. For this reason, an electric field is generated in the insulating layer 20 interposed between the wiring pattern 18 and the active layer 12. Due to this electric field generation, ion migration, which is an ion diffusion phenomenon, occurs and the wiring pattern 18 and the active layer 12 are electrically short-circuited. Corrosion, which is a phenomenon in which ions constituting the wiring pattern 18 react with moisture in the surrounding atmosphere to form a metal hydroxide and the wiring pattern 18 deteriorates, is caused by the generation of the electric field. It becomes easy.

Since corrosion of the wiring pattern 18 can be prevented by suppressing contact between the wiring pattern 18 and moisture, for example, a protective film 22 that covers the surface of the wiring pattern 18 is formed so that the wiring pattern 18 is not exposed to the surrounding atmosphere. Measures are taken, and measures such as hermetically sealing the acceleration sensor 1 in a dry atmosphere inside the package 23 as shown in the schematic cross-sectional view of FIG. 4 are taken. Incidentally, the package 23 shown in FIG. 4, for example, a base 30 made of Al ₂ O ₃ or the like, for example, a cover 31 made of Al ₂ O ₃ or the like, for example, and a peripheral wall portion 32 made of a low melting point glass or the like It is configured. A lead frame 34 is inserted into the peripheral wall portion 32 of the package 23 from the outside of the package toward the inside of the package, and one end side of the bonding wire 33 is connected to an end portion of the lead wire 34 inside the package. The other end of the bonding wire 33 is connected to the electrode pad 19 of the acceleration sensor 1. That is, the acceleration sensor 1 accommodated in the internal space of the package 23 can be electrically connected to the outside of the package 23 via the bonding wire 33 and the lead frame 34.

  Although the corrosion of the wiring pattern 18 can be suppressed by the means as described above, there is a problem that the number of steps for forming the protective film 22 is increased and the manufacturing process becomes complicated, and the acceleration sensor 1 is accommodated. There arises a problem that a material cost of the package 23 and a manufacturing cost for accommodating the acceleration sensor 1 in the package 23 are required. Further, the short circuit problem between the wiring pattern 18 and the active layer 12 due to ion migration cannot be solved.

  Furthermore, there are concerns about the following problems in the configuration of the acceleration sensor 1. That is, in the step of connecting the bonding wire 33 to the electrode pad 19, the end of the bonding wire 33 is pressed against the electrode pad 19, so that the insulating film positioned below the electrode pad 19 is pressed by the pressing force to the electrode pad 19. 20 may be damaged. When the insulating film 20 is damaged, an electrical short problem between the electrode pad 19 and the active layer 12 occurs.

  The present invention has been made to solve the above-mentioned problems, and a first object of the present invention is to provide a conductor pattern resulting from ion migration and a semiconductor below the conductor pattern while preventing a complicated manufacturing process and an increase in cost. A semiconductor device capable of avoiding an electrical short-circuit problem with a substrate and preventing corrosion of a conductor pattern, and a second object is to provide an electrode pad and a semiconductor substrate caused by breakdown of an insulating film under the electrode pad And providing a semiconductor device capable of preventing the short circuit problem.

In order to achieve the above object, the present invention has the following configuration as means for solving the above problems. That is, the present invention
a semiconductor substrate formed on one side of either p-type or n-type;
A wiring pattern on the other side of the p-type and n-type formed in the surface side region of the semiconductor substrate;
An insulating layer formed on the surface of the semiconductor substrate so as to cover the wiring pattern;
A contact hole formed through the insulating layer above the end position of the wiring pattern;
On the insulating layer, a conductor pattern formed by connecting one end side to the end of the wiring pattern through the contact hole;
A semiconductor device comprising:
A dummy pattern electrically connected to the wiring pattern is provided opposite to the conductor pattern in a surface side region of the semiconductor substrate below the conductor pattern.

  According to the present invention, the dummy pattern is provided opposite to the conductor pattern in the surface side region of the semiconductor substrate below the conductor pattern, and the dummy pattern is electrically connected to the wiring pattern connected to the conductor pattern. Since they are connected, the potential of the dummy pattern is almost the same as that of the conductor pattern. For this reason, it can prevent that an electric field generate | occur | produces in the insulating-film part located in the downward side of a conductor pattern. Thereby, generation | occurrence | production of the ion migration resulting from electric field generation can be prevented, and the electrical short problem of the conductor pattern resulting from ion migration and the semiconductor substrate of the lower side can be avoided. Further, the corrosion of the conductor pattern due to the reaction between the ions of the conductor pattern and moisture due to the electric field generation can be suppressed. For this reason, it is not necessary to provide a conductor pattern corrosion inhibiting means such as providing a protective film for preventing corrosion on the conductor pattern or hermetically sealing the semiconductor device in a dry atmosphere inside the package. Simplification of the manufacturing process of the semiconductor device, complexity of the structure, and cost increase can be avoided.

  In addition, the conductor pattern includes a wiring pattern and an electrode pad, and the dummy pattern includes not only the lower side of the wiring pattern but also the lower side of the electrode pad, as described above. The following effects can be obtained as well as the effect of suppressing the short-circuit problem of the conductor pattern and the corrosion problem of the conductor pattern caused by the electric field generation. For example, in the step of connecting the bonding wire to the electrode pad, the insulating film below the electrode pad may be damaged due to the pressing force on the electrode pad. Even if the insulating film is damaged in such a manner, a short circuit between the electrode pad and the semiconductor substrate can be avoided by extending the dummy pattern below the damaged insulating film portion.

  Embodiments according to the present invention will be described below with reference to the drawings. In the description of the embodiment described below, the same reference numerals are given to the same components as those of the above-described conventional example, and the duplicate description of the common parts is omitted.

  In FIG. 1A, the characteristic components in this embodiment are extracted and simplified in the acceleration sensor 1 which is a semiconductor device. FIG. 1B shows a schematic cross-sectional view of the aa portion of FIG. In the acceleration sensor 1 of this embodiment, a dummy pattern 25 is formed in the surface side region of the active layer 12 of the SOI substrate 13 located below the wiring pattern 18 and the electrode pad 19 that are conductor patterns. The dummy pattern 25 is formed to extend from the connection portion of the wiring patterns 17 and 18 to the region below the formation region of the electrode pad 19 while facing the wiring pattern 18. In this embodiment, the wiring pattern 17 is made of the same p-type semiconductor. The dummy pattern 25 is connected to the connection portion of the wiring patterns 17 and 18, and the potential of the dummy pattern 25 is substantially the same as the potential of the wiring pattern 18 and the electrode pad 19. In addition, since a PN junction portion between the dummy pattern 25 made of a p-type semiconductor and the active layer 12 made of an n-type semiconductor has a depletion layer in the same manner as the PN junction portion between the wiring pattern 17 and the active layer 12, The dummy pattern 25 is insulated from the active layer 12 by the depletion layer. Further, since the dummy pattern 25 is composed of the same p-type semiconductor as the wiring pattern 17 as described above, the wiring pattern 17 is formed on the active layer 12 of the SOI substrate 13 in the manufacturing process of the acceleration sensor 1. At the same time, it can be formed, and the complication of the manufacturing process can be avoided.

  In this embodiment, as described above, the dummy pattern 25 is provided in the surface side region of the active layer 12 below the wiring pattern 18, and the potential of the dummy pattern 25 is substantially the same as that of the wiring pattern 18. For this reason, it is possible to prevent an electric field from being generated in the portion of the insulating film 20 below the wiring pattern 18. For this reason, generation | occurrence | production of ion migration can be suppressed, the short circuit problem of the wiring pattern 18 can be avoided, and the corrosion of the wiring pattern 18 can also be avoided. For this reason, in this embodiment, the protective film 22 conventionally provided to protect the wiring pattern 18 is omitted.

  The other configuration of the acceleration sensor 1 in this embodiment is the same as that of the acceleration sensor 1 shown in FIG.

  In addition, this invention is not limited to the form of this embodiment, Various embodiment can be taken. For example, in this embodiment, the dummy pattern 25 extends from a region below the formation region of the wiring pattern 18 to a region below the formation region of the electrode pad 19. The electrode pad 19 is formed so as to face the entire region. However, the insulating film 20 can be prevented from being damaged due to wire bonding, for example, because the electrode pad 19 is formed thick. If it is assumed that the occurrence of a short circuit problem with the layer 12 is avoided, the dummy pattern 25 may not be extended to the lower side of the electrode pad 19. Further, in this embodiment, the dummy pattern 25 is formed so as to face the entire length of the wiring pattern 18, but the dummy pattern 25 is connected from the connection end with the wiring pattern 17 to the connection end with the electrode pad 19. The wiring pattern 18 may be formed so as to face a partial region up to a middle position of the wiring pattern 18 leading to the portion.

  Further, in this embodiment, the semiconductor substrate is the SOI substrate 13 having a multilayer structure, but the semiconductor substrate may be a single layer. Furthermore, in this embodiment, the active layer 12 is composed of an n-type semiconductor, and the wiring pattern 17 and the dummy pattern 25 are composed of a p-type semiconductor. For example, the active layer 12 is composed of a p-type semiconductor, The wiring pattern (conductor pattern) 17 and the dummy pattern 25 may be made of an n-type semiconductor. Thus, the semiconductor substrate of the semiconductor device to which the present invention is applied is formed on one side of the n-type and the p-type, and the conductor pattern and the dummy pattern are formed in a p-type or n-type different from the semiconductor substrate. It only has to be.

  Further, in this embodiment example, the conductor pattern provided with the dummy pattern 25 facing is configured to include the wiring pattern 18 and the electrode pad 19, but for example, the wiring pattern 17 in the surface side region of the semiconductor substrate When directly connected to the electrode pad 19 through the contact hole 21 of the insulating layer 20, the wiring pattern 18 is omitted, so the dummy pattern 25 is formed to face only the electrode pad 19. . Further, in this embodiment, the dummy pattern 25 is formed so as to face the wiring pattern 18 and the electrode pad 19 which are conductor patterns. For example, an inductance or a capacitor is formed on the insulating film on the surface of the semiconductor substrate. When a conductor pattern having a shape that can function as a circuit element is formed, and one end side of the conductor pattern is connected to a wiring pattern in a surface side region of the semiconductor substrate through a contact hole of an insulating film. The dummy pattern 25 may be formed opposite to the conductor pattern that functions as the circuit element. Thus, the conductor pattern provided with the dummy patterns facing each other is not limited to the wiring pattern or the electrode pad. Further, in this embodiment, the wiring pattern 18 does not overlap the wiring pattern 17 except for the connection end with the wiring pattern 17. For example, depending on the routing route of the wiring patterns 17 and 18, the wiring pattern 18 17 and 18 may be formed so as to overlap each other in a three-dimensional intersection with an insulating layer interposed therebetween.

  Furthermore, in this embodiment, the acceleration sensor 1 has been described as an example. However, the present invention is a wiring pattern formed on the surface side region of the semiconductor substrate, and is laminated on the surface of the semiconductor substrate so as to cover the wiring pattern. The insulating layer that is formed, the contact hole that is formed through the insulating layer on the upper side of the end position of the wiring pattern, and one end of the insulating layer is connected to the end of the wiring pattern via the contact hole. Therefore, the present invention is not limited to the acceleration sensor and can be applied to any semiconductor device having a conductor pattern formed in this manner.

It is typical sectional drawing which extracted and showed the characteristic component part in the semiconductor device of the example of an embodiment concerning the present invention. It is a figure for demonstrating one prior art example of the acceleration sensor which is one of the semiconductor devices. FIG. 3 is a schematic cross-sectional view for explaining a configuration example of external connection means in the acceleration sensor of FIG. 2. It is sectional drawing for demonstrating an example of the package structure which airtightly seals the acceleration sensor of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Acceleration sensor 13 SOI substrate 12 Active layer 17, 18 Wiring pattern 19 Electrode pad 25 Dummy pattern

Claims (2)

a semiconductor substrate formed on one side of either p-type or n-type;
A wiring pattern on the other side of the p-type and n-type formed in the surface side region of the semiconductor substrate;
An insulating layer formed on the surface of the semiconductor substrate so as to cover the wiring pattern;
A contact hole formed through the insulating layer above the end position of the wiring pattern;
On the insulating layer, a conductor pattern formed by connecting one end side to the end of the wiring pattern through the contact hole;
A semiconductor device comprising:
A semiconductor device, wherein a dummy pattern electrically connected to the wiring pattern is provided opposite to the conductor pattern in a surface side region of the semiconductor substrate below the conductor pattern.   The semiconductor device according to claim 1, wherein the conductor pattern includes a wiring pattern and an electrode pad.

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