JP2008203654A - Display device and driving method thereof - Google Patents

Abstract

Provided is a display device capable of suppressing unevenness in light emission luminance accompanying a complicated control sequence.
A pixel 2 includes a light emitting element EL, a sampling transistor T1, a driving transistor T2, and a storage capacitor C1. The sampling transistor T1 is turned on in response to the control signal supplied from the scanning line WS, samples the signal potential Vsig supplied from the signal line SL, and holds it in the holding capacitor C1. The control scanner 4 outputs a control signal having a predetermined time width to the scanning line WS in order to bring the sampling transistor T1 into a conductive state in a time zone in which the signal line SL is at the signal potential Vsig, thereby holding the storage capacitor C1. The signal potential Vsig is held at the same time, and at the same time, the correction for the mobility μ of the driving transistor T2 is applied to the signal potential Vsig. At this time, the intermediate level between the high potential side and the low potential side of the control signal is set to coincide with the level obtained by adding the threshold voltage of the sampling transistor T1 to the maximum level of the signal potential.
[Selection] Figure 2

Description

  The present invention relates to an active matrix display device using a light emitting element for a pixel and a driving method thereof.

  In recent years, development of flat self-luminous display devices using organic EL devices as light-emitting elements has become active. An organic EL device is a device that utilizes the phenomenon of light emission when an electric field is applied to an organic thin film. Since the organic EL device is driven at an applied voltage of 10 V or less, it has low power consumption. In addition, since the organic EL device is a self-luminous element that emits light, it does not require an illumination member and can be easily reduced in weight and thickness. Furthermore, since the response speed of the organic EL device is as high as several μs, an afterimage does not occur when displaying a moving image.

Among planar self-luminous display devices that use organic EL devices as pixels, active matrix display devices in which thin film transistors are integrated and formed as driving elements in each pixel are particularly active. Active matrix type flat self-luminous display devices are described in, for example, Patent Documents 1 to 5 below.
JP 2003-255856 A JP 2003-271095 A JP 2004-133240 A JP 2004-029791 A JP 2004-093682 A

  FIG. 18 is a schematic circuit diagram showing an example of a conventional active matrix display device. The display device includes a pixel array unit 1 and peripheral driving units. The drive unit includes a horizontal selector 3 and a write scanner 4. The pixel array unit 1 includes columnar signal lines SL and row-shaped scanning lines WS. Pixels 2 are arranged at the intersections between the signal lines SL and the scanning lines WS. In the figure, only one pixel 2 is shown for easy understanding. The write scanner 4 includes a shift register, operates in response to an externally supplied clock signal ck, and sequentially transfers start pulses sp supplied from the outside, thereby sequentially outputting control signals to the scanning lines WS. . The horizontal selector 3 supplies a video signal to the signal line SL in accordance with the line sequential scanning on the write scanner 4 side.

  The pixel 2 includes a sampling transistor T1, a driving transistor T2, a storage capacitor C1, and a light emitting element EL. The driving transistor T2 is a P-channel type, its source is connected to the power supply line, and its drain is connected to the light emitting element EL. The gate of the driving transistor T2 is connected to the signal line SL via the sampling transistor T1. The sampling transistor T1 is turned on in response to the control signal supplied from the write scanner 4, samples the video signal supplied from the signal line SL, and writes it to the holding capacitor C1. The driving transistor T2 receives the video signal written in the storage capacitor C1 as the gate voltage Vgs at the gate thereof, and causes the drain current Ids to flow through the light emitting element EL. As a result, the light emitting element EL emits light with a luminance corresponding to the video signal. The gate voltage Vgs represents the gate potential with reference to the source.

The driving transistor T2 operates in the saturation region, and the relationship between the gate voltage Vgs and the drain current Ids is expressed by the following characteristic equation.
Ids = (1/2) μ (W / L) Cox (Vgs−Vth) ²
Here, μ is the mobility of the driving transistor, W is the channel width of the driving transistor, L is the same channel length, Cox is the same gate insulation capacitance, and Vth is the same threshold voltage. As is apparent from this characteristic equation, the driving transistor T2 functions as a constant current source that supplies the drain current Ids according to the gate voltage Vgs when operating in the saturation region.

  FIG. 19 is a graph showing voltage / current characteristics of the light emitting element EL. The horizontal axis represents the anode voltage V, and the vertical axis represents the drive current Ids. The anode voltage of the light emitting element EL is the drain voltage of the driving transistor T2. In the light emitting element EL, the current / voltage characteristics change with time, and the characteristic curve tends to fall with time. For this reason, the anode voltage (drain voltage) V changes even if the drive current Ids is constant. In that respect, in the pixel circuit 2 shown in FIG. 18, the driving transistor T2 operates in the saturation region, and the driving current Ids corresponding to the voltage Vgs can flow at the gate regardless of the fluctuation of the drain voltage. It is possible to keep the light emission luminance constant regardless of the change in the characteristics over time.

  FIG. 20 is a circuit diagram showing another example of a conventional pixel circuit. A difference from the pixel circuit shown in FIG. 18 is that the driving transistor T2 is changed from the P-channel type to the N-channel type. In the circuit manufacturing process, it is often advantageous to make all the transistors constituting the pixel N-channel type.

  However, in the circuit configuration of FIG. 20, since the driving transistor T2 is an N-channel type, its drain is connected to the power supply line, while its source S is connected to the anode of the light emitting element EL. Therefore, when the characteristics of the light emitting element EL change over time, the potential of the source S is affected, so that Vgs changes and the drain current Ids supplied by the driving transistor T2 changes over time. For this reason, there exists a subject that the brightness | luminance of light emitting element EL changes with time.

  Further, the threshold voltage Vth and mobility μ of the driving transistor T2 also vary from pixel to pixel. Since these parameters μ and Vth are included in the transistor characteristic formula described above, Ids changes even if Vgs is constant. As a result, the light emission luminance changes for each pixel, which is a problem to be solved.

  In view of the above-described problems of the prior art, the present invention is a simple pixel circuit composed of two transistors, one storage capacitor, and one light emitting element. An object of the present invention is to provide a display device having uniform light emission luminance without being affected by variations in voltage and mobility. A configuration that eliminates various emission luminance variation factors while minimizing the number of constituent elements of the pixel circuit inevitably complicates the control sequence, signal and potential setting of the power supply, and this causes uneven emission luminance. May appear. SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a display device that can suppress unevenness in light emission luminance accompanying complicated control sequences and potential settings. In order to achieve this purpose, the following measures were taken. That is, the present invention comprises a pixel array section and a drive section for driving the pixel array section, and the pixel array section has a matrix-like arrangement in which row-shaped scanning lines and column-shaped signal lines are arranged at the intersecting portions. The drive unit includes a pixel and a power supply line arranged corresponding to each row of the pixel, and the drive unit sequentially outputs a control signal by switching each scanning line between a low potential and a high potential, and the pixels are arranged in units of rows. A control scanner that performs line sequential scanning, a power supply scanner that supplies a power supply voltage that switches between a first potential and a second potential to each power supply line in accordance with the line sequential scanning, and a column-shaped signal in accordance with the line sequential scanning A signal selector that supplies a signal potential to be a video signal and a reference potential to the line, and the pixel includes a light emitting element, a sampling transistor, a driving transistor, and a storage capacitor, and the sampling transistor includes: The gate is running One of the source and drain is connected to the signal line, the other is connected to the gate of the driving transistor, and the driving transistor has one of the source and drain connected to the light emitting element. The other is connected to the power supply line, and the storage capacitor is connected between the source and gate of the driving transistor, and the sampling transistor is controlled by the scanning line. Conducting according to a signal, sampling the signal potential supplied from the signal line and holding it in the holding capacitor, and the driving transistor is supplied with current from the feeder line at the first potential and held there A driving current is supplied to the light emitting element in accordance with the signal potential, and the control scanner makes the sampling transistor conductive in a time zone in which the signal line is at the signal potential. The control scanner outputs a control signal having a predetermined time width to the scanning line, thereby holding the signal potential in the storage capacitor, and simultaneously correcting the mobility of the driving transistor to the signal potential. The intermediate level between the high potential side and the low potential side of the control signal is set to coincide with a level obtained by adding the threshold voltage of the sampling transistor to the maximum level of the signal potential.

  Preferably, the control scanner outputs a pulsed control signal having a shorter time width to the scanning line than the time period in order to bring the sampling transistor into a conductive state during the time period when the signal line is at the signal potential. Then, it is applied to the gate of the sampling transistor to make it conductive. Further, the control scanner makes the sampling transistor nonconductive when the signal potential is held in the holding capacitor, and electrically disconnects the gate of the driving transistor from the signal line, thereby The gate potential interlocks with the fluctuation of the source potential of the driving transistor, and the voltage between the gate and the source is kept constant. The power supply scanner switches the power supply line from the first potential to the second potential at the first timing before the sampling transistor samples the signal potential. The control scanner also detects that the sampling transistor Before sampling the potential, the sampling transistor is turned on at a second timing to apply a reference potential from the signal line to the gate of the driving transistor, and set the source of the driving transistor to the second potential, The power supply scanner switches the power supply line from the second potential to the first potential at a third timing after the second timing, and holds a voltage corresponding to the threshold voltage of the driving transistor in the storage capacitor. Keep it.

  According to the present invention, in an active matrix display device using a light emitting element such as an organic EL device as a pixel, each pixel has a mobility correcting function of the driving transistor, and preferably the threshold voltage of the driving transistor. A correction function and an organic EL device temporal variation correction function (bootstrap function) are also provided, so that high-quality image quality can be obtained. In the present invention, the above-described various correction functions can be implemented with a circuit configuration in which the number of constituent elements and the number of wirings are minimized by switching the power supply voltage and the signal potential. The number of constituent elements of each pixel is a minimum of two transistors, one storage capacitor, and one light emitting element, which can reduce the layout area of the pixel. Therefore, it is possible to provide a high-quality and high-definition flat display.

  By the way, if various correction functions are implemented with the number of elements being suppressed, the control sequence, power supply, and signal potential setting are inevitably complicated. As a result, the writing time of the video signal to the storage capacitor may vary and appear as unevenness in light emission luminance. Therefore, the present invention makes the intermediate level between the high potential side and the low potential side of the control signal for controlling the conduction of the sampling transistor exactly coincide with the level obtained by adding the threshold voltage of the sampling transistor to the maximum level of the signal potential. ing. As a result, the conduction time of the sampling transistor (that is, the signal potential writing time) becomes constant, and there is no variation between pixels. As a result, it is possible to suppress unevenness in light emission luminance that tends to occur with the complexity of the control sequence and potential setting.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing the overall configuration of a display device according to the present invention. As shown in the figure, the display device includes a pixel array unit 1 and driving units (3, 4, 5) for driving the pixel array unit 1. The pixel array unit 1 includes a row-like scanning line WS, a column-like signal line SL, a matrix-like pixel 2 arranged at a portion where both intersect, and a supply corresponding to each row of each pixel 2. And an electric wire DS. The drive unit (3, 4, 5) supplies a control signal to each scanning line WS sequentially to scan the pixels 2 line-sequentially in units of rows, and a control scanner (write scanner) 4 in accordance with this line-sequential scanning. A power supply scanner (drive scanner) 5 for supplying a power supply voltage to be switched between the first potential and the second potential to each power supply line DS, and a signal potential that becomes a video signal on the column-shaped signal line SL in accordance with the line sequential scanning. And a signal selector (horizontal selector) 3 for supplying a reference potential. The write scanner 4 operates in response to a clock signal WSck supplied from the outside, and sequentially transfers start pulses WSsp supplied from the outside, thereby outputting a control signal to each scanning line WS. The drive scanner 5 operates in response to a clock signal DSck supplied from outside, and sequentially transfers start pulses DSsp supplied from the outside, thereby switching the potential of the power supply line DS line-sequentially.

  FIG. 2 is a circuit diagram showing a specific configuration of the pixel 2 included in the display device shown in FIG. As shown in the figure, the pixel circuit 2 includes a two-terminal (diode type) light emitting element EL represented by an organic EL device, an N-channel sampling transistor T1, and an N-channel driving transistor T2. And a thin film type storage capacitor C1. The sampling transistor T1 has its gate connected to the scanning line WS, one of its source and drain connected to the signal line SL, and the other connected to the gate G of the driving transistor T2. One of the source and the drain of the driving transistor T2 is connected to the light emitting element EL, and the other is connected to the power supply line DS. In this embodiment, the driving transistor T2 is on the N channel side, the drain side is connected to the power supply line DS, and the source S side is connected to the anode side of the light emitting element EL. The cathode of the light emitting element EL is fixed at a predetermined cathode potential Vcat. The storage capacitor C1 is connected between the source S and the gate G of the driving transistor T2. For the pixel 2 having such a configuration, the control scanner (write scanner) 4 sequentially outputs a control signal by switching the scanning line WS between a low potential and a high potential, and the pixels 2 are line-sequentially in units of rows. Scan. The power supply scanner (drive scanner) 5 supplies a power supply voltage to be switched between the first potential Vcc and the second potential Vss to each power supply line DS in accordance with line sequential scanning. The signal selector (horizontal selector) 3 supplies a signal potential Vsig and a reference potential Vofs, which are video signals, to the column-shaped signal lines SL in accordance with line sequential scanning.

  In such a configuration, the sampling transistor T1 is turned on in response to the control signal supplied from the scanning line WS, samples the signal potential Vsig supplied from the signal line SL, and holds it in the holding capacitor C1. The driving transistor T2 is supplied with a current from the power supply line DS at the first potential Vcc, and passes a driving current to the light emitting element EL according to the signal potential Vsig held in the holding capacitor C1. The control scanner 4 outputs a control signal having a predetermined time width to the scanning line WS in order to bring the sampling transistor T1 into a conductive state in a time zone in which the signal line SL is at the signal potential Vsig, thereby holding the storage capacitor C1. At the same time, the signal potential Vsig is held, and at the same time, the correction for the mobility μ of the driving transistor T2 is applied to the signal potential Vsig.

  As a feature of the present invention, the control scanner (write scanner) 4 has a sampling transistor T1 in which the intermediate level between the high potential side and the low potential side of the control signal is set to the maximum level of the signal potential Vsig (ie, the level corresponding to the white gradation). The threshold voltage is set to match the level obtained by adding the threshold voltages. At this time, preferably, the control scanner 4 applies a pulsed control signal having a shorter time width to the scanning line in order to bring the sampling transistor T1 into a conductive state in a time zone where the signal line SL is at the signal potential Vsig. Output to WS and apply to the gate of the sampling transistor T1 to make it conductive.

  If various correction functions are implemented while suppressing the number of elements, the control sequence, power supply, and signal potential setting are inevitably complicated. As a result, the writing time of the video signal to the storage capacitor may vary and appear as unevenness in light emission luminance. Therefore, the present invention makes the intermediate level between the high potential side and the low potential side of the control signal for controlling the conduction of the sampling transistor exactly coincide with the level obtained by adding the threshold voltage of the sampling transistor to the maximum level of the signal potential. ing. As a result, the time during which the sampling transistor is conductive (that is, the signal potential writing time and the mobility correction time) is constant, and there is no variation between pixels. As a result, it is possible to suppress unevenness in light emission luminance that tends to occur with the complexity of the control sequence and potential setting.

  The pixel circuit shown in FIG. 2 has a threshold voltage correction function in addition to the mobility correction function described above. That is, the power supply scanner (drive scanner) 5 switches the power supply line DS from the first potential Vcc to the second potential Vss at the first timing before the sampling transistor T1 samples the signal potential Vsig. Similarly, before the sampling transistor T1 samples the signal potential Vsig, the control scanner (write scanner) 4 conducts the sampling transistor T1 at the second timing to supply the reference potential Vofs from the signal line SL to the driving transistor T2. While being applied to the gate G, the source S of the driving transistor T2 is set to the second potential Vss. The power supply scanner (drive scanner) 5 switches the power supply line DS from the second potential Vss to the first potential Vcc at a third timing after the second timing, and sets a voltage corresponding to the threshold voltage Vth of the driving transistor T2. It is held in the holding capacitor C1. With this threshold voltage correction function, the display device can cancel the influence of the threshold voltage Vth of the driving transistor T2 that varies from pixel to pixel. Note that the timing before and after the first timing and the second timing does not matter.

  The pixel circuit 2 shown in FIG. 2 further has a bootstrap function. That is, when the signal potential Vsig is held in the holding capacitor C1, the write scanner 4 turns off the sampling transistor T1 to electrically disconnect the gate G of the driving transistor T2 from the signal line SL. The gate potential is interlocked with the change in the source potential of the driving transistor T2, and the voltage Vgs between the gate G and the source S is maintained constant. Even if the current / voltage characteristics of the light emitting element EL change with time, the gate voltage Vgs can be kept constant, and the luminance does not change.

  FIG. 3 is a timing chart for explaining the operation of the pixel shown in FIG. This timing chart is an example, and the control sequence of the pixel circuit shown in FIG. 2 is not limited to the timing chart of FIG. This timing chart shows a change in the potential of the scanning line WS, a change in the potential of the power supply line DS, and a change in the potential of the signal line SL with a common time axis. The potential change of the scanning line WS represents a control signal, and the opening / closing control of the sampling transistor T1 is performed. The change in the potential of the power supply line DS represents switching between the power supply voltages Vcc and Vss. Further, the potential change of the signal line SL represents switching between the signal potential Vsig of the input signal and the reference potential Vofs. In parallel with these potential changes, the potential changes of the gate G and the source S of the driving transistor T2 are also shown. As described above, the potential difference between the gate G and the source S is Vgs.

  In this timing chart, the periods are divided for convenience as (1) to (7) in accordance with the transition of the operation of the pixel. In the period (1) immediately before entering the field, the light emitting element EL is in a light emitting state. After that, a new field of line sequential scanning is entered, and in the first period (2), the feeder line DS is switched from the first potential Vcc to the second potential Vss. In the next period (3), the input signal is switched from Vsig to Vofs. Further, the sampling transistor T1 is turned on in the next period (4). During this period (2) to (4), the gate voltage and the source voltage of the driving transistor T2 are initialized. Periods (2) to (4) are preparation periods for threshold voltage correction. The gate G of the driving transistor T2 is initialized to Vofs, while the source S is initialized to Vss. Subsequently, a threshold voltage correction operation is actually performed in the threshold correction period (5), and a voltage corresponding to the threshold voltage Vth is held between the gate G and the source S of the driving transistor T2. Actually, a voltage corresponding to Vth is written in the holding capacitor C1 connected between the gate G and the source S of the driving transistor T2. Thereafter, the process proceeds to the writing period / mobility correction period (6). Here, the signal potential Vsig of the video signal is written into the storage capacitor C1 in a form added to Vth, and the mobility correction voltage ΔV is subtracted from the voltage held in the storage capacitor C1. In the writing period / mobility correction period (6), the sampling transistor T1 needs to be turned on in a time zone in which the signal line SL is at the signal potential Vsig. Thereafter, the process proceeds to the light emission period (7), and the light emitting element emits light with a luminance corresponding to the signal potential Vsig. At that time, since the signal potential Vsig is adjusted by a voltage corresponding to the threshold voltage Vth and the mobility correction voltage ΔV, the light emission luminance of the light emitting element EL varies in the threshold voltage Vth and mobility μ of the driving transistor T2. Will not be affected. Note that a bootstrap operation is performed at the beginning of the light emission period (7), and the gate potential and the source potential of the driving transistor T2 rise while the gate G / source S voltage Vgs of the driving transistor T2 is kept constant.

  The operation of the pixel circuit shown in FIG. 2 will be described in detail with reference to FIGS. First, as shown in FIG. 4, in the light emission period (1), the power supply potential is set to Vcc, and the sampling transistor T1 is turned off. At this time, since the driving transistor T2 is set so as to operate in the saturation region, the driving current Ids flowing through the light emitting element EL depends on the voltage Vgs applied between the gate G and the source S of the driving transistor T2. The value shown by the transistor characteristic equation described above is taken.

  Subsequently, as shown in FIG. 5, when the preparation periods (2) and (3) are entered, the potential of the power supply line (power supply line) is set to Vss. At this time, Vss is set to be smaller than the sum of the threshold voltage Vthel and the cathode voltage Vcat of the light emitting element EL. That is, since Vss <Vthel + Vcat, the light emitting element EL is turned off, and the power supply line side becomes the source of the driving transistor T2. At this time, the anode of the light emitting element EL is charged to Vss.

  Further, as shown in FIG. 6, in the next preparation period (4), the potential of the signal line SL becomes Vofs, while the sampling transistor T1 is turned on, and the gate potential of the driving transistor T2 is set to Vofs. In this way, the source S and the gate G of the driving transistor T2 are initialized, and the gate voltage Vgs at this time becomes a value of Vofs−Vss. Vgs = Vofs−Vss is set to be larger than the threshold voltage Vth of the driving transistor T2. In this way, by initializing the drive transistor T2 so that Vgs> Vth, preparation for the next threshold voltage correction operation is completed.

  Subsequently, as shown in FIG. 7, when proceeding to the threshold voltage correction period (5), the potential of the feeder line DS (power supply line) returns to Vcc. By setting the power supply voltage to Vcc, the anode of the light emitting element EL becomes the source S of the driving transistor T2, and a current flows as shown in the figure. At this time, an equivalent circuit of the light emitting element EL is represented by a parallel connection of a diode Tel and a capacitor Cel as shown in the figure. Since the anode potential (that is, the source potential Vss) is lower than Vcat + Vthel, the diode Tel is in the off state, and the leak current flowing therethrough is considerably smaller than the current flowing through the driving transistor T2. Therefore, most of the current flowing through the driving transistor T2 is used to charge the holding capacitor C1 and the equivalent capacitor Cel.

  FIG. 8 shows the time change of the source voltage of the driving transistor T2 in the threshold voltage correction period (5) shown in FIG. As shown in the figure, the source voltage of the driving transistor T2 (that is, the anode voltage of the light emitting element EL) rises from Vss with time. When the threshold voltage correction period (5) elapses, the driving transistor T2 is cut off, and the voltage Vgs between the source S and the gate G becomes Vth. At this time, the source potential is given by Vofs−Vth. This value Vofs−Vth is still lower than Vcat + Vthel, and the light emitting element EL is in a cut-off state.

  Next, as shown in FIG. 9, in the writing period / mobility correction period (6), the potential of the signal line SL is switched from Vofs to Vsig while the sampling transistor T1 is continuously turned on. At this time, the signal potential Vsig is a voltage corresponding to the gradation. The gate potential of the driving transistor T2 is Vsig because the sampling transistor T1 is turned on. On the other hand, the source potential rises with time because current flows from the power supply Vcc. Even at this time, since the source potential of the driving transistor T2 does not exceed the sum of the threshold voltage Vthel and the cathode voltage Vcat of the light emitting element EL, the current flowing from the driving transistor T2 is exclusively used for charging the equivalent capacitor Cel and the holding capacitor C1. Is called. At this time, since the threshold voltage correction operation of the driving transistor T2 has already been completed, the current flowing through the driving transistor T2 reflects the mobility μ. Specifically, the driving transistor T2 having a high mobility μ has a large amount of current at this time, and the source potential increase ΔV is also large. On the contrary, when the mobility μ is small, the current amount of the driving transistor T2 is small, and the increase ΔV of the source is small. With this operation, the gate voltage Vgs of the driving transistor T2 is compressed by ΔV reflecting the mobility μ, and Vgs with the mobility μ completely corrected is obtained when the mobility correction period (6) is completed.

  FIG. 10 is a graph showing temporal changes in the source voltage of the driving transistor T2 during the mobility correction period (6) described above. As shown in the figure, when the mobility of the driving transistor T2 is large, the source voltage rises quickly, and Vgs is compressed accordingly. That is, when the mobility μ is large, Vgs is compressed so as to cancel the influence, and the drive current can be suppressed. On the other hand, when the mobility μ is small, the source voltage of the driving transistor T2 does not rise so fast, so that Vgs is not strongly compressed. Therefore, when the mobility μ is small, Vgs of the driving transistor is not compressed so as to compensate for the small driving capability.

  FIG. 11 shows an operation state in the light emission period (7). In this light emission period (7), the sampling transistor T1 is turned off to cause the light emitting element EL to emit light. The gate voltage Vgs of the driving transistor T2 is kept constant, and the driving transistor T2 passes a constant current Ids ′ to the light emitting element EL according to the above-described characteristic equation. The anode voltage of the light emitting element EL (that is, the source voltage of the driving transistor T2) flows to the light emitting element EL, so that the current Ids ′ rises to Vx, and the light emitting element EL emits light when this exceeds Vcat + Vthel. The light emitting element EL changes its current / voltage characteristics as the light emission time becomes longer. Therefore, the potential of the source S shown in FIG. 11 changes. However, since the gate voltage Vgs of the driving transistor T2 is maintained at a constant value by the bootstrap operation, the current Ids ′ flowing through the light emitting element EL does not change. Therefore, even if the current / voltage characteristics of the light emitting element EL deteriorate, a constant drive current Ids ′ always flows, and the luminance of the light emitting element EL does not change.

  FIG. 12 is a schematic diagram showing the operation in the signal writing period / mobility correction period. (A) represents a control signal waveform applied to a pixel located on the side closer to the control scanner. In other words, the waveform is observed on the control signal input side of the scanning line WS extending horizontally. On the other hand, (B) represents the waveform of the control signal observed on the side opposite to the input side.

  First, as shown in (A), on the input side, after the control signal rises at the timing t0 and the sampling transistor T1 is turned on, the signal line SL is switched from Vofs to Vsig at the timing t1. The period (t1-t2) until the falling sampling transistor T1 is turned off is the above-described writing period / mobility correction period (6). On the input side, the control signal is not deteriorated, and the writing period / mobility correction period (6) is as designed.

  On the other hand, on the side opposite to the input shown in (B), the control signal supplied to the scanning line WS is affected by the wiring resistance and the wiring capacitance, and the rising waveform and the falling waveform are dull. Such dullness does not affect the start period t1 of the writing period / mobility period, but affects the end period and causes a shift. In the illustrated example, the timing t2 ′ on the opposite side to the input is shifted backward with respect to the timing t2 on the input side. If the writing period / mobility correction period shifts along the scanning line WS in this way, a difference occurs in the degree of correction of the mobility μ, resulting in variations in Vgs, resulting in uneven emission luminance. Appear. Specifically, since the writing time is longer on the side opposite to the control signal input of the panel, it appears as shading on the screen. In particular, when the signal potential Vsig is at the maximum level (that is, when white display is performed), the increase amount ΔV of the source potential of the driving transistor during the mobility correction period is large. That is, as Vsig is higher, the current flowing through the driving transistor is increased, and a large negative feedback ΔV is applied to the storage capacitor, so that the source potential is significantly increased accordingly. For this reason, especially in white display, the variation of the writing time appears remarkably, resulting in image quality unevenness such as shading.

  FIG. 13 shows a modification of the operation sequence shown in FIG. 3, and copes with the above-described fluctuation of the writing period / mobility correction period. The basic control sequence is the same as the previous control sequence shown in FIG. 3 except for the control timing of the writing period / mobility correction period. In this example, after the threshold voltage correction period (5), the scanning line WS is once set to the low level in the preparation period (5a), and the sampling transistor T1 is turned off. Thereafter, the writing period / mobility correction period (6) proceeds, and the scanning transistor WS is set to the high level again in the time zone in which the input signal is at Vsig to turn on the sampling transistor T1. In other words, in this example, the write scanner 4 turns on the sampling transistor T1 in the time zone in which the signal line SL is at the signal potential Vsig. Therefore, a pulse-like control signal having a shorter time width than the time zone is applied to the scanning line WS. The signal is output and applied to the gate of the sampling transistor T1 to make it conductive.

  FIG. 14 is a schematic diagram showing, in particular, the writing period / mobility correction period (6) of the operation sequence shown in FIG. (A) represents the signal state on the input side, and (B) represents the signal state on the side opposite to the input. As shown in (A), after the signal line SL changes from Vofs to Vsig at timing t0, a pulsed control signal is applied to the scanning line WS to turn on the sampling transistor T1. Therefore, the writing period / mobility correction period (6) of this example is determined from the time t1 when the control signal rises to the time t2 when it falls. On the input side, the control signal pulse is hardly degraded and is a rectangular wave, and a writing period / mobility correction period as designed can be obtained.

  On the other hand, as shown in (B), on the side opposite to the input, the rise and fall of the control signal pulse are slow due to the propagation delay. However, when the pulse is dull, both rising and falling are shifted backward, so the writing period / mobility correction period between the two is not so different from the input side. Therefore, compared with the previous example shown in FIG. 12, this example shown in FIG. 14 has an operation sequence that is relatively resistant to dull control signal pulses, and variation in the writing period / mobility correction period is reduced.

  However, even in the operation sequence shown in FIG. 14, when the signal potential Vsig is at the highest level of white potential, there is a problem that the variation in the writing period / mobility correction period becomes remarkable and luminance unevenness appears. FIG. 15 schematically shows this problem, which is a case where the peak value of the control signal is higher than the white potential on the video signal side. The upper part of FIG. 15 represents the control signal pulse waveform observed on the input side of the panel, and the lower part is the control signal pulse waveform observed on the side opposite to the input. On the input side, the control signal pulse waveform is a substantially rectangular wave, and a writing period as set can be obtained. On the other hand, on the side opposite to the input, both rising and falling of the control signal pulse are greatly dull. Here, the source of the sampling transistor is connected to the signal line, and the gate is connected to the scanning line WS. Therefore, the sampling transistor is turned on when the waveform of the control signal applied to the gate exceeds the white potential of the input signal applied to the source. More precisely, the sampling transistor is turned on / off when the transient of the control pulse crosses the level obtained by adding the white voltage to the threshold voltage VthT1 of the sampling transistor. In the case opposite to the input side, both the rise and fall (transient) of the control signal pulse are dull. In particular, the dull fall is greatly affected, and the point of crossing the level of the white potential + VthT1 is greatly shifted backward. Therefore, on the side opposite to the input, the writing time is significantly increased, and the light emission luminance varies.

  FIG. 16 shows a case where the peak value of the control signal pulse is not so high compared to the white potential of the input signal. At this time, although no particular problem occurs on the input side as shown in the upper part of FIG. 16, the writing period also changes on the opposite side as shown in the lower part and appears as uneven brightness. In the case of the lower stage of FIG. 16, the control signal pulse dulls both at the rising and falling edges, but particularly the dull rising edge greatly affects the time point of crossing the white potential + VthT1 level. It will be shorter than that.

FIG. 17 shows the potential setting according to the present invention and addresses the problems shown in FIGS. 15 and 16. The upper part of FIG. 17 represents the control signal pulse waveform observed on the input side of the panel, and the lower part represents the control signal pulse waveform observed on the opposite side of the panel input side. As shown in the figure, in the present invention, the sum of the signal potential (white potential) Vw during white display and the threshold voltage VthT1 of the sampling transistor T1 is an intermediate potential between the high potential side level Vhigh and the low potential side level Vlow of the control signal. The voltage of the control signal pulse is set so as to match. That is, the high potential Vhigh and the low potential Vlow of the control signal pulse are set so that Vw + VthT1 = Vlow + (Vhigh−Vlow) / 2. As described above, the signal potential writing operation starts when the control signal of the sampling transistor exceeds the sum of the white voltage Vw and the threshold voltage VthT1 of T1. The rise of the control signal is expressed by the following equation with respect to time t, where τ is the time constant of the scanning line WS (gate line).
Vlow + (Vhigh−Vlow) × (1−exp (−t / τ)
Conversely, the fall of the control signal pulse is expressed as follows.
Vlow + (Vhigh−Vlow) × exp (−t / τ)
Here, when the voltage setting of the present invention is adopted, the control signal pulse observed in the opposite direction from the input side is shifted backward to some extent by the time that the rising edge of the pulse crosses the level of the white potential + VthT1. Similarly, the time when the falling edge of the control pulse crosses the level of the white potential + VthT1 is also shifted backward to some extent. Here, if the level of the white potential + VthT1 is positioned exactly in the middle of the control signal pulse, the amount of shift to the rear at the rising edge and the falling edge becomes almost equal, and as a result, the writing time is almost the same as the input side. With this potential setting, the writing period can be matched between the input side and the opposite side, and unevenness such as shading can be reduced. Since a pixel circuit composed of two transistors and one storage capacitor has a very strict tolerance for writing time, the voltage setting of the present invention makes it possible for the first time to set the difference in writing time between the input side and the input opposite side of the panel in white display. It is possible to eliminate it.

1 is a block diagram showing an overall configuration of a display device according to the present invention. FIG. 2 is a circuit diagram illustrating an example of a pixel formed in the display device illustrated in FIG. 1. 3 is a timing chart for explaining the operation of the pixel shown in FIG. 2. FIG. 3 is a schematic diagram for explaining the operation of the pixel shown in FIG. 2. It is a schematic diagram for explaining the operation in the same manner. It is a schematic diagram for explaining the operation in the same manner. It is a schematic diagram for explaining the operation in the same manner. It is a graph similarly provided for operation | movement description. It is a schematic diagram for explaining the operation in the same manner. It is a graph similarly provided for operation | movement description. It is a schematic diagram for explaining the operation in the same manner. 6 is a timing chart for explaining the operation. 6 is a timing chart for explaining the operation. It is a wave form diagram similarly provided for operation | movement description. It is a wave form diagram similarly provided for operation | movement description. It is a wave form diagram similarly provided for operation | movement description. It is a wave form diagram similarly provided for operation | movement description. It is a circuit diagram which shows an example of the conventional display apparatus. It is a graph which shows the current / voltage characteristic of a light emitting element. It is a circuit diagram which shows the other example of the conventional display apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Pixel array, 2 ... Pixel, 3 ... Signal selector, 4 ... Control scanner, 5 ... Power supply scanner, T1 ... Sampling transistor, T2 ... Drive transistor , C1... Holding capacitor, EL... Light emitting element, WS... Scanning line, DS.

Claims (5)

It consists of a pixel array part and a drive part that drives it,
The pixel array unit includes a row-like scanning line, a column-like signal line, a matrix-like pixel arranged at a portion where both intersect, and a power supply line arranged corresponding to each row of pixels,
The drive unit sequentially outputs a control signal by switching each scanning line between a low potential and a high potential, and a control scanner that scans pixels line by line in a row unit,
A power supply scanner that supplies a power supply voltage that switches between a first potential and a second potential to each power supply line in accordance with the line sequential scanning;
A signal selector that supplies a signal potential to be a video signal and a reference potential to the column-shaped signal lines in accordance with the line sequential scanning, and
The pixel includes a light emitting element, a sampling transistor, a driving transistor, and a storage capacitor.
The sampling transistor has its gate connected to the scanning line, one of its source and drain connected to the signal line, and the other connected to the gate of the driving transistor,
The driving transistor has one of a source and a drain connected to the light emitting element, and the other connected to the feeder line.
The storage capacitor is a display device connected between a source and a gate of the driving transistor,
The sampling transistor is turned on in response to a control signal supplied from the scanning line, samples the signal potential supplied from the signal line, and holds it in the storage capacitor,
The driving transistor receives a supply of current from the power supply line at a first potential, and causes a driving current to flow to the light emitting element according to the held signal potential.
The control scanner outputs a control signal having a predetermined time width to the scanning line in order to bring the sampling transistor into a conductive state in a time zone in which the signal line is at the signal potential, and thus to the storage capacitor. While maintaining the signal potential, a correction for the mobility of the driving transistor is added to the signal potential,
In the control scanner, the intermediate level between the high potential side and the low potential side of the control signal is set to coincide with a level obtained by adding the threshold voltage of the sampling transistor to the maximum level of the signal potential. Display device.   The control scanner outputs a pulsed control signal having a time width shorter than the time period to the scanning line in order to bring the sampling transistor into a conductive state during a time period when the signal line is at a signal potential. 2. A display device according to claim 1, wherein the display transistor is applied to the gate of the sampling transistor to make it conductive.   When the signal potential is held in the holding capacitor, the control scanner sets the sampling transistor in a non-conductive state and electrically disconnects the gate of the driving transistor from the signal line. 2. A display device according to claim 1, wherein the gate potential is interlocked with the fluctuation of the source potential of the transistor for maintaining the voltage between the gate and the source constant. The power supply scanner switches the power supply line from the first potential to the second potential at the first timing before the sampling transistor samples the signal potential.
The control scanner also applies the reference potential from the signal line to the gate of the driving transistor by making the sampling transistor conductive at the second timing before the sampling transistor samples the signal potential. Set the source of the driving transistor to the second potential,
The power supply scanner switches the power supply line from the second potential to the first potential at a third timing after the second timing, and holds a voltage corresponding to the threshold voltage of the driving transistor in the storage capacitor. The display device according to claim 1, wherein It consists of a pixel array part and a drive part that drives it,
The pixel array unit includes a row-like scanning line, a column-like signal line, a matrix-like pixel arranged at a portion where both intersect, and a power supply line arranged corresponding to each row of pixels,
The drive unit sequentially outputs a control signal by switching each scanning line between a low potential and a high potential, and a control scanner that scans pixels line by line in a row unit,
A power supply scanner that supplies a power supply voltage that switches between a first potential and a second potential to each power supply line in accordance with the line sequential scanning;
A signal selector that supplies a signal potential to be a video signal and a reference potential to the column-shaped signal lines in accordance with the line sequential scanning, and
The pixel includes a light emitting element, a sampling transistor, a driving transistor, and a storage capacitor.
The sampling transistor has its gate connected to the scanning line, one of its source and drain connected to the signal line, and the other connected to the gate of the driving transistor,
The driving transistor has one of a source and a drain connected to the light emitting element, and the other connected to the feeder line.
The storage capacitor is a driving method of a display device connected between a source and a gate of the driving transistor,
The sampling transistor is turned on in response to a control signal supplied from the scanning line, samples the signal potential supplied from the signal line, and holds it in the storage capacitor;
The driving transistor receives a supply of current from the feeder line at a first potential, and causes a driving current to flow to the light emitting element in accordance with the held signal potential;
The control scanner outputs a control signal having a predetermined time width to the scanning line in order to bring the sampling transistor into a conductive state in a time zone in which the signal line is at the signal potential, and thus to the storage capacitor. While maintaining the signal potential, a correction for the mobility of the driving transistor is added to the signal potential,
Driving the display device, wherein an intermediate level between the high potential side and the low potential side of the control signal is set to coincide with a level obtained by adding the threshold voltage of the sampling transistor to the maximum level of the signal potential Method.

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