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JP2008288225A - Capacitor and manufacturing method thereof, and substrate with built-in capacitor and manufacturing method thereof - Google Patents

Capacitor and manufacturing method thereof, and substrate with built-in capacitor and manufacturing method thereof Download PDF

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Publication number
JP2008288225A
JP2008288225A JP2005210754A JP2005210754A JP2008288225A JP 2008288225 A JP2008288225 A JP 2008288225A JP 2005210754 A JP2005210754 A JP 2005210754A JP 2005210754 A JP2005210754 A JP 2005210754A JP 2008288225 A JP2008288225 A JP 2008288225A
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Prior art keywords
conductor
capacitor
hole
green sheet
dielectric layer
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Inventor
Kichiyoshi Oyabu
吉致 大藪
Hiroshi Kunimatsu
宏 國松
Tadahiro Namikawa
忠洋 南川
Masayoshi Maeda
昌禎 前田
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Murata Manufacturing Co Ltd
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Murata Manufacturing Co Ltd
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Priority to JP2005210754A priority Critical patent/JP2008288225A/en
Priority to PCT/JP2006/312475 priority patent/WO2007010705A1/en
Publication of JP2008288225A publication Critical patent/JP2008288225A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/162Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/228Terminals
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/0929Conductive planes
    • H05K2201/09309Core having two or more power planes; Capacitive laminate of two power planes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09536Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/096Vertically aligned vias, holes or stacked vias

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Ceramic Capacitors (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a capacitor that does not adversely affect the characteristics of a dielectric layer even if forming a through hole or plating the through hole, to provide a method for manufacturing the capacitor, to provide a substrate incorporating the capacitor, and to provide a method of manufacturing the substrate incorporating the capacitor. <P>SOLUTION: The capacitor 100 has: a dielectric layer 10; a first capacitive electrode 21 formed on one main surface of the dielectric layer; and a second capacitive electrode 22 formed on the other main surface of the dielectric layer. The dielectric layer has a through conductor from one main surface to the other main surface, and a through hole is formed inside the through conductor. The substrate incorporating a capacitor has a substrate body having a wiring conductor, and the capacitor 100. In this case, the through conductor is connected to the wiring conductor electrically by a connection conductor formed inside the through hole. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、コンデンサ、該コンデンサを内蔵するコンデンサ内蔵基板およびそれらの製造方法に関する。   The present invention relates to a capacitor, a capacitor built-in substrate in which the capacitor is built, and a manufacturing method thereof.

電子機器に用いられる電子部品としてコンデンサがあり、電子機器の小型化に伴ってコンデンサも小型化が要求されているが、近年ではさらなる小型化のために、コンデンサを実装基板内に埋設することが行われている。   Capacitors are used as electronic components for electronic devices. Capacitors are required to be miniaturized as electronic devices are miniaturized. However, in recent years, capacitors can be embedded in a mounting board for further miniaturization. Has been done.

コンデンサを実装基板内に埋設することは、電子機器の小型化という利点のみならず、回路長が短縮されることによってインダクタンスが低減されるという利点もあり、高周波信号を使用する電子機器においては特にインダクタンスを低減することが重要であるため、この観点からもコンデンサの実装基板内への埋設が強く要求されている。   The embedding of the capacitor in the mounting board has not only the advantage of reducing the size of the electronic device, but also the advantage that the inductance is reduced by shortening the circuit length, particularly in an electronic device using a high-frequency signal. Since it is important to reduce the inductance, there is a strong demand for embedding the capacitor in the mounting board from this viewpoint.

実装基板への埋設に適したコンデンサおよびコンデンサを埋設した実装基板の例としては、特許文献1に記載のコンデンサおよび実装基板がある。特許文献1に記載のコンデンサは、金属箔上にMOD法(有機金属分解法)やスパッタ法によって誘電体層を形成し、該誘電体層上にスパッタ法によって導電層を形成してなる(特許文献1の図11)。そして、特許文献1の図14に記載されたプリント配線板は、このコンデンサを基板に埋め込み、基板の回路とコンデンサの電極とが、コンデンサを厚み方向に貫くように形成された回路導体によって接続されている。回路導体は、「めっきマイクロバイア」であると記載されている。
特開2005−39282(特に[0063]〜[0072]段落、図11〜図15)
Examples of a capacitor suitable for embedding in a mounting substrate and a mounting substrate in which the capacitor is embedded include a capacitor and a mounting substrate described in Patent Document 1. The capacitor described in Patent Document 1 is formed by forming a dielectric layer on a metal foil by a MOD method (organometallic decomposition method) or a sputtering method, and forming a conductive layer on the dielectric layer by a sputtering method (patent) FIG. 11 of Reference 1). In the printed wiring board described in FIG. 14 of Patent Document 1, the capacitor is embedded in the substrate, and the circuit of the substrate and the electrode of the capacitor are connected by a circuit conductor formed so as to penetrate the capacitor in the thickness direction. ing. The circuit conductor is described as being a “plated microvia”.
JP-A-2005-39282 (particularly, paragraphs [0063] to [0072], FIGS. 11 to 15)

特許文献1に記載された発明には以下の問題点がある。   The invention described in Patent Document 1 has the following problems.

すなわち、第1に、特許文献1に記載されたコンデンサでは、誘電体層をMOD法やスパッタ法といった薄膜プロセスによって形成している。薄膜プロセスによって誘電体層を形成すると、成膜コストが比較的高いという問題があった。さらに、表面が平滑な金属箔上に薄膜プロセスで誘電体層を形成するので、金属箔と誘電体層との間で十分な密着強度を得にくく、コンデンサを基板に埋め込む際に受ける応力によって、金属箔と誘電体層の界面が剥離するおそれがある。   That is, first, in the capacitor described in Patent Document 1, the dielectric layer is formed by a thin film process such as a MOD method or a sputtering method. When the dielectric layer is formed by a thin film process, there is a problem that the film formation cost is relatively high. Furthermore, since the dielectric layer is formed by a thin film process on the metal foil having a smooth surface, it is difficult to obtain sufficient adhesion strength between the metal foil and the dielectric layer, and due to the stress received when embedding the capacitor in the substrate, The interface between the metal foil and the dielectric layer may be peeled off.

第2に、コンデンサの電極とプリント配線板上の回路との接続にいわゆるビアホールが用いられているが、ビアホールの形成が誘電体層の特性に悪影響を与えるという問題があった。これについて詳しく説明すると、ビアホールはレーザなどの方法で貫通孔を形成した後に、該貫通孔の内部にめっきなどによって導体を充填して形成されるが、貫通孔の形成時にレーザビームの熱によって誘電体層の特性に悪影響を与えることがあるとともに、めっきによる導体充填時にもめっき液が誘電体層に接触することによって誘電体層の特性に悪影響を与えてしまう。   Secondly, so-called via holes are used to connect the electrodes of the capacitor and the circuit on the printed wiring board, but there is a problem that the formation of the via holes adversely affects the characteristics of the dielectric layer. More specifically, the via hole is formed by forming a through hole with a laser or the like and then filling the inside of the through hole with a conductor by plating or the like. The via hole is formed by the heat of the laser beam when the through hole is formed. The characteristics of the body layer may be adversely affected, and also when the conductor is filled by plating, the plating solution comes into contact with the dielectric layer, thereby adversely affecting the characteristics of the dielectric layer.

本発明は係る問題点に鑑みてなされたものであり、電極と誘電体層との界面が十分な密着強度を有するとともに、貫通孔を形成したり該貫通孔にめっきを施したりしても誘電体層の特性に悪影響を与えないコンデンサおよびその製造方法を提供すること、および係るコンデンサを内蔵したコンデンサ内蔵基板およびその製造方法を提供することを目的とする。   The present invention has been made in view of such problems, and the interface between the electrode and the dielectric layer has sufficient adhesion strength, and even if a through-hole is formed or plated on the through-hole, the dielectric is provided. It is an object of the present invention to provide a capacitor that does not adversely affect the characteristics of the body layer and a method for manufacturing the same, and to provide a capacitor built-in substrate that includes such a capacitor and a method for manufacturing the same.

上記問題点を解決するために本発明に係るコンデンサは、誘電体層と、前記誘電体層の一方の主面に形成された第1の容量電極と、前記誘電体層の他方の主面に形成された第2の容量電極とを備え、前記誘電体層は、一方の主面から他方の主面に至る貫通導体を有し、該貫通導体の内部に貫通孔が形成されていることを特徴とする。   In order to solve the above problems, a capacitor according to the present invention includes a dielectric layer, a first capacitor electrode formed on one main surface of the dielectric layer, and the other main surface of the dielectric layer. The dielectric layer has a through conductor extending from one main surface to the other main surface, and a through hole is formed inside the through conductor. Features.

このように本発明のコンデンサでは貫通孔が貫通導体の内部に形成されているので、貫通孔の形成時の熱や機械的衝撃が誘電体層に直接的に及ぶことがなく、誘電体層の特性に悪影響を及ぼすおそれがない。また、このコンデンサを基板に実装するときにも、基板の配線との接続に必要な接続導体は貫通孔の内部に形成すればよいので、例えば接続導体を湿式めっきで形成する場合であっても、めっき液が直接誘電体層に触れることがなく、誘電体層の特性に悪影響を及ぼすおそれがない。   As described above, in the capacitor of the present invention, since the through hole is formed inside the through conductor, heat and mechanical shock during formation of the through hole do not directly reach the dielectric layer, and the dielectric layer There is no risk of adversely affecting properties. Also, when this capacitor is mounted on the substrate, the connection conductor necessary for connection with the wiring of the substrate may be formed inside the through hole. For example, even when the connection conductor is formed by wet plating. The plating solution does not directly touch the dielectric layer, and there is no possibility of adversely affecting the characteristics of the dielectric layer.

さらに、本発明のコンデンサは前記誘電体層と、前記第1および第2の容量電極と、前記貫通導体とは、同時に焼結されてなることを特徴とする。   Furthermore, the capacitor of the present invention is characterized in that the dielectric layer, the first and second capacitive electrodes, and the through conductor are sintered simultaneously.

これにより、薄膜法によって製造されたコンデンサよりも安価であるとともに、誘電体層と導体(第1および第2の容量電極と貫通導体)とが同時に焼成されることにより、誘電体層と導体との界面の接合強度が高くなり、基板実装時あるいは実装後に応力を受けても、界面で剥離が発生する可能性を低減できる。   Thereby, while being cheaper than the capacitor manufactured by the thin film method, the dielectric layer and the conductor (the first and second capacitance electrodes and the through conductor) are fired at the same time, so that the dielectric layer and the conductor The bonding strength at the interface increases, and the possibility of peeling at the interface can be reduced even when stress is applied during or after mounting the substrate.

本発明に係るコンデンサ内蔵基板は、配線導体を有する基板本体と、請求項1あるいは請求項2に記載されたコンデンサとを備え、前記貫通孔の内部に形成された接続導体によって前記貫通導体と前記配線導体とが電気的に接続されていることを特徴とする。   A capacitor-embedded substrate according to the present invention includes a substrate body having a wiring conductor and the capacitor according to claim 1 or 2, and the through conductor and the capacitor are formed by a connection conductor formed in the through hole. The wiring conductor is electrically connected.

これにより、コンデンサと配線導体とを電気的に接続する接続導体は貫通孔の内部に形成されていて誘電体層に直接触れていないため、例えば接続導体を湿式めっきで形成する場合であっても、めっき液が誘電体層に接触して誘電体層の特性に悪影響を及ぼすおそれがない。   As a result, since the connection conductor that electrically connects the capacitor and the wiring conductor is formed inside the through hole and does not directly touch the dielectric layer, for example, even when the connection conductor is formed by wet plating There is no possibility that the plating solution contacts the dielectric layer and adversely affects the characteristics of the dielectric layer.

本発明に係るコンデンサの製造方法は、誘電体粉末とバインダとを含んでなり貫通孔を有する誘電体グリーンシートと、金属粉末とバインダとを含んでなる導体グリーンシートと、を用意する工程と、前記誘電体グリーンシートの両主面に、前記貫通孔の少なくとも一部を覆うように前記導体グリーンシートを重ねて圧着することにより積層体を形成する工程と、前記積層体を焼成して、前記貫通孔の内部に前記導体グリーンシートの一部が充填されてなる貫通導体を有する焼成体を得る工程と、前記貫通導体を貫通する貫通孔を形成する工程と、を有することを特徴とする。   The method of manufacturing a capacitor according to the present invention includes a step of preparing a dielectric green sheet including a dielectric powder and a binder and having a through hole, and a conductor green sheet including a metal powder and a binder, A step of forming a laminate by stacking and crimping the conductor green sheet on both main surfaces of the dielectric green sheet so as to cover at least a part of the through hole; and firing the laminate, The method includes a step of obtaining a fired body having a through conductor in which a part of the conductor green sheet is filled inside the through hole, and a step of forming a through hole penetrating the through conductor.

これにより、貫通導体の内部に貫通孔が形成されるので、貫通孔形成時の熱や機械的衝撃が誘電体層に直接的に及ぶことがなく、誘電体層の特性に悪影響を及ぼすおそれがない。また、このコンデンサを基板に実装するときにも、基板の配線との接続に必要な接続導体は貫通孔の内部に形成すればよいので、例えば湿式めっきによって接続導体を形成する場合であっても、めっき液が直接誘電体層に触れることがなく、誘電体層の特性に悪影響を及ぼすおそれがない。   As a result, a through-hole is formed inside the through-conductor, so that heat and mechanical shock during the formation of the through-hole do not directly reach the dielectric layer, which may adversely affect the characteristics of the dielectric layer. Absent. Even when the capacitor is mounted on the substrate, the connection conductor necessary for connection to the wiring of the substrate may be formed inside the through hole. For example, even when the connection conductor is formed by wet plating. The plating solution does not directly touch the dielectric layer, and there is no possibility of adversely affecting the characteristics of the dielectric layer.

また、誘電体グリーンシートと導体グリーンシートとを積層して焼成する方法によって製造するので、薄膜プロセスによってコンデンサを製造するよりも安価に製造することができる上、誘電体層と導体層の界面の接合力が強くなり、界面の剥離を防止できる。   In addition, since the dielectric green sheet and the conductor green sheet are manufactured by laminating and firing, it can be manufactured at a lower cost than a capacitor by a thin film process, and the interface between the dielectric layer and the conductor layer can be manufactured. Bonding strength is increased, and peeling of the interface can be prevented.

本発明に係るコンデンサ内蔵基板の製造方法は、配線導体を有する基板本体を準備する工程と、請求項1あるいは請求項2に記載のコンデンサを前記基板本体上に載置する工程と、前記貫通孔の内部に接続導体を形成し、該接続導体によって前記貫通導体と前記配線導体とを電気的に接続する工程と、を有することを特徴とする。   The method for manufacturing a capacitor-embedded substrate according to the present invention includes a step of preparing a substrate body having a wiring conductor, a step of placing the capacitor according to claim 1 or 2 on the substrate body, and the through hole. Forming a connection conductor in the inside, and electrically connecting the through conductor and the wiring conductor by the connection conductor.

貫通導体の内部に形成されている貫通孔に接続導体を形成するようにしているので、例えば接続導体を湿式めっきによって形成した場合でも、誘電体層にめっき液が直接触れることがなく、めっき液によって誘電体層の特性に悪影響を与えるおそれがない。   Since the connection conductor is formed in the through hole formed inside the through conductor, for example, even when the connection conductor is formed by wet plating, the plating solution does not directly contact the dielectric layer. Therefore, there is no possibility of adversely affecting the characteristics of the dielectric layer.

また、本発明に係るコンデンサ内蔵基板の製造方法は、誘電体粉末とバインダとを含んでなり貫通孔を有する誘電体グリーンシートと、金属粉末とバインダとを含んでなる導体グリーンシートと、を用意する工程と、前記誘電体グリーンシートの両主面に、前記貫通孔の少なくとも一部を覆うように前記導体グリーンシートを重ねて圧着することにより積層体を形成する工程と、前記積層体を焼成して、前記貫通孔の内部に前記導体グリーンシートの一部が充填されてなる貫通導体を有する焼成体を得る工程と、配線導体を有する基板本体上に前記焼成体を載置する工程と、少なくとも前記貫通導体を貫通する貫通孔を形成する工程と、前記貫通孔の内部に接続導体を形成し、該接続導体によって前記貫通導体と前記配線導体とを電気的に接続する工程と、を有することを特徴とする。   The method for manufacturing a capacitor-embedded substrate according to the present invention includes a dielectric green sheet including dielectric powder and a binder and having a through hole, and a conductor green sheet including a metal powder and a binder. A step of forming a laminate by stacking and crimping the conductor green sheet on both main surfaces of the dielectric green sheet so as to cover at least a part of the through-hole, and firing the laminate Then, obtaining a fired body having a through conductor formed by filling a part of the conductor green sheet inside the through hole, and placing the fired body on a substrate body having a wiring conductor; Forming a through hole penetrating at least the through conductor; forming a connection conductor in the through hole; and electrically connecting the through conductor and the wiring conductor by the connection conductor. And having the steps of, a.

これにより、貫通導体の内部に貫通孔が形成されるので、貫通孔形成時の熱や機械的衝撃が誘電体層に直接的に及ぶことがなく、誘電体層の特性に悪影響を及ぼすおそれがない。また、コンデンサの貫通導体と基板本体の配線導体とは貫通孔の内部に形成された接続導体によって電気的に接続されるので、例えば接続導体を湿式めっきによって形成する場合には、めっき液が直接誘電体層に触れることがなく、誘電体層の特性に悪影響を及ぼすおそれがない。   As a result, a through-hole is formed inside the through-conductor, so that heat and mechanical shock during the formation of the through-hole do not directly reach the dielectric layer, which may adversely affect the characteristics of the dielectric layer. Absent. In addition, since the through conductor of the capacitor and the wiring conductor of the substrate body are electrically connected by a connection conductor formed inside the through hole, for example, when the connection conductor is formed by wet plating, the plating solution is directly There is no risk of adversely affecting the characteristics of the dielectric layer without touching the dielectric layer.

なお、本発明において接続導体の形成方法は湿式めっき法に限定されるものではなく、例えば導電性ペーストを充填するなどの方法で形成してもよいが、湿式めっき法によって接続導体を形成したときに本発明はより実効あるものとなる。   In the present invention, the method for forming the connection conductor is not limited to the wet plating method. For example, the connection conductor may be formed by filling with a conductive paste, but when the connection conductor is formed by the wet plating method. In addition, the present invention is more effective.

以上のように本発明によれば、コンデンサに誘電体層を貫通する貫通導体を設け、該貫通導体の内部に貫通孔を形成するようにしているので、貫通孔を形成する際の熱や機械的衝撃が誘電体層に直接的に及ぶことがなく、さらに基板本体との電気的接続に必要なビアホールを該貫通孔の内部に形成すればよいので、めっき液が誘電体層に直接触れることがない。よって、貫通孔の形成時や基板本体との電気的接続時に誘電体層の特性に悪影響を及ぼすことがない。また、誘電体グリーンシートと導体グリーンシートとを積層して同時に焼成する方法によって製造するので、薄膜プロセスによってコンデンサを製造するよりも安価に製造することができる上、誘電体層と導体層の界面の接合力が強くなり、界面の剥離を防止できる。   As described above, according to the present invention, the through conductor that penetrates the dielectric layer is provided in the capacitor, and the through hole is formed inside the through conductor. Since the mechanical shock does not directly reach the dielectric layer, and a via hole necessary for electrical connection with the substrate body may be formed inside the through hole, the plating solution directly touches the dielectric layer. There is no. Therefore, the characteristics of the dielectric layer are not adversely affected when the through hole is formed or when it is electrically connected to the substrate body. In addition, since the dielectric green sheet and the conductor green sheet are laminated and fired at the same time, it can be manufactured at a lower cost than a capacitor by a thin film process, and the interface between the dielectric layer and the conductor layer. The bonding strength of the film becomes strong, and the peeling of the interface can be prevented.

以下において添付図面を参照しつつ本発明を実施するための最良の形態について説明する。   The best mode for carrying out the present invention will be described below with reference to the accompanying drawings.

図1(a)は本発明に係るコンデンサを示す平面図であり、図1(b)は図1(a)におけるA−A線断面を示す断面図である。   FIG. 1A is a plan view showing a capacitor according to the present invention, and FIG. 1B is a cross-sectional view taken along the line AA in FIG.

本発明に係るコンデンサ100は、誘電体層10と、誘電体層10の一方の主面に形成された第1の容量電極21および第1の電極パッド31と、誘電体層10の他方の主面に形成された第2の容量電極22および第2の電極パッド32と、誘電体層10を厚み方向に貫通している貫通導体11とを備える。   The capacitor 100 according to the present invention includes a dielectric layer 10, a first capacitive electrode 21 and a first electrode pad 31 formed on one main surface of the dielectric layer 10, and the other main layer of the dielectric layer 10. The second capacitor electrode 22 and the second electrode pad 32 formed on the surface, and the through conductor 11 penetrating the dielectric layer 10 in the thickness direction are provided.

第1の電極パッド31は、第1の容量電極21と電気的に絶縁されているとともに、貫通導体11を介して第2の容量電極22と電気的に接続している。貫通導体11は第1の電極パッド31および第2の容量電極22と一体的に形成されている。   The first electrode pad 31 is electrically insulated from the first capacitor electrode 21 and is electrically connected to the second capacitor electrode 22 through the through conductor 11. The through conductor 11 is formed integrally with the first electrode pad 31 and the second capacitor electrode 22.

第2の電極パッド32は、第2の容量電極22と電気的に絶縁されているとともに、貫通導体11を介して第1の容量電極21と電気的に接続している。貫通導体11は第2の電極パッド32および第2の容量電極22と一体的に形成されている。   The second electrode pad 32 is electrically insulated from the second capacitor electrode 22 and is electrically connected to the first capacitor electrode 21 through the through conductor 11. The through conductor 11 is formed integrally with the second electrode pad 32 and the second capacitor electrode 22.

貫通導体11の略中央部分には、コンデンサ100の両主面間を貫通するように貫通孔12が形成されている。   A through hole 12 is formed in a substantially central portion of the through conductor 11 so as to penetrate between both main surfaces of the capacitor 100.

図2は本発明に係るコンデンサ内蔵基板を示す断面図である。本発明に係るコンデンサ内蔵基板は、基板本体200と、図1に示したコンデンサ100とを備える。   FIG. 2 is a sectional view showing a capacitor built-in substrate according to the present invention. The capacitor built-in substrate according to the present invention includes a substrate body 200 and the capacitor 100 shown in FIG.

コンデンサ100は樹脂硬化物210によって基板本体200の上面に接合されている。樹脂硬化物210はコンデンサ100の上面側にも形成されており、コンデンサ100は樹脂硬化物210の内部に埋め込まれた状態となっている。基板本体200の上面および内部には配線導体201が形成されていて、コンデンサ100の貫通孔12の内部に形成された接続導体202によって貫通導体11と配線導体201とが電気的に接続されている。   Capacitor 100 is bonded to the upper surface of substrate body 200 by cured resin 210. The cured resin 210 is also formed on the upper surface side of the capacitor 100, and the capacitor 100 is embedded in the cured resin 210. A wiring conductor 201 is formed on the upper surface and inside of the substrate body 200, and the through conductor 11 and the wiring conductor 201 are electrically connected by a connection conductor 202 formed in the through hole 12 of the capacitor 100. .

次に、図3および図4を参照しつつ本発明のコンデンサおよびコンデンサ内蔵基板の製造方法について説明する。   Next, a method for manufacturing a capacitor and a capacitor built-in substrate according to the present invention will be described with reference to FIGS.

(1)グリーンシートを用意する工程
BaTiO3を主成分とする平均粒径0.2mmの誘電体セラミック粉末と、ポリビニルブチラールを主成分とするバインダと、トルエンとエタノールを体積比1:1の割合で混合した溶媒とを混合、分散し、誘電体セラミックスラリーを作製した。誘電体セラミック粉末とバインダと溶媒の混合比率は体積比で10:10:80とした。誘電体粉末の体積は、重量を測定して理論密度で除して算出した(以下、粉末の体積は同様に算出した)。次にドクターブレード法によって誘電体セラミックスラリーをシート状に成形し、厚さ2μmの誘電体グリーンシートを得た。
(1) Step of preparing a green sheet Ratio of dielectric ceramic powder having an average particle diameter of 0.2 mm mainly composed of BaTiO 3 , binder mainly composed of polyvinyl butyral, toluene and ethanol in a volume ratio of 1: 1 A dielectric ceramic slurry was prepared by mixing and dispersing with the solvent mixed in. The mixing ratio of the dielectric ceramic powder, the binder and the solvent was 10:10:80 by volume. The volume of the dielectric powder was calculated by measuring the weight and dividing by the theoretical density (hereinafter, the volume of the powder was calculated in the same manner). Next, a dielectric ceramic slurry was formed into a sheet by a doctor blade method to obtain a dielectric green sheet having a thickness of 2 μm.

そして図3(a)に示すようにレーザ加工によって誘電体グリーンシート41に直径200μmの貫通孔42を形成した。   Then, as shown in FIG. 3A, a through hole 42 having a diameter of 200 μm was formed in the dielectric green sheet 41 by laser processing.

また、平均粒径0.5μmのNi粉末と、ポリビニルブチラールを主成分とするバインダと、トルエンとエタノールを体積比1:1の割合で混合した溶媒とを混合、分散し、導体スラリーを作製した。Ni粉末とバインダと溶媒の混合比率は体積比で10:10:80とした。次にドクターブレード法によって導体スラリーをシート状に成形し、厚さ9μmの導体グリーンシートを得た。   Moreover, Ni powder with an average particle size of 0.5 μm, a binder mainly composed of polyvinyl butyral, and a solvent in which toluene and ethanol were mixed at a volume ratio of 1: 1 were mixed and dispersed to prepare a conductor slurry. . The mixing ratio of Ni powder, binder, and solvent was 10:10:80 by volume. Next, the conductor slurry was formed into a sheet by a doctor blade method to obtain a conductor green sheet having a thickness of 9 μm.

さらにまた、平均粒径1.0μmのAl23粉末を用意し、ポリビニルブチラールを主成分とするバインダと、トルエンとエタノールを体積比1:1の割合で混合した溶媒とを混合、分散し、焼成補助用セラミックスラリーを作製した。Al23粉末とバインダと溶媒の混合比率は体積比で10:10:80とした。次にドクターブレード法によって焼成補助用セラミックスラリーをシート状に成形し、厚さ100μmの焼成補助用グリーンシートを得た。 Furthermore, Al 2 O 3 powder having an average particle diameter of 1.0 μm is prepared, and a binder mainly composed of polyvinyl butyral and a solvent in which toluene and ethanol are mixed at a volume ratio of 1: 1 are mixed and dispersed. A ceramic slurry for assisting firing was prepared. The mixing ratio of Al 2 O 3 powder, binder and solvent was 10:10:80 by volume ratio. Next, the ceramic slurry for baking assistance was shape | molded by the doctor blade method in the sheet form, and the 100-micrometer-thick green sheet for baking assistance was obtained.

(2)積層工程
次に、図3(b)に示すような位置関係で、誘電体グリーンシート41、導体グリーンシート43、焼成補助用グリーンシート44を積層、圧着し積層体を作製した。より詳しくは、誘電体グリーンシート41の両主面にそれぞれ導体グリーンシート43が接し、導体グリーンシート43の外側を挟み込むように焼成補助用グリーンシート44が配置されている。このとき、圧着することによって導体グリーンシート43が貫通孔42の内部に充填されて貫通導体11が形成される。なお、圧着時に導体グリーンシート43が貫通孔42の内部に十分に充填されていなくても、後述する焼成時に導体グリーンシート43の粘度が低下して導体グリーンシート43が貫通孔42の内部に充填される。
(2) Lamination process Next, the dielectric green sheet 41, the conductor green sheet 43, and the firing auxiliary green sheet 44 were laminated and pressed in a positional relationship as shown in FIG. More specifically, the firing green sheet 44 is disposed so that the conductor green sheets 43 are in contact with both main surfaces of the dielectric green sheet 41 and sandwich the outside of the conductor green sheet 43. At this time, the conductor green sheet 43 is filled in the through hole 42 by pressure bonding, and the through conductor 11 is formed. Even if the conductor green sheet 43 is not sufficiently filled in the through-hole 42 at the time of crimping, the viscosity of the conductor green sheet 43 decreases during firing, which will be described later, and the conductor green sheet 43 is filled in the through-hole 42. Is done.

(3)焼成工程
得られた積層体を窒素雰囲気中280℃で5時間の熱処理をして脱脂を行った。さらに還元雰囲気中1150℃まで加熱して2時間キープし、その後、中性雰囲気で降温した。なお、焼成雰囲気はNiの酸化還元平衡酸素分圧を基準としており、これより酸素分圧が低い状態を還元雰囲気、平衡酸素分圧と等しい酸素分圧およびその近傍を中性雰囲気と称している。
(3) Firing step The obtained laminate was degreased by heat treatment at 280 ° C. for 5 hours in a nitrogen atmosphere. Further, it was heated to 1150 ° C. in a reducing atmosphere, kept for 2 hours, and then cooled in a neutral atmosphere. The firing atmosphere is based on the oxidation-reduction equilibrium oxygen partial pressure of Ni, and the state where the oxygen partial pressure is lower than this is called the reduction atmosphere, the oxygen partial pressure equal to the equilibrium oxygen partial pressure and the vicinity thereof are called the neutral atmosphere. .

焼成により、図3(c)に示すように誘電体層10、第1および第2の導体層51,52、貫通導体11からなる焼結体50を得た。誘電体層10の厚みは1.2μm、第1および第2の導体層51,52の厚みの合計は15μmだった。   By firing, a sintered body 50 including the dielectric layer 10, the first and second conductor layers 51 and 52, and the through conductor 11 was obtained as shown in FIG. The thickness of the dielectric layer 10 was 1.2 μm, and the total thickness of the first and second conductor layers 51 and 52 was 15 μm.

焼成中、焼成補助用グリーンシート44は導体グリーンシート43から自然剥離していた。これは、導体グリーンシート43と焼成補助用グリーンシート44の焼成中の収縮挙動が異なることにより、界面に応力が発生するからである。   During firing, the firing auxiliary green sheet 44 was naturally peeled from the conductor green sheet 43. This is because stress is generated at the interface due to the difference in shrinkage behavior during firing between the conductor green sheet 43 and the firing auxiliary green sheet 44.

(4)導体層のパターニング工程
第1の導体層51上にレジストを塗布し、露光・現像を行って所定の形状にパターニングし、ウェットエッチングを行うことによって第1の導体層の一部を除去して溝53を形成し、図3(d)に示すように第1の導体層53を第1の容量電極21と第1の電極パッド31とに分割した。同様に第2の導体層54にもパターニングを施し、第2の容量電極22と第2の電極パッド32とに分割した。
(4) Conductor layer patterning step A resist is applied on the first conductor layer 51, exposed and developed to be patterned into a predetermined shape, and part of the first conductor layer is removed by wet etching. Thus, a groove 53 was formed, and the first conductor layer 53 was divided into the first capacitor electrode 21 and the first electrode pad 31 as shown in FIG. Similarly, the second conductor layer 54 was patterned and divided into the second capacitor electrode 22 and the second electrode pad 32.

(5)貫通孔形成工程
直径200μmの貫通導体11と同心になるように、レーザ加工によって直径100μmの貫通孔12を形成した(図3(e))。レーザとしては金属の加工が容易なTHG−YAGを用いたが、これに限定されるものではない。貫通孔12を形成することにより、本発明に係るコンデンサ100が完成した。
(5) Through-hole formation process The through-hole 12 with a diameter of 100 micrometers was formed by laser processing so that it might become concentric with the through-conductor 11 with a diameter of 200 micrometers (FIG.3 (e)). As the laser, THG-YAG, which is easy to process metal, was used, but the laser is not limited to this. By forming the through hole 12, the capacitor 100 according to the present invention was completed.

ここで、第1および第2の容量電極21,22に端子を接触させ、1Vの電圧を印加して絶縁抵抗値を測定した。10個の試料の絶縁抵抗を測定したところ、すべての試料で抵抗値が1GΩ以上の値を示し、十分な絶縁性を有していることが確認された。   Here, the terminals were brought into contact with the first and second capacitor electrodes 21 and 22, and a voltage of 1 V was applied to measure the insulation resistance value. When the insulation resistance of 10 samples was measured, the resistance values of all the samples showed a value of 1 GΩ or more, and it was confirmed that the samples had sufficient insulation properties.

(6)基板本体への搭載工程
次に、上面および内部に配線導体201を有するビルドアップエポキシ基板からなる基板本体200を用意し、基板本体200上に厚さ50μmの未硬化のエポキシフィルムを貼り付け、その上にコンデンサ100を戴置する。さらにコンデンサ100の上に未硬化のエポキシフィルムを貼り付けてから所定の温度で硬化させ樹脂硬化物210とした。これにより、基板本体200上にコンデンサ100を固定した。
(6) Mounting process on substrate body Next, a substrate body 200 made of a build-up epoxy substrate having wiring conductors 201 on the upper surface and inside is prepared, and an uncured epoxy film having a thickness of 50 μm is pasted on the substrate body 200. And a capacitor 100 is placed thereon. Further, an uncured epoxy film was stuck on the capacitor 100 and then cured at a predetermined temperature to obtain a cured resin 210. As a result, the capacitor 100 was fixed on the substrate body 200.

(7)接続導体の形成工程
次に、コンデンサ100に形成されている貫通孔12と一致するようにCO2レーザによって直径100μmの貫通孔203を、基板本体200の配線導体201まで形成した(図4(b))。貫通孔203の内壁に触媒を付与して無電解めっきによってCuを成膜し、さらに電解めっきを行って貫通孔203をCuで充填して接続導体202を形成した。これにより図4(c)に示すように本発明に係るコンデンサ内蔵基板が完成した。
(7) Step of forming connection conductor Next, a through hole 203 having a diameter of 100 μm was formed up to the wiring conductor 201 of the substrate body 200 by a CO 2 laser so as to coincide with the through hole 12 formed in the capacitor 100 (FIG. 4 (b)). A catalyst was applied to the inner wall of the through hole 203 to form a Cu film by electroless plating, and further, electrolytic plating was performed to fill the through hole 203 with Cu to form a connection conductor 202. As a result, the substrate with a built-in capacitor according to the present invention was completed as shown in FIG.

コンデンサ100の第1の容量電極21と電気的に接続している接続導体202と、第2の容量電極22に接続している接続導体202とに端子を接触させ、1Vの電圧を印加して絶縁抵抗を測定したところ、10個の試料のすべてで抵抗値が1GΩを上回り、十分な絶縁抵抗値を得られていることが確認された。   A terminal is brought into contact with the connection conductor 202 electrically connected to the first capacitor electrode 21 of the capacitor 100 and the connection conductor 202 connected to the second capacitor electrode 22, and a voltage of 1 V is applied. When the insulation resistance was measured, the resistance value exceeded 1 GΩ in all 10 samples, and it was confirmed that a sufficient insulation resistance value was obtained.

比較例Comparative example

本発明と比較するため、以下の方法でコンデンサを作製した。   In order to compare with the present invention, a capacitor was manufactured by the following method.

上記(1)と同じ方法で、誘電体グリーンシート、導体グリーンシート、焼成補助用グリーンシートを用意した。ただし、誘電体グリーンシートには貫通孔を形成しなかった。   A dielectric green sheet, a conductor green sheet, and a firing auxiliary green sheet were prepared by the same method as in (1) above. However, no through hole was formed in the dielectric green sheet.

次に誘電体グリーンシート41、導体グリーンシート43、焼成補助用グリーンシート44を図5(a)に示すように積層、圧着し、上記(3)と同じ条件で焼成して焼結体を得た。   Next, the dielectric green sheet 41, the conductor green sheet 43, and the firing auxiliary green sheet 44 are laminated and pressure-bonded as shown in FIG. 5A, and fired under the same conditions as in the above (3) to obtain a sintered body. It was.

次に上記(4)と同じ方法で、図5(b)に示すように第1および第2の導体層51,52のパターニングを行った後、THG−YAGレーザで貫通孔12を形成した(図5(c))。このとき、本比較例においては貫通導体を形成していないので、レーザが誘電体層10を打ち抜いた。   Next, after patterning the first and second conductor layers 51 and 52 as shown in FIG. 5B by the same method as the above (4), the through-hole 12 was formed with a THG-YAG laser ( FIG. 5 (c)). At this time, since no through conductor was formed in this comparative example, the laser punched the dielectric layer 10.

ここで、第1および第2の導体層51,52に端子を接触させて1Vの電圧を印加して抵抗値を測定したところ、10個の試料中最低値が85Ω、最高値が960Ω、平均値は310Ωであり、本発明と比較して著しく低い値となった。これは、レーザが誘電体層を打ち抜く際、誘電体層が急速に高温に晒されてクラックが発生して絶縁性が低下したり、レーザの熱によって誘電体が溶融して導体化することなどが原因である。   Here, when the terminal was brought into contact with the first and second conductor layers 51 and 52 and a resistance value was measured by applying a voltage of 1 V, the lowest value among the 10 samples was 85Ω, the highest value was 960Ω, the average The value was 310Ω, which was significantly lower than that of the present invention. This is because when the laser punches out the dielectric layer, the dielectric layer is rapidly exposed to high temperatures and cracks occur, resulting in a decrease in insulation, or the dielectric is melted by the heat of the laser to become a conductor. Is the cause.

次に本発明の第2の実施例について説明する。実施例1と共通する部分については適宜説明を省略する。   Next, a second embodiment of the present invention will be described. Description of parts common to the first embodiment will be omitted as appropriate.

まず、実施例1の(1)〜(4)と同じ方法により、図6(a)に示す焼結体50を得る。この焼結体50は図3(d)に示した焼結体50と同じものである。次にこの焼結体50を、実施例1の(6)と同じ方法によって、図6(b)に示すように基板本体200上に固定する。   First, the sintered compact 50 shown to Fig.6 (a) is obtained by the same method as (1)-(4) of Example 1. FIG. This sintered body 50 is the same as the sintered body 50 shown in FIG. Next, the sintered body 50 is fixed on the substrate body 200 as shown in FIG. 6B by the same method as (6) of the first embodiment.

次に直径200μmの貫通導体11と同心になるように、THG−YAGレーザによって、基板本体200の配線導体201にまで至る直径100μmの貫通孔203を形成する(図6(c))。そして貫通孔203の内部に触媒を付与して無電解めっきを施し、さらに電解めっきを施して貫通孔203にCuを充填して接続導体202を形成し、図6(d)に示すように本実施例のコンデンサ内蔵基板が完成した。   Next, a through hole 203 having a diameter of 100 μm reaching the wiring conductor 201 of the substrate body 200 is formed by a THG-YAG laser so as to be concentric with the through conductor 11 having a diameter of 200 μm (FIG. 6C). Then, a catalyst is applied to the inside of the through hole 203 to perform electroless plating, and further, electrolytic plating is performed to fill the through hole 203 with Cu to form a connection conductor 202. As shown in FIG. The capacitor built-in substrate of the example was completed.

コンデンサの第1の容量電極21と電気的に接続している接続導体202と、第2の容量電極22に接続している接続導体202とに端子を接触させ、1Vの電圧を印加して絶縁抵抗を測定したところ、10個の試料のすべてで抵抗値が1GΩを上回り、十分な絶縁抵抗値を得られていることが確認された。   A terminal is brought into contact with the connection conductor 202 electrically connected to the first capacitor electrode 21 of the capacitor and the connection conductor 202 connected to the second capacitor electrode 22, and a voltage of 1V is applied to insulate the capacitor. When the resistance was measured, it was confirmed that the resistance value exceeded 1 GΩ in all 10 samples, and a sufficient insulation resistance value was obtained.

上記実施例1,2は本発明を実施するための例に過ぎず、本発明がこれに限定されないのはいうまでもない。本発明の趣旨の範囲で適宜変更を加えることが可能であり、例えば以下の点について変更可能である。   The said Example 1, 2 is only an example for implementing this invention, and it cannot be overemphasized that this invention is not limited to this. Changes can be made as appropriate within the scope of the present invention, and for example, the following points can be changed.

(A)材質
誘電体層の材質はBaTiO3にかぎらず、SrTiO3、Pb(Zr,Ti)O3などを用いてもよい。導体層の材質もNiに限らず、Cu,Agなどを用いてもよい。基板本体も、エポキシ基板に限定されず、セラミック多層基板などであってもよい。
(A) Material The material of the dielectric layer is not limited to BaTiO 3 , and SrTiO 3 , Pb (Zr, Ti) O 3, etc. may be used. The material of the conductor layer is not limited to Ni, and Cu, Ag, or the like may be used. The substrate body is not limited to the epoxy substrate, and may be a ceramic multilayer substrate or the like.

(B)焼成方法
上記実施例では、焼成補助用グリーンシートを用いて焼成を行ったが、あくまで焼成の便宜のために用いたものであって、本発明の必須の構成要件ではない。焼成補助用グリーンシートを用いずに、例えば本出願人らが特願2005−122597の実施例に記載したように、Al23などからなるセッタに挟んでコンデンサを焼成することも好ましい。
(B) Firing method In the above examples, firing was performed using a firing-assisting green sheet, but it was used only for the convenience of firing and is not an essential constituent element of the present invention. It is also preferable that the capacitor be fired by using a setter made of Al 2 O 3 or the like, as described in the example of Japanese Patent Application No. 2005-122597, for example, without using the firing-assisting green sheet.

(C)貫通導体の形成方法
上記実施例では、誘電体グリーンシートに形成した貫通孔の内部に、圧着および焼成によって導体グリーンシートの一部を充填させて貫通導体を形成したが、貫通孔の内部に印刷等の方法によって導電性ペーストを充填するようにしてもよい。そのようにすれば、貫通孔の内部に導体がより確実に充填されるので、誘電体層の厚みが比較的厚い場合には特に有効である。
(C) Method of forming through conductor In the above embodiment, the through conductor was formed by filling a part of the conductor green sheet by pressure bonding and firing inside the through hole formed in the dielectric green sheet. The inside may be filled with a conductive paste by a method such as printing. By doing so, the conductor is more reliably filled in the through hole, which is particularly effective when the dielectric layer is relatively thick.

(D)貫通孔の形成方法
実施例ではTHG−YAGレーザやCO2レーザを用いたが、レーザ加工に限定されるものではなく、ドリルによる穿孔や、エッチングによってもよい。レーザ以外の方法で貫通孔を形成する場合であっても、誘電体層に直接的に貫通孔を形成すると誘電体層の特性に悪影響を与えるので、本発明の有効性に変わりはない。
(D) Method of forming a through hole In the examples, a THG-YAG laser or a CO 2 laser is used, but the present invention is not limited to laser processing, and drilling or etching may be used. Even when the through hole is formed by a method other than the laser, if the through hole is directly formed in the dielectric layer, the characteristics of the dielectric layer are adversely affected, so the effectiveness of the present invention remains unchanged.

本発明に係るコンデンサを示す平面図および断面図である。It is the top view and sectional drawing which show the capacitor | condenser which concerns on this invention. 本発明に係るコンデンサ内蔵基板を示す断面図である。It is sectional drawing which shows the board | substrate with a built-in capacitor | condenser concerning this invention. 本発明に係るコンデンサおよびコンデンサ内蔵基板の製造工程を示す断面図である。It is sectional drawing which shows the manufacturing process of the capacitor | condenser which concerns on this invention, and a board | substrate with a built-in capacitor | condenser. 本発明に係るコンデンサ内蔵基板の製造工程を示す断面図である。It is sectional drawing which shows the manufacturing process of the board | substrate with a built-in capacitor | condenser which concerns on this invention. 比較例のコンデンサの製造工程を示す断面図である。It is sectional drawing which shows the manufacturing process of the capacitor | condenser of a comparative example. 本発明の第2の実施例のコンデンサ内蔵基板の製造工程を示す断面図である。It is sectional drawing which shows the manufacturing process of the board | substrate with a built-in capacitor | condenser of 2nd Example of this invention.

符号の説明Explanation of symbols

10 誘電体層
11 貫通導体
12 貫通孔
21 第1の容量電極
22 第2の容量電極
31 第1の電極パッド
32 第2の電極パッド
100 コンデンサ
200 基板本体
201 配線導体
202 接続導体
210 樹脂硬化物
DESCRIPTION OF SYMBOLS 10 Dielectric layer 11 Through-conductor 12 Through-hole 21 1st capacity electrode 22 2nd capacity electrode 31 1st electrode pad 32 2nd electrode pad 100 Capacitor 200 Substrate body 201 Wiring conductor 202 Connection conductor 210 Resin hardened material

Claims (8)

誘電体層と、前記誘電体層の一方の主面に形成された第1の容量電極と、前記誘電体層の他方の主面に形成された第2の容量電極とを備え、
前記誘電体層は、一方の主面から他方の主面に至る貫通導体を有し、該貫通導体の内部に貫通孔が形成されていることを特徴とするコンデンサ。
A dielectric layer; a first capacitor electrode formed on one main surface of the dielectric layer; and a second capacitor electrode formed on the other main surface of the dielectric layer;
The dielectric layer has a through conductor extending from one main surface to the other main surface, and a through hole is formed inside the through conductor.
前記誘電体層と、前記第1および第2の容量電極と、前記貫通導体とは、同時に焼結されてなることを特徴とする請求項1に記載のコンデンサ。   The capacitor according to claim 1, wherein the dielectric layer, the first and second capacitor electrodes, and the through conductor are sintered simultaneously. 配線導体を有する基板本体と、
請求項1あるいは請求項2に記載されたコンデンサとを備え、
前記貫通孔の内部に形成された接続導体によって前記貫通導体と前記配線導体とが電気的に接続されていることを特徴とするコンデンサ内蔵基板。
A substrate body having a wiring conductor;
A capacitor according to claim 1 or claim 2;
The board | substrate with a built-in capacitor | condenser characterized by the said through-conductor and the said wiring conductor being electrically connected by the connection conductor formed in the inside of the said through-hole.
前記接続導体は、湿式めっきによって形成されたものであることを特徴とする請求項3に記載のコンデンサ内蔵基板。   The capacitor built-in substrate according to claim 3, wherein the connection conductor is formed by wet plating. 誘電体粉末とバインダとを含んでなり貫通孔を有する誘電体グリーンシートと、金属粉末とバインダとを含んでなる導体グリーンシートと、を用意する工程と、
前記誘電体グリーンシートの両主面に、前記貫通孔の少なくとも一部を覆うように前記導体グリーンシートを重ねて圧着することにより積層体を形成する工程と、
前記積層体を焼成して、前記貫通孔の内部に前記導体グリーンシートの一部が充填されてなる貫通導体を有する焼成体を得る工程と、
前記貫通導体を貫通する貫通孔を形成する工程と、を有することを特徴とするコンデンサの製造方法。
Preparing a dielectric green sheet comprising a dielectric powder and a binder and having a through hole, and a conductor green sheet comprising a metal powder and a binder;
Forming a laminate by stacking and crimping the conductor green sheet on both main surfaces of the dielectric green sheet so as to cover at least part of the through hole; and
Firing the laminate and obtaining a fired body having a through conductor in which a part of the conductor green sheet is filled in the through hole; and
And a step of forming a through hole penetrating the through conductor.
配線導体を有する基板本体を準備する工程と、
請求項1あるいは請求項2に記載のコンデンサを前記基板本体上に載置する工程と、
前記貫通孔の内部に接続導体を形成し、該接続導体によって前記貫通導体と前記配線導体とを電気的に接続する工程と、を有することを特徴とするコンデンサ内蔵基板の製造方法。
Preparing a substrate body having a wiring conductor;
Placing the capacitor according to claim 1 or 2 on the substrate body;
Forming a connection conductor inside the through hole, and electrically connecting the through conductor and the wiring conductor by the connection conductor.
誘電体粉末とバインダとを含んでなり貫通孔を有する誘電体グリーンシートと、金属粉末とバインダとを含んでなる導体グリーンシートと、を用意する工程と、
前記誘電体グリーンシートの両主面に、前記貫通孔の少なくとも一部を覆うように前記導体グリーンシートを重ねて圧着することにより積層体を形成する工程と、
前記積層体を焼成して、前記貫通孔の内部に前記導体グリーンシートの一部が充填されてなる貫通導体を有する焼成体を得る工程と、
配線導体を有する基板本体上に前記焼成体を載置する工程と、
少なくとも前記貫通導体を貫通する貫通孔を形成する工程と、
前記貫通孔の内部に接続導体を形成し、該接続導体によって前記貫通導体と前記配線導体とを電気的に接続する工程と、を有することを特徴とするコンデンサ内蔵基板の製造方法。
Preparing a dielectric green sheet comprising a dielectric powder and a binder and having a through hole, and a conductor green sheet comprising a metal powder and a binder;
Forming a laminate by stacking and crimping the conductor green sheet on both main surfaces of the dielectric green sheet so as to cover at least part of the through hole; and
Firing the laminate and obtaining a fired body having a through conductor in which a part of the conductor green sheet is filled in the through hole; and
Placing the fired body on a substrate body having a wiring conductor;
Forming a through hole penetrating at least the through conductor;
Forming a connection conductor inside the through hole, and electrically connecting the through conductor and the wiring conductor by the connection conductor.
前記接続導体は湿式めっきによって形成されることを特徴とする請求項6あるいは請求項7に記載のコンデンサ内蔵基板の製造方法。   8. The method of manufacturing a capacitor built-in substrate according to claim 6, wherein the connection conductor is formed by wet plating.
JP2005210754A 2005-07-21 2005-07-21 Capacitor and manufacturing method thereof, and substrate with built-in capacitor and manufacturing method thereof Pending JP2008288225A (en)

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Cited By (2)

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JP2017079255A (en) * 2015-10-20 2017-04-27 Tdk株式会社 Thin film capacitor
WO2023054059A1 (en) * 2021-09-29 2023-04-06 株式会社村田製作所 Capacitor element, module and semiconductor composite device

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* Cited by examiner, † Cited by third party
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JPS6242598A (en) * 1985-08-20 1987-02-24 イビデン株式会社 Ceramic multilayer interconnection board and manufacture thereof
US4858077A (en) * 1987-11-25 1989-08-15 Hitachi, Ltd. Condenser-containing, ceramic multi-layer circuit board and semiconductor module and computer having the circuit board
JP3019541B2 (en) * 1990-11-22 2000-03-13 株式会社村田製作所 Wiring board with built-in capacitor and method of manufacturing the same
JPH06268381A (en) * 1993-03-11 1994-09-22 Hitachi Ltd Multilayer wiring structure and its manufacture

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017079255A (en) * 2015-10-20 2017-04-27 Tdk株式会社 Thin film capacitor
WO2023054059A1 (en) * 2021-09-29 2023-04-06 株式会社村田製作所 Capacitor element, module and semiconductor composite device
US12308181B2 (en) 2021-09-29 2025-05-20 Murata Manufacturing Co., Ltd. Capacitor element, module, and semiconductor composite device

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