JP2008270883A - Serial communication apparatus and method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress radiation noise that deteriorates due to repetition of transmission data in all states from a period of timing synchronization for establishing a communication path to data communication and standby in a conventional serial communication device. There is a need.
Means for detecting repetition of data in both transmission and reception, means for encoding / decoding data, and means for changing association between input / output data of encoding / decoding are provided to detect repetition. A means for changing the correspondence of input / output data for encoding / decoding according to the same rule for both transmission and reception is provided.
[Selection] Figure 1

Description

  The present invention relates to a serial communication device that transmits and receives data between devices.

  The conventional serial communication apparatus performs the following processing in order to reduce radiation noise and prevent malfunction of a clock data recovery circuit that generates data reception timing.

During a period when data is not transmitted, a signal having no repeatability is communicated. (Patent Document 1)
When the data is a pattern that repeats the same pattern continuously, another pattern is inserted between the same patterns. (Patent Document 2)
JP 2002-84247 A Japanese Patent Laid-Open No. 10-248836

  In the conventional technology, the signal is not repeatable during the period when data is not transmitted, but it is repeatable during the period of timing synchronization to establish the communication path and during the same data transmission, and the radiation noise level deteriorates. I was letting.

  In addition, when another pattern is added when transmitting / receiving data in which repetition of the same pattern continues, there is a problem that the communication rate becomes worse if the frequency of adding another data is increased in order to reduce repetition.

  The object of the invention according to the present application is to eliminate the repeated pattern in all states from the period of timing synchronization to establish the communication path to the data communication and standby, and the radiation noise deteriorated by the repetition of the pattern It is to suppress.

In serial communication devices that transfer data between devices,
Encoding means for encoding input data;
Encoding switching means for switching the correspondence of the output to the input of the encoding means;
Determining whether the same data is continuously input, first determination means for switching the encoding by the encoding switching means when the same data is continuous;
Serial transmission means for transmitting data encoded by the encoding means;
Timing generation means for generating serial data reception timing;
Receiving means for receiving serial data according to the timing generated by the timing generating means;
Decoding means for decoding received data received by the receiving means;
Decoding switching means for switching the correspondence of the output to the input of the decoding means;
Determining whether the data output from the decoding means is the same continuous data, and when the same data is continuous, second determination means for switching decoding by the decoding switching means;
It is characterized by providing.

  According to the present invention, it is possible to eliminate the repeated pattern by the same processing in all states from the period of timing synchronization to establish the communication path to during data communication and standby, and by repeating the pattern It has the effect of suppressing radiation noise by reducing harmonic components.

Example 1
FIG. 1 is a block diagram of a serial communication apparatus representing the features of the first embodiment of the present invention. In FIG. 1, 1 is a transmission circuit, 2 is a reception circuit, and 3 is transmission data input to the transmission circuit 1. , Input in units of 8 bits.

  Reference numeral 4 denotes a communication line, which connects between the transmission circuit 1 and the reception circuit 2 using an FFC (flexible flat cable).

  In this embodiment, an LVDS (low voltage differential transmission) signal is used for the interface between the transmission circuit 1 and the reception circuit 2, and serial transmission is performed with one set of differential signals.

  Reference numeral 5 denotes reception data output from the reception circuit 2 and is output in units of 8 bits.

  Reference numeral 6 denotes a transmission data comparison circuit, which compares whether the input transmission data 3 is the same data as the previous data, and instructs the counter circuit 7 to count up if the same data is input.

  Reference numeral 7 denotes an 8-bit counter circuit which adds 1 to the count value in response to a count-up instruction from the transmission data comparison circuit 6.

  An adder circuit 8 adds the transmission data 3 and the count value of the count circuit 7.

  Reference numeral 9 denotes an 8B10B conversion circuit which converts 8-bit data from the adder circuit 8 into 10-bit data in accordance with the 8B10B encoding method of the Gigabit Ethernet (registered trademark) (1000BASE-X) standard.

  A parallel / serial conversion circuit 10 converts the 10-bit data from the 8B10B conversion circuit 9 into serial data and sends it to the communication line 4.

  A clock data recovery circuit 11 generates data reception timing from the received serial signal.

  Reference numeral 12 denotes a serial / parallel conversion circuit which converts serial data into 10-bit parallel data in synchronization with the reception timing from the clock data recovery circuit 11.

  Reference numeral 13 denotes a 10B8B conversion circuit which converts 10-bit data into 8-bit data.

  Reference numeral 14 denotes a phase shift circuit which instructs the serial / parallel conversion circuit 12 to shift the data delimiter for converting serial data into parallel data by the number of bits corresponding to the comparison result based on the comparison result of the data comparison circuit 15. .

  A received data comparison circuit 15 compares whether the 8-bit data from the subtraction circuit 17 is the same as the previous data, and instructs the counter circuit 16 to count up if the same data is input.

  Further, when receiving the training pattern reception data described later from the initial state of the communication start, the reception data comparison circuit 15 performs a data comparison initialization operation described later for phase matching of the reception data.

  Reference numeral 16 denotes an 8-bit counter circuit which adds 1 to the count value in response to a count-up instruction from the reception data comparison circuit 15.

  Reference numeral 17 denotes a subtraction circuit that subtracts the count value of the count circuit 16 from the 8-bit data from the 10B8B conversion circuit 13 to generate 8-bit reception data 5.

  In this embodiment, the present invention is applied to a serial communication portion for transferring image data from the controller control unit 115 to the engine control unit 116 of the color laser beam printer 100 shown in FIG. 2 at several hundred Mbps to several Gbps.

  FIG. 2 is a cross-sectional view of a color laser beam printer to which the serial communication of the present invention is applied. In FIG. 2, the same function is given the same reference numeral, and a, b, c, d are added after the reference numeral. It shows that the configuration is for each color.

  In the figure, reference numeral 100 denotes a printer body.

  Reference numeral 101 denotes a photosensitive drum, reference numeral 102 denotes a charger that uniformly charges the photosensitive drum 101, and reference numeral 103 denotes a laser scanner that forms a latent image on the photosensitive drum 101 by scanning a laser beam in synchronization with video data.

  A developing unit 104 visualizes a latent image on the photosensitive drum 101, a paper cassette 105 stores paper, and a paper feed roller 106 feeds the paper in the paper cassette 105 to the main body.

  Reference numeral 107 denotes a registration roller that temporarily stops the paper fed by the paper feed roller 106 and resumes paper conveyance in synchronization with the image.

  Reference numeral 108 denotes an intermediate transfer belt that superimposes toner images and transfers a color image.

  109 is a primary transfer unit that transfers the toner image on the photosensitive drum 1 to the intermediate transfer belt 108 after being conveyed, and 110 is a secondary transfer unit that transfers the toner image on the intermediate transfer belt 108 to the conveyed paper. is there.

  Reference numeral 111 denotes a fixing device that fixes the toner image on the paper by heating and pressurizing, 112 a paper discharge sensor that determines the presence or absence of paper, 113 a paper discharge roller that discharges the paper out of the apparatus, and 114 a paper discharge tray. .

  115 is a controller control unit, and 116 is an engine control unit.

  FIG. 3 is a control block diagram of the color laser beam printer to which the serial communication of the present invention is applied. Reference numeral 117 denotes a CPU for controlling the controller control unit 115, which controls an interface with a host computer, an operation unit (not shown), and data to be described later. Processing is performed.

  A RAM 118 temporarily stores data of the CPU 117 and the controller control circuit 120. Reference numeral 119 denotes a ROM which is a program memory of the CPU 117.

  A controller control circuit 120 is mounted on an ASIC or the like and performs data processing, which will be described later, in a shared manner with the CPU 117.

  Reference numeral 122 denotes a one-chip microcontroller, which has a built-in control ROM and RAM, and controls the engine described later.

  An engine control circuit 123 is mounted on an ASIC or the like and performs image processing and engine control in a shared manner with the one-chip microcontroller 122.

  A RAM 124 temporarily stores compressed video data.

  The operation of the printer 100 will be described with reference to FIGS. 1, 2, and 3.

  When the CPU 117 of the controller control unit 115 receives a print command from the host computer, it receives print data from a host interface (not shown) and stores it in the RAM 118.

  The print data is formed by page description language from printing information, document layout information, instructions for printer processing, and the like.

  The CPU 117 interprets the print data stored in the RAM 118, converts it into a series of scan lines forming an image, and stores the bitmap data in the RAM 118.

  When the bitmap data is stored in the RAM 118 as one image, the CPU 117 sends a print command to the engine control unit 116 via an engine interface (not shown).

  Next, the CPU 117 sends out the bitmap data developed on the RAM 118 via the transmission circuit 1.

  In this embodiment, the bitmap data is divided into 1024-byte packets and transmitted with a header.

  As the header, 10-bit data that is not allocated to 8-bit data by the 8B10B conversion circuit 9 is used.

  Note that the CPU 117 sets 00h as communication training data in advance when data is transferred via the transmission circuit 1, and transmits a training pattern for a predetermined period (for example, 256 bytes) or more. Do.

  Further, the CPU 117 performs idle transmission by setting 00h as idle data even when data transmission is not performed after the communication path establishment processing.

  When the transmission circuit 1 receives a data transmission start instruction (not shown) from the CPU 117, the transmission circuit 1 sets the count value of the counter 7 to 00h, sequentially inputs the bitmap data to the addition circuit 8, and passes through the 8B10B conversion circuit 9 through a header addition circuit (not shown). Send the data with a header.

  The receiving circuit 2 considers that communication has stopped if there is no change in the received data for a certain period of time, sets the count value to 00h in the counter circuit 16, and stops the receiving operation until a training pattern is transmitted.

  When receiving the training pattern, the clock data recovery circuit 11 and the serial / parallel conversion circuit 12 of the reception circuit 2 activate the reception circuit 2 and take in the serial data at the generated data reception timing.

  The fetched data is converted into 8-bit data by the 10B8B conversion circuit 13, and the data comparison initial operation is performed by the reception data comparison circuit 15.

  The data comparison initial operation is a process of comparing the 8-bit data from the 10B8B conversion circuit 13 with the initial pattern data and matching the count value of the counter circuit 7 of the transmission circuit 1 and the count value of the counter circuit 16 of the reception circuit 2. .

  In the transmission circuit 1, when transmission is continued with the transmission data set to 00h, the transmission data comparison circuit 6 instructs the counter circuit 7 to count up, and the count value of the count circuit 7 is incremented by +1.

  Therefore, the output of the adder circuit 8 obtained by adding the count value of the count circuit 7 to 00h of the transmission data is also data obtained by adding +1 from 00h.

  On the other hand, in the reception data comparison circuit 15 of the reception circuit 2, the first 16 bytes (00h-0Fh) are obtained as 8-bit data from the 10B8B conversion circuit 13 and an expected data pattern, that is, data added by +1 from 00h. ).

  As a result of the comparison, if none of the 10-byte data matches, the phase shift circuit 14 is instructed to shift the phase for capturing serial data by 1 byte.

  As a result of the comparison, if it matches any one of the 10-byte data, the value is determined as the count value of the counter circuit 7 of the transmission circuit 1 and the matched data is set in the counter circuit 16.

  After the count value of the transmission circuit 1 and the reception circuit 2 becomes the same value in the initial operation of data comparison, the transmission data comparison circuit 6 and the reception data comparison circuit 15 repeatedly process the data in the same manner. And the receiving circuit 2 have the same count value.

  In the receiving circuit 2, the 10B8B converting circuit 13 identifies the header data and receives the packetized data.

  When the engine control unit 116 receives a printing instruction from the controller 115 and enters a printing operation, the engine scanner 116 activates the laser scanner 103 and the charger 102 to start the rotation of the photosensitive drum 101, and the receiving circuit 2 receives the bitmap data. Wait for

  When the bitmap data is received, the bitmap data is stored in the memory 24 as video data by sequentially performing density conversion and pseudo halftone conversion in the engine control circuit 123.

  In parallel with the above processing, when the laser scanner 103 becomes capable of scanning, the one-chip microcontroller 122 sequentially applies a high voltage to the developing device 104, the primary transfer device 109, and the secondary transfer device 110, and further fixing. Control is started so that the temperature of the vessel 111 becomes a specified temperature.

  When each unit is ready for printing, the one-chip microcontroller 122 feeds the paper from the paper cassette 105 and monitors the paper conveyance state by various sensors (not shown).

  When the leading edge of the paper reaches the registration roller 107, the one-chip microcontroller 122 once stops the paper conveyance, and waits for the video data to be stored in the memory 124, and then resumes the paper conveyance.

  The one-chip microcontroller 122 that has adjusted the timing of paper by refeeding instructs the engine control circuit 123 to send video data.

  The video data is input to a laser control circuit (not shown), drives a laser in the laser scanner 103, and generates a laser beam modulated by the video data.

  The generated laser beam scans the photosensitive drum 101 uniformly charged by the charger 102, and an electrostatic latent image is formed on the photosensitive drum 101.

  The latent image is developed into a toner image by the developing device 104, and the toner image is transferred to the intermediate transfer belt 108 conveyed by the primary transfer device 109 and transferred to the paper conveyed by the secondary transfer device 110. .

  The paper onto which the toner image has been transferred passes through the fixing device 111 to fix the toner image, and is then discharged onto the paper discharge tray 114 by the paper discharge roller 113.

  As described above, from the transmission of the training pattern to the time of data communication, both the transmission and reception circuits detect the repeated pattern and convert the communication data, so the repeated pattern can be eliminated by the same process, and the harmonics due to the repeated pattern It has the effect of suppressing radiation noise by reducing the components.

(Example 2)
FIG. 4 is a diagram showing a second embodiment of the present invention. In FIG. 4, the same components as those in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.

  Further, in the figure, components having the same function are given the same reference numerals, and a, b, c, and d are added after the reference signs to indicate that the configuration is for each color.

  Since the configuration other than the configuration of FIG. 4 is the same as that of the first embodiment, the description of the configuration other than that of FIG. 4 is also omitted.

  The difference from the first embodiment is that a serial communication device is provided for each color.

  When the printing speed of the color laser printer 100 is increased, it is necessary to relatively increase the transfer speed of the bitmap data, and the transfer cannot be performed in time for one set of communication lines.

  In this embodiment, an LVDS (low voltage differential transmission) signal is used as an interface between the transmission circuit 1 and the reception circuit 2 and serial transmission is performed with four sets of differential signals.

  In the first embodiment, the initial value is set to 00h for the counter circuits 7 and 16 of the transmission circuit 1 and the reception circuit 2.

  In this embodiment, different values are given as initial values to the four sets of the transmission circuit 1 and the counter circuits 7 and 16 in the reception circuit 2.

  That is, the initial value is set to 00h for the counter circuits 7a and 16a in the transmission circuit 1a and the reception circuit 2a, and the initial value is set to 33h for the counter circuits 7b and 16b in the transmission circuit 1b and the reception circuit 2b. .

  The initial value is set to 66h for the counter circuits 7c and 16c in the transmission circuit 1c and the reception circuit 2c, and the initial value is set to 99h for the counter circuits 7d and 16d in the transmission circuit 1d and the reception circuit 2d.

  When the initial value of the count value is changed for each color, the data patterns actually transferred on the four sets of communication lines are scattered even if the transmission patterns are simultaneously transmitted by the four sets of transmission / reception circuits.

  As described above, by giving different initial values to the counter circuits of the four sets of transmission / reception circuits, the probability that the four sets of data overlap each other can be reduced.

(Example 3)
FIG. 5 is a diagram showing a third embodiment of the present invention. In FIG. 5, the same components as those in the second embodiment are denoted by the same reference numerals, and the description thereof is omitted.

  Since the configuration other than the configuration of FIG. 5 is the same as that of the second embodiment, the description of the configuration other than that of FIG. 5 is also omitted.

  In FIG. 5, 18 is an oscillation circuit that generates a clock signal 20 that determines the transmission timing of the transmission circuit 1, 19 is an oscillator for generating a reference clock for the oscillation circuit 18, and 20 is a transmission timing generated by the oscillation circuit 18. This is a clock signal to be determined.

  In the first embodiment and the second embodiment, the clock signals that determine the transmission timing of the transmission circuit 1 are all common, and the description thereof is omitted.

  In this embodiment, the clock signals 20 to be supplied to the four sets of transmission circuits are separately provided, the clock signals have the same cycle, and the phases are shifted.

  When the clock signal 20a is used as a reference, the phase is shifted by a value obtained by dividing 180 degrees into five equal parts, the clock signal 20b is 36 degrees, the clock signal 20c is 72 degrees, and the clock signal 20d is 108 degrees.

  By shifting the phase, the transmission timing is also shifted, and even if four sets of data are transferred simultaneously, the change points of the actually transferred data on the four sets of communication lines vary.

  As described above, the clocks to be supplied to the four sets of transmission / reception circuits are separately provided and the phases are shifted, so that the four sets of data change points do not overlap.

1 is a block diagram of a serial communication device in a first embodiment of the present invention. It is sectional drawing of the color laser beam printer in the 1st Example of this invention. It is a block diagram of the control part in the 1st example of the present invention. It is a block diagram of the serial communication apparatus in the 2nd Example of this invention. It is a block diagram of the serial communication apparatus in the 3rd Example of this invention.

Explanation of symbols

1 Transmission Circuit 2 Reception Circuit 3 Transmission Data 4 Communication Line 5 Reception Data

Claims (2)

In serial communication devices that transfer data between devices,
Encoding means for encoding input data;
Encoding switching means for switching the correspondence of the output to the input of the encoding means;
Determining whether the same data is continuously input, first determination means for switching the encoding by the encoding switching means when the same data is continuous;
Serial transmission means for transmitting data encoded by the encoding means;
Timing generation means for generating serial data reception timing;
Receiving means for receiving serial data according to the timing generated by the timing generating means;
Decoding means for decoding received data received by the receiving means;
Decoding switching means for switching the correspondence of the output to the input of the decoding means;
Determining whether the data output from the decoding means is the same continuous data, and when the same data is continuous, second determination means for switching decoding by the decoding switching means;
A serial communication device comprising: In a serial communication method for transferring data between devices,
An encoding step for encoding input data;
An encoding switching step of switching the correspondence of the output to the input of the encoding step;
A first determination step of determining whether the same data is continuously input, and switching the encoding in the encoding switching step when the same data is continuous;
A serial transmission step of transmitting the data encoded in the encoding step;
A timing generation step for generating serial data reception timing;
A receiving step of receiving serial data according to the timing generated in the timing generating step;
A decoding step for decoding the received data received in the receiving step;
A decoding switching step of switching the correspondence of the output to the input of the decoding step;
Determining whether the data output from the decoding step is the same continuous data, a second determination step of switching decoding in the decoding switching step when the same data is continuous;
A serial communication method comprising:

Images