JP2008268831A - Electro-optical device and method of manufacturing electro-optical device - Google Patents

Abstract

An object of the present invention is to suppress an increase in interface resistance at a terminal portion of an electro-optical device.
In a pixel portion of a lower substrate of a liquid crystal display device that is an electro-optical device, a conductive laminated film of a pixel connection wiring, a pixel molybdenum film, and a pixel transparent conductive film is formed. , A conductive laminated film of terminal connection wiring 124 and terminal transparent conductive film 128 is formed. The terminal molybdenum film 197 has the same opening as the opening of the protective insulating film 62. The pixel connection wiring 24 and the terminal connection wiring 124 are formed in the same process and have an uppermost layer containing titanium. The pixel molybdenum film 96 and the terminal molybdenum film 197 are formed in the same process, and the pixel transparent conductive film 28 is formed in the same process as the terminal transparent conductive film 128. Instead of the molybdenum film, another wet-etchable conductive material can be used.
[Selection] Figure 4

Description

  The present invention relates to an electro-optical device and an electro-optical device manufacturing method, and in particular, includes a pixel portion disposed in a central portion and a terminal portion for mounting another semiconductor circuit or another wiring board in the peripheral portion. The present invention relates to an electro-optical device and an electro-optical device manufacturing method.

  In an electro-optical device such as a liquid crystal display device, a pixel portion that performs display is disposed in a central portion, and a circuit for driving the pixel portion is disposed in a peripheral portion thereof. When it is necessary to use another semiconductor circuit or a semiconductor circuit mounted on another wiring board when the circuit for driving is large-scale or high-speed, etc., the peripheral circuit of the electro-optical device is used. A terminal portion is provided, and another semiconductor circuit or another wiring board is mounted.

  Thus, when it is necessary to provide a pixel portion at the center and a terminal portion at the peripheral portion, it is preferable to form the pixel portion and the terminal portion in the same process.

  For example, Patent Document 1 discloses a method for forming a terminal portion suitable for COG (Chip On Glass) technology in a display device or the like. Here, molybdenum wiring is also formed in the terminal portion in the same process as the molybdenum gate electrode formation in the pixel portion, and connection wiring is also formed in the terminal portion in the same step as the data line formation in the pixel portion. Then, a protective film and a planarizing film are formed on the entire surface, and then the planarizing film outside the terminal portion of the data line is removed from the terminal portion in the same process as the planarizing film removal on the data line in the pixel portion. The Then, the protective film is removed relatively broadly in the terminal portion in the same process as the contact hole is opened in the protective film in the pixel portion. In the pixel portion, a transparent conductive film connected to the contact hole is formed on the planarization film to be a pixel electrode, and in the terminal portion, a transparent conductive film is formed on the connection wiring. Applies. Here, for the data line and the connection wiring, a laminated structure of molybdenum / aluminum / molybdenum or a laminated structure of titanium / aluminum / titanium is used, and SixNy (silicon nitride) is used as a protective film, and a planarizing film is used. An acrylic resin is used, and ITO (indium tin oxide) or IZO (indium zinc oxide) is used for the transparent conductive film. ITO (indium tin oxide) or IZO (indium zinc oxide) is also used for the terminal part because of the corrosion of the terminal part and the oxide film on the surface of the terminal part in the manufacturing process of the display device from the terminal part formation to COG mounting. This is for the purpose of suppressing the formation of and obtaining good electrical connection in COG mounting and ensuring product reliability after COG mounting.

JP 2006-309028 A

  As described above, in Patent Document 1, the molybdenum wiring used for forming the pixel portion, the laminated structure of molybdenum / aluminum / molybdenum or the laminated structure of titanium / aluminum / titanium, and the transparent conductive film are respectively connected to the terminal portions. It is also mentioned that it can be used for the formation of

  Here, molybdenum-based and titanium-based are described as connection wiring layers, both of which have advantages and disadvantages. That is, the molybdenum system is easy to process by wet etching, but dry etching is difficult and there is a limit to miniaturization. On the other hand, the titanium system can be dry-etched and is suitable for miniaturization.

  As the wiring and terminal portions are further miniaturized, the SixNy protective film is also formed into a desired shape by dry etching using a fluorine-based gas as in Patent Document 1, and in that case, fluorine is removed. The reactive component contained is formed on the surface of the titanium wiring as a surface product. Since the surface product formed on titanium exists as a high resistance layer, for example, when ITO is formed thereon, the interface resistance is increased. However, this surface product is difficult to remove by simple water washing.

  As described above, it is desirable to use a titanium-based connection wiring for miniaturization of the wiring and the terminal portion. However, as described above, it is difficult to remove the surface product.

  An object of the present invention is to provide an electro-optical device and an electro-optical device manufacturing method capable of suppressing an increase in interface resistance due to the formation of a transparent conductive film. Another object of the present invention is to provide an electro-optical device and a method of manufacturing the electro-optical device that can easily remove surface products generated during dry etching using a fluorine-based gas and suppress an increase in interface resistance. The following means contribute to at least one of these purposes.

  The electro-optical device according to the present invention includes a pixel portion and a terminal portion for mounting another semiconductor circuit or another wiring substrate around the pixel portion, and the pixel portion includes titanium. The pixel connection wiring having the upper layer, the pixel intermediate film made of a conductive material that can be wet-etched, and the pixel transparent conductive film have a stacked structure in which the lower layer side is stacked in this order toward the upper layer side. It is characterized by that.

  In the electro-optical device having the above structure, in the stacked structure of the pixel portion, a pixel intermediate film made of a conductive material that can be wet etched is disposed between the transparent conductive film and the layer containing titanium. Thereby, formation of an oxide film is suppressed rather than forming a transparent conductive film directly on the layer containing titanium, and an increase in interface resistance can be suppressed.

  In the electro-optical device according to the aspect of the invention, a pixel protective insulating film may be formed between the pixel intermediate film and the pixel transparent conductive film, and the terminal portion may form the pixel connection wiring. In the same process as forming the terminal connection wiring formed in the same process, the terminal intermediate film formed in the same process as forming the pixel intermediate film, and the pixel protective insulating film. A transparent conductive film for a terminal covering a terminal opening formed by opening the formed protective insulating film for a terminal, the protective insulating film for the terminal, and the intermediate film for the terminal, the transparent conductive film for the pixel It is preferable that the terminal transparent conductive film formed in the same process as that for forming the film has a laminated structure in which the layers are laminated in this order from the lower layer side toward the uppermost layer side.

  In the electro-optical device having the above structure, in the laminated structure of the terminal portion, after an intermediate film is laminated between the transparent conductive film and the layer containing titanium, a terminal opening is formed through the protective insulating film and the intermediate film. The terminal transparent conductive film is formed covering the terminal opening. During the formation of the terminal opening, the opening portion of the intermediate film is removed. That is, the surface product formed on the intermediate film when the protective insulating film is opened by fluorine-based dry etching is removed together with the removal of the intermediate film. As described above, in the terminal portion where the interface resistance is desired to be low, it is possible to easily remove the surface product generated during the dry etching using the fluorine-based gas, and the increase in the interface resistance can be suppressed.

  In the electro-optical device according to the aspect of the invention, it is preferable that the intermediate film is molybdenum. Molybdenum is a wet-etchable conductive material generally used in electro-optical devices. Therefore, with the above configuration, an increase in interface resistance can be suppressed using a general film material.

  In the electro-optical device according to the present invention, it is preferable that the intermediate film is IZO or ITO. IZO and ITO are wet-etchable conductive materials commonly used in electro-optical devices. Therefore, with the above configuration, an increase in interface resistance can be suppressed using a general film material.

  In addition, an electro-optical device manufacturing method according to the present invention manufactures an electro-optical device including a pixel portion and a terminal portion for mounting another semiconductor circuit or another wiring board around the pixel portion. A method of forming a connection wiring film having an uppermost layer containing titanium on the pixel portion and the terminal portion, and forming a pixel connection wiring in the pixel portion and a terminal connection wiring in the terminal portion. A wiring forming step, a step of forming an intermediate film made of a conductive material capable of wet etching on the pixel portion and the terminal portion, a protective insulating film is formed on the pixel portion and the terminal portion, and the terminal Forming a terminal opening in the protective insulating film at a portion, an intermediate film removing step of removing the intermediate film in the terminal portion by wet etching using the terminal opening as a mask, and a transparent conductive film Formed in the the Motobu said terminal portion, characterized in that it comprises a step of forming a transparent conductive film for a terminal in the terminal portion and the transparent conductive film for a pixel in the pixel portion.

  Moreover, it is preferable that the said intermediate film removal process removes the said intermediate film using the etching liquid whose etching rate with respect to the said uppermost layer is smaller than the etching rate with respect to the said intermediate film. Thereby, it can suppress that the uppermost layer containing titanium is removed unnecessarily at the time of intermediate film removal.

  The etching solution is preferably a solution containing phosphoric acid, nitric acid and acetic acid. Such a liquid is known as a PAN liquid. Therefore, the intermediate film can be effectively removed without using a special etching solution and using a known solution without unnecessarily removing titanium.

  In the electro-optical device manufacturing method according to the present invention, it is preferable that the intermediate film is molybdenum.

  In the electro-optical device manufacturing method according to the present invention, the intermediate film is preferably IZO or ITO.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Hereinafter, a liquid crystal display device will be described as an example of the electro-optical device, but an electro-optical device other than the liquid crystal display device may be used. For example, an electroluminescence device, a plasma display device, an electrophoretic display device, or a device using an electron-emitting device may be used.

  In the following, a liquid crystal display device in which a semiconductor circuit of another chip is mounted on a terminal portion using COG (Chip On Glass) technology, or an FPC (Flexible Printed Circuit Board) using OLB (Outer Lead Bonding) technology is used. However, of course, a scanning line driving circuit, a signal line driving circuit, or the like may be formed on a glass substrate using a low-temperature polysilicon technique.

  In the following description, a transmissive full color matrix type will be described as the configuration of the liquid crystal display device, but this is an example of the description of using the formation process of each element of the pixel portion and the terminal portion in common. Therefore, except for using the gate electrode, data line, and pixel electrode material of the pixel portion as they are in the laminated structure of the terminal portion, other structures can be appropriately changed according to the specifications of the electro-optical device. .

  FIG. 1 is a diagram showing a configuration of the liquid crystal display device 10. The liquid crystal display device 10 is of a transmissive full color matrix type and has a structure in which liquid crystal molecules are sandwiched between a lower substrate 12 and an upper substrate 13 and is composed of a plurality of terminals around a pixel portion 14. The terminal portion 20 is provided. In FIG. 1, the semiconductor circuit 16 of another chip connected by the COG technology and mounted on the lower substrate 12 and the FPC 18 which is another wiring substrate connected by the OLB technology are shown in the terminal portion 20.

  FIG. 2 is a diagram for explaining a planar arrangement by extracting one pixel from the pixel portion 14 and extracting one terminal from the terminal portion 20.

  The pixels in the pixel portion 14 are respectively arranged corresponding to the intersection where the gate electrode 22 and the data line 25 are orthogonal. One switching element 26 is provided in one pixel, the source terminal of the switching element 26 is connected to the laminated wiring of the data line 25 and the pixel molybdenum film 96, and the drain terminal is the pixel connection wiring 24 and the pixel molybdenum film. It is connected to the pixel electrode which is the transparent conductive film 28 for pixels through 96 laminated wirings. Here, the pixel connection wiring 24 and the data line 25 are made of the same material and formed in the same process. Note that the source terminal and the drain terminal of the switching element 26 are interchangeable, and the drain terminal described above may be referred to as a source terminal, and the source terminal described above may be referred to as a drain terminal.

  The terminals in the terminal portion 20 are the lead-out wiring 121 led out from the pixel portion 14, the lower wiring 122 connected to the lead-out wiring 121, the terminal connection wiring 124 connected to the lower wiring 122, and the terminal molybdenum film. 197, comprising a terminal transparent conductive film 128. Here, as described later, the lead-out wiring 121 and the terminal connection wiring 124 are made of the same material as the pixel connection wiring 24 and the data line 25 in the pixel portion 14 and are formed in the same process. The lower wiring 122 is made of the same material as the gate electrode 22 in the pixel portion 14 and is formed in the same process. Further, the terminal molybdenum film 197 is made of the same material as the pixel molybdenum film 96 and is formed in the same process, but thereafter, the molybdenum film is partially removed in the terminal portion 20. The contents of the partial removal will be described in detail later. The terminal transparent conductive film 128 is made of the same material as the pixel transparent conductive film 28 and is formed in the same process.

  In order to describe the configuration of the liquid crystal display device 10, a cross-sectional view taken along line AA in FIG. 2 is shown in FIG. A cross-sectional view corresponding to one pixel of the pixel portion 14 is shown on the left side of FIG. 3, and a cross-sectional view corresponding to one terminal of the terminal portion 20 is shown on the right side. As described above, the liquid crystal display device 10 has a structure in which the liquid crystal molecules 30 are sandwiched between the lower substrate 12 and the upper substrate 13, and the terminal portion 20 is formed in a peripheral portion where the upper substrate 13 does not extend. It is disposed on the lower substrate 12.

  First, the structure of the pixel portion 14 will be described. In the pixel portion 14, the upper substrate 13 has a color filter (CF) 42 having a black matrix (BM) disposed on an upper glass 40, and a counter electrode 44 disposed thereon. When configuring the liquid crystal display device 10, the counter electrode 44 is directed toward the liquid crystal molecules 30 and faces the lower substrate 12. Note that the alignment film and the like are not shown.

  In the lower substrate 12, a buffer layer 52 is disposed on a lower glass 50, and a semiconductor layer 54, a gate insulating film 56, a gate electrode 22, and an interlayer insulating film 60 are stacked thereon. Then, the data line 25 is connected to the source of the semiconductor layer 54 and the pixel connection wiring 24 is connected to the drain through a contact hole opened in the gate insulating film 56 and the interlayer insulating film 60. Further, a pixel molybdenum film 96 is formed on the data line 25 and the pixel connection wiring 24. A protective insulating film 62 and a planarizing film 64 are further stacked thereon. Further, the pixel transparent conductive film 28 is connected to the pixel molybdenum film 96 on the pixel connection wiring 24 through the opening formed in the protective insulating film 62 and the planarization film 64, and the top of the planarization film 64. The portion formed in this becomes a pixel electrode.

  Next, the structure of the terminal portion 20 will be described. As described above, since the semiconductor circuit 16 of another chip and the FPC 18 which is another wiring substrate are connected to the terminal portion 20 using the COG technique and the OLB technique, the upper glass 40 is not disposed. That is, the terminal part 20 is only a structure on the lower glass 50. In the terminal portion 20, the buffer layer 52 is disposed on the lower glass 50, and the gate insulating film 56, the lower wiring 122, and the interlayer insulating film 60 are stacked thereon. Then, the terminal connection wiring 124 is connected to the lower wiring 122 through a contact hole opened in the interlayer insulating film 60. A molybdenum film is formed on the terminal connection wiring 124, and a protective insulating film 62 is further stacked thereon. In addition, in the terminal part 20, since the planarization film | membrane 64 is removed entirely, it does not appear in the terminal part 20 of FIG. When the protective insulating film 62 has an opening in the terminal portion 20, the molybdenum film is partially removed using the protective insulating film 62 as a mask and the molybdenum film is left under the protective insulating film 62. A film 197 is formed. Then, the terminal transparent conductive film 128 is connected to the terminal connection wiring 124 through these openings.

  FIG. 4 is an enlarged partial view showing the laminated structure of the peripheral portion of the pixel connection wiring 24 in the pixel portion 14 and the peripheral portion of the terminal connection wiring 124 in the terminal portion 20. In the following, elements similar to those in FIGS. 1 to 3 are denoted by the same reference numerals, and detailed description thereof is omitted. In the following, description will be made using the reference numerals in FIGS. In FIG. 4, the upper substrate 13 and the liquid crystal molecules 30 are not shown, and the lower glass 50 and the buffer layer 52 are not shown in the lower substrate 12.

  4 is a partially enlarged view of the pixel connection wiring 24 and the pixel molybdenum film 96 in the pixel portion 14. The pixel connection wiring 24 is a wiring connected to the drain of the switching element 26 formed in the semiconductor layer 54 disposed on the buffer layer 52 (not shown). The pixel connection wiring 24 is connected to the semiconductor layer 54 exposed by a contact hole opened in the gate insulating film 56 and the interlayer insulating film 60, and from the lower layer side to the upper layer side, titanium 90, aluminum 92, and the uppermost layer. The titanium 94 is laminated in this order. The pixel molybdenum film 96 is laminated and disposed on the uppermost titanium 94 of the pixel connection wiring 24. Here, the interlayer insulating film 60 is illustrated as being directly disposed on the gate insulating film 56, but in this region, the gate electrode 22 formed next to the gate insulating film 56 is removed. It is because it has been. Here, the titanium 90 and 94 may be any layer containing titanium, and may be titanium nitride (TiN) or the like in addition to titanium metal. Hereinafter, the layer containing titanium will be described simply as titanium.

  A protective insulating film 62 and a planarizing film 64 are laminated on the pixel molybdenum film 96, and a contact hole is opened in the laminated insulating film so that a part of the pixel molybdenum film 96 is exposed. It is done. A pixel transparent conductive film 28 is disposed so as to cover the pixel molybdenum film 96 exposed in the contact hole. In this way, as described with reference to FIG. 2, the pixel transparent conductive film 28 is connected to the drain of the switching element 26 and becomes a pixel electrode disposed on the planarizing film 64.

  4 is a partially enlarged view of the terminal connection wiring 124 and the terminal molybdenum film 197 in the terminal portion 20. Unlike the pixel connection wiring 24, the terminal connection wiring 124 is a wiring connected to the lower wiring 122 arranged on the buffer layer 52 and the gate insulating film 56 (not shown). As will be described later, the lower wiring 122 is formed in the same process as the gate electrode 22 in the pixel portion 14 is formed. For example, when the gate electrode 22 is formed of a molybdenum film, the lower wiring 122 is formed of a molybdenum film. Since the lower wiring 122 formed in the same process as the gate electrode 22 is disposed in the terminal portion 20, the configuration of the pixel portion 14 in which the interlayer insulating film 60 is directly disposed on the gate insulating film 56 is provided. Unlike the gate electrode 22, the lower wiring 122 and the interlayer insulating film 60 are stacked in this order from the lower layer side to the upper layer side.

  The terminal connection wiring 124 is connected to the lower wiring 122 exposed by the contact hole opened in the interlayer insulating film 60, and titanium 190, aluminum 192, and the uppermost titanium 194 are formed from the lower layer side to the upper layer side. It is constructed by stacking in order.

  As will be described later, the terminal molybdenum film 197 is once laminated and disposed on the uppermost titanium 194 of the terminal connection wiring 124, but the contact is opened to the protective insulating film 62 disposed thereafter. The hole part is removed. That is, the terminal molybdenum film 197 is left and disposed only under the protective insulating film 62. The terminal molybdenum film 197 is removed using the opening of the protective insulating film 62 as a mask, which becomes a contact hole, and the uppermost titanium 194 of the terminal connection wiring 124 is exposed. A terminal transparent conductive film 128 is disposed so as to cover the uppermost titanium 194 exposed in the contact hole. The terminal transparent conductive film 128 has a function of preventing the surface of the terminal connection wiring 124 from being oxidized in the terminal portion 20.

  Thus, in the pixel portion 14, a conductive laminated film of the pixel connection wiring 24, the pixel molybdenum film 96, and the pixel transparent conductive film 28 is formed, while in the terminal portion 20, the terminal connection wiring 124 is formed. Then, a conductive laminated film of the terminal transparent conductive film 128 is formed. The terminal molybdenum film 197 in the terminal portion 20 is left only under the protective insulating film 62. Here, the pixel connection wiring 24 and the terminal connection wiring 124 are formed in the same process, the pixel molybdenum film 96 and the terminal molybdenum film 197 are formed in the same process, and the pixel transparent conductive film 28 is used for the terminal. It is formed in the same process as the transparent conductive film 128. The pixel connection wiring 24 and the terminal connection wiring 124 have a titanium / aluminum / titanium laminated structure, but a titanium nitride (TiN) / aluminum / titanium nitride (TiN) laminated structure, a titanium / aluminum-silicon alloy. A laminated structure such as (Al—Si) may be used.

  Next, a process for forming the structure described in FIGS. 1 to 4 will be described. In order to explain the process, description will be made using the flowcharts of FIGS. 5 and 6 and the configuration diagrams of FIGS. The effect of using the molybdenum film will be described with reference to FIGS. In the following, elements similar to those in FIGS. 1 to 4 are denoted by the same reference numerals, and detailed description thereof is omitted. In the following, description will be made using the reference numerals in FIGS.

  FIG. 5 is a flowchart showing a procedure up to the step of forming a connection wiring layer having a laminated structure of titanium / aluminum / titanium, and FIG. 6 is a flowchart showing a procedure of the subsequent steps. These steps are steps for manufacturing the lower substrate 12, and the liquid crystal display device 10 is manufactured through a step for manufacturing the upper substrate 13, a step for sandwiching liquid crystal molecules between the lower substrate 12 and the upper substrate 13, and the like.

  In the manufacture of the lower substrate 12 of the liquid crystal display device 10 described with reference to FIGS. 1 to 4, the titanium / aluminum / titanium film forming process, which is the last process in FIG. 5, and the molybdenum, which is the first process in FIG. The film forming process is performed continuously. That is, although titanium / aluminum / titanium / molybdenum is continuously formed, the conventional technique does not use a molybdenum film, and therefore, for the sake of easy comparison, the same process parts as those of the conventional technique are summarized in the flowchart of FIG. Is.

  FIG. 5 is a flowchart showing each procedure from the lower glass 50 to the titanium / aluminum / titanium film forming process. FIG. 7 shows the pixel unit 14 in a state where the titanium / aluminum / titanium film forming process is completed. 3 is a structural diagram showing a state of a terminal portion 20. FIG. In FIG. 7, the structure of the pixel portion 14 is shown on the left side, and the structure of the terminal portion 20 is shown on the right side. The same applies to FIG. 8 to FIG.

In FIG. 5, first, a buffer layer 52 is formed on the entire surface of the lower glass 50 (S10), and an amorphous silicon (a-Si) film is formed thereon (S12). Here, the buffer layer 52 is a laminated film of SiO ₂ / SiN and has a thickness of 100 to 200 nm, and the a-Si film has a thickness of about 30 to 50 nm. These films are formed by plasma CVD. Thus, a film of a-Si / SiO ₂ / SiN / glass (glass substrate) is laminated on the lower glass 50.

  Next, laser irradiation (laser annealing) is performed to crystallize the amorphous silicon film at a low temperature (S14). As a result, amorphous silicon is crystallized to form a polysilicon layer. Next, the obtained polysilicon layer is patterned to form a polysilicon island (semiconductor layer 54) in a required portion (S16). Thereafter, a resist pattern is formed by photolithography, and when the switching element 26 is an n-channel TFT, an impurity (for example, phosphorus) is doped in the source / drain region and the like (S18).

Next, the gate insulating film 56 made of SiO ₂ single layer film or SixNy / SiO ₂ of the multilayer film is formed on the entire surface of the substrate including the semiconductor layer 54 (S20).

  Thus, in the pixel portion 14, a gate insulating film 56 is formed so as to cover the semiconductor layer 54 made of polysilicon formed in the switching element 26, a region for forming a capacitor, or the like. On the other hand, in the terminal portion 20, the semiconductor layer 54 is removed and a gate insulating film 56 is formed on the buffer layer 52.

  Next, the gate electrode 22 is formed by sputtering on the gate insulating film 56 at a position above the channel region of the semiconductor layer 54 (S22). Here, the gate electrode 22 is made of molybdenum (Mo), tungsten molybdenum alloy (MoW), or the like as a material, and is formed to a thickness of 200 to 300 nm. The gate electrode 22 is formed as a part of a gate line common to a plurality of pixels arranged in one row in the horizontal direction in the pixel portion 14. Although not shown, the storage capacitor SC line is formed by the same process as the gate line, and the storage capacitor is opposed to the SC line by the semiconductor layer 54 formed for the storage capacitor through the gate insulating film 56. It is formed by arranging. Further, when the gate electrode 22 is formed in the pixel portion 14, the lower wiring 122 is formed in the terminal portion 20 in the same process.

  After the formation of the gate electrode 22 and the lower wiring 122, if there is a p-channel TFT as a switching element in the peripheral circuit, an impurity (for example, boron) is doped in the source / drain region (S24). This is performed by ion doping of boron using a resist formed in a region other than the region where doping is necessary as a mask by photolithography. At this time, no processing is performed on the terminal portion 20 (impurity doping is not performed). Note that when the n-channel TFT is used as the switching element, the step S24 can be omitted.

Next, film formation of the interlayer insulating film 60 composed of a laminated film of a single layer film or SiO ₂ / SixNy of SiO ₂ on the entire surface of the lower glass 50 by plasma CVD (S26). The thickness is about 400 to 800 nm, for example. After this interlayer insulating film 60 is formed, the semiconductor layer 54 in the region doped with impurities is activated by activation annealing by heat treatment (S28), and the carrier mobility in these regions is made sufficient.

  In this process, the interlayer insulating film 60 is formed in the pixel portion 14, and the interlayer insulating film 60 is also formed in the terminal portion 20.

  Further, contact holes are formed in the source region and drain region of the semiconductor layer 54 of the interlayer insulating film 60 and the gate insulating film 56 by photolithography and dry etching or wet etching (S30). At this time, the interlayer insulating film 60 above the lower wiring 122 of the terminal portion 20 is also removed in a wider area than in the pixel portion 14. The reason why the removal region is wide is that the connection resistance of the terminal portion is made lower according to the size of the terminal connected by the COG technique or OLB technique. Therefore, in the step S22, the lower wiring 122 is also patterned with a larger size than the width dimension of the gate electrode 22 of the pixel portion 14 and the like.

  Next, a connection wiring layer for the data line (source electrode) 25 and the pixel connection wiring (drain electrode) 24 is formed on the entire surface of the lower glass 50 (S32). FIG. 7 shows a state in which this step is performed. Here, a state in which the connection wiring layer 70 is formed over the entire surface of the pixel portion 14 and the terminal portion 20 is shown. The connection wiring layer 70 has a laminated structure of titanium / aluminum / titanium, and the lowermost layer titanium is connected to the semiconductor layer 54 in the pixel portion 14 and connected to the lower wiring 122 in the terminal portion 20. The intermediate aluminum is a core part of the conductive wiring, and the connection wiring layer 70 is configured by disposing titanium in the lower layer and the upper layer, respectively. As shown in FIG. 7, the connection wiring layer 70 is formed to cover the contact hole opened on the semiconductor layer 54 and the contact hole opened on the lower wiring 122. The connection wiring layer 70 is formed by a titanium / aluminum / titanium laminated film (thickness 400 to 800 nm) by sputtering.

  As described above, the procedure up to S32 in FIG. FIG. 6 is a flowchart showing the subsequent procedure. 8 to 13 are structural views corresponding to the respective steps.

  The first step in FIG. 6 is a molybdenum film forming step (S70). This step is a step of forming a molybdenum film over the entire surface of the lower glass 50, and is actually performed continuously with the step of S32 in FIG. That is, the film is formed by a molybdenum / titanium / aluminum / titanium laminated film (thickness: 500 to 900 nm) by sputtering. In this four-layer film formation, for example, using a single-wafer type continuous sputtering film formation apparatus, following the step of S30, film formation is performed in the order of titanium layer film formation-aluminum layer film formation-titanium layer film formation-molybdenum layer film formation. Can be done. Of course, these films can be formed by separate dedicated apparatuses. FIG. 8 shows a state in which the molybdenum film 72 is formed on the entire surface of the connection wiring layer 70.

  Next, a laminated wiring of molybdenum / titanium / aluminum / titanium is formed by photolithography and dry etching (S72). Dry etching can be performed using, for example, a chlorine-based etching gas. Note that, after the molybdenum film is patterned by wet etching, the laminated film of titanium / aluminum / titanium may be patterned with a chlorine-based dry etching gas. For wet etching of the molybdenum film, an appropriate etching solution containing phosphoric acid and nitric acid can be used. As such an etching solution, a so-called PAN solution which is a mixed solution containing phosphoric acid, nitric acid and acetic acid can be used.

  FIG. 9 is a diagram illustrating a state of the process of S72. Here, in the pixel portion 14, the pixel connection wiring 24 and the pixel molybdenum film 96 are formed in a laminated structure. The laminated wiring portion that is patterned in the pixel portion 14 corresponds to the drain electrode of the switching element 26. Also in the terminal portion 20, the terminal connection wiring 124 and the terminal molybdenum film 196 are formed in a laminated structure. At the stage where the step S72 is completed, the terminal molybdenum film 196 has the same shape as the terminal connection wiring 124, but finally, the terminal molybdenum film 197 provided with an opening in S80 described later. It becomes.

  Next, a protective insulating film 62 made of SixNy is formed on the entire surface of the lower glass 50 (S74). Subsequently, a planarization film 64 of photosensitive acrylic resin is formed on the entire surface of the lower glass 50, contact openings of the pixel electrodes are opened by photolithography, and the planarization film 64 around the terminal portion and the terminal portion is removed (S76). ). Then, an opening is formed in a necessary portion of the protective insulating film 62 where the planarizing film 64 is opened or removed by photolithography (S78).

  The opening can be formed as follows. First, the planarizing film 64 is patterned by photolithography. In the pixel portion 14, the planarization film 64 above the laminated wiring portion of the pixel connection wiring 24 and the pixel molybdenum film 96 corresponding to the drain electrode is removed. Further, the planarizing film 64 in the region outside the terminal portion of the data line 25 in the pixel portion 14 is removed. Therefore, the planarization film 64 is entirely removed from the terminal portion 20 and the protective insulating film 62 is exposed. This is shown in FIG.

Next, the protective insulating film 62 is patterned. In the pixel portion 14, the protective insulating film 62 where the planarizing film 64 has been removed is removed. Further, in the terminal portion 20, the protective insulating film 62 in the portion of the laminated wiring portion of the terminal connection wiring 124 and the terminal molybdenum film 196 corresponding to the connection portion in the COG technique or OLB technique is removed. For the patterning of the protective insulating film 62, dry etching using an etching gas such as SF ₆ or CF ₄ + O ₂ or wet etching using buffered hydrofluoric acid (BHF) is used.

  In this way, openings are provided where necessary. FIG. 11 is a diagram showing a state in which a necessary opening is provided in the protective insulating film 62. As described above, the planarizing film 64 is removed from the terminal portion 20.

  Next, the molybdenum film is removed from the terminal portion 20 (S80). This step is performed using the protective insulating film 62 as a mask. In other words, an opening having substantially the same size as the opening of the protective insulating film 62 opened in S78 is provided in the terminal molybdenum film 196, thereby forming the terminal molybdenum film 197 having the opening. Therefore, the terminal molybdenum film 197 is left only under the protective insulating film 62 and has the same opening as the opening of the protective insulating film 62. The opening serves as a contact hole, and a terminal is provided in the contact hole. The uppermost titanium 194 of the connection wiring 124 is exposed. This is shown in FIG. Note that this portion of the terminal portion 20 that is patterned in this way corresponds to a connection portion in the COG technology or OLB technology.

  The removal of the molybdenum film is performed only in the terminal portion 20, and in the pixel portion 14, the shape of the pixel molybdenum film 96 is not changed. A wet etching technique can be used for removing the molybdenum film, that is, patterning. For wet etching, an appropriate etching solution containing phosphoric acid and nitric acid can be used. As such an etching solution, a so-called PAN solution which is a mixed solution containing phosphoric acid, nitric acid and acetic acid can be used.

  Next, a transparent conductive film is formed (S82). ITO or IZO can be used as the transparent conductive film. Then, it is patterned into a predetermined shape by photolithography. An oxalic acid-based etchant can be used for patterning.

  Here, in the pixel portion 14, the pixel transparent conductive film 28 is used as a pixel electrode. That is, the pixel transparent conductive film 28 is connected to the laminated wiring portion of the pixel connection wiring 24 and the pixel molybdenum film 96 corresponding to the drain electrode, and is disposed so as to extend over the pixel region on the planarizing film 64. On the other hand, in the terminal part 20, the terminal transparent conductive film 128 is used as a connection part in the COG technique or the OLB technique. That is, the terminal transparent conductive film 128 is disposed on the terminal connection wiring 124 connected to the lower wiring 122. The terminal molybdenum film 197 is substantially hardly connected to the terminal transparent conductive film 128. FIG. 13 is a diagram showing this state.

  As described above, in the pixel portion 14 and the terminal portion 20 of the lower substrate 12 of the liquid crystal display device 10, a laminated wiring structure of molybdenum / titanium / aluminum / titanium is used as the conductive wiring layer. However, in the terminal portion 20, after the molybdenum / titanium / aluminum / titanium laminated wiring structure is formed, the same region as the opening of the protective insulating film 62 is removed as the opening. On the other hand, in the prior art, a laminated wiring structure of titanium / aluminum / titanium is used as the conductive wiring structure. Therefore, the difference in operation between the two types of stacked wiring structures will be described with reference to FIGS. 14 and 15. In the following, elements similar to those in FIGS. 1 to 13 are denoted by the same reference numerals, and detailed description thereof is omitted. In the following, description will be made using the reference numerals in FIGS.

  Here, FIG. 14 shows various steps from the patterning of the laminated wiring of titanium / aluminum / titanium to the opening of the protective insulating film 62 in the process of forming the laminated wiring structure of the terminal portion in the prior art. A structural diagram of the process is shown. In FIG. 15, an opening is provided in the protective insulating film 62 after the molybdenum / titanium / aluminum / titanium laminated wiring is patterned in the process of forming the laminated wiring structure of the terminal portion by the method of the flowchart of FIG. The structure diagram of each process up to is shown.

  In the terminal portion 20 of the prior art, as already described in S32 of FIG. 5, the connection wiring layer 70 composed of a laminated film of titanium / aluminum / titanium is formed. Then, the terminal connection wiring 124 is patterned and formed by photolithography and dry etching. For dry etching, a chlorine-based etching gas can be used. This is shown in FIG. At this time, an oxide film is formed on the surface of the uppermost titanium 194 by a dry etching atmosphere or the like. What is shown as the interface state 200 in FIG. 14A is a state in which this oxide film is formed.

Next, the protective insulating film 62 is formed. The protective insulating film 62 is provided with an opening at a location corresponding to the terminal connection wiring 124. The opening in the protective insulating film 62 can be performed by a dry etching technique using an etching gas such as SF ₆ or CF ₄ + O _{2 in the same} manner as described in S78 of FIG. This is shown in FIG. 14 (b).

  At this time, a part of the uppermost titanium oxide film is removed. However, a surface product generated by the reaction between SixNy constituting the protective insulating film 62 and the etching gas is formed on the surface of the uppermost titanium 194. What is shown as the interface state 202 in FIG. 14B is a state in which this surface product is formed.

  This surface product is a film containing components such as fluorine (F), titanium, oxygen (O), and the thickness thereof is, for example, about 10 nm to about 30 nm. It has been found that this surface product 202 on the titanium surface cannot be removed from the titanium surface by at least a water wash. For example, this surface product can be removed by using an HF (hydrogen fluoride) -based etchant, but in this case, the uppermost titanium layer is also considerably removed. Thus, it is not easy to remove this surface product.

  Since the terminal transparent conductive film 128 is formed after this, if the surface product remains, the interface resistance between the terminal transparent conductive film 128 and the terminal connection wiring 124 increases, Connectivity may be reduced.

  FIG. 15 is a diagram for explaining how the terminal portion 20 is formed according to the flowchart described in FIG. 6. FIG. 15A corresponds to S72 in FIG. 6 and the structural diagram in FIG. Corresponds to the structural diagram of S78 in FIG. 6 and FIG. 11, and FIG. 15C corresponds to the structural diagram of S80 in FIG. 6 and FIG.

  As described with reference to each procedure and each structural diagram above, here, a laminated wiring layer composed of a laminated film of molybdenum / titanium / aluminum / titanium is formed. Then, the terminal connection wiring 124 and the terminal molybdenum film 196 are formed by patterning by photolithography and dry etching. When dry etching is used for patterning, a chlorine-based etching gas can be used as described above. This is shown in FIG.

Next, the protective insulating film 62 is formed. The protective insulating film 62 is provided with openings at locations corresponding to the terminal molybdenum film 196 and the terminal connection wiring 124. The opening in the protective insulating film 62 can be performed by a dry etching technique using an etching gas such as SF ₆ or CF ₄ + O _{2 in the same} manner as described in S78 of FIG. This is shown in FIG.

  At this time, a surface product generated by a reaction between SixNy constituting the protective insulating film 62 and the etching gas is formed on the surface of the uppermost terminal molybdenum film 196. As described in connection with FIG. 14 (b), the detailed components of this surface product have not yet been fully elucidated, but with a film containing an F component, the thickness is, for example, from about 10 nm to about 30 nm. It is. In FIG. 15B, the interface state 208 is a state in which this surface product is further formed in addition to the state of FIG. 15A.

  Next, as described in S <b> 80 of FIG. 6, the molybdenum film is removed from the terminal portion 20. As described above, the removal of the molybdenum film, that is, the patterning can be performed by a wet etching technique using, for example, a PAN solution. The removal of the molybdenum film can be performed using the protective insulating film 62 as a mask. Therefore, the molybdenum film in the opening portion of the protective insulating film 62 is removed, and at the same time, the surface product on the molybdenum film is removed. As a result, the uppermost titanium 194 of the terminal connection wiring 124 is exposed. This is shown in FIG. Here, the interface state 212 shows that the surface product on the molybdenum film is removed together with the molybdenum film, and the surface of the uppermost titanium 194 is exposed. Then, the terminal transparent conductive film 128 is formed thereon.

  As described above, according to the method of the flowchart of FIG. 6, the surface product generated in connection with the dry etching of the protective insulating film 62 can be removed. The film remaining in the vicinity of the surface of the film 128 and the terminal connection wiring 124 becomes very small, and an increase in interface resistance between the terminal transparent conductive film 128 and the terminal connection wiring 124 can be suppressed, and the connectivity at each terminal is reduced. Can be suppressed.

  In the above, a molybdenum film is provided as an intermediate film between the connection wiring having the uppermost layer containing titanium and the transparent conductive film. Instead of the molybdenum film, another material film made of a conductive material that can be wet etched can be used as the intermediate film. The above ITO (indium tin oxide) and IZO (indium zinc oxide) are transparent conductive films, but can be wet-etched. Therefore, ITO and IZO can be used as an intermediate film instead of the molybdenum film, and interface resistance can be suppressed.

  Hereinafter, an example in which ITO is used as the transparent conductive film for pixels and the transparent conductive film for terminals and IZO is used for the intermediate film will be described. Of course, in such a case, ITO may be used as the intermediate film. In addition, when IZO is used as the pixel transparent conductive film and the terminal transparent conductive film, ITO or IZO may be used for the intermediate film.

  When IZO is used for the intermediate film, the process up to the formation of the connection wiring layer of titanium / aluminum / titanium is the same as that described in FIG. FIG. 16 is a flowchart showing a procedure after the formation of the titanium / aluminum / titanium connection wiring layer in S32 of FIG.

  The flowchart in FIG. 16 is the same as that in FIG. 6, which is a flowchart when a molybdenum film is used as an intermediate film, in which the molybdenum film is replaced with an IZO film. The structural diagrams corresponding to these procedures have the same contents as those obtained by replacing the molybdenum film 72 with an IZO film in FIGS. Therefore, in the following, the procedure will be described with reference to FIG. 16 with a focus on differences from the case of using a molybdenum film, the corresponding structural diagrams will be shown, and detailed description will be omitted. In the following, description will be made using the reference numerals in FIGS.

  The first step in FIG. 16 is an IZO film forming step (S71). This step is a step of forming an IZO film over the entire surface of the lower glass 50, and is actually performed continuously with the step of S32 in FIG. That is, a thin IZO film is formed continuously by a sputtering process of titanium / aluminum / titanium. The total film thickness of IZO / titanium / aluminum / titanium formed is 500 to 900 nm. This four-layer film formation is performed, for example, using a single-wafer type continuous sputtering film formation apparatus, following the process of S30, in the order of titanium layer film formation-aluminum layer film formation-titanium layer film formation-IZO layer film formation. Can be done. Of course, these films can be formed by separate dedicated apparatuses.

  In forming an IZO film, it is preferable to suppress the introduction of oxygen as much as possible under the film forming conditions. By doing in this way, the surface oxidation at the time of film formation of the IZO film can be minimized with respect to titanium which is the uppermost layer of the connection wiring layer. The structural diagram corresponding to S71 is FIG. 8. In this figure, it can be seen that the IZO film is formed on the entire surface of the connection wiring layer 70 by replacing the molybdenum film 72 with the IZO film.

  Next, a laminated wiring of IZO / titanium / aluminum / titanium is formed by photolithography and dry etching (S73). Dry etching can be performed using, for example, a chlorine-based etching gas. Note that, after the IZO film is patterned by wet etching, the titanium / aluminum / titanium laminated film may be patterned with a chlorine-based dry etching gas. For wet etching of the IZO film, an appropriate etching solution containing phosphoric acid and nitric acid can be used. As such an etching solution, a so-called PAN solution which is a mixed solution containing phosphoric acid, nitric acid and acetic acid can be used.

  FIG. 9 is a structural diagram corresponding to the process of S73. Here, the pixel molybdenum film 96 and the terminal molybdenum film 196 can be read as the pixel IZO film and the terminal IZO film, respectively. That is, in the pixel portion 14, the pixel connection wiring 24 and the pixel IZO film are formed in a laminated structure, and this laminated wiring portion corresponds to the drain electrode of the switching element 26. Also in the terminal portion 20, the terminal connection wiring 124 and the terminal IZO film 196 are formed in a laminated structure. As described in relation to the process of S73, the terminal IZO film is still in the same shape as the terminal connection wiring 124, but finally, an opening is provided in S81 described later. It becomes a terminal IZO film.

  Next, a protective insulating film 62 made of SixNy is formed on the entire surface of the lower glass 50 (S74). The IZO film is not crystallized by heat during the formation of the protective insulating film, for example, heat during CVD film formation. Therefore, it can be easily removed by wet etching described later. Subsequently, a planarization film 64 of photosensitive acrylic resin is formed on the entire surface of the lower glass 50, the contact openings of the pixel electrodes are opened by photolithography, and the planarization film 64 around the terminal portion and the terminal portion is removed ( S76) Next, an opening is formed at a required position by photolithography in the portion of the protective insulating film 62 where the planarizing film 64 is opened or removed (S78). These steps are the same as those described in FIG.

  The specific content of the formation of the opening is the same as that described with reference to FIG. That is, first, the planarizing film 64 is patterned by photolithography. In the pixel portion 14, the planarization film 64 above the laminated wiring portion of the pixel connection wiring 24 corresponding to the drain electrode and the pixel IZO film is removed, and the outer side of the terminal portion of the data line 25 in the pixel portion 14 is removed. The planarizing film 64 in the region is removed. Therefore, the planarization film 64 is entirely removed from the terminal portion 20 and the protective insulating film 62 is exposed. FIG. 10 is a corresponding structure diagram showing the state.

Next, the protective insulating film 62 is patterned. Here, in the pixel portion 14, the protective insulating film 62 where the planarizing film 64 has been removed is removed, and in the terminal portion 20, the terminal connection wiring 124 corresponding to the connection portion in the COG technique or OLB technique and the terminal. The protective insulating film 62 at the portion of the laminated wiring portion of the IZO film for use is removed. For the patterning of the protective insulating film 62, dry etching using an etching gas such as SF ₆ or CF ₄ + O ₂ or wet etching using buffered hydrofluoric acid (BHF) is also used. At the time of patterning of the protective insulating film 62, since there is an IZO film on the titanium that is the uppermost layer of the connection wiring layer in the opening, the influence of the generated deposit on the titanium in the patterning of the protective insulating film 62 is avoided. it can.

  In this way, openings are provided where necessary. FIG. 11 is a corresponding structural diagram showing a state in which a necessary opening is provided in the protective insulating film 62 and the planarizing film 64 is removed from the terminal portion 20. The resist used in the opening forming step is then removed by ashing and wet peeling.

  Next, the IZO film is removed from the terminal portion 20 (S81). This step is performed using the protective insulating film 62 as a mask. That is, an opening having substantially the same size as the opening of the protective insulating film 62 opened in S78 is provided in the terminal IZO film, thereby forming the terminal IZO film having the opening. Therefore, after the step of S81, the terminal IZO film is left only under the protective insulating film 62, and has the same opening as the opening of the protective insulating film 62. This opening becomes a contact hole, The uppermost titanium 194 of the terminal connection wiring 124 is exposed in this contact hole. FIG. 12 is a corresponding structural diagram showing this state. This portion of the terminal portion 20 that is patterned in this way corresponds to a connection portion in the COG technique or OLB technique.

  The removal of the IZO film is performed only in the terminal portion 20, and the shape of the pixel IZO film is not changed in the pixel portion 14. A wet etching technique can be used to remove the IZO film, that is, patterning. For wet etching, an appropriate etching solution containing phosphoric acid and nitric acid can be used. As such an etching solution, a so-called PAN solution which is a mixed solution containing phosphoric acid, nitric acid and acetic acid can be used. Since titanium is not dissolved or damaged by the PAN solution, the influence on the uppermost titanium layer of the connection wiring layer can be suppressed by wet etching for removing the IZO film.

  Next, a transparent conductive film is formed (S82). This step is the same as that described with reference to FIG. 6, and ITO can be used as the transparent conductive film, and is patterned into a predetermined shape by photolithography. An oxalic acid-based etchant can be used for patterning.

  Here, in the pixel portion 14, the pixel transparent conductive film 28 is used as a pixel electrode. In other words, the pixel transparent conductive film 28 is connected to the laminated wiring portion of the pixel connection wiring 24 and the pixel IZO film corresponding to the drain electrode, and is disposed so as to extend over the pixel region on the planarizing film 64. On the other hand, in the terminal part 20, the terminal transparent conductive film 128 is used as a connection part in the COG technique or the OLB technique. That is, the terminal transparent conductive film 128 is disposed on the terminal connection wiring 124 connected to the lower wiring 122. The terminal IZO film having the opening is substantially not connected to the terminal transparent conductive film 128. FIG. 13 is a corresponding structure diagram showing the state.

  Thus, in the pixel portion 14 and the terminal portion 20 of the lower substrate 12 of the liquid crystal display device 10, a laminated wiring structure of IZO / titanium / aluminum / titanium is used as the conductive wiring layer. However, in the terminal portion 20, after the IZO / titanium / aluminum / titanium laminated wiring structure is formed, the same region as the opening of the protective insulating film 62 is removed as the opening.

  FIG. 17 is a diagram for explaining how the terminal portion 20 is formed according to the flowchart described in FIG. 16, and corresponds to FIG. 17A corresponds to S73 of FIG. 16 and the structural diagram of FIG. 9, FIG. 17B corresponds to S78 of FIG. 16 and the structural diagram of FIG. 11, and FIG. This corresponds to S81 in FIG. 16 and the structural diagram in FIG. In the following description, the reference numerals in FIGS. 1 to 15 are used, and the IZO film is given a new reference numeral.

  As described in S73 above, a laminated wiring layer composed of a laminated film of IZO / titanium / aluminum / titanium is formed. Then, the terminal connection wiring 124 and the terminal IZO film 198 are patterned and formed by photolithography and dry etching. This is shown in FIG. When dry etching is used for patterning, a chlorine-based etching gas can be used as described above. At this time, an oxide film or the like is formed on the surface of the IZO film 198. What is shown as the interface state 206 in FIG. 17A is a state in which this oxide film or the like is formed.

Next, the protective insulating film 62 is formed. As described above, the IZO film is not crystallized by this formation heat. The protective insulating film 62 is provided with openings at locations corresponding to the terminal IZO film 198 and the terminal connection wiring 124. The opening in the protective insulating film 62 can be performed by a dry etching technique using an etching gas such as SF ₆ or CF ₄ + O _{2 in the same} manner as described in S78 of FIG. This is shown in FIG.

  At this time, a surface product generated by a reaction between SixNy constituting the protective insulating film 62 and the etching gas is formed on the surface of the uppermost terminal IZO film 196. As described in connection with FIG. 14 (b), the detailed components of this surface product have not yet been fully elucidated, but with a film containing an F component, the thickness is, for example, from about 10 nm to about 30 nm. It is. In FIG. 17B, the interface state 208 is a state in which this surface product is further formed in addition to the state of FIG. 17A.

  Next, as described in S <b> 81 of FIG. 16, the IZO film is removed from the terminal portion 20. As described above, the removal of the IZO film, that is, the patterning can be performed by, for example, a wet etching technique using a PAN solution. As described above, titanium is not damaged by the PAN solution. The removal of the IZO film can be performed using the protective insulating film 62 as a mask. Therefore, the IZO film in the opening portion of the protective insulating film 62 is removed, and at the same time, the surface product on the IZO film is removed. As a result, the uppermost titanium 194 of the terminal connection wiring 124 is exposed. This is shown in FIG. Here, the interface state 212 shows that the surface product on the IZO film is removed together with the surface of the uppermost titanium 194 exposed. Then, the terminal transparent conductive film 128 is formed thereon.

  As described above, according to the method of the flowchart of FIG. 16, IZO is not crystallized by the formation heat of SixNy, and can be removed by wet etching that does not damage titanium, and can be used for dry etching of the protective insulating film 62. Since the related surface product can be removed, compared with the method of the prior art, the film remaining in the vicinity of the surface of the terminal transparent conductive film 128 and the terminal connection wiring 124 is small, and the terminal transparent An increase in interface resistance between the conductive film 128 and the terminal connection wiring 124 can be suppressed, and a decrease in connectivity at each terminal can be suppressed.

1 is a plan view of a liquid crystal display device according to an embodiment of the present invention. In an embodiment concerning the present invention, it is a figure showing a pixel part and a terminal part. 1 is a cross-sectional structure diagram of a liquid crystal display device according to an embodiment of the present invention. In embodiment which concerns on this invention, it is the fragmentary figure which expands and shows a laminated structure about a pixel part and a terminal part. In embodiment concerning this invention, it is a flowchart which shows the first half part of the manufacture procedure of a lower board | substrate. In embodiment concerning this invention, it is a flowchart which shows the second half part of the manufacture procedure of a lower board | substrate. FIG. 6 is a structural cross-sectional view showing a state of step S32 in the flowchart of FIG. 5. FIG. 7 is a structural cross-sectional view showing the state of step S70 in the flowchart of FIG. 6. FIG. 7 is a structural cross-sectional view showing a state of step S72 in the flowchart of FIG. 6. FIG. 7 is a structural cross-sectional view showing a state during the process of S78 in the flowchart of FIG. 6. FIG. 7 is a structural cross-sectional view showing a state where the process of S78 in the flowchart of FIG. 6 is completed. FIG. 7 is a structural cross-sectional view showing the state of step S80 in the flowchart of FIG. 6. FIG. 7 is a structural cross-sectional view showing a state of step S82 in the flowchart of FIG. 6. It is a figure explaining a prior art in order to demonstrate the effect | action of the molybdenum film | membrane in embodiment which concerns on this invention. It is a figure explaining the effect | action of the molybdenum film | membrane in embodiment which concerns on this invention. In another embodiment, it is a flowchart which shows the second half part of the manufacture procedure of a lower board | substrate. It is a figure explaining the effect | action of the IZO film | membrane in other embodiment.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 Liquid crystal display device, 12 Lower board | substrate, 13 Upper board | substrate, 14 Pixel part, 16 Semiconductor circuit, 18 FPC, 20 Terminal part, 22 Gate electrode, Connection connection for 24 pixels, 25 Data line, 26 Switching element, Transparent for 28 pixels Conductive film, 30 liquid crystal molecules, 40 upper glass, 42 color filter, 44 counter electrode, 50 lower glass, 52 buffer layer, 54 semiconductor layer, 56 gate insulating film, 60 interlayer insulating film, 62 protective insulating film, 64 flattening film 70, connection wiring layer, 72 molybdenum (Mo) film, 90, 94, 190, 194 titanium (Ti), 92, 192 aluminum (Al), 96 pixel molybdenum film, 121 lead-out wiring, 122 lower wiring, for 124 terminals Connection wiring, transparent conductive film for 128 terminals, molybdenum film for 196,197 terminals, 198 For 199 terminals IZO, 200,202,206,208,212 interface states.

Claims (9)

A pixel portion;
A terminal portion for mounting another semiconductor circuit or another wiring board on the periphery of the pixel portion;
With
In the pixel portion, a pixel connection wiring having a top layer containing titanium, a pixel intermediate film made of a conductive material that can be wet-etched, and a pixel transparent conductive film are arranged in this order from the lower layer side to the upper layer side. An electro-optical device having a laminated structure laminated toward the top. The electro-optical device according to claim 1,
Including a pixel protective insulating film formed between the pixel intermediate film and the pixel transparent conductive film;
The terminal portion is
A terminal connection wiring formed in the same process as forming the pixel connection wiring;
A terminal intermediate film formed in the same process as forming the pixel intermediate film;
A terminal protective insulating film formed in the same process as the pixel protective insulating film is formed;
A transparent conductive film for a terminal that covers a terminal opening formed by opening the protective insulating film for a terminal and the intermediate film for the terminal, and is formed in the same process as the transparent conductive film for a pixel is formed. A transparent conductive film for terminals,
An electro-optical device having a stacked structure in which layers are stacked in this order from the lower layer side toward the uppermost layer side. The electro-optical device according to claim 1 or 2,
The electro-optical device, wherein the intermediate film is molybdenum. The electro-optical device according to claim 1 or 2,
The electro-optical device, wherein the intermediate film is IZO or ITO. A method of manufacturing an electro-optical device comprising: a pixel portion; and a terminal portion for mounting another semiconductor circuit or another wiring board on a peripheral portion of the pixel portion,
Forming a connection wiring layer having an uppermost layer containing titanium in the pixel portion and the terminal portion, and forming a connection wiring layer for the pixel in the pixel portion and a connection wiring for the terminal in the terminal portion;
Forming an intermediate film made of a conductive material capable of wet etching on the pixel portion and the terminal portion;
Forming a protective insulating film on the pixel portion and the terminal portion, and forming a terminal opening in the protective insulating film in the terminal portion;
An intermediate film removing step of removing the intermediate film in the terminal portion by wet etching using the terminal opening as a mask;
Forming a transparent conductive film on the pixel portion and the terminal portion, and forming a pixel transparent conductive film in the pixel portion and a terminal transparent conductive film in the terminal portion;
An electro-optic device manufacturing method comprising: The electro-optical device manufacturing method according to claim 5,
The method of manufacturing an electro-optical device, wherein the intermediate film removing step removes the intermediate film using an etchant having an etching rate with respect to the uppermost layer smaller than an etching rate with respect to the intermediate film. The method of manufacturing an electro-optical device according to claim 6.
The method of manufacturing an electro-optical device, wherein the etching solution is a solution containing phosphoric acid, nitric acid, and acetic acid. The electro-optical device manufacturing method according to any one of claims 5 to 7,
The method of manufacturing an electro-optical device, wherein the intermediate film is molybdenum. The electro-optical device manufacturing method according to any one of claims 5 to 7,
The method of manufacturing an electro-optical device, wherein the intermediate film is IZO or ITO.

Images