JP2008263150A - Semiconductor device and inspection method - Google Patents

Abstract

A semiconductor device capable of inspecting a semiconductor integrated circuit having external electrodes on two opposing surfaces without enlarging an external dimension.
An external electrode 8 provided on one surface 1b is electrically connected to a semiconductor chip 2 by wiring 10 provided on the surface and inside of the interposer substrate 3. On the other surface 1a, an external electrode 4 is provided which is electrically connected to the semiconductor chip 2 by wiring provided on the surface and inside of the interposer substrate 3. One end of the wiring provided on the surface and inside of the interposer substrate 3 is electrically connected to the semiconductor chip 2 and the other end is branched, and is provided on the external electrode 5a provided on one surface 1a and the other surface 1b. The external electrode 5b is electrically connected. Thereby, it becomes possible to test | inspect by electrically connecting the external electrode 5a and the external electrode 8 which were provided in the one surface 1a, and the test | inspection apparatus.
[Selection] Figure 1

Description

  The present invention relates to a structure of a semiconductor device having external electrodes on two opposite planes, and an inspection device and an inspection method for measuring and inspecting electrical characteristics of the semiconductor device.

  In recent years, new semiconductor device package forms have been developed in response to the demand for higher density semiconductor devices. This is a semiconductor device having electrodes on two opposite planes, and enables a package-on-package (hereinafter abbreviated as POP) structure in which the assembled semiconductor devices are three-dimensionally stacked.

  For this reason, a structure for easily inspecting the semiconductor device as described above, and an apparatus and method for inspecting them have become necessary. In addition, with the increase in the speed of electrical signals exchanged between stacked semiconductor devices, inspection devices are also required to improve electrical performance, particularly to reduce transmission path loss.

Patent Document 1 describes a structure of a POP type semiconductor device.
JP-A-6-13541

  As shown in FIG. 15, the conventional semiconductor device 32 includes external electrodes 34 and 35 on one main surface 32 b among the opposite main surfaces 32 a and 32 b of the interposer substrate 38, and a semiconductor chip 33. Is mounted, and external electrodes 36 and 37 are provided on the other main surface 32a. The interposer substrate 38 electrically connects the semiconductor chip 33 provided on one main surface 32b and the external electrode 35 by wiring provided on the surface and inside thereof, and is provided on the semiconductor chip 33 and the other main surface 33a. The external electrode 36 is electrically connected, and the external electrode 34 provided on one main surface 32b and the external electrode 37 provided on the other main surface 32a are electrically connected.

  However, in the conventional inspection apparatus 40, the inspection circuit board 39 that forms an inspection jig that is electrically connected to the main body of the inspection apparatus 40 faces only one of the main surfaces of the semiconductor device 32 described above. Are arranged. For this reason, when one main surface 32 a of the semiconductor device 32 is disposed relative to the inspection circuit board 39, the external electrodes 34 and 35 existing on the other main surface 32 b of the semiconductor device 32 and the land of the inspection circuit board 39 are arranged. It was difficult to electrically connect the electrode 41.

  For this reason, there is a semiconductor device as shown in FIG. As shown in FIG. 16, the semiconductor device 42 includes external electrodes 43 and 45 on one main surface 42 b among the opposite main surfaces 42 a and 42 b of the interposer substrate 47 and the semiconductor chip 46. The external electrodes 49 and 55 are provided on the other main surface 42a.

  The interposer substrate 47 is electrically connected to the semiconductor chip 46 provided on one main surface 42b and the external electrode 45 by wiring provided on the surface and inside thereof, and provided on the semiconductor chip 46 and the other main surface 42a. The external electrode 49 is electrically connected, and the external electrode 43 provided on one main surface 42b and the external electrode 55 provided on the other main surface 42a are electrically connected.

  Further, a plurality of inspection external electrodes 48 are additionally provided on the other main surface 42 a of the interposer substrate 47, and the inspection external electrodes 48 are formed on the semiconductor chip 46 on the one main surface 42 b of the interposer substrate 47. Only the external electrodes 45 that are electrically connected to each other are electrically connected to the surface of the interposer substrate 47 and wirings 44 provided inside.

  When inspecting the electrical characteristics of the semiconductor device 42, the one surface 42 a of the semiconductor device 42 is disposed relative to the inspection circuit board 51 electrically connected to the inspection device 54, and the conductive contact 50 is provided. The external electrode 49 on the other main surface 42a is electrically connected to the land electrode 52 on the inspection circuit board 51, and the inspection external electrode 48 on the other main surface 42a and the land electrode 52 on the inspection circuit board 50 are connected to each other. Are electrically connected. As a result, the external electrode 45 on one main surface 42b of the semiconductor device 42 and the land electrode 52 of the inspection circuit board 51 are electrically connected to each other, and the semiconductor device 42 is inspected. Can do.

  However, in this structure, since the inspection external electrode 48 is provided on the other main surface 42a of the interposer substrate 47 in addition to the external electrodes 55 and 49, an area for mounting the external electrode 48 is secured on the other main surface 42a. There must be.

As a result, the external dimensions of the semiconductor device 42 are increased, and there is a problem in that the effect of increasing the density and reducing the area of the plane due to the lamination is hindered.
Further, since the wiring length between the inspection external electrode 48 and the semiconductor chip 46 becomes long, a loss occurs in the transmission path, and the inspection external electrode 48 and the inspection use are unnecessary as the function of the semiconductor device 42. The wiring 44 between the external electrode 48 and the external electrode 45 becomes a stray capacitance, which hinders an inspection performed at a high speed and a high actual operation speed of an electric signal between semiconductor devices.

  The present invention relates to a structure of a semiconductor device, an inspection apparatus, and an inspection method capable of performing high-quality electrical characteristic inspection in a semiconductor device having electrodes on two opposite surfaces without enlarging the external dimensions of the semiconductor device. The purpose is to provide.

  In order to achieve the above object, a semiconductor device according to a first configuration of the present invention includes an external electrode on opposite main surfaces of a substrate and a semiconductor chip mounted on at least one of the main surfaces. An apparatus, wherein the substrate includes a wiring structure that electrically connects the semiconductor chip only to external electrodes existing on one opposite main surface, and the semiconductor only only on external electrodes existing on the opposite main surface It has a wiring structure for electrically connecting the chip and a wiring structure for electrically connecting the semiconductor chip to a plurality of external electrodes existing on opposite main surfaces.

  Thereby, in the electrical characteristic inspection of the semiconductor device having the external electrode on the opposite main surface, the semiconductor device is not inspected even if any of the opposite main surfaces are arranged at a position facing the inspection circuit board of the inspection device. The electrical characteristics of the semiconductor chip can be inspected by electrically connecting the external electrodes present on the surface facing the circuit board and the electrodes of the inspection circuit board.

  Furthermore, since signals are exchanged between one main surface of a semiconductor device having external electrodes on opposite main surfaces and the stacked semiconductor device, it is necessary to provide an inspection external electrode on the other main surface of the semiconductor device There is no. As a result, the signal path for transmitting and receiving signals between the semiconductor device and the stacked semiconductor device can perform high-speed operation of electrical signals, and can be inspected at a higher actual operation speed.

  In a semiconductor device according to a second configuration of the present invention, a test circuit is provided in the semiconductor chip, and the substrate is a wiring that electrically connects the test circuit only to external electrodes existing on one opposite main surface. Electrical connection of the test circuit only to the external electrode existing on the opposite main surface of the structure and the plurality of external electrodes existing on both opposite main surfaces simultaneously And a wiring structure connected to the wiring.

  Inspection signals are exchanged between the conventional inspection apparatus and the internal circuit of the semiconductor device in a parallel format. However, by providing a test circuit, signals can be exchanged between the semiconductor device and the test circuit in the same format as before, and test signals can be exchanged between the test circuit and the test device in a serial format. Thus, it is possible to reduce the number of signal wirings between the inspection device and the test circuit. As a result, it is possible to reduce the number of external electrodes necessary for conducting the electrical characteristic inspection of the semiconductor chip, and to increase the electrical characteristics without enlarging the external dimensions of the semiconductor device having external electrodes on the two opposite main surfaces. Inspection is possible.

  Further, by electrically connecting the test circuit and external electrodes provided on a plurality of surfaces, even if either of the two opposing main surfaces is disposed at a position facing the inspection circuit board, the external circuit The test circuit of the semiconductor chip can be driven by electrically connecting the electrode and the land electrode of the inspection circuit board.

  According to a third aspect of the present invention, there is provided a method for inspecting a semiconductor device, wherein the first inspection is performed by obtaining an electrical connection between the external electrode existing on one main surface of the semiconductor device and an inspection circuit board of the inspection device Further, the second inspection is performed by obtaining an electrical connection between the external electrode existing on the other main surface of the semiconductor device and the inspection circuit board of the inspection device.

  Further, in the first inspection and the second inspection, by reversing the posture of the semiconductor device, the external electrodes existing on the respective principal surfaces in the same direction with respect to the inspection circuit board of the inspection device An electrical connection with the inspection circuit board of the inspection apparatus is obtained.

This eliminates the need for wiring and parts for changing and arranging the placement position and orientation of the inspection circuit board, and shortens the transmission path.
A plurality of the semiconductor devices are arranged in the same posture in the same plane, and the electrical connection between the external electrode existing on one main surface of all the semiconductor devices and the inspection circuit board of the inspection device is collectively performed. A first inspection is performed, and further, a second inspection is performed collectively for the electrical connection between the external electrode present on the other main surface of all the semiconductor devices and the inspection circuit board of the inspection device. It is characterized by.

  As described above, according to the present invention, an electrical characteristic inspection of a semiconductor device having external electrodes on two opposite main surfaces can be performed with high quality using a conventional inspection device. In addition, an increase in the number of external electrodes of the semiconductor device necessary for the inspection can be suppressed, and an increase in the outer dimensions of the semiconductor device can be prevented. Further, the signal path for transferring signals between the semiconductor device having the external electrodes on the two opposite main surfaces and the stacked semiconductor device is capable of high-speed operation of electrical signals between the semiconductor devices, and higher actual operation speed. Inspection at can be performed.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(Embodiment 1)
As shown in FIG. 1, in the semiconductor device 1, one main surface 1b of opposing main surfaces of the interposer substrate 3 forms a surface facing the stacked semiconductor device 9, and the one main surface 1b has a semiconductor. Chip 2 is mounted.

  One main surface 1 b of the interposer substrate 3 is provided with an external electrode 8 and an external electrode 7 for connection to the external electrode 12 of the stacked semiconductor device 9, and the external electrode 7 is formed on the surface and inside of the interposer substrate 3. The wiring provided is electrically connected to the external electrode 6 provided on the other main surface 1a. These external electrodes 6 and 7 are used to directly send and receive electrical signals and supply power and ground from the mounting substrate or the inspection circuit substrate to the stacked semiconductor device 9.

  An external electrode 4 is provided on the other surface 1a, and the external electrode 4 is necessary for inspecting the single operation of the semiconductor device 1 during the electrical characteristic inspection. The external electrode 4 is electrically connected to the internal circuit of the semiconductor chip 2 by wiring provided on the semiconductor chip 2.

  Furthermore, a part of the wiring provided on the surface and inside of the interposer substrate 3 is electrically connected to an internal circuit of the semiconductor chip 2 necessary for inspecting an operation related to the stacked semiconductor device 9 at one end, The other end is electrically connected to an external electrode 5a provided on the other main surface 1a and an external electrode 5b provided on one main surface 1b.

The external electrode 8 provided on one main surface 1 b of the interposer substrate 3 is electrically connected to the semiconductor chip 2 by the wiring 10 provided on the surface and inside of the interposer substrate 3. In this configuration, inspection external electrodes and wirings that are unnecessary for performing a single operation as the semiconductor device 1 are eliminated, and the wiring 10 that connects the external electrode 8 and the semiconductor chip 2 may be short. High-speed signals can be exchanged between the stacked semiconductor device 9 and the semiconductor device 1. Further, the operation related to the stacked semiconductor device 9 can be inspected by electrically connecting the external electrode 5a provided on the other main surface 1a and the external electrode 8 provided on the one main surface 1b to an inspection device. It becomes possible.
(Embodiment 2)
FIG. 2 shows a semiconductor device according to the second embodiment of the present invention. The same components as those in FIG.

  As shown in FIG. 2, the semiconductor device 1 includes a test circuit 13 provided inside a semiconductor chip 2 mounted on the interposer substrate 3, and the interposer substrate 3 serves as an external electrode that transmits and receives a signal for operating the test circuit 13. The external electrode 8 is provided on one main surface 1b. The external electrode 8 is electrically connected only to the test circuit 13 by wiring provided on the surface and inside of the interposer substrate 3.

  The other main surface 1a of the interposer substrate 3 is provided with an external electrode 4 that is electrically connected only to the test circuit 13 by wiring provided on the surface and inside of the interposer substrate 3.

  Further, a part of the wiring provided on the surface and inside of the interposer substrate 3 has one end electrically connected to the test circuit 13 and the other end provided on the other main surface 1a and one main surface. It is electrically connected to the external electrode 5b provided on 1b.

  With this configuration, the transfer of the inspection signal between the conventional inspection device and the internal circuit of the semiconductor device 1 is performed in a parallel format. However, by providing the test circuit 13, the internal circuit of the semiconductor device 1 and the test circuit 13 can be exchanged. Signals can be exchanged in the same format as before, and test signals can be exchanged in serial format between the test circuit 13 and the inspection device. As a result, the number of signal lines between the inspection apparatus and the test circuit 13 can be reduced. As a result, it is possible to reduce the number of external electrodes necessary for performing the electrical characteristic inspection of the semiconductor chip, and it is possible to perform the electrical characteristic inspection without enlarging the external dimensions of the semiconductor device 1.

  Further, when the external electrode 5b and the external electrode 8 provided on one main surface 1b of the interposer substrate 3 are electrically connected to the inspection device, the one main surface 1b is opposed to the inspection circuit substrate of the inspection device. In this state, the test circuit 13 of the semiconductor chip 2 can be driven.

On the other hand, the external electrode 5a and the external electrode 4 provided on the other main surface 1a of the interposer substrate 3 are electrically connected to the inspection device, so that the other main surface 1a is disposed at a position facing the inspection circuit board of the inspection device. In this state, the test circuit 13 of the semiconductor chip 2 can be driven.
(Embodiment 3)
FIG. 3 shows an inspection method according to Embodiment 3 of the present invention, and the same components as those in FIG.

  As shown in FIG. 3, the inspection device 18a includes an electrically connected inspection circuit board 17a and an inspection circuit board 17b, and electrically connects the lower inspection circuit board 17a and the upper inspection circuit board 17b. is doing. The lower inspection circuit board 17a includes a conductive contact 16b, and the upper inspection circuit board 17a includes a conductive contact 16b.

  As shown in FIG. 3 (a), in the first inspection, the external electrode 4 present on the other main surface 1a of the interposer substrate 3 and the lower inspection circuit board 17a are electrically connected using a conductive contact 16a. Connect with each other.

  As shown in FIG. 3B, in the second inspection, the external electrodes 5b and 8 existing on one main surface 1b of the interposer substrate 3 and the upper inspection circuit board 17b are connected using a conductive contact 16b. Conduct with electrical connection.

  Therefore, the scale of the inspection circuit boards 17a and 17b of the inspection apparatus 18a may include the conductive contacts 16a and 16b corresponding to the number of external electrodes existing on the main surface of the semiconductor device 1 corresponding to each inspection. .

In this way, by dividing the electrical characteristic inspection into two or more times, the inspection can be performed using an inspection apparatus having the same configuration as the conventional one.
(Embodiment 4)
FIG. 4 shows an inspection method according to Embodiment 4 of the present invention, and the same components as those in FIGS. 1 and 3 are denoted by the same reference numerals and description thereof is omitted.

As shown in FIG. 4, the inspection apparatus 18 a includes an inspection circuit board 17 a and an inspection circuit board 17 b that are electrically connected, and the inspection circuit board 17 a and the inspection circuit board 17 b have the same posture with respect to the semiconductor device 1, that is, The semiconductor device 1 is disposed upward and corresponds to the opposite main surfaces of the semiconductor device 1 due to the inversion of the semiconductor device 1.
As shown in FIG. 4A, in the first inspection, the external electrodes 4, 5a, 6 existing on one main surface 1a of the interposer substrate 3 and the inspection circuit board 17a are connected using a conductive contact 16a. Conduct with electrical connection.
As shown in FIG. 4B, in the second inspection, the semiconductor device 1 is inverted after the first inspection, and the external electrodes 5b, 7 and 8 existing on the other surface 1b of the interposer substrate 3 and the inspection circuit board. 17b is electrically connected with the conductive contact 16b.

  In the fourth embodiment, the conductive contacts 16a and 16b are pogo pin type conductive contacts. However, other types of conductive contacts such as a sheet contact having low self-impedance characteristics may be used.

  As a result, the conductive contact 16a or 16b is the only medium that electrically connects the semiconductor device 1 having the external electrode on the opposite main surface and the inspection circuit board 17a or 17b, and the electrical contact of the conductive contacts 16a and 16b. By making the characteristic low self-impedance, it is possible to minimize the loss of the transmission path between the semiconductor device 1 and the inspection circuit board 17a and the transmission path between the semiconductor device 1 and the inspection circuit board 17b. It becomes possible to inspect the semiconductor device 1 having the external electrode on the surface at the high actual operation speed.

Furthermore, in the semiconductor device 1 having external electrodes on opposite main surfaces, the arrangement of the plurality of external electrodes 4, 5a, 6 existing on one main surface 1a and the plurality of external electrodes 5b existing on the other main surface 1b. , 7, 8, the conductive contacts 16 a are selectively arranged in accordance with the arrangement of the plurality of external electrodes 4, 5 a, 6 existing on one main surface 1 a. By selectively arranging the conductive contacts 16b in accordance with the arrangement of the plurality of external electrodes 5b, 7 and 8 existing on the other main surface 1b, the conductive contacts 16a and the conductive contacts 16b are combined, The inspection circuit board 17a and the inspection circuit board 17b can be used together, and the inspection apparatus 18a and the inspection apparatus 18b can be used together by changing the program of the inspection apparatus.
(Embodiment 5)
FIG. 5 shows an inspection method according to Embodiment 5 of the present invention, and the same components as those in FIGS. 1 and 3 are denoted by the same reference numerals, and description thereof is omitted.

  As shown in FIG. 5, in the inspection of the semiconductor device 1 having external electrodes on opposite main surfaces, a plurality of semiconductor devices 1 are arranged in the same posture in the same plane, and a plurality of inspection circuit boards 17a of the inspection device 18a are arranged. A first inspection is performed by collectively connecting the external electrodes 4, 5 a and 6 on the other main surface 1 a of the semiconductor device 1 together. Thereafter, the plurality of semiconductor devices 1 are inverted, and the external electrodes 5b, 7, 8 on one main surface 1b and the inspection circuit board 17b of the inspection device 18b are electrically connected together to perform a second inspection. To implement.

As a result, a plurality of semiconductor devices having external electrodes on opposite main surfaces can be simultaneously inspected, so that the inspection cost can be reduced.
(Embodiment 6)
6 and 7 show an inspection apparatus according to Embodiment 6 of the present invention. The same components as those in FIGS. 1 and 3 are denoted by the same reference numerals, and description thereof is omitted.

  As shown in FIGS. 6 and 7, the inspection apparatus includes a transfer device 100, which is a device that transfers the semiconductor device 1 and performs a contact operation between the semiconductor device 1 and the inspection circuit board. The semiconductor device 1 has an external electrode 19 on at least a main surface 1a opposed to the transfer device 100 among the opposite main surfaces of the opposite sides, and the external electrode 19 is made of a solder ball or a solder bump and protrudes from the main surface 1a. Convex shape.

  The transport device 100 has a semiconductor device pressurizing portion 124 on the outer periphery, and the semiconductor device pressurizing portion 124 has a concave recess that corresponds to the external shape of the external electrode 19 and does not contact the external electrode 19. is doing. The transport apparatus 100 has a clamp part 120 having a spring property that mechanically sandwiches and holds the external electrode 19 at the center, a holding part 121 of the clamp part 120 at the upper part, and a clamp below the holding part 121. The clamp part opening / closing part 123 for opening and closing the part 120 is provided, and the holding part 121 has a temperature adjusting mechanism 122 for reducing heat exchange from the clamp part 120.

  The clamp part 120 has an inverted U shape, and the distance between the lower tips is smaller than the outermost diameter of the external electrode 19 and is mechanically fixed to the holding part 121 at the upper part. The clamp part opening / closing part 123 is held by a holding part 121 in a state in which it can be moved up and down. A through hole 123a is opened in the clamp part opening / closing part 123 so that the tip part of the clamp part 120 can be inserted, and the lower end opening of the through hole 123a is narrower than the upper end opening.

  As shown in FIG. 7A, when the clamp part opening / closing part 123 is positioned at the upper end, the contact between the clamp part opening / closing part 123 and the clamp part 120 is eliminated in the through hole 123a, and the clamp part 120 in a free state is obtained. The lower tip interval is reduced.

  As shown in FIG. 7B, when the clamp part opening / closing part 123 is positioned at the lower end, the clamp part opening / closing part 123 contacts the clamp part 120 in the through hole 123a, and the lower end of the clamp part 120 in the regulated state The distance is wider than the outermost diameter of the external electrode 19.

Next, a series of operations according to the above-described configuration is shown in FIGS.
As shown in FIG. 8, in the initial state, the clamp component opening / closing portion 123 is positioned at the lower end, so that the lower end interval of the clamp component 120 is wider than the outermost portion diameter dimension of the external electrode 19. In this state, it is moved toward the semiconductor device 1. At the position where the lower end of the clamp component 120 approaches the main surface 1 a of the semiconductor device 1, the lower end of the clamp component 120 is inserted between the external electrode 19 and the external electrode 19.

  Next, as shown in FIG. 9, when the semiconductor device pressure unit 124 comes into contact with the main surface 1 a of the semiconductor device 1, the movement of the transfer device 100 is stopped, and the clamp component opening / closing unit 123 is moved to the upper end. This operation eliminates contact between the clamp component 120 and the clamp component opening / closing portion 123, and the clamp component 120 closes by its spring property so that the lower end portion is restored to the initial interval and comes into contact with the external electrode 19. A clamping force for holding the external electrode 19 is generated without restoring the interval that is smaller than the outer diameter of the external electrode 19 that is the initial interval.

  Next, as shown in FIG. 10, the transfer apparatus 100 performs the horizontal and vertical transfer of the semiconductor device 1 with the external electrode 19 clamped, that is, the transfer including the vertical movement and the horizontal movement. Then, the semiconductor device 1 is pushed into the inspection circuit board 17b of the inspection device 18b by the semiconductor device pressurizing unit 124 until the contact pressure is generated in the conductive contact 16b, and the inspection is started.

  Next, as shown in FIG. 11, after carrying out the inspection by the inspection device 18b, the carrying device 100 carries out the vertical horizontal conveyance to carry the semiconductor device 1 to a predetermined position, and moves the clamp component opening / closing part 123 to the lower end position. By doing so, the lower tip of the clamp component 120 is opened and separated from the external electrode 19.

Next, as shown in FIG. 12, the transfer device 100 moves away from the semiconductor device 1, thereby taking out the semiconductor device 1 from the inspection device.
(Embodiment 7)
FIG. 13 shows an inspection apparatus according to Embodiment 7 of the present invention. The same components as those in FIGS. 1 and 3 are denoted by the same reference numerals, and description thereof is omitted.

  As shown in FIG. 13, the semiconductor device 1 has an external electrode 19 on at least one main surface 1a out of opposite main surfaces, and the external electrode 19 is composed of a solder ball or a solder bump. Protruding convex shape. The inspection apparatus includes a transfer device 100a. The transfer device 100a transfers the semiconductor device 1 and performs a contact operation between the semiconductor device 1 and the inspection circuit board.

  The transport apparatus 100 a includes an anisotropic air-permeable resin part 130, a semiconductor device pressure part 131, and a holding part 132. The anisotropic air-permeable resin portion 130 provided at the center of the transfer device 100a is arranged in layers in accordance with the arrangement of the heat-resistant elastic material 129 having airtightness and the external electrode 19 of the semiconductor device 1 inside the elastic material 129. The heat-resistant sponge-like elastic body 128 having air permeability is provided. The holding part 132 has a vacuum chamber 125 facing the upper surface of the anisotropic air-permeable resin part 130, and is provided with a vacuum hole 126 that connects an external vacuum source and the vacuum chamber 125. The semiconductor device pressurizing portion 131 provided on the outer peripheral portion of the transfer device 100 a has a concave recess that matches the outer shape of the external electrode 19 so as not to contact the external electrode 19.

  The effect | action by this structure is demonstrated below. As shown in FIG. 14, the transfer device 100 a moves in a vacuum suction state in which the semiconductor device 1 is sucked and transfers the semiconductor device 1. At the time of vacuum suction, the transport apparatus 100 a presses the external electrode 19 of the semiconductor device 1 with a heat-resistant sponge-like elastic body 128 having air permeability, and the sponge-like elastic body 128 matches the outer shape of the external electrode 19. By deforming, the periphery of the external electrode 19 is filled.

  In this state, the inside of the heat-resistant elastic material 129 having airtightness is vacuum-sucked through the vacuum hole 126 and the vacuum chamber 125, and the semiconductor device 1 is vacuum-adsorbed by discharging the air to be in a vacuum state.

  INDUSTRIAL APPLICABILITY The present invention is useful as an inspection apparatus and inspection method for a semiconductor device because it can perform an electrical characteristic inspection of a semiconductor device having external electrodes on two opposite main surfaces with high quality.

Sectional drawing which shows the semiconductor device in Embodiment 1 of this invention Sectional drawing which shows the semiconductor device in Embodiment 2 of this invention Sectional drawing which shows the inspection method in Embodiment 3 of this invention Sectional drawing which shows the inspection method in Embodiment 4 of this invention Sectional drawing which shows the inspection method in Embodiment 5 of this invention Sectional drawing which shows the inspection apparatus in Embodiment 6 of this invention Sectional drawing which shows operation | movement of the test | inspection apparatus in Embodiment 6 Sectional drawing which shows operation | movement of the test | inspection apparatus in Embodiment 6 Sectional drawing which shows operation | movement of the test | inspection apparatus in Embodiment 6 Sectional drawing which shows operation | movement of the test | inspection apparatus in Embodiment 6 Sectional drawing which shows operation | movement of the test | inspection apparatus in Embodiment 6 Sectional drawing which shows operation | movement of the test | inspection apparatus in Embodiment 6 Sectional drawing which shows the inspection apparatus in Embodiment 7 of this invention Sectional drawing which shows operation | movement of the test | inspection apparatus in Embodiment 7 Sectional view showing conventional semiconductor device and inspection device Sectional view showing conventional semiconductor device and inspection device

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor device 1a One main surface 1b The other main surface 2 Semiconductor chip 3 Interposer substrate 4, 5a, 5b, 6, 7, 8 External electrode 9 Stacked semiconductor device 10 External electrode of stacked semiconductor device

Claims (7)

A semiconductor device having external electrodes on opposite main surfaces of a substrate and having a semiconductor chip mounted on at least one of the main surfaces, wherein the substrate is connected to external electrodes on the opposite main surfaces. A wiring structure that electrically connects only the semiconductor chip, a wiring structure that electrically connects the semiconductor chip only to an external electrode that exists on the opposite main surface, and a plurality that exists on both opposing main surfaces. And a wiring structure for electrically connecting the semiconductor chip to the external electrode simultaneously. A test circuit is provided in the semiconductor chip, and the substrate has a wiring structure that electrically connects the test circuit only to external electrodes that exist on one opposite main surface, and an external that exists on the other opposite main surface. A wiring structure for electrically connecting the test circuit only to the electrodes; and a wiring structure for electrically connecting the test circuit to a plurality of external electrodes existing on opposite main surfaces at the same time. The semiconductor device according to claim 1. 3. An inspection method for inspecting a semiconductor device according to claim 1, wherein an electrical connection between the external electrode existing on one main surface of the semiconductor device and an inspection circuit board of the inspection device is obtained. The first inspection is performed, and the second inspection is performed by obtaining an electrical connection between the external electrode existing on the other main surface of the semiconductor device and the inspection circuit board of the inspection device. Inspection method to do.   In the first inspection and the second inspection, by reversing the posture of the semiconductor device, the external electrode and the inspection existing on each main surface in the same direction with respect to the inspection circuit board of the inspection device The inspection method according to claim 3, wherein an electrical connection with an inspection circuit board of the apparatus is obtained. 3. An inspection method for inspecting a semiconductor device according to claim 1, wherein a plurality of the semiconductor devices are arranged in the same posture in the same plane and are present on one main surface of all the semiconductor devices. Conducting a first inspection collectively for electrical connection between the external electrode and the inspection circuit board of the inspection apparatus, and further inspecting the external electrode and the inspection apparatus existing on the other main surface of all the semiconductor devices An inspection method characterized in that the second inspection is carried out collectively for the electrical connection with the circuit board. 3. An inspection apparatus for inspecting a semiconductor device according to claim 1 or 2, wherein a semiconductor device pressurizing portion disposed at an outer peripheral portion, a plurality of clamp components disposed at a central portion, and the clamp components are opened and closed. And a holding part for holding the clamp part, the semiconductor device pressure part corresponding to the outer shape of the convex external electrode formed on the main surface of the semiconductor device, and in contact with the external electrode An inspecting apparatus comprising: a concave recess that is not formed; and the clamp component has a spring property to mechanically sandwich and hold the external electrode. 3. An inspection apparatus for inspecting a semiconductor device according to claim 1 or 2, wherein a semiconductor device pressurizing portion disposed at an outer peripheral portion, a vacuum suction portion disposed at a central portion, and an upper portion of the vacuum suction portion. A holding portion to be disposed, the semiconductor device pressure portion corresponding to the outer shape of the convex external electrode formed on the main surface of the semiconductor device, and having a concave recess that does not contact the external electrode; A heat-resistant sponge-like elastic body is arranged in a layered manner in a heat-resistant elastic material in which the vacuum suction part has airtightness in accordance with the arrangement of external electrodes of the semiconductor device, and the holding part is An inspection apparatus having a vacuum chamber and a vacuum hole connecting an external vacuum source and the vacuum chamber on a surface facing the vacuum suction portion.

Images