JP2008263018A - Semiconductor device substrate and semiconductor device - Google Patents

Abstract

【Task】
For semiconductors that use a metal plate with a plating layer to remove the metal plate after resin sealing, after the metal plate is removed, the plating layer is in close contact with the resin sealing, and the plating layer is lifted from the sealing resin or peeled off To provide a substrate for a semiconductor device and a semiconductor device in which no occurrence occurs.
[Solution]
The contour shape of the plating layer formed with a thickness of 0.01 to 0.1 mm on the metal plate is a polygonal shape including a recess, and the peripheral length of the plating layer formed on the metal plate is rectangular. It is a polygonal shape formed so as to be 15% or longer than the circumference, and a plating layer is formed by sequentially performing gold plating, nickel plating and gold plating on the metal plate, and the metal plate is a copper-based metal The plating layer is formed by arranging a plurality of polygonal shapes having the same shape in the same direction.
[Selection] Figure 1

Description

  The present invention relates to a semiconductor device substrate on which a portion to be a terminal portion of a semiconductor device is formed by plating, and a semiconductor device using the substrate.

  The size and thickness of semiconductor devices have been reduced year by year, and the number of semiconductor devices having an external connection portion (terminal portion) 1 on the back surface of the sealing resin 10 as shown in FIG. 7 has increased. In general, the pad portion 2 and the terminal portion 1 of such a semiconductor device use a lead frame in which a copper alloy or iron / nickel alloy is formed in a predetermined pattern by etching or pressing. However, the lead frame having a thickness of 0.125 to 0.20 mm is mainly used, which has been one of the factors hindering the thinning of the semiconductor device.

  In recent years, instead of this lead frame, a thin semiconductor device in which a pad portion and a terminal portion are formed of a plating layer using a substrate for a semiconductor device in which a plating layer is formed on a metal plate with a thickness of 0.1 mm or less has appeared. I came.

A semiconductor device in which a pad portion and a terminal portion are formed by this plating layer is, for example, a plating layer having a predetermined pattern including a plurality of terminal portions 1 and pad portions 2 on a metal plate 3 as shown in FIG. 4 is prepared, and then a semiconductor element 12 is mounted on the pad portion 2 as shown in FIG. 4B. The electrode of the semiconductor element 12 and the terminal portion 1 are bonded to the bonding wire 11. Then, the whole is sealed with the resin 10, and then, as shown in FIG. 4 (3), only the metal plate 3 is removed so that the terminal portion 1 of the plating layer is formed on the back surface of the sealing resin 10. Can be obtained by obtaining a plurality of semiconductor devices having the following, and then cutting each unit.
As a method of removing the metal plate, there are a method of melting only the metal plate, a method of mechanically peeling it off, and the like.

  Thus, the board | substrate for semiconductor devices which uses the method of removing a metal plate needs to closely_contact | adhere without peeling a metal plate and a plating layer during the assembly process of a semiconductor device. On the other hand, in the process of removing only the metal plate, a contradictory function is required in which the plating layer is in close contact with the sealing resin and the metal plate and the plating layer are easily peeled off.

  And in patent document 1, as shown in FIG. 5, after performing the peeling process which provides an unevenness | corrugation by the blast process etc. on the surface of the metal plate 3, and forms the oxide film which has peelability, the plating layer 1 is formed Technology to do is shown. However, in this case, a surface treatment process for forming irregularities on one surface of the metal plate and an oxide film forming process for providing releasability are newly required. Moreover, there is a problem that warpage occurs in the metal plate by providing unevenness on one side of the plating layer.

Patent Document 2 discloses a technique for improving the adhesion between the plating layer and the sealing resin 10 by providing a protruding portion on the plating layer 1 as shown in FIG. However, when the plating layer is formed in an overhang, it is difficult to control the overhang amount, and there is a problem that all of the plating layers to be formed do not have the same length, or the adjacent plating layer is connected. . Further, since the thickness of the overhanging portion becomes thinner as the plating layer becomes thinner, there is also a problem that the adhesiveness is lowered.
Japanese Patent Laid-Open No. 10-50885 Japanese Patent Laid-Open No. 2002-9196

  The present invention has been made to solve such problems, and an object of the present invention is to provide a semiconductor device in which a metal plate having a plating layer is used to remove the metal plate after resin sealing. A substrate for a semiconductor device and a semiconductor device in which the plating layer is in close contact with the sealing resin after the metal plate is removed so that the plating layer is not lifted or peeled off from the sealing resin. Is to provide.

  In order to achieve the above object, the substrate for a semiconductor device according to the present invention has a polygonal shape including a concave portion, and the contour shape of a plating layer formed on a metal plate with a thickness of 0.01 to 0.1 mm. It is a thing.

  Another aspect of the present invention is a polygonal shape formed so that the peripheral length of the plating layer formed on the metal plate is 15% or more longer than the peripheral length in addition to the above-described invention. It is.

  Furthermore, another aspect of the present invention is a plating layer obtained by sequentially performing gold plating, nickel plating, and gold plating on a metal plate in addition to the above-described invention to obtain a predetermined thickness.

  In another aspect of the present invention, the metal plate is a copper-based metal in addition to the above invention.

  Furthermore, in another aspect of the present invention, the plating layer formed on the metal plate in addition to the above invention has a plurality of polygonal shapes having the same shape, and these are arranged in the same direction.

  The semiconductor device of the present invention is a semiconductor device having a terminal portion formed by plating having a thickness of 0.01 to 0.1 mm, and the contour shape of the terminal portion is a polygonal shape including a recess and is arranged in the same direction. It is what is.

  According to another aspect of the present invention, in addition to the above-described invention, the shape of the terminal portion is a polygonal shape formed so as to be 15% or more longer than the circumference of the rectangle.

  By making the contour shape of the plating layer formed on the metal plate into a polygonal shape including a concave portion and making the circumference longer than the circumference at the time of a rectangle by 15% or more, the side area of the plating layer to be formed is increased. When the semiconductor device substrate is increased and assembled as a semiconductor device, the adhesion between the terminal portion of the plating layer and the sealing resin increases, and as a result, peeling and cracks occur between the terminal portion and the sealing resin. It is possible to obtain a semiconductor device that is extremely difficult to generate.

An embodiment of the present invention will be described with reference to FIGS.
After performing degreasing treatment and acid cleaning on the metal plate 3, exposure is performed using a glass mask on which a predetermined pattern with a resist attached on both sides is drawn and developed to form a plating layer on the metal plate The plating area part for making is produced. At this time, the plating area portion for forming the plating layer to be the terminal portion 1 of the semiconductor device is formed in a polygonal shape including the concave portion so that the peripheral length is 15% or more longer than the peripheral length at the time of the rectangle. .

  That is, as for the shape of the terminal part 1, as shown to (1)-(7) of FIG. More specifically, as shown in (1) of FIG. 1, a rectangular shape is formed by bending the left and right sides of the rectangular shape at the center portion, or a polygonal shape is formed by shifting the folding points as shown in (2). 3) A polygonal shape with a square shape, or a polygonal shape with a plurality of recesses on one side as in (4), or a polygonal shape with a recess on all four sides as in (5) Alternatively, as shown in (6), various polygonal shapes can be set, for example, an S-shaped polygonal shape.

  Normally, the terminal portion 1 has a rectangular shape as shown in FIG. 7 (2), and is a pattern arranged at a predetermined pitch. Therefore, in the polygonal shape having only the convex portion, the distance to the adjacent terminal portion is reduced. . Therefore, in order to secure a certain distance from the adjacent terminal part, as shown in FIG. 3 (2), the terminal part 1 is formed in a polygonal shape including a recess, and a certain distance is secured by arranging them in the same direction. It becomes possible to do.

  And after performing the plating pretreatment using the material in which the plating area part for forming the plating layer on the metal plate is formed, the plating layer is formed at a required height, the resist is peeled off, By performing the treatment, a semiconductor device substrate can be obtained.

Using this semiconductor device substrate, mounting of semiconductor elements, wire bonding, resin sealing, etc. are performed as shown in FIG. 3, and the metal plate is etched and removed after the resin is cured. A semiconductor device in a state of being integrally resin-sealed is obtained.
Thereafter, dicing is performed with a blade to separate the semiconductor device.

Next, a method for manufacturing a substrate for a semiconductor device and a method for manufacturing a semiconductor device according to the present invention will be specifically described with reference to FIG.
A copper alloy having a thickness of 0.2 mm was used as the metal plate 3 to form a plate having a width of 100 mm, and degreasing treatment and acid cleaning were performed. Next, a photosensitive dry film resist having a thickness of 0.025 mm was attached to both surfaces of the material with a laminate roll. Next, the plating area where the plating layer is to be formed later is blackened, and a transparent glass mask is applied over the dry film resist, and then exposure is performed by irradiating with ultraviolet light from above. A predetermined pattern was produced on the resist.

  Next, using a sodium carbonate solution, a development process was performed to dissolve uncured dry film resist that was not exposed due to the irradiation of ultraviolet light, thereby completing a material for plating. Using this material, after degreasing and acid cleaning, gold plating is about 0.1 μm, general nickel sulfamate plating is 10 μm, and gold plating is 3 μm thereon, and finally with sodium hydroxide solution The dry film resist was peeled off, washed with water and dried, and then cut into a size of 100 mm × 200 mm to obtain the substrate for a semiconductor device of the present invention shown in FIG.

  Then, using this semiconductor device substrate, the semiconductor element 12 is mounted as shown in FIG. 4 (2), wire bonding and resin sealing are performed, and after the sealing resin 10 is cured, as shown in FIG. 4 (3). The copper alloy of the raw material which is the metal plate 3 was etched with an alkali etchant.

In addition, the following three types of patterns of the plating area used as the terminal part at this time were produced for comparison.
(A) As a conventional example, the pad portion has a rectangular shape of 3 mm square, and 28 rectangular terminal portions having a rectangular shape shown in FIG.
(B) The pad portion has a rectangular shape of 3 mm square, and the peripheral length of the terminal portion shown in FIG. 1 (7), which is the structure of the present invention, is approximately 10% longer than the rectangle (d = 0.05 mm concave).
(C) The pad portion has a rectangular shape of 3 mm square, and the peripheral length of the terminal portion shown in FIG. 1 (7), which is the structure of the present invention, is approximately 13% longer than the rectangle (d = 0.058 mm concave).
(D) The pad portion has a rectangular shape of 3 mm square, and the peripheral length of the terminal portion shown in FIG. 1 (7), which is the structure of the present invention, is about 17% longer than the rectangle (d = 0.066 mm recess).
(E) The pad portion has a rectangular shape of 3 mm square, and the peripheral length of the terminal portion shown in FIG. 1 (7), which is the structure of the present invention, is about 21% longer than the rectangle (d = 0.075 mm concave).
Then, as shown in FIG. 2, a plurality of sets of matrix shapes were produced so that 16 sets of pad portions 2 and terminal portions 1 were arranged in a matrix shape in the vicinity of the center 50 mm of a material having a width of 100 mm.

  After etching, a plurality of resin-sealed semiconductor devices were diced with a blade and separated into individual pieces. After aging at 60% RH for 192 hours, 240 ° C. reflow was performed, and peeling and cracking of the terminal portion in the sealing resin were observed by ultrasonic flaw detection and cross-section processing.

  As a result, in the semiconductor device having the conventional shape of (A), peeling from the sealing resin occurred on the side surface of the periphery of the plating layer in 5 of the 30 terminal portions. In (B), the same peeling occurred in two of the 30 terminal portions. In (C), the same peeling occurred in one of the 30 terminal portions. On the other hand, in the shapes of (D) and (E), there was no occurrence of peeling at 30 terminal portions.

  The plating layer having a polygonal shape including the concave portion of the present invention, and the plating layer whose peripheral length is 15% or more longer than the peripheral length at the time of the rectangle is a technique for the side surface of the plating layer. It is possible to use both the surface treatment process and the peeling treatment process to give the releasability, and the formation of the plating layer by overhanging it because it is a technique for the upper and lower surfaces of the plating layer. .

The example of the terminal part made into the polygonal shape containing the recessed part which becomes longer than the peripheral length at the time of the rectangle of this invention is shown. It is the schematic of the board | substrate for semiconductor devices. BRIEF DESCRIPTION OF THE DRAWINGS The outline | summary of the semiconductor device of this invention is shown, (1) is sectional drawing, (2) is a bottom view. It is the schematic which shows the manufacturing process of a semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS The outline | summary of the conventional semiconductor device substrate and a semiconductor device is shown, (1) is sectional drawing of a semiconductor device substrate, (2) is sectional drawing of a semiconductor device. The outline of the other example of the conventional substrate for a semiconductor device and a semiconductor device is shown, (1) is a sectional view of a substrate for a semiconductor device, and (2) is a sectional view of a semiconductor device. 1 schematically shows a conventional semiconductor device, wherein (1) is a cross-sectional view and (2) is a bottom view.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Terminal part 2 Pad part 3 Metal plate 4 Resist 10 Sealing resin 11 Bonding wire 12 Semiconductor element

Claims (7)

  The substrate for a semiconductor device, wherein the contour shape of the plating layer formed with a thickness of 0.01 to 0.1 mm on the metal plate is a polygonal shape including a recess.   2. The substrate for a semiconductor device according to claim 1, wherein the plating layer formed on the metal plate has a polygonal shape formed so that a circumference of the plating layer is 15% or more longer than a circumference of the rectangle.   3. The substrate for a semiconductor device according to claim 1, wherein the substrate is a plating layer obtained by sequentially performing gold plating, nickel plating, and gold plating on a metal plate to have a predetermined thickness.   The semiconductor device substrate according to claim 1, wherein the metal plate is a copper-based metal.   5. The substrate for a semiconductor device according to claim 1, wherein the plating layer formed on the metal plate has a plurality of polygonal shapes having the same shape, and these are arranged in the same direction.   A semiconductor device having a terminal portion formed by plating having a thickness of 0.01 to 0.1 mm, wherein a contour shape of the terminal portion is a polygonal shape including a recess and is arranged in the same direction. .   The semiconductor device according to claim 6, wherein a shape of the terminal portion is a polygonal shape formed so as to be 15% or more longer than a peripheral length in a rectangular shape.

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