JP2008130213A - Optical disc device, clock generation device, and clock generation method - Google Patents

Abstract

The set oscillation frequency range is switched autonomously.
An optical disc apparatus is capable of adjusting an oscillation frequency of an operation clock in accordance with a control value of the operation clock, and a plurality of set oscillations having a range of oscillation frequencies that can be adjusted by changing the control value in stages. For the oscillator 20 that can be switched to any one of the frequency ranges and the set oscillation frequency range, the upper limit value of the control value, the initial value of the control value corresponding to the upper limit value, the lower limit value of the control value, and the lower limit value The initial value of the control value corresponding to is set, and when the control value reaches the upper limit value, the control value is switched to the set oscillation frequency range one step higher and the control value is set to the initial value corresponding to the upper limit value. An oscillation frequency range switching circuit 30 that switches to a lower set oscillation frequency range when the value reaches the lower limit value and sets the control value to an initial value corresponding to the lower limit value. Tsu provided with a click generation function.
[Selection] Figure 1

Description

  The present invention relates to an optical disc device having a clock generation function capable of generating an operation clock in a wide oscillation frequency range, a clock generation device, and a clock generation method.

The conventional document (Patent Document 1) shows an example of a clock generator capable of switching the oscillation frequency range. In this clock generator, the CPU as the host controller recognizes in advance the characteristics of the control voltage and oscillation frequency of the oscillator VCO, and executes the firmware for adjusting the oscillation frequency, while switching the oscillation frequency range. The oscillator VCO is controlled so that a clock having a desired oscillation frequency is generated.
JP 2006-74232 A

  Since the clock generation device described above is controlled by firmware, the processing load on the firmware is increased. However, since the firmware is used for other purposes, it is preferable to reduce the processing load of the firmware regarding the control of the clock generation device.

  The present invention has been made to solve the above-described problems, and an object thereof is to provide an optical disc device, a clock generation device, and a clock generation method that can autonomously switch the oscillation frequency range.

  In order to achieve the above-described object, the optical disc device according to the present invention can adjust the oscillation frequency of the operation clock according to the control value of the operation clock, and can adjust the range of the oscillation frequency that can be adjusted by changing the control value. For an oscillator that can be switched to any one of a plurality of set oscillation frequency ranges that differ in stages, and for the set oscillation frequency range, the upper limit value of the control value, the initial value of the control value corresponding to the upper limit value, the control value The lower limit value and the initial value of the control value corresponding to the lower limit value are set, and when the control value reaches the upper limit value, the control value is switched to the upper set oscillation frequency range and the control value corresponds to the upper limit value. Set to the initial value, and when the control value reaches the lower limit value, switch to the lower set oscillation frequency range and set the control value to the initial value corresponding to the lower limit value. Characterized in that it comprises a clock generation function comprises a circuit.

  Further, the clock generation device according to the present invention can adjust the oscillation frequency of the operation clock according to the control value of the operation clock, and the range of the oscillation frequency that can be adjusted by changing the control value is changed in a stepwise manner. For an oscillator that can be switched to any one of the set oscillation frequency ranges, and for the set oscillation frequency range, the upper limit value of the control value, the initial value of the control value corresponding to the upper limit value, the lower limit value of the control value, and the lower limit value The initial value of the control value corresponding to the value is set, and when the control value reaches the upper limit value, the control value is switched to the upper set oscillation frequency range and the control value is set to the initial value corresponding to the upper limit value. An oscillation frequency range switching circuit that switches to a lower set oscillation frequency range when the control value reaches the lower limit value and sets the control value to an initial value corresponding to the lower limit value. And features.

  In addition, the clock generation method according to the present invention can adjust the oscillation frequency of the operation clock according to the control value of the operation clock, and the range of the oscillation frequency that can be adjusted by changing the control value is changed in stages. A clock generation method using an oscillator that can be switched to any one of the set oscillation frequency ranges, when the control value of the operation clock reaches the upper limit value or the lower limit value set for the set oscillation frequency range, Clock generation including a step of switching to a set oscillation frequency range one step above or one step below, and a step of setting the control value of the operation clock to an initial value corresponding to the upper limit value or an initial value corresponding to the lower limit value Is the method.

  According to the present invention, an optical disk device, a clock generation device, and a clock generation method capable of autonomously switching the oscillation frequency range can be provided.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the description, the same reference numerals are used for the same elements or elements having the same function, and redundant description is omitted.

  FIG. 1 is a block diagram showing a configuration of an optical disc apparatus 1 according to an embodiment of the present invention. In the optical disc apparatus 1 according to the present embodiment, an optical disc D such as an HD-DVD (High Definition Digital Versatile Disk), a DVD (Digital Versatile Disk), or a CD (Compact Disk) is used as a recording medium, and is recorded on the optical disc D. It is possible to play back digital data. The optical disc apparatus 1 includes a reproduction signal output circuit 6 including a drive mechanism 2 that holds an optical disc D and rotates it at a predetermined rotational speed, a PUH (Pick Up Head) 3 that includes an optical pickup, a preamplifier 4, and a pre-equalizer 5. Have.

  The PUH 3 irradiates the optical disc D with an appropriate laser beam L, detects the reflected light from the optical disc D, and outputs a reproduction signal a as a weak analog signal to the preamplifier 4. The preamplifier 4 performs a process such as amplification on the reproduction signal a output from the PUH 3, and outputs the reproduction signal b after having a sufficient signal level to the pre-equalizer 5. The pre-equalizer 5 performs waveform equalization in advance on the reproduction signal b that has been subjected to processing such as amplification by the preamplifier 4, and outputs a reproduction signal c after waveform equalization.

  Further, the optical disc apparatus 1 includes a PRML signal processing circuit 12 that performs signal processing according to the PRML system including an ADC (Analog to Digital Converter) 8, an adaptive equalizer 10, and a Viterbi decoder 11, and a PLL (Phase Locked Loop) circuit. 13 and a host controller 40.

  The ADC 8 converts the level value of the input reproduction signal c into a digital value and outputs a digital reproduction signal d. The ADC 8 performs conversion processing of the reproduction signal c in accordance with the operation clock CL from the PLL circuit 13.

  The adaptive equalizer 10 together with the Viterbi decoder 11 constitutes the PRML signal processing circuit 12 in the present invention so that the digital data d output from the ADC 8 has a response with a predetermined applied PR characteristic. Waveform equalization is performed, and the equalized waveform data f is output.

  The PLL circuit 13 includes a frequency error detector 21, a phase error detector 22, a loop filter 23, a DAC (Digital to Analog Converter) 24, a VCO (Voltage Controlled Oscillators) 20, and a VCO frequency range switching circuit 30. The

  The frequency error detector 21 detects the frequency error p1 between the operation clock generated by the VCO 20 and the reference clock based on the reference clock information extracted from the reproduction signal d, and feeds it back to the loop filter 23. The phase error detector 22 detects the phase error p2 between the operation clock generated by the VCO 20 and the reference clock based on the reference clock information extracted from the reproduction signal d, and feeds it back to the loop filter 23.

  The loop filter 23 generates a VCO control value, which is a voltage value for controlling the frequency and phase of the operation clock so that the operation clock is synchronized with the reference clock, based on the frequency error p1 and the phase error p2, and supplies it to the DAC 24. Output. The frequency error detector 21, the phase error detector 22, and the loop filter 23 described above are configured as a processor that performs digital processing.

  The DAC 24 converts the input VCO control value from a digital value to an analog value, and outputs the converted VCO control value to the VCO 20.

  The VCO 20 is an oscillator that generates an operation clock. The VCO 20 is configured to be able to adjust the frequency and phase of its operation clock according to the VCO control value. In order for the VCO 20 to be able to adjust the oscillation frequency of its operation clock in a wider range, a range of oscillation frequencies that can be adjusted by changing the VCO control value as shown in FIG. It can be set to any one of the oscillation frequency ranges 1, 2, 3,..., N. The VCO 20 sets any one set oscillation frequency range according to the control signal from the VCO frequency range switching circuit 30 and adjusts the oscillation frequency according to the VCO control value from the DAC 24 within the set oscillation frequency range. To do. In order to switch the set oscillation frequency range, a frequency divider may be incorporated into the VCO 20 to adjust the frequency divider setting, or a ring buffer may be incorporated into the VCO 20 to adjust the ring buffer stage number setting. .

  The VCO frequency range switching circuit 30 should take in the VCO control value from the loop filter 23 and switch to the set oscillation frequency range one step higher or switch to the set oscillation frequency range one step lower based on the VCO control value. When it is determined that switching should be performed, a control signal for switching to the set oscillation frequency range is output to the VCO 20. In response to this control signal, the VCO 20 switches the set oscillation frequency range of the operation clock. The VCO frequency range switching circuit 30 has a function of outputting an interrupt signal indicating the state of the PLL circuit 13 (for example, the oscillation frequency of the operation clock or the set oscillation frequency range) to the host controller 40.

  The VCO frequency range switching circuit 30 will be described in more detail with reference to FIG. FIG. 2 is a block diagram showing details of the VCO frequency range switching circuit 30. The VCO frequency range switching circuit 30 includes a setting register group 31, a comparator 32, a switching initial setting unit 33, a set oscillation frequency range switching unit 34, an interrupt signal generation unit 35, a control register 36, and two multiplexers 37 and 38. It consists of

  In the setting register group 31, an upper limit value of the VCO control value, an initial value corresponding to the upper limit value, a lower limit value of the VCO control value, and an initial value corresponding to the lower limit value are set for each set oscillation frequency range. Yes. In the characteristics of the VCO 20 shown in FIG. 3, the upper limit value of the VCO control value in a plurality of set oscillation frequency ranges, the initial value corresponding to the upper limit value, the lower limit value of the VCO control value, and the initial value corresponding to the lower limit value , Almost equal values are set. These values are set in the setting register group 31 by the host controller 40, but may be fixed values set in the setting register group 31 when the optical disc apparatus 1 is manufactured. In the present embodiment, the setting register group 31 is configured as a part of the VCO frequency range switching circuit 30, but may be disposed outside the VCO frequency range switching circuit 30. However, even if the setting register group 31 is arranged outside the VCO frequency range switching circuit 30, the setting register group 31 constitutes a part of the VCO frequency range switching circuit 30.

  In the characteristics of the VCO 20 shown in FIG. 3, the set oscillation frequency range 2 will be described as an example. When the VCO control value reaches FFh, the upper limit value of the VCO control value is set. Is set to switch to the set oscillation frequency range 3 that is one step above. In addition, 60h is set as an initial value corresponding to the upper limit value of the VCO control value. When the set oscillation frequency range 2 is switched to the set oscillation frequency range 3, the VCO control value is set to 60h. Yes. Also, 00h is set as the lower limit value of the VCO control value, and when the VCO control value reaches 00h, the setting oscillation frequency range 2 is set to switch to the set oscillation frequency range 1 one step below. In addition, A0h is set as an initial value corresponding to the lower limit value of the VCO control value. When the set oscillation frequency range 2 is switched to the set oscillation frequency range 1, the VCO control value is set to be A0h. Yes.

  The comparator 32 captures the VCO control value from the loop filter 23 and captures the upper limit value and the lower limit value of the set oscillation frequency range from the setting register group 31. Then, the comparator 32 determines whether the VCO control value is above the upper limit value and whether the VCO control value is below the lower limit value. Here, the comparator 32 does not operate when the VCO control value is between the upper limit value and the lower limit value. On the other hand, when the comparator 32 determines that the VCO control value exceeds the upper limit value, the signal for informing the determination result is switched at the initial setting unit 33, the set oscillation frequency range switching unit 34, and the interrupt signal generation. To the unit 35. Similarly, when the comparator 32 determines that the VCO control value is below the lower limit value, the information for informing the determination result is switched to the initial setting unit 33, the set oscillation frequency range switching unit 34, and the interrupt. The signal is supplied to the signal generator 35.

  When information indicating that the VCO control value exceeds the upper limit value is given from the comparator 32, the set oscillation frequency range switching unit 34 outputs a control signal for instructing switching of the set oscillation frequency range of the VCO 20 to the VCO 20. Then, the set oscillation frequency range of the VCO 20 is switched from the currently set oscillation frequency range to the set oscillation frequency range one step higher. At the same time, the switching initial setting unit 33 takes in the information of the initial value corresponding to the upper limit value from the setting register group 31, and outputs a control signal for setting the VCO control value to the initial value to the loop filter 23. The VCO control value output from the loop filter 23 is set to its initial value. At the same time, the interrupt signal generator 35 outputs to the host controller 40 an interrupt signal indicating that the set oscillation frequency range of the VCO 20 has been switched to the set oscillation frequency range that is one step higher.

  When the information indicating that the VCO control value has fallen below the lower limit value is given from the comparator 32, the set oscillation frequency range switching unit 34 outputs a control signal instructing switching of the set oscillation frequency range of the VCO 20 to the VCO 20. Then, the set oscillation frequency range of the VCO 20 is switched from the currently set oscillation frequency range to the set oscillation frequency range one step below. At the same time, the switching initial setting unit 33 takes in the information of the initial value corresponding to the lower limit value from the setting register group 31, and outputs a control signal for setting the VCO control value to the initial value to the loop filter 23. The VCO control value output from the loop filter 23 is set to its initial value. At the same time, the interrupt signal generator 35 outputs to the host controller 40 an interrupt signal indicating that the set oscillation frequency range of the VCO 20 has been switched to the set oscillation frequency range one step below.

  The control register 36 and the two multiplexers 37 and 38 are provided for the host controller 40 to control the set oscillation frequency range by itself. When the set oscillation frequency range is controlled by the host controller 40, the host controller 40 sets a necessary control value in the control register 36. At this time, the control value set in the control register 36 is output to the switching initial setting unit 33 through the multiplexer 37 and is output to the oscillation frequency range switching unit 34 through the multiplexer 38. However, when the set oscillation frequency range is not controlled by the host controller 40, the multiplexer 37 only outputs the information from the comparator 32 to the initial setting unit 33 at the time of switching, and the multiplexer 38 outputs the information from the comparator 32 to the oscillation frequency. It is only output to the range switching unit 34. The process in which the host controller 40 switches the set oscillation frequency range by itself will be described in detail later.

  In the optical disc apparatus 1 according to the present embodiment described above, the PLL circuit 13 automatically switches the set oscillation frequency range based on the VCO control value. Accordingly, it is possible to seamlessly output an operation clock having a wider oscillation frequency autonomously beyond the oscillation frequency that can be output in a specific set oscillation frequency range without intervention of firmware such as the host controller 40. According to this, the set oscillation frequency range of the VCO 20 can be adjusted autonomously by the hardware of the optical disc apparatus 1, and the processing load of firmware such as the host controller 40 can be reduced.

  Further, in the optical disc apparatus 1 according to the present embodiment described above, the oscillation frequency corresponding to the upper limit value of the VCO control value in a certain set oscillation frequency range is set to the initial value of the VCO control value in the set oscillation frequency range one step above. In order to approximate the corresponding oscillation frequency, when the set oscillation frequency range of the VCO 20 is switched to a set oscillation frequency range that is one step higher, the oscillation frequency of the operation clock changes only to an acceptable level. Similarly, the oscillation frequency corresponding to the lower limit value of the VCO control value in a certain set oscillation frequency range approximates to the oscillation frequency corresponding to the initial value of the VCO control value in the set oscillation frequency range one step below, so that the VCO 20 When the set oscillation frequency range is switched to the lower set oscillation frequency range, the oscillation frequency of the operation clock changes only to an acceptable level. Therefore, the PLL circuit 13 can smoothly change the oscillation frequency of the operation clock at the change of the set oscillation frequency range of the VCO 20, and realizes suitable control of the oscillation frequency of the operation clock.

  In the above description, the definition of the term “approximate” used for two oscillation frequencies before and after switching of the set oscillation frequency range will be described. The range in which the two oscillation frequencies are “approximate” roughly includes two situations, one of which is the situation where the two oscillation frequencies are equal to each other, and the other is that the two oscillation frequencies are It is a situation that differs to an acceptable degree. Here, the allowable degree of difference between the two oscillation frequencies means that the frequency is pulled in by the PLL circuit 13 when the set oscillation frequency range is switched from one set oscillation frequency range to the set oscillation frequency range one step above or one step below. Is a range that can be performed. However, from the viewpoint of reducing shock when switching the set oscillation frequency range, it is preferable that the gap between the two oscillation frequencies be smaller before and after switching the set oscillation frequency range.

  It should be noted that (1) VCO control value setting values (upper limit value, lower limit value, and initial values for these) may be determined based on VCO characteristics shown in the setting data and specification table when the optical disc apparatus 1 is designed. Further, (2) the set value of the VCO control value may be determined based on the actually measured VCO characteristic by measuring the VCO characteristic at the time of factory shipment of the optical disc apparatus 1. Further, (3) the set value of the VCO control value may be determined to be an optimum value by the learning function of the initialization phase in the initialization phase (calibration phase) executed when the optical disc apparatus 1 is started. .

  Furthermore, in the optical disc apparatus 1 according to the present embodiment described above, the oscillation frequency corresponding to the upper limit value of the VCO control value in a certain set oscillation frequency range is set to the lower limit value of the VCO control value in the set oscillation frequency range one step above. The oscillation frequency that is larger than the corresponding oscillation frequency and that corresponds to the lower limit value of the VCO control value in the predetermined set oscillation frequency range is smaller than the oscillation frequency that corresponds to the upper limit value of the VCO control value in the set oscillation frequency range one level below . Therefore, both ends of adjacent set oscillation frequency ranges overlap each other, and the oscillation frequency of the VCO 20 has hysteresis at the end of the set oscillation frequency range, thereby preventing chattering that is likely to occur when the set oscillation frequency range is switched. it can. In particular, when the control convergence value of the oscillation frequency of the VCO 20 is near both ends of the VCO set oscillation frequency range, the effect of preventing chattering is great.

  With reference to FIG. 1 again, the host controller 40 will be described. The host controller 40 is a control unit for performing overall control of the optical disc apparatus 1, and is connected to the PLL circuit 13, the reproduction signal output circuit 6, the PRML signal processing circuit 12, and the like, and controls the operation of these circuits. To do. In the optical disk device 1 of the present embodiment, the host controller 40 performs the following processes (1) to (4) for the PLL circuit 13.

(1) The host controller 40 sets the upper limit value of the VCO control value, the initial value of the VCO control value corresponding to the upper limit value, the lower limit value of the VCO control value, and the initial value of the VCO control value corresponding to the lower limit value. A control signal for output is output to the setting register group 31 and processing for setting these values in the setting register group 31 is performed. The comparator 32 and the switching initial setting unit 33 use these values set in the setting register group 31 to compare the VCO control value with the upper limit value or the lower limit value, or to set the initial value of the VCO control value. I do.

(2) The host controller 40 outputs to the VCO frequency range switching circuit 30 a control signal for switching enable (valid) or disable (invalid) of the function of outputting the interrupt signal of the VCO frequency range switching circuit 30. Either enable or disable is set in the setting register group 31 of the VCO frequency range switching circuit 30. The interrupt signal generation unit 35 of the VCO frequency range switching circuit 30 refers to the setting status of the setting register group 31 and switches the function of outputting an interrupt signal indicating the state of the PLL circuit 13 to either enable or disable. .

(3) The host controller 40 switches the VCO frequency range switching control signal for enabling or disabling another function of the VCO frequency range switching circuit 30, that is, the function of autonomously switching the set oscillation frequency range of the VCO 20. The signal is output to the circuit 30 and either enable or disable is set in the setting register group 31 of the VCO frequency range switching circuit 30. The set oscillation frequency range switching unit 34 and the switching initial setting unit 33 of the VCO frequency range switching circuit 30 enable or disable the function of autonomously switching the set oscillation frequency range of the VCO 20 with reference to the setting status of the setting register group 31. Switch to either one of disable. When the function of autonomously switching the set oscillation frequency range of the VCO 20 is disabled, the host controller 40 performs the following process (4).

(4) The host controller 40 outputs a control signal for switching the set oscillation frequency range to the VCO frequency range switching circuit 30 by itself. For example, the host controller 40 determines an optimal set oscillation frequency range according to the required reproduction processing speed (double speed), a set value for switching the VCO setting to this set oscillation frequency range, and the set oscillation The upper limit value, the lower limit value, and the initial value corresponding to the upper limit value and the lower limit value corresponding to the frequency range are written in the setting register group 31. The host controller 40 writes a control value for giving the VCO setting and a control value for giving the start timing of the initial value setting process to the loop filter in the control register 36. Thereby, referring to the setting register group 31, the switching initial setting unit 33 sends an initial value setting signal to the loop filter 23, and the oscillation frequency range switching unit 34 instructs the VCO 20 to switch the set oscillation frequency range. Send a control signal. It is preferable that the host controller 40 enables the function of outputting an interrupt signal indicating the state of the PLL circuit 13 and uses the interrupt signal indicating the state of the PLL circuit 13 when switching the set oscillation frequency range.

  In the above (4), the host controller 40 adjusts the oscillation frequency of the VCO 20 via the VCO frequency range switching circuit 30. However, the host controller 40 directly adjusts the oscillation frequency of the VCO 20 without going through the VCO frequency range switching circuit 30. May be adjusted. That is, the host controller 40 sends an initial value setting signal to the loop filter 23 using a path different from the VCO frequency range switching circuit 30 and sends a control signal instructing the VCO 20 to switch the set oscillation frequency range. Also good.

  Next, referring to FIG. 4, the upper limit value of the VCO control value, the initial value of the VCO control value corresponding to the upper limit value, the lower limit value of the VCO control value, and the initial value of the VCO control value corresponding to the lower limit value A more preferable setting method will be described. FIG. 4 is a diagram showing the relationship between the VCO control value and the VCO oscillation frequency.

  In FIG. 3, the relationship between the VCO control value and the VCO oscillation frequency is shown in a simplified manner, and the VCO control value and the VCO oscillation frequency have linear characteristics for each set oscillation frequency range. However, in reality, the relationship between the VCO control value and the VCO oscillation frequency is more complicated, and as shown in FIG. 4, the VCO control value and the VCO oscillation frequency have nonlinear characteristics for each set oscillation frequency range. (For example, the characteristic R1 of the set oscillation frequency range 1), or the slope of the VCO oscillation frequency with respect to the VCO control value is different for each set oscillation frequency range (for example, the characteristics R1, R2).

  In order to deal with the complexity of the relationship between the VCO control value and the VCO oscillation frequency, in FIG. 4, the upper limit value of the control value, the initial value of the control value corresponding to the upper limit value, the lower limit value of the control value, and the lower limit value are shown. The initial value of the corresponding control value is set individually for each set oscillation frequency range and stored in the setting register group 31. Here, the setting value for switching control stored in the setting register group 31 is set so as not to use the non-linear characteristics of the VCO control value and the VCO oscillation frequency. For example, in the characteristic R1 of the VCO set oscillation frequency range 1, since the VCO control value and the VCO oscillation frequency have nonlinear characteristics on the upper limit value side of the VCO control value, the upper limit value of the VCO control value is set to 90h. The non-linear characteristic part is not used. Therefore, since the portion where the VCO control value and the VCO oscillation frequency are nonlinear is not used, the oscillation frequency of the VCO 20 can be easily controlled.

1 is a block diagram showing a circuit configuration of an optical disc apparatus according to an embodiment of the present invention. It is a block diagram which shows the detail of a VCO frequency range switching circuit. It is a 1st figure which shows the characteristic of the VCO oscillation frequency with respect to a VCO control value. It is a 2nd figure which shows the characteristic of the VCO oscillation frequency with respect to a VCO control value.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Optical disk apparatus, 2 ... Drive mechanism, 3 ... PUH, 4 ... Preamplifier, 5 ... Pre equalizer, 6 ... Reproduction signal output circuit, 8 ... ADC, 10 ... Adaptive equalizer, 11 ... Viterbi decoder, 12 ... PRML Signal processing circuit, 13 ... PLL circuit, 20 ... VCO, 21 ... frequency error detector, 22 ... phase error detector, 23 ... loop filter, 24 ... DAC, 30 ... VCO frequency range switching circuit, 31 ... setting register group, 32... Comparator 33. Switching initial setting unit 34. Set oscillation frequency range switching unit 35. Interrupt signal generating unit 40. Host controller

Claims (9)

The oscillation frequency of the operation clock can be adjusted in accordance with the control value of the operation clock, and the range of the oscillation frequency that can be adjusted by changing the control value is any one of a plurality of set oscillation frequency ranges that differ in stages. An oscillator that can be switched to,
For the set oscillation frequency range, an upper limit value of the control value, an initial value of the control value corresponding to the upper limit value, a lower limit value of the control value, and an initial value of the control value corresponding to the lower limit value are set. When the control value reaches the upper limit value, the control value is switched to a set oscillation frequency range one step higher and the control value is set to an initial value corresponding to the upper limit value, and the control value reaches the lower limit value. An oscillation frequency range switching circuit that switches to a set oscillation frequency range one step lower and sets the control value to an initial value corresponding to the lower limit,
An optical disc apparatus comprising a clock generation function having The oscillation frequency corresponding to the upper limit value of the control value in a predetermined set oscillation frequency range approximates the oscillation frequency corresponding to the initial value of the control value in the set oscillation frequency range one step above,
The oscillation frequency corresponding to the lower limit value of the control value in a predetermined set oscillation frequency range approximates to the oscillation frequency corresponding to the initial value of the control value in the set oscillation frequency range one step below. Item 4. The optical disk device according to Item 1. The oscillation frequency corresponding to the upper limit value of the control value in a predetermined set oscillation frequency range is greater than the oscillation frequency corresponding to the lower limit value of the control value in the set oscillation frequency range one step above,
The oscillation frequency corresponding to the lower limit value of the control value in a predetermined set oscillation frequency range is smaller than the oscillation frequency corresponding to the upper limit value of the control value in the set oscillation frequency range one step below. 3. An optical disc apparatus according to 1 or 2.   The frequency range switching circuit includes an upper limit value of the control value, an initial value of the control value corresponding to the upper limit value, a lower limit value of the control value, and a lower limit value for each of a plurality of set oscillation frequency ranges. 4. The optical disc apparatus according to claim 1, wherein initial values of the corresponding control values are individually set.   The host controller for performing overall control of the optical disc apparatus, further comprising a host controller capable of setting the processing by the frequency range switching circuit to either valid or invalid. The optical disc apparatus according to any one of 1 to 4.   6. The optical disc apparatus according to claim 5, wherein the host controller performs processing for switching the set oscillation frequency range of the oscillator itself when the processing by the frequency range switching circuit is set to be invalid. A host controller is provided for overall control of the optical disk device.
The optical disk apparatus according to claim 1, wherein the frequency range switching circuit outputs a signal indicating a state of the clock generation function to the host controller. The oscillation frequency of the operation clock can be adjusted in accordance with the control value of the operation clock, and the range of the oscillation frequency that can be adjusted by changing the control value is any one of a plurality of set oscillation frequency ranges that differ in stages. An oscillator that can be switched to,
For the set oscillation frequency range, an upper limit value of the control value, an initial value of the control value corresponding to the upper limit value, a lower limit value of the control value, and an initial value of the control value corresponding to the lower limit value are set. When the control value reaches the upper limit value, the control value is switched to a set oscillation frequency range one step higher and the control value is set to an initial value corresponding to the upper limit value, and the control value reaches the lower limit value. An oscillation frequency range switching circuit that switches to a set oscillation frequency range one step lower and sets the control value to an initial value corresponding to the lower limit,
A clock generation device comprising: The oscillation frequency of the operation clock can be adjusted in accordance with the control value of the operation clock, and the range of the oscillation frequency that can be adjusted by changing the control value is any one of a plurality of set oscillation frequency ranges that differ in stages. A clock generation method using an oscillator that can be switched to
When the control value of the operation clock reaches the upper limit value or the lower limit value set for the set oscillation frequency range, the step of switching to the set oscillation frequency range one step above or one step below;
Setting an operation clock control value to an initial value corresponding to the upper limit value or an initial value corresponding to the lower limit value;
Clock generation method including:

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