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JP2008124193A - Electric double-layer capacitor - Google Patents

Electric double-layer capacitor Download PDF

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JP2008124193A
JP2008124193A JP2006305205A JP2006305205A JP2008124193A JP 2008124193 A JP2008124193 A JP 2008124193A JP 2006305205 A JP2006305205 A JP 2006305205A JP 2006305205 A JP2006305205 A JP 2006305205A JP 2008124193 A JP2008124193 A JP 2008124193A
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terminal board
electric double
film
layer capacitor
double layer
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Shinji Nakano
伸次 中野
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Tokin Corp
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NEC Tokin Corp
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
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    • Y02E60/13Energy storage using capacitors

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Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem wherein poor ESR and poor product dimension, which are caused by a position gap between an enveloping film and a terminal board or a laminated cell, occur usually in an assembly process, a terminal board/laminated cell/terminal board and the enveloping film are put into a state wherein they are set free from each other because the terminal board/laminated cell/terminal board is configured so as to be wrapped up with the enveloping film in a product manufacturing process, and the assembly is mounted with a position gap between the enveloping film and the terminal board/laminated cell/terminal board in an enveloping film sealing process as a post process. <P>SOLUTION: The terminal board 7a and enveloping film 8 are joined together so as to prevent a position gap from occurring among the laminated cell, terminal board 7a and enveloping film 8, and a current collector can be brought into close contact with the terminal board 7a containing a conductive layer, so that poor ESR and poor product dimensions related to the length of lead terminals and a lead pitch can be reduced, and a quality and uniform electric double-layer capacitor can be obtained. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、電気二重層コンデンサに関し、特に電極に多孔質体を用い、セパレータに多孔質絶縁体を用い、電極及びセパレータを巻回せず平板状に積層した、電解液を用いる電気二重層コンデンサおよびその製造方法に関する。   The present invention relates to an electric double layer capacitor, in particular, a porous body for an electrode, a porous insulator for a separator, an electrode and a separator laminated without being wound, and an electric double layer capacitor using an electrolyte and It relates to the manufacturing method.

近年、携帯電話機等の携帯用電子機器においては、低電流化、低電圧化が図られているが、その機能によっては、瞬間的に非常に大きな電流が必要な場合があり、このとき電池等の電源で電圧変動(IRドロップ等)が生じることによって、電子回路が正常に作動しなくなり、電池の寿命を短くさせてしまうことがある。   In recent years, in portable electronic devices such as mobile phones, low current and low voltage have been achieved. However, depending on the function, a very large current may be required instantaneously. As a result of voltage fluctuations (IR drop or the like) in the power source, the electronic circuit may not operate normally, and the battery life may be shortened.

例えば、通信カード等では動作電圧の下限値を下回ると、通信状態が確保できなくなり通信エラーとなってしまう。このため、瞬間的に大電流を必要とするときのみ、急速な充電及び大電流の放電が可能な電気二重層コンデンサから電力を供給して全体の電力を平準化することが行われている。さらに、デジタルカメラやハードディスク装置(HDD)を搭載する携帯型音楽プレーヤといった電子機器の小型化及び薄型化に伴い、使用時間の延長や電源の小型化が求められ、厚さ2.0mm以下で等価直列抵抗(以下、ESRと称する)が300mΩ以下の電気二重層コンデンサも要求されてきている。   For example, in a communication card or the like, if the operating voltage falls below the lower limit value, the communication state cannot be secured and a communication error occurs. For this reason, only when instantaneously a large current is required, power is supplied from an electric double layer capacitor capable of rapid charging and discharging of a large current to level the entire power. Furthermore, along with the downsizing and thinning of electronic devices such as portable music players equipped with digital cameras and hard disk drives (HDDs), there is a need for longer use time and smaller power supplies, which are equivalent to thicknesses of 2.0 mm or less. There is also a demand for an electric double layer capacitor having a series resistance (hereinafter referred to as ESR) of 300 mΩ or less.

図3は電気二重層コンデンサの単位セルの断面図であり、図4は電気二重層コンデンサの断面図である。電気二重層コンデンサの単位セル5は図3に示すように、セパレータ2の両面に一対の平板形状の電極1が配置され、電極1のセパレータ2に対し反対側に集電体3が配置され、電極1とセパレータ2の周囲で集電体3に介装される枠状のガスケット4を有し、内部に電解液が含有された状態で封止されている。電気二重層コンデンサは図4に示すように積層された単位セル5の上下に導電接合層6を介して端子取り出しのため端子板7a、7bが設けられ、さらに通常は、端子板7a、7bの外側からラミネートフィルム等の外装フィルム8で封止している。   FIG. 3 is a sectional view of a unit cell of the electric double layer capacitor, and FIG. 4 is a sectional view of the electric double layer capacitor. As shown in FIG. 3, the unit cell 5 of the electric double layer capacitor has a pair of flat electrodes 1 disposed on both sides of the separator 2, and a current collector 3 disposed on the opposite side of the separator 2 of the electrode 1, A frame-like gasket 4 interposed between the electrode 1 and the separator 2 is interposed between the current collectors 3 and sealed in a state in which an electrolytic solution is contained therein. As shown in FIG. 4, the electric double layer capacitor is provided with terminal plates 7a and 7b for taking out terminals via the conductive bonding layer 6 on the upper and lower sides of the unit cells 5 stacked, and more usually, the terminal plates 7a and 7b It is sealed from the outside with an exterior film 8 such as a laminate film.

従来ESRを改善するために、特許文献1では集電体と導電接合層に使用される原材料のエラストマーの硬度の差を規定し、集電体と導電接合層との間の表面をなじませ良好な接続状態とする提案がなされている。また、特許文献2では導電接合層とガスケットとの界面を熱融着で一体化する提案がなされている。しかし従来技術による電気二重層コンデンサの生産工程では、端子板/積層単位セル/端子板を外装フィルムにて封止する構成となっているが、端子板と積層単位セル、端子板と外装フィルムの位置決めがされないため、それぞれがフリーな状態となり、その後工程である外装フィルム封止時にセルの乗り上げや位置ズレが生じてしまい、組立工程において生じる外装フィルムと端子板、積層単位セルとの位置ズレによるESR不良および製品寸法不良が発生してしまうという問題があった。さらに、小型化及び薄型化するほど、積層セルや周辺部品の形状が小さくなることから、電気二重層コンデンサにおいても、組立精度には高い品質が要求されてきている。   Conventionally, in order to improve ESR, Patent Document 1 specifies the difference in hardness of the elastomer of the raw material used for the current collector and the conductive bonding layer, and the surface between the current collector and the conductive bonding layer is well blended. Proposals have been made to establish a connected state. Patent Document 2 proposes to integrate the interface between the conductive bonding layer and the gasket by thermal fusion. However, in the production process of the electric double layer capacitor according to the prior art, the terminal plate / laminated unit cell / terminal plate is sealed with an exterior film. However, the terminal plate, the laminated unit cell, the terminal plate and the exterior film Since the positioning is not performed, each of them is in a free state, and when the exterior film is sealed in the subsequent process, the cells are lifted up or misaligned, and due to the misalignment between the exterior film, the terminal board, and the laminated unit cell that occurs in the assembly process. There was a problem that ESR failure and product dimensional failure would occur. Further, as the size and thickness are reduced, the shape of the laminated cell and peripheral parts becomes smaller. Therefore, even in the electric double layer capacitor, high quality is required for assembly accuracy.

特開2003−224040号公報JP 2003-224040 A 特開2004−235283号公報Japanese Patent Laid-Open No. 2004-235283

このような状況にあって、本発明の課題は高品質でESR不良および製品寸法不良等ばらつきの少ない電気二重層コンデンサを提供することにある。   Under such circumstances, an object of the present invention is to provide an electric double layer capacitor with high quality and less variation such as ESR failure and product dimension failure.

本発明は、前記課題を解決するため、端子板と外装フィルムを予め接合させることにより組立精度が向上することを見出したものである。   In order to solve the above problems, the present invention has been found that the assembly accuracy is improved by previously joining the terminal board and the exterior film.

本発明の電気二重層コンデンサは、セパレータを介して対向配置された一対の電極と、前記一対の電極の前記セパレータと反対側に配置された一対の集電体と、前記集電体とともに前記セパレータと前記電極を周囲で封止する枠状のガスケットを有する単位セルを少なくとも一層以上積層し、最外層に端子板が導電接合層を介して配置され、外装フィルムで外装される電気二重層コンデンサにおいて、前記端子板の本体部の前記導電接合層とは反対側の面の少なくとも一部と前記外装フィルムを前記外装フィルム同士の外縁部での接合前に接合させたことを特徴とする。   The electric double layer capacitor of the present invention includes a pair of electrodes disposed opposite to each other with a separator, a pair of current collectors disposed on the opposite side of the pair of electrodes from the separator, and the current collector together with the separator. And an electric double layer capacitor in which at least one unit cell having a frame-shaped gasket for sealing the electrode around is laminated, a terminal plate is disposed on the outermost layer via a conductive bonding layer, and is sheathed with an exterior film Further, at least a part of the surface of the main body portion of the terminal board opposite to the conductive bonding layer and the exterior film are joined before joining at an outer edge portion of the exterior films.

また、本発明の電気二重層コンデンサは、前記外装フィルムがアイオノマーフィルム層を有し、前記端子板と前記外装フィルムを熱融着により接合させることが好ましい。   In the electric double layer capacitor of the present invention, it is preferable that the exterior film has an ionomer film layer, and the terminal board and the exterior film are joined by heat fusion.

本発明によれば、外装フィルムと端子板を好ましくは前記外装フィルムの最外層に有したアイオノマーにより接合することにより、単位セルと端子板と外装フィルムのずれをなくし、単位セルの端子板との乗り上げや端子板の位置ズレを防止することができ、集電体と導電接合層を含む端子板との密着性を容易に保持できるのでESR不良およびリード端子長さやリードピッチにかかわる製品寸法不良を低減することができ、高品質な電気二重層コンデンサを提供できる。   According to the present invention, by joining the exterior film and the terminal plate with an ionomer that preferably has an outermost layer of the exterior film, the unit cell, the terminal plate, and the exterior film are prevented from being displaced, Can prevent boarding and displacement of the terminal board, and can easily maintain the adhesion between the current collector and the terminal board including the conductive bonding layer, thus preventing ESR defects and product dimension defects related to lead terminal length and lead pitch. Therefore, a high-quality electric double layer capacitor can be provided.

次に本発明の実施の形態について図面を参照して説明する。本発明に使用される単位セルは図3に示すように、電極1、セパレータ2、集電体3及びガスケット4から構成され、電極1は、椰子殻系に代表される活性炭および導電性を確保するためのカーボンおよびバインダから成る。セパレータ2は多孔質を有するフィルムであり、ポリテトラフルオロエチレン系フィルムやポリオレフィン系フィルムを用いる。セパレータ2の外寸法は電極1の外寸法以上であり、かつ集電体3の外寸法以下である。集電体3は、導電性を有するゴムが用いられる。ガスケット4はセル内の絶縁を確保するための物であり、熱可塑性樹脂、あるいは熱可塑性樹脂と接着可能なゴムまたは樹脂を用いる。ここでガスケットは、電極1、セパレータ2及び集電体3の外周部にそれぞれ配置する。   Next, embodiments of the present invention will be described with reference to the drawings. As shown in FIG. 3, the unit cell used in the present invention is composed of an electrode 1, a separator 2, a current collector 3, and a gasket 4. The electrode 1 ensures activated carbon represented by a coconut shell system and conductivity. Made of carbon and binder. The separator 2 is a porous film, and a polytetrafluoroethylene film or a polyolefin film is used. The outer dimension of the separator 2 is not less than the outer dimension of the electrode 1 and not more than the outer dimension of the current collector 3. The current collector 3 is made of conductive rubber. The gasket 4 is a thing for ensuring the insulation in a cell, and uses the thermoplastic resin or the rubber | gum or resin which can be adhere | attached with a thermoplastic resin. Here, the gasket is disposed on the outer periphery of the electrode 1, the separator 2, and the current collector 3.

本発明の電気二重層コンデンサは、図4に示すように、電極、セパレータ、集電体、及びガスケットからなる単位セル5を、所定の使用電圧に応じて複数重ね、セル内部の電荷を取り出す為に銀や銅などの導電性物質とバインダを添加した導電性ペーストからなる導電接合層6を介して上下端面に銅等の金属からなる端子板7a、7bを配置したものを金属箔とポリオレフィン系フィルムを貼り合わせたラミネートフィルム等からなる外装フィルム8で封止して構成されている。ここで端子板7a、7bは、セルと接触する長方形部にリードタブ部が成形加工されており、予め片面の長方形部に導電接合層6を設けたものを、反対面で外装フィルム8の最外層であるアイオノマー層と熱融着等により接合する。その後、積層された単位セル5の集電体と端子板7a、7bに設けた導電接合層6を重ねて配置し、外装フィルム8同士の重なった部分を熱融着することで、端子板7a、7bと単位セル5の積層体の外装フィルム封止体を形成させ電気二重層コンデンサとする。また、外装フィルム8の最外層に有するアイオノマーの代替としてポリプロピレンを用いることもできる。   As shown in FIG. 4, the electric double layer capacitor of the present invention has a plurality of unit cells 5 composed of electrodes, separators, current collectors, and gaskets, which are stacked in accordance with a predetermined operating voltage, and take out electric charges inside the cells. A metal foil and a polyolefin-based material in which terminal plates 7a and 7b made of a metal such as copper are arranged on the upper and lower end surfaces through a conductive bonding layer 6 made of a conductive paste to which a conductive material such as silver or copper and a binder are added. It is configured by being sealed with an exterior film 8 made of a laminate film or the like bonded with a film. Here, in the terminal plates 7a and 7b, a lead tab portion is formed in a rectangular portion that comes into contact with the cell, and the conductive bonding layer 6 is provided in advance on one side of the rectangular portion, and the outermost layer of the exterior film 8 on the opposite side. It joins with the ionomer layer which is these by heat sealing | fusion etc. Thereafter, the current collectors of the stacked unit cells 5 and the conductive bonding layer 6 provided on the terminal plates 7a and 7b are arranged so as to overlap, and the overlapping portions of the exterior films 8 are heat-sealed, thereby the terminal plate 7a. 7b and the unit cell 5 are formed as an electric double layer capacitor. Also, polypropylene can be used as an alternative to the ionomer in the outermost layer of the exterior film 8.

次に、幾つかの実施例及び比較例を示して発明を具体的に説明する。   Next, the present invention will be specifically described with reference to some examples and comparative examples.

図3に示すように、集電体3、ガスケット4a,4cを加熱圧着により貼り合わせたものを2枚作製した。平均粒径15μm粉末椰子殻活性炭、平均粒径15μmの非球状カーボン、繊維径10〜20μmの繊維状カーボン及びバインダを、重量比75:10:10:5の割合で形成されるスラリーを作製し、これをガスケットの内側にあたる集電体上に塗布、乾燥させ、電極1を形成した。このようにして電極1の塗布された集電体3を2枚作製した後、そのうちの1枚にガスケット4bを熱圧着により貼り合わせた。次に、40重量%硫酸水溶液を電極1上に添加した。セパレータ2の中で、電極1と接する部分以外を、25℃,5kg/cm2、1秒間、加圧前処理を行った。このセパレータ2を硫酸添加済みシートの1枚に配置した後、2枚のシートを集電体が外側になるように貼り合わせ、熱圧着によりガスケットを溶融させて接着させた。 As shown in FIG. 3, two sheets were prepared by bonding the current collector 3 and the gaskets 4a and 4c by thermocompression bonding. A slurry is formed in which a powdered coconut shell activated carbon having an average particle diameter of 15 μm, non-spherical carbon having an average particle diameter of 15 μm, fibrous carbon having a fiber diameter of 10 to 20 μm, and a binder are formed at a weight ratio of 75: 10: 10: 5. The electrode 1 was formed by applying and drying this on a current collector inside the gasket. In this way, two current collectors 3 to which the electrode 1 was applied were produced, and then a gasket 4b was bonded to one of them by thermocompression bonding. Next, a 40 wt% aqueous sulfuric acid solution was added onto the electrode 1. A portion of the separator 2 other than the portion in contact with the electrode 1 was subjected to pressure pretreatment for 1 second at 25 ° C. and 5 kg / cm 2 . After this separator 2 was placed on one of the sheets added with sulfuric acid, the two sheets were bonded so that the current collector was on the outside, and the gasket was melted and bonded by thermocompression bonding.

図1は本発明の電気二重層コンデンサの実施例1の底面側の端子板の接合工程を説明する正面図であり、図1(a)は接合面積比率が5%の場合、図1(b)は20%の場合、図1(c)は100%の場合を示す。   FIG. 1 is a front view for explaining a process of joining a terminal plate on the bottom surface side of an electric double layer capacitor according to a first embodiment of the present invention. FIG. 1 (a) shows a case where the joint area ratio is 5%. ) Shows the case of 20%, and FIG. 1C shows the case of 100%.

上述のように作製した単位セルを図4に示すように6枚重ね合わせて13.5×32×0.87mm寸法の積層セルとして用意した。次に銀ペーストからなる導電接合層6を施した厚さ0.1mmの銅製の底面側の端子板7aを図1に示すように最外層にアイオノマーを有する外装フィルム8に融着温度230℃、融着圧力0.40MPaの条件にて熱融着させた。このとき、接合面積比率を5%(図1(a))、20%(図1(b))、100%(図1(c))と変えて熱融着を行った。なお、接合部10は図1(a)、図1(b)、図1(c)においては、底面側の端子板7aの裏面にあたる。その後、底面側の端子板7a上に用意した積層セルと上面側の端子板とを重ねあわせた状態で配置し、外装フィルム8を折り返して、周囲で外装フィルム8同士を重ね、減圧下で外装フィルム同士の重なった部分を熱融着することで、端子板と積層セルの外装フィルム封止体を形成させた。なおここで外装フィルム8として厚さ0.11mmのラミネートフィルムを用いた。以上の方法で電気二重層コンデンサを1000個作製した。熱融着により接合した端子板と外装フィルムの面積は次のように定義する。接合面積比率=(外装フィルムに接合した端子板の面積)/(端子板底面の総面積)   As shown in FIG. 4, six unit cells produced as described above were stacked to prepare a laminated cell having a size of 13.5 × 32 × 0.87 mm. Next, a 0.1 mm thick copper terminal plate 7a having a conductive bonding layer 6 made of silver paste is applied to an outer film 8 having an ionomer as an outermost layer as shown in FIG. Heat fusion was performed under the condition of a fusion pressure of 0.40 MPa. At this time, heat bonding was performed by changing the bonding area ratio to 5% (FIG. 1A), 20% (FIG. 1B), and 100% (FIG. 1C). In addition, the junction part 10 corresponds to the back surface of the terminal plate 7a on the bottom surface side in FIGS. 1 (a), 1 (b), and 1 (c). After that, the laminated cell prepared on the terminal board 7a on the bottom surface side and the terminal board on the upper surface side are arranged in a superimposed state, the exterior film 8 is folded back, the exterior films 8 are overlapped around each other, and the exterior is applied under reduced pressure. By heat-sealing the overlapping portions of the films, an outer film sealing body of the terminal plate and the laminated cell was formed. Here, a laminate film having a thickness of 0.11 mm was used as the exterior film 8. 1000 electric double layer capacitors were produced by the above method. The area of the terminal board and exterior film joined by thermal fusion is defined as follows. Bonding area ratio = (Area of terminal board bonded to exterior film) / (Total area of terminal board bottom face)

図2は本発明の電気二重層コンデンサの実施例2の上面側および底面側の端子板の接合工程を説明する正面図であり、図2(a)は接合面積比率が5%の場合、図2(b)は20%の場合、図2(c)は100%の場合を示す。   FIG. 2 is a front view for explaining a process of joining the terminal plates on the upper surface side and the bottom surface side of Example 2 of the electric double layer capacitor of the present invention. FIG. 2 (b) shows the case of 20%, and FIG. 2 (c) shows the case of 100%.

実施例1と同様に作製した単位セルを6枚重ね合わせて積層セルとして用意した。次に銀ペーストからなる導電接合層を形成した厚さ0.1mmの銅製の底面側の端子板7aと上面側の端子板7bを図2に示すようにそれぞれ外装フィルム8に熱融着により、接合面積比率5%(図2(a))、20%(図2(b))、100%(図2(c))で接合させた。熱融着の条件等は実施例1と同様に行なった。その後、外装フィルム8を折り返して、周囲で外装フィルム8同士を重ね、実施例1と同様に電気二重層コンデンサを1000個作製した。   Six unit cells produced in the same manner as in Example 1 were stacked to prepare a stacked cell. Next, a 0.1 mm thick copper bottom terminal plate 7a and a top surface terminal plate 7b, each having a conductive bonding layer made of silver paste, are thermally fused to the exterior film 8 as shown in FIG. Bonding was performed at a bonding area ratio of 5% (FIG. 2A), 20% (FIG. 2B), and 100% (FIG. 2C). The conditions for heat sealing were the same as in Example 1. Thereafter, the exterior film 8 was folded back and the exterior films 8 were stacked around each other, and 1000 electric double layer capacitors were produced in the same manner as in Example 1.

(比較例)
端子板7a、7bと外装フィルム8の接合を行わない以外は 実施例1と同種の材料をもちいて、電気二重層コンデンサを1000個作製した。
(Comparative example)
Except for not joining the terminal plates 7a and 7b and the exterior film 8, 1000 electric double layer capacitors were produced using the same material as in Example 1.

上述のように作製した実施例1、2および比較例の電気二重層コンデンサについて、サンプル作製直後及び70℃、5.4V(1セルあたり0.9V)、1,000時間の負荷を行い室温まで冷却した後に、ESRを測定した。ここでESRは、1kHz,10mVrmsの交流電圧を印加して、電流と位相差を測定することで求め、160mΩ以上をESR不良とした。また、製品寸法を測定し、寸法の公差が±0.5mm以上の製品は製品寸法不良とし、ESR不良と製品寸法不良の割合を表1に示す。   With respect to the electric double layer capacitors of Examples 1 and 2 and Comparative Example manufactured as described above, immediately after the sample was prepared and subjected to load for 1,000 hours at 70 ° C., 5.4 V (0.9 V per cell), to room temperature After cooling, ESR was measured. Here, ESR was obtained by applying an alternating voltage of 1 kHz, 10 mVrms and measuring the current and phase difference, and 160 mΩ or more was regarded as ESR failure. In addition, the product dimensions were measured, and a product having a dimensional tolerance of ± 0.5 mm or more was regarded as a product dimension defect, and Table 1 shows the ratio between the ESR defect and the product dimension defect.

Figure 2008124193
Figure 2008124193

表1に示すESR不良と製品寸法不良を比較すると、実施例1はいずれも比較例より低いことがわかる。これは、比較例のように外装フィルムと端子板が固定されていない積層セルと端子板を外装フィルムの所定位置にセットすると積層セルが端子板から乗り上げてしまう傾向がある。また外装フィルム封止時には、端子板/積層セル/端子板が所定の位置からずれてしまう傾向もみられた。端子板の乗り上げは、ESR不良の原因となり、端子板/積層セル/端子板の位置ズレは、製品寸法不良の原因となることがわかる。   Comparing the ESR failure shown in Table 1 with the product dimension failure, it can be seen that Example 1 is lower than the comparative example. This is because when the laminated cell and the terminal plate in which the exterior film and the terminal plate are not fixed as in the comparative example are set at predetermined positions of the exterior film, the laminated cell tends to ride on the terminal plate. Further, when sealing the exterior film, there was a tendency that the terminal plate / laminated cell / terminal plate shifted from a predetermined position. It can be seen that climbing of the terminal board causes an ESR defect, and the positional deviation of the terminal board / laminated cell / terminal board causes a product dimension defect.

実施例1では、製品の底面側の外装フィルムと端子板を接合することで、上記、端子板の乗り上げによるESR不良および端子板/積層セル/端子板の位置ズレによる製品寸法不良を軽減することができた。接合面積比率を5%から100%と全面に接合することにより、さらに不良率が減少することがわかる。これは、接合面積比率が低いと作業中に外装フィルムと端子板の接合が外れてしまうためであった。   In Example 1, by bonding the exterior film and the terminal board on the bottom side of the product, the above-described ESR failure due to the terminal board climbing and the product dimension failure due to the positional deviation of the terminal board / laminated cell / terminal board can be reduced. I was able to. It can be seen that the defective rate is further reduced by bonding the entire area of the bonding area ratio from 5% to 100%. This is because, when the bonding area ratio is low, the outer film and the terminal plate are unbonded during the operation.

実施例2では、製品の底面側だけでなく上面側にも端子板と外装フィルムを接合することで、上面側の端子板の乗り上げや位置ズレをさらに軽減することができ、ESRおよび製品寸法不良が発生しにくいことがわかる。また、実施例1と同様に接合面積比率が高いほど、ESR不良および製品寸法不良が低くなる傾向となった。   In Example 2, the terminal board and the exterior film are bonded not only to the bottom surface side but also to the top surface side of the product, so that it is possible to further reduce the rise and displacement of the terminal board on the top surface side. It turns out that it is hard to generate. Further, as in Example 1, the higher the bonding area ratio, the lower the ESR defect and the product dimension defect.

実施例1,2からESR不良および製品寸法不良は実施例2の製品上面側および製品底面側の外装フィルムを端子板に全面接合する条件が最も良好な結果を示しているから、この条件にすることでより大きい効果が得られるといえる。   From Examples 1 and 2, the ESR defect and the product dimension defect are set to these conditions because the conditions in which the exterior film on the product upper surface side and the product bottom surface side of Example 2 are fully bonded to the terminal board show the best results. It can be said that a greater effect can be obtained.

以上、この発明の実施例を図面を参照して詳述してきたが、いうまでもなく、具体的な構成はこの実施例に限られるものではなく、この発明の要旨を逸脱しない範囲の設計の変更等があってもこの発明に含まれる。   The embodiment of the present invention has been described in detail with reference to the drawings. Needless to say, the specific configuration is not limited to this embodiment, and the design of the present invention is not limited to the scope of the present invention. Any changes or the like are included in the present invention.

本発明の電気二重層コンデンサの実施例1の底面側の端子板の接合工程を説明する正面図、図1(a)は接合面積比率が5%の場合、図1(b)は20%の場合、図1(c)は100%の場合の正面図。FIG. 1A is a front view for explaining a bonding process of a terminal plate on the bottom surface side of Embodiment 1 of an electric double layer capacitor of the present invention, FIG. 1A is a case where the bonding area ratio is 5%, and FIG. FIG. 1C is a front view in the case of 100%. 本発明の電気二重層コンデンサの実施例2の上面側および底面側の端子板の接合工程を説明する正面図、図2(a)は接合面積比率が5%の場合、図2(b)は20%の場合、図2(c)は100%の場合の正面図。FIG. 2A is a front view for explaining a process of joining the terminal plates on the upper surface side and the bottom surface side of Example 2 of the electric double layer capacitor of the present invention, FIG. 2A shows a case where the joining area ratio is 5%, and FIG. In the case of 20%, FIG. 2 (c) is a front view in the case of 100%. 電気二重層コンデンサの単位セルの断面図。Sectional drawing of the unit cell of an electric double layer capacitor. 電気二重層コンデンサの断面図。Sectional drawing of an electric double layer capacitor.

符号の説明Explanation of symbols

1 電極
2 セパレータ
3 集電体
4,4a,4b,4c ガスケット
5 単位セル
6 導電接合層
7a (底面側の)端子板
7b (上面側の)端子板
8 外装フィルム
9 電気二重層コンデンサ
10 接合部
DESCRIPTION OF SYMBOLS 1 Electrode 2 Separator 3 Current collector 4,4a, 4b, 4c Gasket 5 Unit cell 6 Conductive joining layer 7a (bottom side) terminal board 7b (top side) terminal board 8 exterior film 9 electric double layer capacitor 10 junction

Claims (2)

セパレータを介して対向配置された一対の電極と、前記一対の電極の前記セパレータと反対側に配置された一対の集電体と、前記集電体とともに前記セパレータと前記電極を周囲で封止する枠状のガスケットを有する単位セルを少なくとも一層以上積層し、最外層に端子板が導電接合層を介して配置され、外装フィルムで外装される電気二重層コンデンサにおいて、前記端子板の本体部の前記導電接合層とは反対側の面の少なくとも一部と前記外装フィルムを前記外装フィルム同士の外縁部での接合前に接合させたことを特徴とする電気二重層コンデンサ。   A pair of electrodes disposed opposite to each other with a separator interposed therebetween, a pair of current collectors disposed on the opposite side of the pair of electrodes from the separator, and the separator and the electrodes are sealed together with the current collector. In an electric double layer capacitor in which at least one unit cell having a frame-shaped gasket is laminated, a terminal plate is disposed on the outermost layer via a conductive bonding layer, and is packaged with an exterior film, the body portion of the terminal plate An electric double layer capacitor, wherein at least a part of a surface opposite to the conductive bonding layer and the outer film are bonded before bonding at an outer edge portion of the outer films. 前記外装フィルムがアイオノマーフィルム層を有し、前記端子板と前記外装フィルムを熱融着により接合させたことを特徴とする請求項1記載の電気二重層コンデンサ。   2. The electric double layer capacitor according to claim 1, wherein the exterior film has an ionomer film layer, and the terminal board and the exterior film are joined by heat fusion.
JP2006305205A 2006-11-10 2006-11-10 Electric double-layer capacitor Withdrawn JP2008124193A (en)

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