JP2008109645A - Differential single phase converter circuit - Google Patents

Abstract

A differential single-phase conversion circuit having a reduced chip area and improved power efficiency is provided.
A differential single-phase conversion circuit includes a source follower amplifier and a source grounded amplifier. The source follower amplifier 10 outputs the non-inverted signal IN of the differential signal in the same phase. The common source amplifier 20 inverts the inverted signal INX of the differential signal so as to be in phase with the non-inverted signal IN. At point A, the two differential signals IN and INX that are both in phase are added and output as a single-phase signal OUT.
[Selection] Figure 1

Description

  The present invention relates to a differential single-phase conversion circuit that converts a differential signal into a single-phase signal. Specifically, the present invention relates to a differential single-phase conversion circuit in which the chip area is reduced and the power efficiency is improved.

  2. Description of the Related Art Conventionally, there is a differential single-phase conversion circuit that converts a differential signal having different phases from a single-phase signal. For example, the differential single-phase conversion circuit is used in a mobile phone, a wireless LAN, or the like that performs communication by outputting a single-phase signal after conversion to one antenna.

  As a conventional differential single-phase conversion circuit, one using a transformer 101 (or balun) which is a passive element (see FIG. 9A) or one using transistors 104 and 105 (see FIG. 9B). ) Is common. In either case, a differential signal is input from the two input terminals IN and INX, and a single-phase signal is output from the output terminal OUT.

Also disclosed is a differential / single-end conversion circuit that combines a plurality of current mirror circuits composed of transistors to obtain a single-ended signal with low distortion (for example, Patent Document 1 below).
JP-A-8-288762

  However, in the differential single-phase conversion circuit using the transformer shown in FIG. 9A, the chip area is increased by the amount of the transformer 101. In the differential single-phase conversion circuit including transistors illustrated in FIG. 9B, the power loss is large because the single-phase signal OUT is obtained using only the output side of the inverted signal INX of the input differential signal.

  Furthermore, since a plurality of current mirror circuits are combined in Patent Document 1, the number of parts increases and the chip area similarly increases.

  Therefore, the present invention has been made in view of the above problems, and an object thereof is to provide a differential single-phase conversion circuit in which the chip area is reduced and the power efficiency is improved.

  In order to achieve the above object, according to one embodiment of the present invention, in a differential single-phase conversion circuit, a first differential signal among a pair of differential signals in a reverse phase relationship is amplified and the first differential signal is amplified. A common-mode output amplifier that outputs the differential signal of 1 in phase and a common-mode output amplifier that is capacitively coupled to the common-mode output amplifier, amplifies the second differential signal of the differential signals, and sets the phase of the second differential signal And an inverting output amplifier that outputs the single-phase signal by adding the first differential signal and the second differential signal with the phase inverted.

  According to another embodiment of the present invention, in the differential single-phase conversion circuit, the differential common-mode output amplifier includes a source follower amplifier with a drain side grounded, and the inverting output amplifier has a source side connected to the source side. It is composed of a grounded source grounded amplifier.

  Furthermore, according to another embodiment of the present invention, in the differential single-phase conversion circuit, the common-mode output amplifier is a gate-grounded amplifier with a gate side grounded, and the inverting output amplifier is a source with a source side grounded It is characterized by comprising a ground amplifier.

  Furthermore, according to another embodiment of the present invention, in the differential single-phase conversion circuit, the first differential signal or the source side of the source grounded amplifier or the output side of the source follower amplifier A phase adjuster for adjusting the phase difference of the second differential signal is connected.

  Furthermore, according to another embodiment of the present invention, in the differential single-phase converter circuit, the first differential signal or the drain side or the source side of the common source amplifier, or the output side of the source follower amplifier A gain adjuster for adjusting the gain of the second differential signal is connected.

  Furthermore, according to another embodiment of the present invention, in the differential single-phase conversion circuit, the gain of the first or second differential signal is amplified to the output side of the source follower amplifier. A gain amplifier for adjustment is provided.

  Furthermore, according to another embodiment of the present invention, the differential single-phase converter circuit includes a phase adjuster that adjusts a phase of the first or second differential signal on an output side of the source follower amplifier. It is characterized by that.

  Furthermore, according to another embodiment of the present invention, in the differential single-phase conversion circuit, the phase difference or gain difference of the first or second differential signal is connected to the output side of the common source amplifier. And a calculation circuit for calculating an adjustment amount based on a detection result of the detection circuit, and the phase adjuster or the gain adjuster performs phase adjustment or gain adjustment based on the adjustment amount. It is characterized by being.

  In order to achieve the above object, according to another embodiment of the present invention, in a differential single-phase conversion circuit, a first differential signal is amplified among a pair of differential signals in a reverse phase relationship. And an inverting output amplifier that outputs an inverted signal obtained by inverting the phase of the first differential signal, and capacitively coupled to the inverting output amplifier, and amplifies the second differential signal of the pair of differential signals. And an in-phase output amplifier that obtains an in-phase differential signal in phase with the second differential signal, adds the inverted signal and the in-phase differential signal, and outputs a single-phase signal.

  Furthermore, in order to achieve the above object, according to another embodiment of the present invention, in a differential single-phase conversion circuit, a first differential signal is amplified among a pair of differential signals in a reverse phase relationship. And an in-phase output amplifier that outputs the first differential signal in phase, and a capacitive coupling with the in-phase output amplifier to amplify a second differential signal of the differential signals and the second differential signal An inverting output amplifier that outputs a single-phase signal by adding the first differential signal and the second differential signal with the phase inverted, and an input side of the in-phase output amplifier. A calibration circuit, generating an in-phase calibration signal from the calibration circuit, and detecting a phase difference or gain difference between the first and second differential signals on the output side of the inverting output amplifier Calibre The phase adjustment amount or gain adjustment amount of the first and second differential signals during the measurement period is measured, the result is stored in the storage device, and the phase adjustment amount stored in the storage device during actual operation Alternatively, phase adjustment or gain adjustment of the first and second differential signals is performed based on a gain adjustment amount.

  Furthermore, in order to achieve the above object, according to another embodiment of the present invention, a differential single-phase converter circuit amplifies a first differential signal among a pair of differential signals having a reverse phase relationship. A common-mode output amplifier that outputs the first differential signal in phase, and capacitively coupled to the common-mode output amplifier, amplifies a second differential signal of the differential signals, and An inverting output amplifier that inverts the phase, adds the first differential signal and the second differential signal with the phase inverted, and outputs a single-phase signal, and calibrates to the input side of the in-phase output amplifier And detecting the phase adjustment amount or gain adjustment amount of the first or second differential signal at the output stage of the inverting output amplifier when an in-phase calibration signal is output from the calibration circuit and the calibration circuit. Department and A storage unit for storing the phase adjustment amount or the gain adjustment amount detected by the detection unit, and the phase adjustment amount or the gain adjustment amount from the storage unit when the calibration signal is not output from the calibration circuit. And an adjustment unit that adjusts the phase or gain of the first and second differential signals.

  Furthermore, in order to achieve the above object, according to another embodiment of the present invention, a differential single-phase converter circuit amplifies a first differential signal among a pair of differential signals having a reverse phase relationship. A common-mode output amplifier that outputs the first differential signal in phase, and capacitively coupled to the common-mode output amplifier, amplifies a second differential signal of the differential signals, and An inverting output amplifier that inverts the phase and adds the first differential signal and the second differential signal with the phase inverted to output a single-phase signal; and communication based on the single-phase signal. And a communication unit for performing the operation.

  ADVANTAGE OF THE INVENTION According to this invention, the differential single phase conversion circuit which reduced the chip area and improved the power efficiency can be provided.

  The best mode for carrying out the present invention will be described below with reference to the drawings.

  FIG. 1 is a diagram showing a configuration example of a differential single-phase conversion circuit 1 to which the present invention is applied. The differential single-phase conversion circuit 1 amplifies the phase of one of a pair of differential signals having a reverse phase relationship, and outputs a phase of the signal in phase with a source follower amplifier (in-phase output amplifier) 10. A common-source amplifier (inverting output amplifier) 20 that amplifies the phase of the other signal of the pair of differential signals in phase and inverts the phase of the signal and outputs the inverted signal; source-follower amplifier 10 and source-grounded amplifier 20; Are connected in series, and a phase difference detection circuit 30 is provided.

  The source follower amplifier 10 includes a first transistor 11 and a constant current source 12.

  A non-inverted signal IN of a differential signal is input to the gate side of the first transistor 11. Further, the power supply VDD is connected to the source side of the first transistor 11, and the constant current source is connected to the drain side. Further, a capacitor 13 is connected to the drain side. One side of the constant current source 12 is connected to the ground (GND).

  The common-source amplifier 20 adjusts the phase of the differential signal based on the detection result of the load circuit 21, the second transistor 22, and the phase difference detection circuit 30 for amplifying the output single-phase signal OUT. An adjuster 23 is provided.

  The load circuit 21 is configured by a resistor or an interactor and is connected to the power supply VDD. The second transistor 22 is connected to the load circuit 21 and to the phase adjuster 23. The phase adjuster 23 is also connected to the ground (GND).

  At a point A between the load circuit 21 and the second transistor 22, the output side of the capacitor 13 is connected, and a single-phase signal OUT is output from the point A.

  The phase difference detection circuit 30 receives the single-phase signal OUT from the common-source amplifier 20, detects the phase difference between the differential signals IN and INX from the single-phase signal OUT, and outputs the detection result to the phase adjuster 23. . The phase adjuster 23 adjusts the phase of the inverted signal INX of the differential signal (or the phase of the non-inverted signal IN of the differential signal) input to the gate side of the second transistor 22 based on the detection result. To do. As shown in FIG. 1, a feedback loop is formed by the phase difference detection circuit 30, the phase adjuster 23, and the like.

  The operation of the differential single-phase conversion circuit 1 configured as described above is as follows. That is, the non-inverted signal IN of the differential signal is input to the gate side of the first transistor 11 and is output from the drain side by the constant current source 12. Then, the non-inverted signal IN is output to the point A via the capacitor 13.

  On the other hand, the inverted signal INX of the differential signal is input to the gate side of the second transistor 22. Since the load circuit 21 is connected to the power supply VDD and is composed of a resistor having a constant value or the like, if the input voltage of the inversion signal INX input to the gate side is increased, the current flowing through the load circuit 21 is increased. The voltage on the drain side of the transistor 22 becomes lower. That is, when the input voltage of the inverted signal INX increases, the voltage on the drain side of the second transistor 22 decreases.

  Further, when the input voltage of the inverted signal INX input to the gate side of the second transistor 22 is reduced, the current flowing through the load circuit 21 is increased and the voltage on the drain side is increased.

  That is, when the voltage of the inverted signal INX of the differential signal is increased, the voltage on the drain side of the second transistor 22 is decreased, and when the voltage of the inverted signal INX is decreased, the voltage on the drain side is increased. A signal having the same phase as that of the non-inverted signal IN, in which the phase of the inverted signal INX is inverted, is output from the drain side of 22.

  Therefore, at the point A, the non-inverted signal IN of the differential signal and the inverted signal INX of the differential signal having the same phase as the non-inverted signal IN (the same phase as the non-inverted signal IN) are added. Get.

  Thus, since the input differential signals IN and INX are both used to convert to the single-phase signal OUT, the differential single-phase conversion circuit 1 with reduced power loss is obtained. Further, since a transformer, a plurality of current mirror circuits, and the like are not used, the differential single-phase conversion circuit 1 with a reduced chip area is obtained.

  Next, a specific configuration example of the differential single-phase conversion circuit 1 will be described with reference to FIGS.

  The differential single-phase conversion circuit 1 of FIG. 2 uses a third transistor 121 as the constant current source 12, a resistor 211 having a certain resistance value as the load circuit 21, and a variable resistor 231 as the phase adjuster 23. Further, a gain difference detection circuit 40 and a variable capacitor 232 as a gain adjuster are added. Other configurations are the same as those in FIG.

  The variable capacitor 232 can change its capacitance based on the detection result detected by the phase difference detection circuit 30 and adjusts the phase difference between the two differential signals IN and INX.

  The gain difference detection circuit 40 detects the gain difference between the two differential signals IN and INX based on the single-phase signal OUT, and outputs the detection result to the variable resistor 231. The resistance value of the variable resistor 231 can be made variable based on the detection result, whereby the gain of the inverted signal INX of the differential signal and the gain of the non-inverted signal IN can be adjusted to be substantially the same. it can. The resistance value of the variable resistor 231 is controlled by switching with a switch.

  At point A, the inversion signal INX having the same phase as the non-inversion signal IN of the differential signal is output from the second transistor 22 and the non-inversion signal IN from the capacitor 13 is added. It is the same. Therefore, even the differential single-phase inverting circuit 1 shown in FIG. 2 can reduce the chip area and suppress power loss.

  In the example shown in FIG. 2, the differential signals IN and INX adjusted so that the gains are substantially the same can be obtained by the variable resistor 231.

  Next, the differential single phase conversion circuit 1 shown in FIG. 3 will be described. The differential single-phase conversion circuit 1 shown in the figure is an example in which the first transistor 11 is configured by a pMOS instead of an nMOS as compared with FIG. The source side of the first transistor 11 is connected to the point A, and the drain side is connected to the terminal AVS, the variable resistor 231, and the variable capacitor 232.

  In the differential single phase conversion circuit 1, the terminal AVS is grounded. Therefore, there is no need to provide the constant current source 12 (third transistor 121).

  Further, since the source side of the first transistor 11 is connected to the resistor 211, the load applied to the source side of the second transistor 22 and the load applied to the source side of the first transistor 11 are substantially the same. As in the example of FIG. 2, it is not necessary to store and output a fixed amount of the non-inverted signal IN of the differential signal by the capacitor 13, and it is not necessary to provide the capacitor 13.

  Therefore, since the first transistor 11 is composed of pMOS, it is not necessary to provide the constant current source 12 and the capacitor 13, so that the number of parts is further reduced as compared with the differential single-phase conversion circuit 1 of FIG. be able to. Since the other configuration is the same as that of FIG. 2, the differential single-phase conversion circuit 1 of this example can reduce the chip area and suppress the power loss.

  FIG. 4 shows an example in which detection results of the phase difference detection circuit 30 and the gain difference detection circuit 40 are output as digital signals, and the gain adjuster (variable resistor 231) and the phase adjuster (variable capacitor 232) are digitally controlled. is there. Other configurations are the same as those in FIG.

  That is, the first arithmetic processing unit 31 and the first DAC (D / A converter) 32 are sequentially connected to the output side of the phase difference detection circuit 30, and the second arithmetic operation is performed on the output side of the gain difference detection circuit 40. The processing unit 41 and the second DAC 42 are connected.

  The phase difference detection circuit 30 detects the phase difference in the same manner as in the above example, converts it into a digital signal, and outputs it. The first arithmetic processing unit 31 includes, for example, an internal table, and reads and outputs an adjustment amount corresponding to the phase difference from the phase difference detection circuit 30. The capacity of the variable capacitor 232 that is the phase adjuster 23 is controlled based on the adjustment amount.

  When the variable capacitor 232 is analog controlled, the digital signal from the first arithmetic processing unit 31 is converted into an analog signal by the first DAC 32, and the capacitance is controlled.

  The gain difference detection circuit 40, the second arithmetic processing unit 41, and the second DAC 42 operate in the same manner. When the variable resistor 231 that is a gain adjuster is digitally controlled, the variable resistor 231 is controlled based on a digital signal corresponding to the adjustment amount from the second arithmetic processing unit 41. When analog control is performed, the second DAC 42 performs analog control. It is converted to a value and controlled.

  Since the other configuration is the same as that of FIG. 2, the differential single-phase conversion circuit 1 according to this example can reduce the chip area and suppress the power loss.

  Next, the example of FIG. 5 will be described. The differential single-phase conversion circuit 1 of this example is an example in which a buffer 50 is provided in the preceding stage of the common source amplifier 20, and a common gate amplifier 60 is provided in the subsequent stage in place of the source follower amplifier 10.

  The buffer 50 includes fourth to seventh transistors 51 to 54. An inverted signal INX of the differential signal is input to the gate side of the fourth transistor 51, the source side is connected to the power supply VDD, and the drain side is connected to the source side of the sixth transistor 53.

  A non-inverted signal IN of a differential signal is input to the gate of the fifth transistor 52, the source side is connected to the power supply VDD, and the drain side is connected to the source side of the seventh transistor 54.

The gate side of the sixth transistor 53 is connected to the terminal VG, and the drain side is connected to the grounded terminal AVS. The gate side of the seventh transistor 54 is also connected to the terminal VG, and the drain side is connected to the terminal AVS. The drain side of the fourth transistor 51 is connected to the gate side of the second transistor 22 of the common source amplifier 20. The drain side of the fifth transistor 52 is connected to the capacitor 13.

  On the other hand, the grounded gate amplifier 60 includes eighth and ninth transistors 61 and 62. The gate side of the eighth transistor 61 is grounded (connected to the terminal AVS), the single-phase signal OUT is input to the drain side, and the source side is connected to the source side of the ninth transistor 62. The gate side of the ninth transistor 62 is connected to the terminal VG, and the drain side is grounded.

  The buffer 50 buffers the differential signals IN and INX so as to increase the driving force so that an appropriate output can be obtained for a circuit having a large load (such as the common-source amplifier 20). The non-inverted signal IN of the differential signal is output to the drain side of the eighth transistor 61 through the fifth transistor 52 and the capacitor 13. Then, on the source side of the eighth transistor 61 (at point B), a signal having the same phase as the input non-inverted signal IN is obtained.

  On the other hand, the inverted signal INX of the differential signal is input to the gate side of the second transistor 22 through the fourth transistor 51. As in the example of FIG. 1 and the like, the phase is inverted on the source side of the second transistor 22, and a signal having the same phase as the non-inverted signal IN is output.

  The ninth transistor 62 corresponds to the first transistor 11 (constant current source) of the source follower amplifier 10.

  At point B, two signals (inverted signal INX and non-inverted signal IN) having the same phase are added to obtain a single-phase signal OUT. Therefore, similarly to FIG. 1 and the like, the power loss can be reduced even in the differential single-phase conversion circuit 1 according to this example.

  Since the phase difference detection circuit 30 and the gain difference detection circuit 40 are the same as those in the example of FIG. 4, the phase difference adjuster (variable capacitor 232) and the gain adjuster (variable resistor 231) are controlled by digital control or analog control. The phase difference can be controlled.

  FIG. 6 shows an example in which a variable amplifier 25 is provided in the common source amplifier 20. When the gain of the inverted signal INX of the differential signal is high, the gain of the non-inverted signal IN of the differential signal is increased by the variable amplifier 25 and the gains of the two differential signals IN and INX are adjusted to substantially the same level. Is to do. Therefore, a variable amplifier 25 is provided between the capacitor 13 and the point A.

  Since the other configuration is the same as that of FIG. 2, the differential single-phase conversion circuit 1 according to this example can suppress power loss and reduce the chip area.

  FIG. 7 shows an example of the differential single-phase conversion circuit 1 having a configuration in which the source follower amplifier 10 and the common-source amplifier 20 of the differential single-phase conversion circuit 1 shown in FIG. The configurations of the source follower amplifier 1 and the common source amplifier 20 are the same as those in FIG.

  The inverted signal of the inverted signal INX output from the source ground circuit 20 (the signal having the same phase as the non-inverted signal IN) and the non-inverted signal IN by the source follower amplifier 10 are added at point B to obtain a single-phase signal OUT. .

  Therefore, similarly to the above-described example, a differential single-phase conversion circuit with reduced power loss and reduced chip area is obtained.

  Next, an example of the differential single-phase conversion circuit 1 having a configuration in which a calibration circuit 70 is added on the input side of two differential signals IN and INX will be described. FIG. 8 shows an example of the differential single-phase conversion circuit 1 having a configuration in which a calibration circuit 70 and a storage device 80 are added to the differential single-phase conversion circuit 1 of FIG.

  When an in-phase calibration signal is generated from the calibration circuit 70, no signal is normally output from the output stage OUT. However, if there is a phase difference or gain difference between the two differential signals IN and INX, a signal is output. The phase difference and the gain difference are detected by the phase difference detection circuit 30 and the gain difference detection circuit 40, respectively, in the calibration period, which is the period in which the calibration signal is generated. And the 1st and 2nd arithmetic processing parts 31 and 41 output adjustment amount based on an internal table from a detection result. The output phase adjustment amount and gain adjustment amount are stored in the storage device 80. Thereafter, in a period when the calibration signal is not generated from the calibration circuit 70 (this period is referred to as “actual operation” period), the phase adjustment amount and the gain adjustment amount are read from the storage device 80, and the gain adjuster (variable resistor 231). ) And a phase adjuster (variable capacitor 232) to adjust the gain difference and the phase difference.

  The calibration circuit 70 may be connected to the differential single-phase conversion circuit 1 shown in FIG. 1, or may be connected to the differential single-phase conversion circuit 1 shown in FIGS. In either case, the calibration circuit 70 is connected between the two differential signal input terminals IN and INX and the first and second transistors 11 and 22. Even in such a case, the phase difference or gain difference between the two differential signals is detected by the phase difference detection circuit 30 or the gain difference detection circuit 40 during the calibration period, and the respective adjustment amounts are stored in the storage circuit 70. The gain difference and the phase difference are adjusted by the gain adjuster and the phase adjuster based on the adjustment amount during the operation period.

  In any of the above-described examples, it has been described that the phase is inverted with respect to the inverted signal INX of the differential signal so as to be in phase with the non-inverted signal IN. Of course, if the non-inverted signal INX is output to the terminal to which the non-inverted signal IN of the differential signal is input and the non-inverted signal IN is output to the terminal to which the inverted signal INX is input, the phase of the non-inverted signal IN is inverted. A single-phase signal OUT can be obtained with the same phase as that of INX. Even in this case, a differential single-phase conversion circuit with reduced chip area and reduced power loss can be obtained in the same manner as in the above-described example.

  In the example described above, the phase adjuster and the gain adjuster are described as being provided on the drain side of the second transistor 22. Of course, it may be provided on the gate side of the second transistor 22. Even in this case, the same effect as the above-described example is achieved.

  The above-described differential single-phase conversion circuit 1 is suitable for application to a communication device such as a mobile phone or a wireless LAN. For example, a single-phase signal from the differential single-phase conversion circuit 1 can be output to a communication unit such as an antenna so that the communication unit can communicate with another communication device.

  The above is summarized as an appendix.

(Appendix 1)
An in-phase output amplifier that amplifies a first differential signal out of a pair of differential signals in a reverse phase relationship and outputs the first differential signal in phase;
Capacitively coupled to the common-mode output amplifier, amplifies a second differential signal of the differential signals, and inverts the phase of the second differential signal, thereby inverting the phase of the first differential signal. A differential single-phase conversion circuit comprising: an inverting output amplifier that outputs a single-phase signal by adding the second differential signal.

(Appendix 2)
2. The differential single-phase conversion circuit according to claim 1, wherein the common-mode output amplifier is composed of a source follower amplifier having a drain side grounded, and the inverting output amplifier is composed of a source grounded amplifier having a source side grounded.

(Appendix 3)
2. The differential single-phase conversion circuit according to claim 1, wherein the common-mode output amplifier includes a grounded-gate amplifier with a gate side grounded, and the inversion output amplifier includes a source-grounded amplifier with a source side grounded.

(Appendix 4)
A phase adjuster for adjusting a phase difference between the first differential signal and the second differential signal is connected to a drain side or a source side of the common source amplifier or an output side of the source follower amplifier. 4. The differential single-phase conversion circuit according to appendix 2 or 3,

(Appendix 5)
A gain adjuster for adjusting a gain of the first differential signal or the second differential signal is connected to a drain side or a source side of the common source amplifier or an output side of the source follower amplifier. The differential single-phase conversion circuit according to appendix 2 or 3,

(Appendix 6)
The differential single-phase conversion circuit according to claim 4, further comprising a gain amplifier that adjusts the gain of the first or second differential signal by amplifying the gain of the first or second differential signal on an output side of the source follower amplifier.

(Appendix 7)
The differential single-phase conversion circuit according to claim 4, further comprising a phase adjuster that adjusts a phase of the first or second differential signal on an output side of the source follower amplifier.

(Appendix 8)
A detection circuit connected to the output side of the common-source amplifier and detecting a phase difference or gain difference of the first or second differential signal;
An arithmetic circuit that calculates an adjustment amount based on a detection result of the detection circuit;
The differential single-phase conversion circuit according to appendix 4, wherein the phase adjuster or the gain adjuster performs phase adjustment or gain adjustment based on the adjustment amount.

(Appendix 9)
An inverting output amplifier that amplifies the first differential signal out of a pair of differential signals in a reverse phase relationship and outputs an inverted signal obtained by inverting the phase of the first differential signal;
Capacitively coupled to the inverting output amplifier, amplifies a second differential signal of the pair of differential signals, obtains an in-phase differential signal in phase with the second differential signal, and A differential single-phase conversion circuit comprising: a common-mode output amplifier that adds a phase differential signal to output a single-phase signal.

(Appendix 10)
An in-phase output amplifier that amplifies a first differential signal out of a pair of differential signals in a reverse phase relationship and outputs the first differential signal in phase;
Capacitively coupled to the common-mode output amplifier, amplifies a second differential signal of the differential signals, and inverts the phase of the second differential signal, thereby inverting the phase of the first differential signal. An inverting output amplifier that adds the second differential signal and outputs a single-phase signal;
A calibration circuit is provided on the input side of the common-mode output amplifier,
When the calibration circuit generates an in-phase calibration signal and the phase difference or gain difference between the first and second differential signals is detected on the output side of the inverting output amplifier, the first in the calibration period. And the phase adjustment amount or gain adjustment amount of the second differential signal is measured, the result is stored in the storage device, and based on the phase adjustment amount or gain adjustment amount stored in the storage device during actual operation. Then, the phase adjustment or gain adjustment of the first and second differential signals is performed.

(Appendix 11)
An in-phase output amplifier that amplifies a first differential signal out of a pair of differential signals in a reverse phase relationship and outputs the first differential signal in phase;
Capacitively coupled to the common-mode output amplifier, amplifies a second differential signal of the differential signals, and inverts the phase of the second differential signal, thereby inverting the phase of the first differential signal. An inverting output amplifier that adds the second differential signal and outputs a single-phase signal;
A calibration circuit on the input side of the common-mode output amplifier;
A detection unit that detects a phase adjustment amount or a gain adjustment amount of the first or second differential signal at an output stage of the inverting output amplifier when an in-phase calibration signal is output from the calibration circuit;
A storage unit for storing the phase adjustment amount or the gain adjustment amount detected by the detection unit;
An adjustment unit that reads the phase adjustment amount or the gain adjustment amount from the storage unit and adjusts the phase or gain of the first and second differential signals when the calibration signal is not output from the calibration circuit. A differential single-phase conversion circuit comprising:

(Appendix 12)
An in-phase output amplifier that amplifies a first differential signal out of a pair of differential signals in a reverse phase relationship and outputs the first differential signal in phase;
Capacitively coupled to the common-mode output amplifier, amplifies a second differential signal of the differential signals, and inverts the phase of the second differential signal, thereby inverting the phase of the first differential signal. An inverting output amplifier that adds the second differential signal and outputs a single-phase signal;
A communication unit that performs communication based on the single-phase signal.

FIG. 1 is a diagram illustrating a configuration example of a differential single-phase conversion circuit. FIG. 2 is a diagram illustrating a specific configuration example of the differential single-phase conversion circuit. FIG. 3 is a diagram illustrating a specific configuration example of the differential single-phase conversion circuit. FIG. 4 is a diagram illustrating a specific configuration example of the differential single-phase conversion circuit. FIG. 5 is a diagram illustrating a specific configuration example of the differential single-phase conversion circuit. FIG. 6 is a diagram illustrating a specific configuration example of the differential single-phase conversion circuit. FIG. 7 is a diagram illustrating a specific configuration example of the differential single-phase conversion circuit. FIG. 8 is a diagram illustrating a specific configuration example of the differential single-phase conversion circuit. 9A and 9B are diagrams showing a configuration example of a conventional differential single-phase conversion circuit.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Differential single phase conversion circuit, 10 Source follower amplifier, 11 1st transistor, 12 Constant current source, 13 Capacitor, 20 Source grounded amplifier, 21 Load circuit, 22 2nd transistor, 23 Phase adjuster, 30 Phase difference Detection circuit, 31 first arithmetic processing unit, 32 first DAC, 40 gain difference detection circuit, 41 second arithmetic processing unit, 42 second DAC, 50 buffer, 51-54 fourth to seventh transistor , 60 gate grounded amplifier, 61 eighth transistor, 62 ninth transistor, 70 calibration circuit, 80 storage device, 121 third transistor, 211 resistor, 231 variable resistor, 232 variable capacitor, IN non-differential signal Inverted signal, INX Inverted signal of differential signal

Claims (10)

An in-phase output amplifier that amplifies a first differential signal out of a pair of differential signals in a reverse phase relationship and outputs the first differential signal in phase;
Capacitively coupled to the common-mode output amplifier, amplifies a second differential signal of the differential signals, and inverts the phase of the second differential signal, thereby inverting the phase of the first differential signal. A differential single-phase conversion circuit comprising: an inverting output amplifier that outputs a single-phase signal by adding the second differential signal.   2. The differential single-phase conversion circuit according to claim 1, wherein the common-mode output amplifier comprises a source follower amplifier having a drain side grounded, and the inverting output amplifier comprises a source grounded amplifier having a source side grounded. .   2. The differential single-phase conversion circuit according to claim 1, wherein the common-mode output amplifier comprises a grounded-gate amplifier with the gate side grounded, and the inverting output amplifier comprises a source-grounded amplifier with the source side grounded. .   A phase adjuster for adjusting a phase difference between the first differential signal and the second differential signal is connected to a drain side or a source side of the common source amplifier or an output side of the source follower amplifier. The differential single-phase conversion circuit according to claim 2 or 3,   A gain adjuster for adjusting a gain of the first differential signal or the second differential signal is connected to a drain side or a source side of the common source amplifier or an output side of the source follower amplifier. The differential single-phase conversion circuit according to claim 2 or 3.   5. The differential single-phase conversion circuit according to claim 4, further comprising a gain amplifier that adjusts the gain of the first or second differential signal by amplifying the gain of the first or second differential signal on an output side of the source follower amplifier. .   5. The differential single-phase conversion circuit according to claim 4, further comprising a phase adjuster that adjusts a phase of the first or second differential signal on an output side of the source follower amplifier. A detection circuit connected to the output side of the common-source amplifier and detecting a phase difference or gain difference of the first or second differential signal;
An arithmetic circuit that calculates an adjustment amount based on a detection result of the detection circuit;
5. The differential single-phase conversion circuit according to claim 4, wherein the phase adjuster or the gain adjuster performs phase adjustment or gain adjustment based on the adjustment amount. An inverting output amplifier that amplifies the first differential signal out of a pair of differential signals in a reverse phase relationship and outputs an inverted signal obtained by inverting the phase of the first differential signal;
Capacitively coupled to the inverting output amplifier, amplifies a second differential signal of the pair of differential signals, obtains an in-phase differential signal in phase with the second differential signal, and A differential single-phase conversion circuit comprising: a common-mode output amplifier that adds a phase differential signal to output a single-phase signal. An in-phase output amplifier that amplifies a first differential signal out of a pair of differential signals in a reverse phase relationship and outputs the first differential signal in phase;
Capacitively coupled to the common-mode output amplifier, amplifies a second differential signal of the differential signals, and inverts the phase of the second differential signal, thereby inverting the phase of the first differential signal. An inverting output amplifier that adds the second differential signal and outputs a single-phase signal;
A calibration circuit is provided on the input side of the common-mode output amplifier,
When the calibration circuit generates an in-phase calibration signal and the phase difference or gain difference between the first and second differential signals is detected on the output side of the inverting output amplifier, the first in the calibration period And the phase adjustment amount or gain adjustment amount of the second differential signal is measured, the result is stored in the storage device, and based on the phase adjustment amount or gain adjustment amount stored in the storage device during actual operation. Then, the phase adjustment or gain adjustment of the first and second differential signals is performed.

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