JP2008103468A - Manufacturing method of semiconductor device - Google Patents

Abstract

A method of manufacturing a semiconductor device is provided, in which a bonding wire can be easily connected to an electrical connection terminal provided on an upper surface of a semiconductor chip, and the connection reliability of the bonding wire can be improved.
A step of forming an adhesive layer 4 made of a light post-curing adhesive on a lower surface 2b of a semiconductor chip 2 or an upper surface 3a of a support member 3, and irradiating the adhesive layer 4 with light to thereby bond the adhesive layer 4 The step of proceeding the curing of the adhesive, the step of laminating the semiconductor chip 2 on the upper surface 3a of the support member 3 via the adhesive layer 4, and the adhesive fraction so that the gel fraction of the adhesive layer 4 is 20% or more A method of manufacturing the semiconductor device 1, comprising: connecting bonding wires 6 a and 6 b to electrical connection terminals 5 a and 5 b provided on the upper surface 2 a of the semiconductor chip 2 when the curing of the agent layer 4 proceeds.
[Selection] Figure 1

Description

  The present invention relates to a method for manufacturing a semiconductor device in which a semiconductor chip is bonded onto a support member via an adhesive layer, and more specifically, using a light post-curing adhesive having a relatively long pot life. The present invention relates to a method for manufacturing a semiconductor device in which a semiconductor chip is bonded onto a support member such as a substrate.

  A semiconductor device in which a plurality of semiconductor chips are stacked on a substrate via an adhesive layer is widely known. In this type of semiconductor device, electrical connection terminals provided on the upper surface of the semiconductor chip are connected to electrode pads on the substrate by bonding wires.

  As an example of the method for manufacturing the semiconductor device, Patent Document 1 below discloses a method using a semiconductor chip with a die bondine film made of a light post-curing adhesive. The light post-curing pressure-sensitive adhesive exhibits a tackiness before photocuring, but does not exhibit a tackiness after photocuring.

In Patent Document 1, a semiconductor chip with a die bonding film is pre-divided into a semiconductor chip using a dicer or the like to form a semiconductor chip on which a large number of circuits are formed, and a die bonding film is attached to each of the obtained semiconductor chips. It is made by attaching. In manufacturing the semiconductor device, first, the obtained semiconductor chip with the die bonding film is irradiated with light from the die bonding film side. After irradiating with light, the semiconductor chip with the die bonding film is laminated on the substrate or the semiconductor chip within the usable time of the die bonding film. After the usable time of the die bonding film has elapsed, the input / output terminals provided on the semiconductor chip and the wiring on the substrate are connected by bonding wires to obtain a semiconductor device.
JP 2004-39992 A

  In Patent Document 1, a die bondin film made of a light post-curing adhesive is used. Therefore, the curing shrinkage of the die bonding film is less likely to occur than a die bonding film configured using, for example, a resin that is cured by heating. However, even when a die bonding film made of an optical post-curing pressure-sensitive adhesive is used, it tends to slightly cure and shrink. When the die bonding film is cured and contracted, the substrate and the semiconductor chip are hardly contracted. Therefore, the substrate and the semiconductor chip may be bent due to the difference in the contraction rate.

  In recent years, the thickness of semiconductor chips has been further reduced. For example, when a very thin semiconductor chip having a thickness of about 75 μm is used, the warpage of the semiconductor chip tends to increase.

  If the semiconductor chip is curved, it may be difficult to position the bonding wire in cases such as when connecting to the outside by wire bonding. Furthermore, if the semiconductor chip is curved, the bonding wire cannot be reliably connected, and connection failure may occur.

  An object of the present invention is to provide a semiconductor capable of easily connecting a bonding wire to an electrical connection terminal provided on the upper surface of a semiconductor chip and improving the connection reliability of the bonding wire in view of the above-described state of the prior art. It is to provide a method for manufacturing an apparatus.

  The present invention relates to a method of manufacturing a semiconductor device in which a semiconductor chip having an electrical connection terminal on its upper surface is bonded to the upper surface of a support member using an optical post-curing adhesive, and the lower surface of the semiconductor chip or the support member Supporting the semiconductor chip through the process of forming an adhesive layer consisting of a light post-curing adhesive on the upper surface, the process of irradiating the adhesive layer with light to advance the curing of the adhesive layer, and the adhesive layer The step of laminating on the upper surface of the member and when the adhesive layer hardens so that the gel fraction of the adhesive layer is 20% or more, the bonding wire is connected to the electrical connection terminal provided on the upper surface of the semiconductor chip. And a step of connecting the two.

  In addition, in this specification, a gel fraction means the weight% of the insoluble part after shaking at room temperature (23 degreeC) for 10 hours in solvents, such as ethyl acetate.

  In a specific aspect of the method for manufacturing a semiconductor device according to the present invention, the temperature is set to 50 to 100 ° C. between the step of laminating the semiconductor chip on the upper surface of the support member and the step of connecting the bonding wires. The method further includes the step of heating.

  In a specific aspect of the method for manufacturing a semiconductor device according to the present invention, a plurality of semiconductor chips are stacked by repeating the above steps.

  In another specific aspect of the method for manufacturing a semiconductor device according to the present invention, after connecting the bonding wires to the respective electrical connection terminals provided on the upper surfaces of the plurality of semiconductor chips, the respective members between the support member and the plurality of semiconductor chips. The adhesive layer is further cured.

  In still another specific aspect of the method for manufacturing a semiconductor device according to the present invention, a substrate or a semiconductor chip is used as the support member.

  In another specific aspect of the method for manufacturing a semiconductor device according to the present invention, the step of forming an adhesive layer made of a light post-curing adhesive comprises the step of forming an adhesive layer made of a light post-curing adhesive on the lower surface of the semiconductor wafer. Then, the semiconductor wafer is diced together with the adhesive layer and divided into individual semiconductor chips, and an adhesive layer made of a light post-curing adhesive is formed on the lower surface of the semiconductor chip.

  In still another specific aspect of the method for manufacturing a semiconductor device according to the present invention, an adhesive containing a photopolymerizable compound, a photopolymerization initiator, and a curing retarder is used as the post-photocurable adhesive.

  In the method for manufacturing a semiconductor device according to the present invention, when the curing of the adhesive layer proceeds so that the gel fraction of the adhesive layer provided on the lower surface of the semiconductor chip or the upper surface of the support member is 20% or more. Since the step of connecting the bonding wire to the electrical connection terminal provided on the upper surface of the semiconductor chip is provided, the electrical connection terminal can be connected in a state where the warp of the semiconductor chip is relatively small. Therefore, the bonding wire can be easily connected to the electrical connection terminal provided on the upper surface of the semiconductor chip. Therefore, the connection reliability of the bonding wire with respect to the electrical connection terminal provided on the upper surface of the semiconductor chip can be improved.

  Further, in the present invention, since a light post-curing adhesive is used as an adhesive for adhering the semiconductor chip and the support member, the semiconductor chip is compared with a case where an adhesive containing a resin that is cured by heating is used. Can be suppressed.

  Moreover, when it further includes the process of heating to the temperature of 50-100 degreeC between the process of laminating | stacking the said semiconductor chip on the upper surface of the said supporting member, and the process of connecting the said bonding wire, it is desired in a short time. The gel fraction can be achieved, and the tact time can be shortened. Further, when a large number of semiconductor chips are stacked as will be described later, it is particularly effective to shorten the tact time by the heating step.

  When a plurality of semiconductor chips are stacked by repeating each process, a semiconductor device in which a plurality of semiconductor chips are stacked can be obtained. In particular, when such a structure in which a plurality of semiconductor chips are stacked is used, warping of the semiconductor chip can be suppressed, so that the connection reliability of the bonding wire to the electrical connection terminal provided on the upper surface of the semiconductor chip is improved. Can be increased.

  When the bonding wires are connected to the respective electrical connection terminals provided on the upper surfaces of the plurality of semiconductor chips and then the adhesive layers between the support member and the plurality of semiconductor chips are further cured, the plurality of semiconductor chips are stacked. The manufactured semiconductor device can be manufactured more efficiently.

  The step of forming an adhesive layer made of a light post-curing adhesive forms an adhesive layer made of a light post-curing adhesive on the lower surface of the semiconductor wafer, and then the semiconductor wafer is diced together with the adhesive layer to form individual layers. When the process is performed by dividing into semiconductor chips and forming an adhesive layer made of a photo-curing adhesive on the lower surface of the semiconductor chip, a plurality of semiconductor chips having the adhesive layer formed on the lower surface are obtained at a time. Therefore, the manufacturing efficiency of the semiconductor device is increased.

  When an adhesive containing a photopolymerizable compound, a photopolymerization initiator, and a curing retarder is used as the post-photocurable adhesive, the adhesive layer can be used after irradiating the adhesive layer with light. Since the time can be sufficiently long, the gel fraction of the adhesive layer at the time of bonding wire connection can be easily increased to 20% or more. Therefore, the bonding wire can be more easily connected to the electrical connection terminal provided on the upper surface of the semiconductor chip.

  Hereinafter, the present invention will be clarified by describing specific embodiments of the present invention with reference to the drawings.

  FIG. 1 is a schematic front sectional view showing a semiconductor device obtained by a method for manufacturing a semiconductor device according to an embodiment of the present invention.

  The semiconductor device 1 has a structure in which a semiconductor chip 2 is bonded to an upper surface 3a of a substrate 3 as a support member via an adhesive layer 4 made of a light post-curing adhesive. The substrate 3 is made of, for example, a circuit substrate having a circuit pattern 3a formed on the upper surface.

  The semiconductor chip 2 is usually made of an appropriate semiconductor material such as a silicon-based semiconductor. In the vicinity of the outer peripheral edge of the upper surface 2a of the semiconductor chip 2, electrical connection terminals 5a and 5b for electrical connection with the outside are provided. Bonding wires 6 a and 6 b are connected to electrical connection terminals 5 a and 5 b provided on the upper surface 2 a of the semiconductor chip 2. The ends of the bonding wires 6 a and 6 b opposite to the side where the electrical connection terminals 5 a and 5 b are connected are connected to electrode pads 7 a and 7 b provided on the upper surface 3 a of the substrate 3. In the semiconductor device 1, a resin mold layer 8 is formed on the substrate 3 so as to cover the semiconductor chip 2.

  When the semiconductor device 1 is configured, although not particularly limited, the thickness of the semiconductor chip 2 is preferably in the range of 50 to 150 μm, and the thickness of the substrate 3 is in the range of 0.15 to 0.4 mm. The thickness of the adhesive layer 4 is preferably in the range of 20 to 40 μm. As a configuration example of the semiconductor device 1, a semiconductor device in which the thickness of the semiconductor chip 2 is 75 μm, the thickness of the substrate 3 is 200 μm, and the thickness of the adhesive layer 4 is 30 μm.

  Next, the manufacturing method of the semiconductor device 1 described above will be described with reference to FIGS.

  In obtaining the semiconductor device 1, first, a process of forming the adhesive layer 4 made of a light post-curing adhesive on the lower surface 2 b of the semiconductor chip 2 is performed. Thereby, the semiconductor chip 2 in which the adhesive layer 4 as the die bonding film shown in FIG. 2A is formed on the lower surface 2b can be obtained.

  When the adhesive layer 4 made of a light post-curing adhesive is formed on the lower surface 2 b of the semiconductor chip 2, for example, a die bonding film can be used as the adhesive layer 4. In this case, the semiconductor chip 2 with the adhesive layer 4 as a die bonding film can be obtained.

  The semiconductor chip 2 with the adhesive layer 4 can be configured by using, for example, a dicing die bonding tape 51 shown in FIG.

  As shown in FIG. 3, the dicing die bonding tape 51 is configured by laminating a die bonding film 4 </ b> A, a release film 53, and a dicing film 54 in this order on a release film 52. The surface of the die bonding film 4A on the side where the release film 52 is attached is the surface to which the semiconductor wafer is bonded.

  The dicing film 54 has a base material 54a and an adhesive layer 54b formed by applying an adhesive to one side of the base material 54a. In the dicing die bonding tape 51, the dicing film 54 is attached to the release film 53 from the pressure-sensitive adhesive layer 54b side.

  The die bonding film 4A is a film that is cut to form the adhesive layer 4, and is configured using a light post-curing adhesive.

  When the semiconductor chip 2 with the adhesive layer 4 is obtained, first, the release film 52 of the dicing die bonding tape 51 is peeled to expose the die bonding film 4A, and a semiconductor wafer is attached to the exposed die bonding film 4A. . Thereafter, the semiconductor wafer is diced together with the die bonding film 4A to be divided into individual semiconductor chips. The semiconductor chip 2 with the adhesive layer 4 as a die bonding film can be obtained by peeling the cut semiconductor chip 2 from the release film 53 together with the die bonding film 4A.

  The die bonding film 4A is prepared by dissolving a light post-curing adhesive in a solvent to prepare a mixed composition, and applying the mixed composition to the upper surface of the release film 52 such as hot melt coating or cast coating. It can be produced by coating by a known coating method.

  The light post-curing adhesive constituting the die bonding film 4A has tackiness before photocuring, but does not have tackiness after photocuring, and at room temperature after being irradiated with light. Those having a time (potential life) of at least 1 minute until curing is completed are preferably used. A more preferable pot life is 3 minutes or more, more preferably 5 minutes or more.

  The photo post-curing adhesive may be in the form of a sheet or a paste.

  The photo post-curing adhesive is not particularly limited as long as it can achieve the above-mentioned pot life, but contains a photopolymerizable compound, a photopolymerization initiator, an adhesive polymer and / or a curing retarder. What can be used can be preferably used.

  As the photopolymerizable compound, a photocationic polymerizable compound is preferably used.

  The photocationically polymerizable compound is not particularly limited as long as it is a compound having at least one photocationically polymerizable functional group in the molecule. For example, at least one epoxy group, oxetanyl group, hydroxyl group, vinyl ether in the molecule. And compounds having a photocationically polymerizable functional group such as a group, an episulfide group, and an ethyleneimine group. Among them, a compound having at least one epoxy group in the molecule (hereinafter, also referred to as an epoxy compound) is preferably used since photocuring property is high and photocuring efficiently proceeds even with a small amount of light. . These photocationically polymerizable compounds may be monomers, oligomers or polymers. A photocationic polymerizable compound may be used independently and may use 2 or more types together.

  The epoxy compound is not particularly limited. For example, bisphenol type epoxy resins such as bisphenol A type epoxy resin and bisphenol F type epoxy resin, novolak type epoxy resins such as phenol novolac type epoxy resin and cresol novolac type epoxy resin, fat Group epoxy resin, alicyclic epoxy resin, heterocyclic epoxy resin, polyfunctional epoxy resin, biphenyl type epoxy resin, glycidyl ether type epoxy resin, glycidyl ester type epoxy resin, glycidyl amine type epoxy resin, for example, hydrogenated bisphenol Alcohol type epoxy resin such as A type epoxy resin, halogenated epoxy resin such as brominated epoxy resin, rubber modified epoxy resin, urethane modified epoxy resin, epoxidized polybutadiene, epoxidized Styrene - butadiene - styrene block copolymer, epoxy group-containing polyester resin, epoxy group-containing polyurethane resins, epoxy group-containing acrylic resins. These epoxy compounds may be used alone or in combination of two or more.

  Examples of commercially available epoxy compounds include “Epicoat” series such as “Epicoat 806”, “Epicoat 828”, “Epicoat 1001”, and “Epicoat 1002” manufactured by Japan Epoxy Resin Co., Ltd., and Daicel Chemical Industries, Ltd. “Ceroxide side” series such as “Celoxide 2021” manufactured by the manufacturer is listed.

  Photo cationic polymerizable compounds other than the above epoxy compounds may be used.

  The photo-cationic polymerizable compound other than the epoxy compound is not particularly limited. For example, epoxides, cyclic ethers, vinyl ethers, vinylamines, unsaturated hydrocarbons, lactones and other cyclic esters, lactams. At least one photocationically polymerizable group such as cyclic carbonates, cyclic acetals, aldehydes, cyclic amines, cyclic sulfides, cyclosiloxanes, cyclotriphosphazenes, and other photocationically polymerizable groups and monomers The thing which has group is mentioned. Of these, cyclic ether monomers such as epoxide monomers and vinyl organic monomers are preferably used. These other photocationically polymerizable compounds may be used alone or in combination of two or more.

  As the photopolymerization initiator, a cationic photopolymerization initiator is preferably used.

Although it does not specifically limit as said photocationic polymerization initiator, An ionic photoacid generation type may be sufficient and a nonionic photoacid generation type may be sufficient. Among these, since the polymerization efficiency is high, a photocationic polymerization initiator composed of a boronate having a boronic acid as a counter anion as represented by the general formula [B (C ₆ F ₅ ) ₄ ] ⁻ is preferably used. It is done. As a commercial product of a photocationic polymerization initiator made of a boronate, a trade name “Photoinitiator 2074” manufactured by Rhodia Co., Ltd. may be mentioned.

  The cationic photopolymerization initiator of the ionic photoacid generation type is not particularly limited. For example, onium salts such as aromatic diazonium salts, aromatic halonium salts, aromatic sulfonium salts, iron-allene complexes, titanocene complexes, aryls And organometallic complexes such as silanol-aluminum complex. These cationic photopolymerization initiators may be used alone or in combination of two or more.

  Commercially available products of the above-mentioned ionic photoacid-generating photocationic polymerization initiator include trade names “ADEKA OPTMER SP150” and “ADEKA OPTMER SP170” manufactured by ADEKA, and “UVE-”, a product name manufactured by General Electronics. 1014 ", trade name" CD-1012 "manufactured by Sartomer, and trade name" RD-2074 "manufactured by Rhodia.

  When using the said light post-curing adhesive as a sheet form, it is preferable that the said light post-curing adhesive contains an adhesive polymer. By containing an adhesive polymer, it is possible to give excellent adhesiveness at room temperature and excellent sheet cohesion.

  Although it does not specifically limit as said adhesive polymer, Acrylic polymer, polyesters, polyurethanes, silicones, polyethers, polycarbonates, polyvinyl ethers, polyvinyl chlorides, polyvinyl acetates, polyisobutylenes, etc. Is mentioned. The adhesive polymer may be a copolymer including a monomer as a main component of the polymer. Among the above-mentioned adhesive polymers, it is preferable to use an acrylic polymer or polyester because the physical properties of the adhesive can be easily controlled and a sufficient pot life can be obtained.

  When using the said post-light-curing adhesive as a paste adhesive, it is preferable that the said post-photo-curable adhesive contains a curing control agent. By containing the curing control agent, sufficient pot life can be obtained. Moreover, when using the said optical post-curing adhesive as a sheet form, since sufficient pot life can be obtained by containing a hardening control agent, it is preferable.

  Although it does not specifically limit as said hardening retarder, For example, the compound which has ether bonds, such as polyalkylene oxides, such as polyethyleneglycol, polypropylene glycol, and polyoxytetramethylene glycol; Crown ether, is used suitably. In addition, an aliphatic hydroxyl group-containing compound and / or a fluorine-based compound is also preferably used.

  Among the curing retarders, crown ether is more preferably used. By using the crown ether, the pot life of the light post-curing adhesive can be made sufficiently long.

Similarly, the general formula as a photo cationic polymerization initiator _{[B (C 6 F 5)} 4] - in the case of using a compound having an anion moiety represented by, it is preferable to use a crown ether as a curing retarder.

  When polyalkylene oxide is used as the curing retarder, the terminal structure of the polyalkylene oxide is not particularly limited, and may be a hydroxyl group, a group etherified or esterified with another compound, or an epoxy group. Or a functional group such as Especially, since it reacts with the said photopolymerizable compound, the polyalkylene oxide whose terminal structure is a hydroxyl group or an epoxy group is used suitably. Furthermore, as the polyalkylene oxide, a polyalkylene oxide-added bisphenol derivative is also preferably used, and a polyalkylene oxide-added bisphenol derivative whose terminal structure is a hydroxyl group or an epoxy group is more preferably used.

  The curing retarder preferably has two or more polyethylene glycol skeletons and / or polypropylene glycol skeletons in the molecule.

  Examples of commercially available curing retarders having two or more polyethylene glycol skeletons in the molecule include “Rikaresin BEO-60E” and “Rikaresin EO-20” manufactured by Shin Nippon Chemical Co., Ltd. As a commercial item of the hardening retarder which has two or more said polypropylene glycol frame | skeletons in a molecule | numerator, the brand name "Rikaresin BPO-20E", "Rikaresin PO-20" by Shin-Nihon Rika Co., Ltd. etc. are mentioned, for example.

  The crown ether is not particularly limited, and examples thereof include 12-crown-4,15-crown-5, 18-crown-6 and the like.

  The release film 52 is used for the purpose of protecting the surface of the die bonding film 4A to which the semiconductor chip is bonded.

  The release film 52 is not particularly limited, but is a polyester film such as a polyethylene terephthalate film, a polytetrafluoroethylene film, a polyethylene film, a polypropylene film, a polymethylpentene film, a polyolefin film such as a polyvinyl acetate film, a polychlorinated film. Examples of the plastic film such as a vinyl film or a polyimide film that have been subjected to mold release treatment with silicon or the like. Especially, since it is excellent in smoothness, thickness accuracy, etc., synthetic resin films, such as a polyethylene terephthalate film, are used suitably.

  The release film 53 is used to improve the pickup property of the semiconductor chip 2 with the adhesive layer 4 after dicing.

  The release film 53 is not particularly limited, but is a polyester film such as a polyethylene terephthalate film, a polytetrafluoroethylene film, a polyethylene film, a polypropylene film, a polymethylpentene film, a polyolefin film such as a polyvinyl acetate film, or polyvinyl chloride. Examples thereof include plastic films such as films and polyimide films, LDPE films, LDPE + LL films, LDPE + HDPE films, LDPE + HDPE + LL films, and LLDPE films.

  The dicing film 54 is used to increase the expandability after dicing, or to increase the pickup performance of the semiconductor chip 2 with the adhesive layer 4. The dicing film 54 has a base material 54a and an adhesive layer 54b formed by applying an adhesive to one side of the base material 54a as described above.

  The substrate 54a is not particularly limited, but is a polyester film such as a polyethylene terephthalate film, a polytetrafluoroethylene film, a polyethylene film, a polypropylene film, a polymethylpentene film, a polyolefin film such as a polyvinyl acetate film, or polyvinyl chloride. Examples thereof include plastic films such as films and polyimide films. Especially, since it is excellent in expandability and environmental impact is small, a polyolefin-type film is used suitably.

  Although the said adhesive layer 54b is not specifically limited, It is comprised using adhesives, such as an acrylic type, a special synthetic rubber type | system | group, a synthetic resin type | system | group, and a rubber type. Among these, acrylic pressure-sensitive adhesives are preferably used because they are excellent in removability and cost.

  After obtaining the semiconductor chip 2 with the adhesive layer 4 made of the light post-curing adhesive as described above, the step of irradiating the adhesive layer 4 with light to advance the curing of the adhesive layer 4 is performed.

  The wavelength of the light applied to the adhesive layer 4 is not particularly limited as long as the curing of the adhesive layer proceeds. For example, the photo-curable adhesive is a photopolymerizable compound and a photopolymerization initiator. And a curing retarder are appropriately selected depending on the sensitivity wavelength of the photopolymerization initiator. The amount of light irradiation is not particularly limited, but is appropriately selected depending on the type of the photopolymerization initiator and the thickness of the adhesive layer 4.

  Although it does not specifically limit as an irradiation light source which irradiates the light of the said wavelength and irradiation amount, For example, a fluorescent lamp, a high pressure mercury lamp, a xenon lamp etc. are mentioned. Further, the light may be directly applied to the adhesive layer 4, or a light beam may be guided to the adhesive layer 4 using a quartz fiber, a reflecting mirror, or the like.

  Since the adhesive layer 4 is configured using a light post-curing pressure-sensitive adhesive that gradually cures when irradiated with light, the adhesive layer 4 is more than when an adhesive that cures by heating is used. Curing shrinkage can be suppressed. Furthermore, since the adhesive layer 4 can be cured by irradiating light, it is not necessary to heat the semiconductor chip with the adhesive layer 4, and thermal degradation of the semiconductor chip can be prevented.

  Next, as shown in FIG. 2B, a step of laminating the semiconductor chip 2 on the upper surface 3a of the substrate 3 through the adhesive layer 4 is performed. That is, the semiconductor chip 2 is laminated on the upper surface of the substrate 3 from the adhesive layer 4 side. This lamination process is performed within the pot life of the adhesive layer 4. Here, the substrate 3 is used as the support member, but the semiconductor chip 2 may be laminated on the upper surface of the semiconductor chip via the adhesive layer 4 using a semiconductor chip instead of the substrate 3.

  It is preferable that the usable time of the adhesive layer 4, that is, the time from when the light is irradiated until the adhesiveness of the adhesive layer 4 decreases and the bonding cannot be performed is 1 minute or more. More preferably, it is 3 minutes or more, More preferably, it is 5 minutes or more. If the pot life is too short, curing proceeds immediately after irradiating the adhesive layer 4 with light, so that the storage elastic modulus of the adhesive layer 4 may become too high during wire bonding.

  Next, although not necessarily performed, there is a step of heating to a temperature of 50 to 100 ° C. between the step of laminating the semiconductor chip 2 on the upper surface 3 a of the substrate 3 and the step of connecting a bonding wire to be described later. Preferably, it is done.

  When the step of heating to a temperature of 50 to 100 ° C. is performed, a desired gel fraction can be achieved in a short time, and the tact time can be shortened. Further, when a large number of semiconductor chips are stacked as will be described later, it is particularly effective to shorten the tact time by the heating step.

  Next, as shown in FIG. 2C, the adhesive layer 4 is provided on the upper surface 2a of the semiconductor chip 2 when the adhesive layer 4 is cured so that the gel fraction of the adhesive layer 4 is 20% or more. A step of connecting the bonding wires 6a and 6b to the electrical connection terminals 5a and 5b is performed. That is, the gel fraction of the adhesive layer 4 at the time of bonding wire connection is 20% or more. The gel fraction is not particularly limited as long as it is 20% or more, but the upper limit is 100%.

  If the gel fraction of the adhesive layer 4 is less than 20%, the semiconductor chip 2 may not be sufficiently bonded to the substrate 3, and the semiconductor chip 2 is displaced when the bonding wires 6a and 6b are connected. There is.

  It is preferable that the storage elastic modulus at the temperature at the time of bonding wire connection of the adhesive layer 4 is 1000 KPa or less. When the above storage elastic modulus exceeds 1000 KPa, curing may proceed excessively and the adhesive layer 4 may be cured and contracted, which causes warpage of the semiconductor chip 2 and makes it difficult to connect the bonding wires 6a and 6b. Sometimes. Further, due to the warpage of the semiconductor chip 2, the electrical connection terminals 5a and 5b provided on the upper surface 2a of the semiconductor chip 2 may not be optically recognized, and wire bonding may not be performed.

  In this specification, the storage elastic modulus at the temperature at the time of bonding wire connection means the value of the storage elastic modulus measured at the above temperature for the adhesive layer.

  As the method of connecting the bonding wire when the curing of the adhesive layer proceeds so as to have a desired gel fraction, the adhesive layer of the semiconductor device to be manufactured using the above-mentioned photo-curing adhesive is used. An adhesive layer sample having the same thickness as that of the adhesive layer sample was irradiated with light, and the time immediately after the light irradiation on the adhesive layer sample was 0 minute 0 second, and the adhesive layer sample gel after a predetermined time had elapsed A method of measuring the fraction and connecting the bonding wires so as to satisfy the condition that the gel fraction is 20% or more at the start of wire bonding is obtained from the obtained gel fraction.

  The electrical connection terminals 5a and 5b are connected to electrode pads 7a and 7b provided on the upper surface 3a of the substrate 3 by bonding wires 6a and 6b. The electrical connection terminals 5 a and 5 b of the semiconductor chip 2 may be connected to a connected portion of another member other than the substrate 3, for example, may be connected to a semiconductor chip different from the semiconductor chip 2.

  After the step of connecting the bonding wires 6a and 6b to the electrical connection terminals 5a and 5b provided on the upper surface 2a of the semiconductor chip 2, it is preferable that the curing of the adhesive layer 4 further proceeds. Furthermore, after the curing is completed, the storage elastic modulus at 240 ° C. of the adhesive layer 4 is preferably 10,000 KPa or more. When the storage elastic modulus at 240 ° C. of the adhesive layer 4 is less than 10,000 KPa, the bonding strength between the semiconductor chip 2 and the substrate 3 is inferior, and the semiconductor chip 2 and the substrate 3 are easily peeled off.

  Although not necessarily performed after the curing of the adhesive layer 4 is completed, a step of covering the semiconductor chip 2 with the resin mold layer 8 is performed. Although it does not specifically limit as a material which comprises the resin mold layer 8, For example, the molding material which has a thermosetting epoxy type thermosetting resin and an inorganic filler as a main component is mentioned. Thus, the semiconductor device 1 shown in FIG. 1 can be obtained by covering the semiconductor chip 2 with the resin mold layer 8.

  FIG. 4 is a schematic front sectional view of a semiconductor device obtained by a method for manufacturing a semiconductor device according to another embodiment of the present invention.

  The semiconductor device 11 shown in FIG. 4 has the same configuration as the semiconductor device 1 shown in FIG. 1 except that the adhesive layer is different. In the semiconductor device 11, the semiconductor chip 2 is bonded to the upper surface 3 a of the substrate 3 through the adhesive layer 12. The same components as those of the semiconductor device 1 are denoted by the same reference numerals and description thereof is omitted.

  In the semiconductor device 1, the adhesive layer 4 made of a light post-curing adhesive is formed on the lower surface 2 b of the semiconductor chip 2, but in the semiconductor device 11, as shown in FIG. 5A, the substrate 3 as a support member. An adhesive layer 12 made of a light post-curing adhesive is formed on the upper surface 3a. As the light post-curing adhesive constituting the adhesive layer 12, those described above are used. When the adhesive layer 12 made of a light post-curing adhesive is formed on the upper surface 3a of the substrate 3, a sheet-like light post-curing adhesive may be used, and a paste-like light post-curing adhesive may be used. It may be used.

  After the adhesive layer 12 is formed on the upper surface 3 a of the substrate 3, a step of irradiating the adhesive layer 12 with light to advance the curing of the adhesive layer 12 is performed.

  Next, as shown in FIG. 5B, a step of laminating the semiconductor chip 2 on the upper surface 3 a of the substrate 3 is performed via the adhesive layer 12. That is, the semiconductor chip 2 is laminated on the upper surface of the adhesive layer 12 formed on the upper surface 3 a of the substrate 3. This lamination process is performed within the pot life of the adhesive layer 12.

  After the semiconductor chip 2 is laminated on the upper surface 3a of the substrate 3, as shown in FIG. 5C, the adhesive agent 12 is bonded so that the gel fraction of the adhesive layer 12 is 20% or more, as in the semiconductor device 1. When the curing of the layer 12 proceeds, a step of connecting the bonding wires 6a and 6b to the electrical connection terminals 5a and 5b provided on the upper surface 2a of the semiconductor chip 2 is performed.

  In addition, it is preferable that hardening of the adhesive bond layer 12 further progresses after the process of connecting the bonding wires 6a and 6b to the electrical connection terminals 5a and 5b is performed. Furthermore, after the curing is completed, the storage elastic modulus at 240 ° C. of the adhesive layer 12 is preferably 10,000 KPa or more.

  After the curing of the adhesive layer 12 is completed, the semiconductor device 11 shown in FIG. 4 can be obtained by covering the semiconductor chip 2 with the resin mold layer 8.

  Next, FIG. 6 shows a schematic front cross-sectional view of a semiconductor device obtained by a method for manufacturing a semiconductor device according to another embodiment of the present invention.

  A semiconductor device 21 shown in FIG. 6 has a structure in which a semiconductor chip 22 is further laminated on the upper surface 2a of the semiconductor chip 2 of the semiconductor device 1 shown in FIG. That is, the semiconductor chip 22 is laminated on the upper surface 2 a of the semiconductor chip 2 via the adhesive layer 23.

  In the vicinity of the outer peripheral edge of the upper surface 22a of the semiconductor chip 22, electrical connection terminals 24a and 24b for electrical connection with the outside are provided. Bonding wires 25 a and 25 b are connected to electrical connection terminals 24 a and 24 b provided on the upper surface 22 a of the semiconductor chip 22. The ends of the bonding wires 25 a and 25 b opposite to the side where the electrical connection terminals 24 a and 24 b are connected are connected to electrode pads 26 a and 26 b provided on the upper surface 3 a of the substrate 3. A resin mold layer 27 is formed on the substrate 3 so as to cover the semiconductor chip 2 and the semiconductor chip 22.

  The semiconductor device 21 can be obtained by repeating each manufacturing process of the semiconductor device 1 described above. Specifically, like the semiconductor chip 2 with the adhesive layer 4 described above, for example, the semiconductor chip 22 having the adhesive layer 23 formed on the lower surface 22b is used, and the adhesive layer 23 is irradiated with light, and the adhesive Curing of layer 23 proceeds. Next, the semiconductor chip 22 is laminated on the upper surface 2 a of the semiconductor chip 2 through the adhesive layer 23 within the pot life of the adhesive layer 23. Thereafter, when the adhesive layer 23 is cured so that the gel fraction of the adhesive layer 23 is 20% or more, bonding is performed to the electrical connection terminals 24 a and 24 b provided on the upper surface 22 a of the semiconductor chip 22. The wires 25a and 25b are connected.

  In this manner, a semiconductor device in which a plurality of semiconductor chips are stacked can be obtained by repeating each process. For example, a plurality of semiconductor chips may be further stacked on the upper surface 22 a of the semiconductor chip 22.

  Although there is no particular limitation on the size relationship between a plurality of semiconductor chips to be stacked, in the method for manufacturing a semiconductor device of the present invention, particularly when the shape of the semiconductor chips to be stacked is substantially the same, the connection reliability of the bonding wire is higher. Increased further. That is, when a semiconductor chip 32 having the same shape as the semiconductor chip 2 is used instead of the semiconductor chip 22 as shown in FIG. Reliability is further enhanced.

  In addition, since the manufacturing efficiency of the semiconductor device is increased, after connecting the bonding wires to the respective electrical connection terminals provided on the upper surfaces of the plurality of semiconductor chips, the adhesive layer between the support member and the plurality of semiconductor chips is further provided. It is preferable to cure.

  Specifically, after the bonding wires 6a and 6b are connected to the electrical connection terminals 5a and 5b provided on the upper surface 2a of the semiconductor chip 2, before the curing of the adhesive layer 4 is completed, the upper surface 2a of the semiconductor chip 2 is processed. A semiconductor chip 22 is stacked on the substrate. Furthermore, after connecting the bonding wires 25a and 25b to the electrical connection terminals 24a and 24b provided on the upper surface 2a of the semiconductor chip 22, and making this connection, the adhesive layer 4 and the adhesive layer 23 are further cured, It is preferable to complete the curing.

  EXAMPLES Hereinafter, although an Example is hung up and this invention is demonstrated in more detail, this invention is not limited only to these Examples.

(Preparation of light post-curing adhesive)
As materials constituting the die-bonding film, 80 parts by weight of polyester elitel UE3400 (molecular weight 3 million, glass transition temperature Tg-20 ° C., manufactured by Unitika) and Epicoat 828 (epoxy compound, manufactured by Japan Epoxy Resin) 20 parts by weight and 1 part by weight of Adekaoptomer SP170 (photopolymerization initiator, manufactured by ADEKA) were dissolved in 100 parts by weight of methyl ethyl ketone (MEK) to prepare a light post-curing adhesive.

  The obtained light post-curing adhesive was coated on a release film, dried by heating in an oven at 110 ° C. for 3 minutes, and a light post-curing sheet (thickness 50 μm) made of a light post-curing adhesive on the release film. ) Was configured.

  Next, using a high-pressure mercury lamp, 365 nm light was irradiated at an irradiation intensity of 40 mW for 15 seconds, and total light of 600 mW was irradiated to the light post-cured sheet. Thereafter, the gel fraction after the sheet was cured for a predetermined time at room temperature (23 ° C.), 60 ° C., 85 ° C., and 110 ° C. was measured.

  The gel fraction was measured by shaking the light post-cured sheet in ethyl acetate at room temperature (23 ° C.) for 10 hours, then lifting it over a 200 mesh wire net and drying at 100 ° C. for 1 hour. This was done by measuring the ratio. The measured insoluble content (% by weight) was defined as the gel fraction (%).

  The results are shown in FIG.

(Example 1)
In Example 1, a semiconductor device was manufactured using a dicing die bonding tape in the same manner as the semiconductor device 1 described above.

(1) Preparation of dicing die-bonding tape The obtained optical post-curing adhesive was applied on a release film and dried in an oven at 110 ° C. for 3 minutes to form a die bonding film (thickness) on the release film. 50 μm).

  Next, a release film was attached to the surface of the die bonding film opposite to the surface to which the release film was attached. After this was cut out in a circular shape, PE tape # 6318-B (manufactured by Sekisui Chemical Co., Ltd., polyethylene substrate: thickness 70 μm) on the surface of the release film opposite to the side where the die bonding film was affixed. , Rubber-based pressure-sensitive adhesive layer: thickness 10 μm) was attached from the pressure-sensitive adhesive layer side. In this way, a dicing die bonding tape in which a release film / die bonding film / release film / dicing film was laminated in this order was produced.

(2) Fabrication of Semiconductor Device The release film of the dicing die bonding tape was peeled off, and the exposed die bonding film was laminated on one surface of an 8-inch silicon wafer (thickness 80 μm) at a temperature of 60 ° C.

  Next, using a dicing apparatus DFD651 (manufactured by Disco Corporation), the silicon wafer was diced together with the die bonding film into a size of 10 mm × 10 mm at a feed rate of 50 mm / sec and divided into individual semiconductor chips. The semiconductor chip was picked together with the adhesive layer made of the die bonding film to obtain a semiconductor chip (172 wire bonding pads) having the adhesive layer formed on the lower surface.

  Next, using a high-pressure mercury lamp, the adhesive layer was irradiated with 365 nm light at an irradiation intensity of 40 mW for 15 seconds and a total 600 mW ultraviolet light, and then immediately on the top surface of the wiring board under the conditions of 5 N, 1 second, and 60 ° C. A semiconductor chip with an adhesive layer was laminated on the adhesive layer side.

  Next, the time immediately after the completion of the light irradiation is set to 0 second, and after 1 second at 110 ° C., the electrical connection terminal provided on the upper surface of the semiconductor chip and the electrode pad provided on the upper surface of the substrate are bonded to the bonding wire. To obtain a semiconductor device.

  In addition, wire bonding was performed for 172 pads on the semiconductor chip under the conditions of 250 ° C., 2.5 milliseconds, a load of 60 g, and an ultrasonic power of 0.75 W using a 25 μm Au wire.

(Example 2)
The electrical connection terminal provided on the upper surface of the semiconductor chip and the electrode pad provided on the upper surface of the substrate were connected with a bonding wire after 3 seconds had passed at 85 ° C., with the time immediately after finishing the light irradiation being 0 second. Except for this, a semiconductor device was obtained in the same manner as in Example 1.

(Example 3)
The electrical connection terminal provided on the upper surface of the semiconductor chip and the electrode pad provided on the upper surface of the substrate were connected with a bonding wire after 30 seconds had passed at 60 ° C., with the time immediately after finishing the light irradiation being 0 second. Except for this, a semiconductor device was obtained in the same manner as in Example 1.

Example 4
The bonding wire is formed by connecting the electrical connection terminal provided on the upper surface of the semiconductor chip and the electrode pad provided on the upper surface of the substrate after 60 minutes have passed at room temperature (23 ° C.), with the time immediately after finishing the light irradiation being 0 second. A semiconductor device was obtained in the same manner as in Example 1 except that the connection was made.

(Example 5)
The bonding wire is formed by connecting the electrical connection terminal provided on the upper surface of the semiconductor chip and the electrode pad provided on the upper surface of the substrate after 120 minutes have passed at room temperature (23 ° C.), with the time immediately after the light irradiation being finished being 0 seconds. A semiconductor device was obtained in the same manner as in Example 1 except that the connection was made.

(Comparative Example 1)
A bonding wire is formed by connecting an electrical connection terminal provided on the upper surface of the semiconductor chip and an electrode pad provided on the upper surface of the substrate after 10 minutes have passed at room temperature (23 ° C.), with the time immediately after finishing the light irradiation being 0 second. An attempt was made to manufacture a semiconductor device in the same manner as in Example 1 except that the connection was attempted.

  As a result, the bonding wire could not be connected.

(Comparative Example 2)
The bonding wire is formed by connecting the electrical connection terminal provided on the upper surface of the semiconductor chip and the electrode pad provided on the upper surface of the substrate after 30 minutes have passed at room temperature (23 ° C.), with the time immediately after the completion of the light irradiation being 0 second. A semiconductor device was obtained in the same manner as in Example 1 except that the connection was made.

(Evaluation of semiconductor devices)
In the obtained semiconductor device, the connection state of the bonding wire to the electrical connection terminal provided on the upper surface of the semiconductor chip was evaluated. The case where the connection state was good was marked as “◯”.

  Furthermore, in the obtained semiconductor device, it was evaluated whether or not the semiconductor chip was displaced. The case where there was no misalignment of the semiconductor chip was marked “◯”.

  The results are shown in Table 1 below.

1 is a schematic front sectional view showing a semiconductor device obtained by a method for manufacturing a semiconductor device according to an embodiment of the present invention. (A)-(c) is a schematic front sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention, (a) is the die-bonding film used for manufacture of a semiconductor device FIG. 2B is a diagram illustrating a semiconductor chip with an adhesive layer as a layer, and FIG. 4B is a diagram illustrating a state when the semiconductor chip is stacked on the upper surface of the substrate via the adhesive layer, and FIG. The figure which shows a state when a bonding wire is connected to the electrical connection terminal provided in the upper surface of the chip | tip. 1 is a partially cutaway front cross-sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention, showing a dicing die bonding tape used for manufacturing the semiconductor device. The schematic front sectional drawing which shows the semiconductor device obtained by the manufacturing method of the semiconductor device which concerns on other embodiment of this invention. (A)-(c) is a schematic front sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on other embodiment of this invention, (a) forms an adhesive bond layer on the upper surface of a board | substrate. (B) is a diagram showing a state when a semiconductor chip is laminated on the upper surface of the substrate via an adhesive layer, and (c) is a diagram provided on the upper surface of the semiconductor chip. The figure which shows a state when connecting a bonding wire to the made electrical connection terminal. The schematic front sectional drawing which shows the semiconductor device obtained by the manufacturing method of the semiconductor device which concerns on another embodiment of this invention. The schematic front sectional drawing which shows the modification of the semiconductor device obtained by the manufacturing method of the semiconductor device which concerns on another embodiment of this invention. In the light post-curing sheet composed of the light post-curing adhesive used in Examples and Comparative Examples, the sheet was cured for a predetermined time at room temperature (23 ° C.), 60 ° C., 85 ° C., and 110 ° C. The figure which shows the result of having measured the gel fraction.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Semiconductor device 2 ... Semiconductor chip 2a ... Upper surface 2b ... Lower surface 3 ... Substrate 3a ... Upper surface 4 ... Adhesive layer 4A ... Die bonding film 5a, 5b ... Electrical connection terminal 6a, 6b ... Bonding wire 7a, 7b ... Electrode pad 8 ... resin mold layer 11 ... semiconductor device 12 ... adhesive layer 21 ... semiconductor device 22 ... semiconductor chip 22a ... upper surface 22b ... lower surface 23 ... adhesive layer 24a, 24b ... electrical connection terminals 25a, 25b ... bonding wires 26a, 26b ... electrodes Pad 27 ... Resin mold layer 31 ... Semiconductor device 32 ... Semiconductor chip 51 ... Dicing die bonding tape 52 ... Release film 53 ... Release film 54 ... Dicing film 54a ... Base material 54b ... Adhesive layer

Claims (7)

A semiconductor chip having an electrical connection terminal on its upper surface is a method for manufacturing a semiconductor device, which is bonded to the upper surface of a support member using an optical post-curing adhesive,
Forming an adhesive layer made of the light post-curing adhesive on the lower surface of the semiconductor chip or the upper surface of the support member;
Irradiating the adhesive layer with light to advance curing of the adhesive layer;
Laminating the semiconductor chip on the upper surface of the support member via the adhesive layer;
Connecting a bonding wire to the electrical connection terminal provided on the upper surface of the semiconductor chip when the adhesive layer is cured so that the gel fraction of the adhesive layer is 20% or more; A method for manufacturing a semiconductor device, comprising:   The method of claim 1, further comprising a step of heating to a temperature of 50 to 100 ° C. between the step of laminating the semiconductor chip on the upper surface of the support member and the step of connecting the bonding wires. The manufacturing method of the semiconductor device of description.   The method for manufacturing a semiconductor device according to claim 1, wherein a plurality of semiconductor chips are stacked by repeating the steps.   The adhesive layer between the support member and the plurality of semiconductor chips is further cured after connecting bonding wires to the respective electrical connection terminals provided on the upper surfaces of the plurality of semiconductor chips. Item 4. A method for manufacturing a semiconductor device according to Item 3.   The method for manufacturing a semiconductor device according to claim 1, wherein a substrate or a semiconductor chip is used as the support member.   The step of forming an adhesive layer made of the photo post-curing adhesive forms the adhesive layer made of the photo post-curing adhesive on the lower surface of the semiconductor wafer, and then dicing the semiconductor wafer together with the adhesive layer The semiconductor device according to claim 1, wherein the semiconductor device is divided into individual semiconductor chips, and an adhesive layer made of a light post-curing adhesive is formed on the lower surface of the semiconductor chip. Production method.   7. The adhesive according to claim 1, wherein an adhesive containing a photopolymerizable compound, a photopolymerization initiator, and a curing retarder is used as the post-photocurable adhesive. A method for manufacturing a semiconductor device.

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