JP2008103387A - Semiconductor device - Google Patents

Abstract

An interlayer insulating film made of an organic insulating material can be omitted by using a semi-insulating semiconductor substrate, and the size and height can be reduced, wiring capacity is low, moisture resistance is high, and the entire electrode structure is reduced. Provided is a novel semiconductor device capable of obtaining sufficient bonding strength of external connection bumps without increasing the size.
A via hole is formed in a semi-insulating semiconductor substrate having a circuit portion formed on the surface so as to penetrate from the back surface side to the surface side, and the back surface of the via hole is formed on the back surface of the semi-insulating semiconductor substrate. A back surface wiring 9 extending from the side end portion is formed, and external connection bumps 10 electrically connected to the back surface wiring 9 are provided. An interlayer insulating film made of an organic insulating material is omitted, and the external connection bumps 10 are formed on the back surface of the substrate. A semiconductor device 1a formed on the side is provided.
[Selection] Figure 1

Description

  The present invention relates to a semiconductor device in which a circuit unit such as a monolithic microwave integrated circuit (MMIC), which is a microwave circuit, is formed on the surface side of a semiconductor substrate, and is specifically represented by a gallium arsenide (also called gallium arsenide) GaAs substrate. The present invention relates to improvement of an electrode structure by using a semi-insulating semiconductor substrate.

  2. Description of the Related Art Conventionally, in the field of semiconductor devices in which circuit portions of various integrated circuits such as the above MMIC are formed on the surface side of a semiconductor substrate, CSP (Chip Size Package) is manufactured for the purpose of reducing the size and height of the device. One wafer level chip size package called WLCSP is being adopted.

  In manufacturing the WLCSP semiconductor device, after the circuit portion is formed on the surface side of the semiconductor substrate in a wafer state, so-called rewiring and resin sealing are performed in the wafer state in a wafer process before chip separation. Is done. In addition, external connection terminals used for flip-chip connection with an external circuit are generally formed by bumps (BUMP), which are also called protruding electrodes of solder balls (see, for example, Patent Document 1).

  In addition, it is known that the adoption of the WLCSP structure eliminates the need for individual resin sealing (packaging) after chip separation, and can realize downsizing, low profile, and low cost of the semiconductor device. Yes.

  In addition, in Patent Document 1, specifically, the circuit portion is formed on the semiconductor substrate surface side in a wafer state and rewiring is performed, and then the surface side of the semiconductor substrate is coated with a sealing resin, Thereafter, the encapsulating resin is shaved to expose the upper surface of the wiring, bumps are formed on the exposed surface with solder balls, etc., and then the wafer is cut to obtain a CSP provided with external connection bumps on the substrate surface side. It is described that the semiconductor device of the above is obtained.

Further, as a similar semiconductor device, a through hole penetrating from the back surface side to the front surface side is formed in the semiconductor substrate, and metal plating is applied to the through hole to form a via hole (also referred to as a conductor through hole). Connect the end of the via hole on the substrate surface side to the electrode pad of the circuit portion on the substrate surface side, and further etch the back side of the semiconductor substrate to expose the plating metal at the end of the back side of the substrate of the via hole. There has also been proposed a semiconductor device in which a bump for external connection is formed on the back side of a substrate with a metal (see, for example, Patent Document 2).
JP 2000-260910 A (abstract, paragraphs [0014]-[0020], FIG. 2, etc.) Japanese Unexamined Patent Publication No. 2001-210667 (abstract, paragraphs [0009]-[0014], FIGS. 1 to 3 etc.)

(1) Reduction of wiring capacity Since the semiconductor device described in Patent Document 1 uses a general semiconductor substrate such as a silicon-based substrate that does not provide sufficient insulation, the semiconductor substrate and its surface side and It is necessary to interpose an interlayer insulating film made of an organic insulating material between the wiring on the back side and the like, and at that time, it is desired to reduce the wiring capacity of the device as much as possible.

  In order to reduce the wiring capacitance, it is conceivable to increase the thickness of the interlayer insulating film or reduce the dielectric constant (Low-k). However, priority is given to the demand for downsizing and low-profile semiconductor devices. In this case, it is difficult to increase the thickness of the interlayer insulating film. In addition, lowering the dielectric constant of the interlayer insulating film causes a decrease in mechanical strength and a decrease in thermal conductivity, leading to a decrease in chip protection performance, which is one of the functions of the interlayer insulating film. Actually, it is difficult to reduce the dielectric constant of the interlayer insulating film.

  Therefore, in this type of conventional semiconductor device, there is no choice but to interpose a certain amount of thick interlayer insulating film of organic insulating material between the semiconductor substrate and the wiring, etc., and the thickness is reduced in size and height. In addition to being one of the obstruction factors, the wiring capacity of the semiconductor device cannot be reduced. This is a very important problem for a semiconductor device having a high-frequency circuit unit such as the above-described MMIC semiconductor device in order to prevent signal delay and the like.

(2) Polishing / planarization treatment Generally, an organic insulating material such as PI (polyimide) or BCB (benzocyclobutene) is used for the sealing resin or the interlayer insulating film.

  In this case, it is well known that it is technically difficult to form a uniform thick film in the coating process of these organic insulating materials, and it is not possible to form a sealing resin or an interlayer insulating film in a uniform thick film. Not easy.

  In particular, if the thickness of the interlayer insulating film is not uniform, the non-uniform thickness causes defects in processes such as rewiring and formation of bump electrodes after the interlayer insulating film is formed. As a result, the completed semiconductor device (chip) not only causes variations in thickness, but also deteriorates quality due to loss of stability of characteristics.

  Therefore, when forming a WLCSP semiconductor device, a planarization process after rewiring is indispensable. In this planarization process, a re-grinding and planarization technique called chemical mechanical polishing (CMP) is used. The surface of the semiconductor substrate after wiring is polished and flattened.

  In this case, since it is necessary to use expensive equipment and a large amount of chemicals for the CMP process, there is a problem that a WLCSP semiconductor device cannot be formed at low cost.

(3) Moisture resistance When an interlayer insulating film made of an organic insulating material is formed, the moisture resistance of the organic insulating material is not high, the interlayer insulating film absorbs moisture, and the insulating characteristics of the semiconductor device are likely to deteriorate, and the reliability and the like decrease. There is also a problem.

(4) Bonding strength and increase in size of bumps In the case of the semiconductor devices described in Patent Documents 1 and 2, in order to increase the bonding strength of the bumps, the exposed area of the wiring is increased (Patent Document 1), or the via holes themselves are formed in diameter. It is necessary to make the plated metal larger (Patent Document 2). Therefore, the wiring pattern on the substrate surface becomes large, the via hole and the electrode pad on the substrate surface to which the end on the substrate surface side is connected become large, and the entire electrode structure becomes large, resulting in a problem that the semiconductor device becomes large. is there.

(5) Heat dissipation In the case of the semiconductor device described in Patent Document 2, the bump on the back surface side of the semiconductor substrate is located immediately below the electrode pad drawn out from the circuit portion on the substrate surface side, and is connected to the electrode pad through a via hole. Connected. In this case, the bump arrangement on the back surface side of the semiconductor substrate is limited depending on the circuit portion and wiring arrangement on the front surface side of the substrate, and the heat radiation effect immediately below or near the heat source such as the active element of the circuit portion is limited. It is difficult to conveniently form bumps by selecting a high position.

  For this reason, it is not easy to reduce the size of the semiconductor device by devising the arrangement of the bumps, etc. Of course, in the case of a semiconductor device that requires heat dissipation, such as a power amplification MMIC, Need to have some heat dissipation means separately.

  Also in the case of the semiconductor device of Patent Document 1, since the electrode arrangement on the substrate surface side is limited by the arrangement of the circuit portion on the same substrate surface side, it is necessary to provide some heat radiation means separately from the external connection bumps. .

(6) Realization of a microstrip line In the case of a semiconductor device having a high-frequency circuit unit such as the above MMIC, in order to eliminate the influence of noise as much as possible by forming it at a low impedance, the wiring may be formed by a microstrip line. Although it is desirable, in the conventional semiconductor device of this type of flip chip connection including the semiconductor devices of Patent Documents 1 and 2, as described above, the bump arrangement (electrode arrangement) of the semiconductor substrate is limited. Therefore, it is difficult to realize a microstrip line wiring by forming a ground electrode on the back side of the semiconductor substrate so as to face the wiring on the front side of the semiconductor substrate.

  The present invention eliminates an interlayer insulating film made of an organic insulating material by using a semi-insulating semiconductor substrate, eliminates the need for CSP polishing / planarization processing, can reduce the size and height, and reduces wiring capacitance. An object of the present invention is to provide a novel semiconductor device of WLCSP that has high moisture resistance and can obtain sufficient bonding strength of external connection bumps without increasing the size of the entire electrode structure (first object). . Another object of the present invention is to form a heat radiation means for the circuit portion on the front surface side of the substrate by bumps on the back surface side of the substrate (second purpose). Another object is to realize microstrip line wiring that is difficult to form with conventional devices (third object).

  In order to achieve the first object described above, a semiconductor device of the present invention includes a semi-insulating semiconductor substrate having a circuit portion formed on the surface thereof, and penetrates the semi-insulating semiconductor substrate from the back side to the surface side. A via hole electrically connected to the circuit portion, and a back surface formed on the back surface of the semi-insulating semiconductor substrate so as to extend from the substrate back surface side end portion of the via hole. The wiring board includes a wiring and an external connection bump formed as a back wiring on the back surface of the semi-insulating semiconductor substrate and electrically connected to the back wiring (Claim 1).

  In order to achieve the second object, it is preferable that at least one of the external connection bumps is also used as a heat dissipation means of the circuit portion. In this case, it is preferable that the via hole to which the external connection bump that is also used as the heat radiating means is connected is located in the vicinity of the heat source of the circuit unit. The external connection bump is practically a solder bump.

  In addition, in order to achieve the second object, a heat dissipation bump may be further formed on the back surface of the semi-insulating semiconductor substrate. In that case, it is preferable that the heat radiation-exclusive bump is thermally connected to the circuit portion through any one of the via holes. The external connection bump and the heat dissipation bump are practically and more preferably solder bumps.

  In order to achieve the third object, in the semiconductor device according to any one of claims 1 to 7, a ground electrode is formed on the back surface of the semi-insulating semiconductor substrate (claim 8).

  Furthermore, in the semiconductor device according to any one of claims 1 to 8, it is practical and preferable that the circuit section is a microwave circuit (claim 9).

  According to the first aspect of the present invention, since a semi-insulating semiconductor substrate typified by a GaAs substrate is used, the insulating property of the substrate is remarkably improved as compared with the prior art.

  For this reason, an interlayer insulating film made of an organic insulating material, which has been essential in the past, is no longer necessary, the wiring capacity is not increased due to the intervening interlayer insulating film, and the wiring capacity becomes smaller than in the past.

  Since the wiring capacitance is small, a rewiring structure can be determined without worrying about signal delay due to the wiring capacitance, and a semiconductor having a high-frequency circuit unit in which the wiring structure such as the above-mentioned MMIC is a problem There is a remarkable effect in the device.

  In addition, since it is not necessary to form an interlayer insulating film made of an organic insulating material, it is possible to further reduce the size and height of the film and to increase the thickness of the interlayer insulating film. This eliminates the CMP polishing / planarization process that was required in the past, eliminates the need for special technology development for low dielectric constant (Low-k), and reduces manufacturing equipment costs. It can be formed at a lower cost than before.

  In addition, it is possible to provide a semiconductor device having high moisture resistance without causing a decrease in moisture resistance, which becomes a problem when an interlayer insulating film of an organic insulating material is formed.

  In addition, the flip chip connection terminal part can be formed in a desired arrangement on the back side of the substrate without any restrictions on the circuit part or wiring on the front side of the substrate by external connection bumps on the back side of the semi-insulating semiconductor substrate. The external connection bump is not directly connected to the via hole penetrating from the back surface side to the front surface side of the semi-insulating semiconductor substrate, but electrically connected to the back surface wiring extending from the back surface side end portion of the substrate. Therefore, it is possible to increase the bonding strength of the external connection bump without increasing the diameter of the via hole or increasing the electrode pad of the circuit portion on the substrate surface.

  For this reason, the degree of freedom of the arrangement (pin arrangement) of the bumps for external connection is increased, and the arrangement and the like can be devised to further reduce the size (reduction of the chip size). In addition, since the bonding strength of the external connection bumps is independent of the diameter of the via hole, the diameter of the via hole can be freely set, the via hole can be made small in diameter, the entire electrode structure can be miniaturized, and the apparatus can be further miniaturized. It is possible to sufficiently increase the bonding strength of the external connection bumps.

  Therefore, a semi-insulating semiconductor substrate is used, and an interlayer insulating film made of an organic insulating material is omitted, CSP polishing / planarization processing is not required, and the size and height can be reduced. It is possible to provide a novel semiconductor device of WLCSP that has high performance and can obtain sufficient bonding strength of the external connection bump without increasing the size of the entire electrode structure.

  According to the second aspect of the present invention, a part of the external connection bump on the back surface of the substrate is also used as a heat dissipation means for the circuit portion on the front surface side of the substrate, so that a circuit portion that requires heat dissipation such as an MMIC for power amplification is used. The heat radiation can be provided with an excellent heat radiation function with a very small and inexpensive configuration without separately providing a dedicated heat radiation means.

  According to the third aspect of the present invention, since the via hole of the external connection bump that is also used as a heat dissipation means is located in the vicinity of the heat generation source of the circuit unit, the heat of the heat generation source is surely led to the external connection bump. Heat can be radiated quickly, and the heat radiating function is further improved.

  According to the fourth aspect of the present invention, the external connection bumps are formed of solder bumps that are frequently used as bump electrodes, and are therefore extremely practical.

  Next, according to the invention of claim 5, since the heat-insulating bumps are further provided on the back surface of the semi-insulating semiconductor substrate, a heat-dissipating means is additionally provided for a circuit portion that does not require external connection of the semi-insulating semiconductor substrate. Therefore, it is possible to effectively dissipate heat by using heat-dedicated bumps formed on the back surface of the substrate with bump electrodes similar to the external connection bumps.

  According to the invention of claim 6, since the via hole of the heat radiation dedicated bump is located in the vicinity of the heat generation source of the circuit portion, the heat of the heat generation source is reliably led to the heat radiation dedicated bump as in the case of the invention of claim 3. Heat can be quickly dissipated, and the heat dissipating function is further improved.

  Further, according to the invention of claim 7, since the heat dissipation bumps are also formed of solder bumps frequently used as pump electrodes, they are extremely practical and preferable.

  Next, according to the invention of claim 8, the ground electrode (earth electrode) is formed on the back surface of the semi-insulating semiconductor substrate. At this time, since the ground electrode is not restricted by the arrangement of the circuit portion and the wiring on the front surface side of the semi-insulating semiconductor substrate, it can be formed on the back surface of the circuit portion and the wiring portion.

  For this reason, a microstrip line wiring that cannot be conventionally formed in a WLCSP semiconductor device can be realized by the ground electrode on the back surface of the semi-insulating semiconductor substrate and the wiring on the front surface thereof.

  Next, according to the invention of claim 9, since the circuit portion on the surface side of the semi-insulating semiconductor substrate is a microwave circuit such as MMIC, in the semiconductor device provided with the microwave circuit such as MMIC, The effect of invention of claim | item 1-8 can be show | played.

  Next, in order to describe the present invention in more detail, the embodiment will be described in detail with reference to FIGS. In each figure, the hatching of the substrate is omitted.

(First embodiment)
A first embodiment corresponding to claims 1 and 9 will be described with reference to FIG.

  FIG. 1 is a cross-sectional view of a semiconductor device 1a in which an MMIC as a microwave circuit is formed on the substrate surface side.

  The semiconductor device 1a has active elements (FET, BT (bipolar transistor), etc.) and passive elements (coils, capacitors, resistors, etc.) on the surface side (upper surface in FIG. 1) of a semi-insulating semiconductor substrate 2 such as GaAs. MMIC circuit portion 3 having a combined structure, wiring (surface wiring) 4 formed of a conductive thin film such as gold (Au), and insulating film such as silicon nitride (SiNx) covering circuit portion 3 and wiring 4 5 and a protective film 6 of PI or BCB as a sealing resin thereabove are formed in layers.

  Further, in the semi-insulating semiconductor substrate 2, through holes having a circular cross section of the via hole 7 are formed from the back surface side to the front surface side at one or a plurality of locations by a known dry etching method or the like. At that time, the via hole 7 is used to electrically connect a later-described external connection bump 10 on the back surface side of the substrate to the circuit portion 3 on the front surface side of the substrate, so that the through hole is formed at a position in contact with the intended wiring 4. .

  Then, after the through hole is formed, the back side of the semi-insulating semiconductor substrate 2 is metallized entirely with a metal material such as gold (Au) by a known electrolytic plating method or the like. By this metallization process, the inner wall surface (upper surface and peripheral surface) of the through hole is metal-plated to form a via hole 7, and the upper surface is bonded to the wiring 4.

  Note that the via hole 7 actually has a slightly larger diameter on the back surface side of the substrate than on the front surface side of the substrate, depending on the etching time of the through hole. Reference numeral 8 in the figure denotes an inner wall conductor of the via hole 7 formed by the metal plating, and the upper surface of the inner wall conductor 8 is electrically connected to the circuit portion 3 through the wiring 4.

  Next, the metallized layer formed on the entire back surface of the semi-insulating semiconductor substrate 2 by the above-described entire metallization process is patterned by a well-known photolithographic technique, and then subjected to wiring by an etching process. The back surface wiring 9 extending from the side end portion is processed.

  The back surface wiring 9 is electrically connected to the circuit unit 3 via the via hole 7 and the wiring 4 on the substrate surface side, and forms an electrode pad region at the bump position on the back surface of the semi-insulating semiconductor substrate 2.

  Then, external connection bumps 10 are formed on the back surface (lower surface) of the electrode pad region to form the semiconductor device 1a.

  Actually, as in the case of forming a well-known bump electrode, an adhesive layer (not shown) made of titanium (Ti) or the like by sputtering is formed on the back surface of the back surface wiring 9 in the electrode pad region, and copper ( An anti-diffusion layer (not shown) such as Cu) or nickel (Ni) is sequentially formed in layers, and then the external connection bumps 10 are formed by, for example, a plating method or a printing method with the two layers interposed therebetween. .

  The MMIC semiconductor device 1a having the WLCSP structure formed in this manner has a high insulating property of the semi-insulating semiconductor substrate 2, and an interlayer of an organic insulating material is provided between the semi-insulating semiconductor substrate 2 and the wirings 4, 9 and the like. There is no need to form an insulating film. Therefore, rewiring and bump formation can be performed without forming an interlayer insulating film, which is essential in conventional devices.

  In this case, since an interlayer insulating film made of an organic insulating material is unnecessary, there is no increase in wiring capacity due to the interposition of the interlayer insulating film, and the wiring capacity decreases and becomes smaller than in the prior art.

  Since the wiring capacitance is small, the rewiring structure can be determined without worrying about signal delay due to the wiring capacitance, and optimal wiring of the MMIC semiconductor device 1a can be performed.

  Further, since it is not necessary to form an interlayer insulating film made of an organic insulating material, the semiconductor device 1a can be further reduced in size and height, and the problem of increasing the thickness of the interlayer insulating film and the low dielectric constant can be achieved. The problem of rate increase does not occur, and there is no problem such as non-uniform film thickness caused by the thickening of the interlayer insulating film. Special technical development for permittivity is not required, and expensive CSP equipment is not required. Therefore, manufacturing is easy and cost can be reduced.

  In addition, there is no decrease in moisture resistance, which becomes a problem when an interlayer insulating film made of an organic insulating material is formed, and the moisture resistance of the semiconductor device 1a is high.

  Further, the flip-chip connection terminal portions are formed in a desired arrangement on the back surface side of the substrate by the external connection bumps 10 on the back surface side of the semi-insulating semiconductor substrate 1a without restriction of the circuit portion 3 or wiring 4 on the front surface side of the substrate. In addition, the external connection bump 10 is not directly connected to the rear surface side end portion of the via hole 7 penetrating from the rear surface side of the semi-insulating semiconductor substrate 2 to the front surface side, but extends from the rear surface side end portion thereof. Since it is electrically connected to the exposed back surface wiring 9 and its substrate bonding strength depends on the bonding area with the back surface wiring 9, etc., the via hole 7 is increased in diameter, or the electrode of the circuit portion 3 on the substrate surface side above it. The bonding strength of the external connection bump 10 can be increased without increasing the size of the pad or the like.

  Therefore, there is an advantage that the electrode arrangement of the external connection bump 10 can be devised to further reduce the size (chip size reduction) and the degree of freedom of electrode arrangement (pin arrangement) can be increased. In addition, since the diameter of the via hole 7 can be set freely, the via hole 7 is reduced in diameter to reduce the size of the entire electrode structure, and the bonding strength of the external connection bump 10 can be sufficiently reduced while further reducing the size of the semiconductor device 1a. Can be large.

  As described above, the semiconductor device 1a of the present embodiment uses the semi-insulating semiconductor substrate 2, omits the interlayer insulating film of the organic insulating material, does not require CSP polishing / planarization processing, and is reduced in size and height. Therefore, it is possible to obtain a sufficient bonding strength of the external connection bump 10 without increasing the size of the entire electrode structure.

(Second Embodiment)
A second embodiment corresponding to claims 2 and 3 will be described with reference to FIG.

  FIG. 2 is a cross-sectional view of a semiconductor device 1b in which an MMIC as a microwave circuit is formed on the substrate surface side, and the same reference numerals as those in FIG. 1 denote the same or corresponding components.

  The semiconductor device 1b is formed by the same process as the semiconductor device 1a. The MMIC of the semiconductor device 1b is for power amplification, for example, and three MMCICs connected by the wiring 4 on the surface side of the semi-insulating semiconductor substrate 2 are used. The circuit units 31, 32, and 33 include active element heat sources such as power amplification FETs and BT, for example.

  The left and right wirings 4 of the circuit units 31 to 33 are connected to the lower surface of the substrate surface side end of the via hole 7, and the back surface wiring 9 extending from the substrate back side end of the via hole 7. On the back surface, external connection bumps 10a and 10b similar to the external connection bump 10 of FIG. 1 are formed.

  At this time, the external connection bumps 10a at the left and right end portions in FIG. 2 are used only as connection terminals to the external circuit similarly to the external connection bumps 10, but the two external connection bumps 10b near the center are It also serves as a heat dissipating means for the circuit units 31 to 33.

  That is, the two external connection bumps 10b are directly under the circuit portions 31 and 33, and the via holes 7 to which both the external connection bumps 10b are connected include the circuit portions 31 and 32, the circuit portion 32, and the like. 33 between the heat sources of the circuit units 31 to 33.

  Both the external connection bumps 10b are in direct contact with the ambient air around the semiconductor device 1b together with the back surface wirings 9 thereof.

  Therefore, the heat of the heat source of the circuit units 31 to 33 is transferred to the outside through the shortest heat dissipation path of the metal material having high thermal conductivity that passes through the wiring 4, the via hole 7, and the back surface wiring 9 and reaches both external connection bumps 10 b. The external connection bump 10b is radiated and acts as a heat radiating means for effectively cooling the circuit portions 31 to 33.

  Then, the heat radiation of the circuit portions 31 to 33 can be realized by using the external connection bump 10b also as the heat radiation means. In this case, in addition to the effect of the first embodiment, a dedicated heat radiation means is separately provided. Since the heat dissipation of the MMIC can be realized without providing it, the present invention has a remarkable effect by adapting to the MMIC semiconductor device 1b for electric power that generates a large amount of heat, which requires a particularly aggressive heat dissipation means.

(Third embodiment)
A third embodiment corresponding to claim 5 will be described with reference to FIG.

  FIG. 3 is a cross-sectional view of a semiconductor device 1c in which an MMIC as a microwave circuit is formed on the substrate surface side. The same reference numerals as those in FIGS. 1 and 2 denote the same or corresponding components.

  The semiconductor device 1c is also formed by a process similar to that of the semiconductor devices 1a and 1b of FIGS. 1 and 2, but the semiconductor device 1c is different from the semiconductor devices 1a and 1b and is for power amplification on the surface side of the semi-insulating semiconductor substrate 2. 2 are not formed under the wiring 4 between the circuit portions 34 to 36, because the three circuit portions 34, 35, and 36 of the MMIC are circuit portions that do not require external connection terminals.

  However, the circuit units 34 to 36 also have a heat generation source in the same manner as the circuit units 31 to 33 shown in FIG.

  Therefore, in the semiconductor device 1c, the metallized layer formed on the entire back surface of the semi-insulating semiconductor substrate 2 is patterned and then wired by an etching process to be processed into a back surface wiring 9 extending from the substrate back side end of the via hole 7. At this time, the electrode bonding regions 11 having appropriate sizes are formed on the back surface of the substrate immediately below the circuit portions 34 and 36 by the etching process and wiring.

  Further, when forming the external connection bumps 10a at the left and right end portions, for example, the external connection bumps 10a and the back surface of the electrode bonding region 11 immediately below the circuit portions 34 and 36 are formed in the same manner as the formation thereof. A bump 12a for heat dissipation having the same shape is formed.

  In this case, the semiconductor device 1c is formed by providing not only the external connection bumps 10a but also the heat dissipation bumps 12a on the back side of the semi-insulating semiconductor substrate 2.

  Then, the heat generated in the circuit portions 34 to 36 is radiated from the heat radiation dedicated bumps 12 through the semi-insulating semiconductor substrate 2.

  Therefore, also in this embodiment, in addition to the effect of the first embodiment, the heat radiation of the MMIC can be performed from the back surface of the substrate.

(Fourth embodiment)
A fourth embodiment corresponding to claim 6 will be described with reference to FIG.

  FIG. 4 is a cross-sectional view of a semiconductor device 1d in which an MMIC as a microwave circuit is formed on the substrate surface side, and the same reference numerals as those in FIGS. 1 to 3 denote the same or corresponding components.

  The semiconductor device 1d is also formed by the same process as the semiconductor devices 1a to 1c. However, the circuit portions 37, 38, and 39 corresponding to the circuit portions 34 to 36 in FIG. This is a circuit part of a large power MMIC.

  Therefore, the via hole 7 is also formed at the position of the wiring 4 between the circuit portions 37 to 39.

  Further, when the metallized layer formed on the entire back surface of the semi-insulating semiconductor substrate 2 is processed into the back surface wiring 9 extending from the substrate back surface side end portion of the via hole 7 at the left and right end portions, between the circuit portions 37 to 39. An electrode bonding area 11 is formed at the end of the via hole 7 at the position of the wiring 4 on the back side of the substrate.

  Thereafter, on the back surface (lower surface) of the electrode bonding region 11, the heat radiation dedicated bump 12 b is formed in the same manner as the external connection bump 10 a.

  Therefore, in the case of this embodiment, the heat of the heat source of the circuit portions 37 to 39 passes through the heat radiation path of the metal material having a high thermal conductivity that passes through the wiring 4, the via hole 7, and the electrode bonding region 11 and reaches the heat radiation dedicated bump 12 b. The heat is effectively radiated to the outside, and the heat radiation effect is improved as compared with the third embodiment, which is very effective in adapting to the MMIC semiconductor device 1d for electric power that generates a large amount of heat.

(Fifth embodiment)
A fifth embodiment corresponding to claim 8 will be described with reference to FIG.

  FIG. 5 is a cross-sectional view of the semiconductor device 1e in which the MMIC is formed on the substrate surface side, and the same reference numerals as those in FIGS.

  Then, in the semiconductor device 1e of this embodiment, the metallized layer formed on the entire back surface of the semi-insulating semiconductor substrate 2 is processed into a back surface wiring 9 extending from the substrate back side end of the left and right end via holes 7. At the same time, a pattern of the ground electrode (earth electrode) 13 is formed on the back side of the semi-insulating semiconductor substrate 2.

  In this case, the pattern of the ground electrode 13 can be freely arranged without being restricted by a circuit portion (not shown) on the surface side of the semi-insulating semiconductor substrate 2.

  Therefore, the ground electrode 13 is formed at a position facing the surface wiring 4 a on the surface side of the semi-insulating semiconductor substrate 2 to form the microstrip line 14.

  Therefore, the semiconductor device 1e of the present embodiment can easily realize the wiring of the microstrip line 14 suitable for the circuit wiring of the microwave band such as MMIC, which is difficult to form with the conventional WLCSP semiconductor device. It also has advantages.

(Sixth embodiment)
A sixth embodiment as another example corresponding to claim 8 will be described with reference to FIG.

  FIG. 6 is a cross-sectional view of the semiconductor device 1f in which the MMIC is formed on the substrate surface side, and the same reference numerals as those in FIG. 5 denote the same or corresponding components.

  Then, in the semiconductor device 1f of the present embodiment, in the semiconductor device 1e of FIG. 5, the heat-dissipation bumps 12c of FIG. 3 are formed on the back surface of the ground electrode 13, so that the heat radiation of the circuit portion on the front surface side can also be performed. .

  Therefore, the semiconductor device 1f of the present embodiment can easily realize the wiring of the microstrip line 14 suitable for the circuit wiring of the microwave band such as MMIC, which could not be formed by the conventional WLCSP semiconductor device. Further, similarly to the formation of the external connection bumps 10a, the heat radiation dedicated bumps 12c are formed on the back surface of the ground electrode 13, so that the heat radiation means of the circuit portion can be easily realized.

  The present invention is not limited to the above-described embodiments, and various modifications other than those described above can be made without departing from the spirit thereof. For example, for external connection of each embodiment Needless to say, the bumps 10, 10a, 10b and the heat radiation dedicated bumps 12a, 12b, 12c can be formed by well-known solder bumps (corresponding to claims 4 and 7). Then, by forming these bumps 10, 10a, 10b, 12a and 12b with solder bumps, the semiconductor devices 1a to 1f can be formed by a practical and easy method.

  Further, the circuit units 3, 31 to 39 on the surface side of the semiconductor devices 1a to 1f are not limited to a high frequency circuit such as a microwave circuit such as an MMIC, but a circuit unit for any frequency band and for any application. Of course, it may be.

  Next, the semi-insulating semiconductor substrate 2 is not limited to a GaAs substrate, and may be various semi-insulating semiconductor substrates having a high resistance value that eliminates the need for forming a conventional interlayer insulating film. There may be any shape, size, thickness and the like.

  The cross-sectional shape and size of the via hole 7, the pattern shape of the wirings 4 and 9 and the like, the shape and size of each bump 10, 10a, 10b, 12a, 12b, and 12c, and the number of them are circuit design and design conditions. It may be set appropriately based on the above. At this time, the shape and size of each bump 10, 10a, 10b, 12a, 12b, 12c may not be the same. For example, the size of the external connection bump 10a is different from that of the heat radiation dedicated bumps 12a-12c. May be.

  The present invention can be applied to various semiconductor devices using a semi-insulating semiconductor substrate.

It is sectional drawing of 1st Embodiment. It is sectional drawing of 2nd Embodiment. It is sectional drawing of 3rd Embodiment. It is sectional drawing of 4th Embodiment. It is sectional drawing of 5th Embodiment. It is sectional drawing of 6th Embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1a-1f Semiconductor device 2 Semi-insulating semiconductor substrate 3, 31-39 Circuit part 4, 4a Surface wiring 7 Via hole 9 Back surface wiring 10, 10a, 10b External connection bumps 12a, 12b, 12c Heat radiation exclusive bump 13 Ground electrode

Claims (9)

  A semi-insulating semiconductor substrate having a circuit portion formed on the front surface side, and formed on the semi-insulating semiconductor substrate so as to penetrate from the back surface side to the front surface side, and the substrate surface side end portion is electrically connected to the circuit portion. A via hole formed on the back surface of the semi-insulating semiconductor substrate so as to extend from the substrate back side end of the via hole, and a back surface wiring formed on the back surface of the semi-insulating semiconductor substrate, A semiconductor device comprising an external connection bump electrically connected to the backside wiring.   2. The semiconductor device according to claim 1, wherein at least one of the external connection bumps is also used as a heat dissipation means of the circuit portion.   3. The semiconductor device according to claim 2, wherein the via hole to which an external connection bump that is also used as the heat radiating means is connected is located in the vicinity of a heat generation source of the circuit unit.   The semiconductor device according to claim 1, wherein the external connection bump is a solder bump.   The semiconductor device according to claim 1, further comprising a heat dissipation bump formed on the back surface of the semi-insulating semiconductor substrate.   The semiconductor device according to claim 5, wherein the heat radiation-exclusive bump is thermally connected to the circuit portion through any one of the via holes.   The semiconductor device according to claim 5, wherein the external connection bump and the heat dissipation bump are solder bumps.   The semiconductor device according to claim 1, wherein a ground electrode is formed on a back surface of the semi-insulating semiconductor substrate.   The semiconductor device according to claim 1, wherein the circuit unit is a microwave circuit.

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