JP2008177398A - Organic thin film transistor and integrated circuit using the same - Google Patents

Abstract

An organic thin film transistor capable of increasing the thickness of a gate electrode without causing disconnection or the like in wiring to the gate electrode and an integrated circuit using the same are obtained.
A substrate, a gate electrode provided on the substrate, a source electrode, a drain electrode, a gate insulating film covering the gate electrode, and a gate insulating film provided between the source electrode and the drain electrode. An organic semiconductor layer having an organic semiconductor layer for forming a channel region and a signal line for applying a signal to the gate electrode, wherein a connection layer having a thickness smaller than that of the gate electrode is provided on the substrate, By forming a part of the electrode on the connection layer, the gate electrode is electrically connected to the connection layer, and the signal line is electrically connected to the connection layer. An organic thin film transistor which is electrically connected to a gate electrode.
[Selection] Figure 1

Description

  The present invention relates to an organic thin film transistor which is a field effect transistor using an organic semiconductor material and an integrated circuit using the same.

  A field effect transistor (organic thin film transistor) using an organic material for a semiconductor layer is characterized in that it can be formed at a lower temperature than a transistor using single crystal silicon, polycrystalline silicon, or the like for a semiconductor layer. Therefore, a flexible substrate etc. can be used for the organic thin-film transistor, and the application as a display, electronic paper, and a sensor which are thin, lightweight, and flexible is expected.

  Organic thin film transistors have lower electrical characteristics than transistors using polycrystalline silicon or amorphous silicon, and are required to be improved. One effective means for that is to shorten the channel length. However, in order to shorten the channel length in a planar transistor, there is a problem that an advanced microfabrication technique is required.

  As a transistor capable of shortening the channel length, a structure in which a channel region is formed using a side surface of a gate electrode has been proposed (Patent Document 1). In such a transistor structure, a source electrode is formed above the gate electrode, a drain electrode is formed on the planar portion of the substrate at both ends of the gate electrode, and the side surface of the gate electrode is used as a channel. A short channel length of about several μm corresponding to the thickness can be realized.

  In the conventional planar structure transistor, as shown in Patent Documents 2, 3, and 4 and the like, the wiring layer for applying an electric signal to the gate electrode is a contact hole in which the gate insulating film is partially removed from the upper surface of the gate electrode. And is connected to the gate electrode through this contact hole. However, in a vertical channel transistor in which a channel is formed on the side surface of the gate electrode, the thickness of the gate electrode is about 1 μm to several μm. It is necessary to wire over a step of about 1 μm to several μm, and since the thickness of the wiring layer is usually about 0.1 to 0.3 μm (1000 to 3000 mm), there is a problem that the wiring layer is disconnected. .

Further, in order to prevent the occurrence of such disconnection, if an intermediate layer is formed or an attempt is made to flatten the periphery of the electrode, there arises a problem that the number of process steps increases.
JP 2005-19446 A JP 2005-158756 A Japanese Patent Laid-Open No. 2005-72188 JP 2006-173616 A

  An object of the present invention is to apply an organic thin film transistor that can increase the thickness of a gate electrode without causing disconnection or the like in wiring to the gate electrode, and an integrated circuit using the organic thin film transistor.

  The organic thin film transistor of the present invention includes a substrate, a gate electrode provided on the substrate, a source electrode, a drain electrode, a gate insulating film covering the gate electrode, and a gate insulating film. An organic thin film transistor comprising an organic semiconductor layer for forming a channel region between electrodes and a signal line for providing a signal to the gate electrode, wherein a connection layer having a thickness smaller than that of the gate electrode is provided on the substrate A part of the gate electrode is formed on the connection layer, the gate electrode is electrically connected to the connection layer, and the signal line is electrically connected to the connection layer. It is characterized in that it is electrically connected to the gate electrode through the gate.

  In the present invention, a connection layer thinner than the gate electrode is provided on the substrate, and a part of the gate electrode is formed on the connection layer, whereby the gate electrode is electrically connected to the connection layer. The signal line is electrically connected to the connection layer, whereby the signal line is electrically connected to the gate electrode through the connection layer. Therefore, it is not necessary to form and connect the signal line directly on the gate electrode, and the thickness of the gate electrode can be increased without causing disconnection in the wiring to the gate electrode. Therefore, in the present invention, the thickness of the gate electrode can be set to 0.5 μm or more, for example, and can be set to a thickness in the range of 0.5 to 3 μm. Moreover, the thickness of a connection layer can be made into the range of 0.1-0.4 micrometer, for example.

  The present invention can be particularly preferably applied to the above-described vertical channel structure transistor because the thickness of the gate electrode can be increased without causing disconnection or the like in the wiring to the gate electrode.

  In the case of a vertical channel structure transistor, one of the source electrode and the drain electrode is formed on the upper surface of the gate electrode with a gate insulating film interposed therebetween, and the other of the source electrode and the drain electrode is connected to the gate electrode side. Can be formed on the other substrate. In this case, electrodes may be formed on both sides of the gate electrode, or electrodes may be formed only on one side.

  Alternatively, a source electrode may be provided on a substrate on one side of the gate electrode, a drain electrode may be provided on the other substrate on the other side, and a floating electrode may be provided on the upper surface of the gate electrode via a gate insulating film. . If the electrode provided on the upper surface of the gate electrode is a floating electrode, the floating electrode does not need to be wired. Therefore, even if the thickness of the gate electrode is increased, it is not necessary to provide the wiring in consideration of the step.

  In the present invention, a part of the gate electrode may be formed to cover the connection layer with a width wider than that of the connection layer. By forming a part of the gate electrode so as to cover the connection layer in this way, it is possible to reduce the influence of disconnection or the like due to the step portion of the connection layer. In addition, occurrence of disconnection, defects, and the like due to misalignment when forming the gate electrode and misalignment of elements on other substrates can be suppressed.

  The organic semiconductor layer in the present invention can be formed from an organic semiconductor material. Examples of the organic semiconductor material include nitrogen-containing atomic materials such as phthalocyanine, sulfur-containing atomic materials such as oligothiophene and thiophene oligomer, and hydrocarbon materials such as pentacene, tetracene, rubrene, and derivatives thereof. Examples of the polymer organic semiconductor material include polythiophene, polyacetylene, poly (thienylene vinylene) (PTV), oligophenylene, thiophene derivative, fluorene derivative, fluorene-thiophene polymer (F8T2), and the like, thiophene, phenylene , A material made of a combination of vinylene and the like, a material made of a mixture containing fullerene, carbon nanotube, or a carbon-based material.

  In the present invention, examples of the material for forming the gate electrode include Al, Al alloy, Ta, Ti, Cr, and Si-based materials.

  In the present invention, examples of the material for forming the source electrode and the drain electrode include Au, Au / Cr, Cu, Al, W, Ti, and a conductive polymer. In the present invention, the source electrode and the drain electrode can be formed by applying a solution. For example, a source electrode and a drain electrode can be formed by applying a solution containing metal fine particles such as polyethylenedioxythiophene (PEDOT), Au, and Ag.

  Although the board | substrate in this invention is not specifically limited, For example, plastic substrates, such as a glass substrate, the board | substrate which coat | covered the surface of the thin metal film with the insulating film, and a flexible substrate, can be used. Examples of the plastic substrate include polyethylene naphthalate (PEN), polymethyl methacrylate (PMMA), polycarbonate, polyimide, and polyethylene terephthalate (PET).

  Although the gate insulating film in the present invention is not particularly limited, for example, in addition to a high molecular weight material such as paraxylylene resin, poly (vinyl pyrrolidone) (PVP), polyvinyl alcohol (PVA), epoxy resin, polyimide, An inorganic material such as a silicon oxide film or a silicon nitride film can be used.

  The integrated circuit of the present invention includes at least a first thin film transistor and a second thin film transistor, the second thin film transistor is the organic thin film transistor of the present invention, and an output signal from the first thin film transistor is transmitted through a connection layer. And is applied to the gate electrode of the second thin film transistor.

  In the integrated circuit of the present invention, since the second thin film transistor is composed of the organic thin film transistor of the present invention, the second thin film transistor has the thickness of the gate electrode without causing disconnection or the like in the wiring to the gate electrode. Can be thickened. Therefore, an organic thin film transistor having a vertical channel structure can be employed as the second thin film transistor. For this reason, it can be set as a transistor with a short channel length, and the operating characteristic of an organic thin-film transistor can be improved.

  The first thin film transistor may be the organic thin film transistor of the present invention or a thin film transistor having another structure.

  The integrated circuit of the present invention can be used for, for example, a pixel driving circuit.

  According to the present invention, the thickness of the gate electrode can be increased without causing disconnection or the like in the wiring to the gate electrode.

  The integrated circuit of the present invention includes at least a first thin film transistor and a second thin film transistor, and the second thin film transistor is the organic thin film transistor of the present invention. The thickness of the gate electrode of the second thin film transistor can be increased without being generated. For this reason, the characteristics of the integrated circuit can be improved.

  Hereinafter, the present invention will be described with reference to specific embodiments, but the present invention is not limited to the following embodiments.

  FIG. 1 is a sectional view showing an organic thin film transistor according to an embodiment of the present invention, and FIG. 2 is a plan view.

  As shown in FIG. 1, a connection layer 2 (film thickness 0.2 μm) having a laminated structure of Au / Cr is formed on a glass substrate 9. A gate electrode 3 (film thickness: 1.0 μm) made of an Al thin film is formed so as to be laminated on a part of the connection layer 2. On the gate electrode 3, for example, a gate insulating film 4 (having a film thickness of several tens to several hundreds of nm) made of a parylene film is formed so as to cover the entire gate electrode 3. A floating electrode 7 (thickness: 0.15 μm) made of an Au thin film is formed on the gate electrode 3 via a gate insulating film 4. Further, as shown in FIG. 2, a source / drain electrode 5 (thickness: 0.15 μm) made of an Au thin film is formed on a substrate 9 on one side of the gate electrode 3, and the other side. A drain / source electrode 6 (film thickness: 0.15 μm) is formed on the other substrate 9.

  On the source / drain electrode 5, drain / source electrode 6, and floating electrode 7, an organic semiconductor layer 8 made of an organic semiconductor material (film thickness: 0.1 μm) is formed so as to cover the entire side portion of the gate insulating film 4. Degree) is formed.

  3 is a cross-sectional view taken along line AA ′ shown in FIG. As shown in FIG. 3, the gate electrode 3 is formed on the substrate 9, the gate insulating film 4 is formed on the gate electrode 3, and the floating electrode (floating metal) 7 is formed on the gate insulating film 4. Has been. A source / drain electrode 5 is formed on the substrate 9 on the side surface 4a side of the gate insulating film 4, and a drain / source electrode 6 is formed on the substrate 9 on the other side surface 4b side. ing. As will be described later, the source / drain electrode 5, the floating electrode 7, and the drain / source electrode 6 can be formed by forming a single thin film by using the steps of the gate electrode 3 and the gate insulating film 4.

  An organic semiconductor layer 8 made of an organic semiconductor material is formed on the source / drain electrode 5, the floating electrode 7, and the drain / source electrode 6. By forming the organic semiconductor layer 8, the region along the side surface 4a between the source / drain electrode 5 and the floating electrode 7 and the side surface 4b between the floating electrode 7 and the drain / source electrode 6 is used as a channel region. Can do.

  In the present embodiment, a floating electrode 7 is provided on the upper surface of the gate electrode 3, a source / drain electrode 5 is provided on one side of the gate electrode 3, and a drain / source electrode 6 is provided on the other side to provide a channel region. Although formed, the present invention is not limited to such an arrangement of electrodes. For example, the source / drain electrode may be provided on the gate electrode, and the drain / source electrode may be provided on the side of the gate electrode. In this case, the drain / source electrode may be provided only on one side of the gate electrode, or the drain / source electrode may be provided on both sides.

  If the electrode 5 formed on the upper surface of the gate electrode 3 is a floating electrode as in the present embodiment, there is no need to connect a wiring to the floating electrode, so the thickness of the gate electrode 3 can be reduced without considering the wiring. Can be thickened.

  Referring to FIGS. 1 and 2, a signal line 10 for giving a signal to gate electrode 3 is formed in a region of connection layer 2 where gate electrode 3 and gate insulating film 4 are not provided. A signal from the signal line 10 passes through the connection layer 2 and is given to the gate electrode 3.

  In the present embodiment, the signal line 10 is electrically connected to the connection layer 2, and the signal line 10 is connected to the gate electrode 3 through the connection layer 2. Since the thickness of the connection layer 2 is smaller than the thickness of the gate electrode 3, when a part of the gate electrode 3 is formed on the connection layer 2, electrical connection can be ensured without causing disconnection or the like.

  FIG. 4 is a cross-sectional view showing an organic thin film transistor according to another embodiment of the present invention, and FIG. 5 is a plan view.

  As shown in FIGS. 4 and 5, in the present embodiment, the connection layer 2 having a shape larger than that of the gate electrode 3 is formed as the connection layer 2.

  After forming a thin film of the connection layer 2 and a thin film of the gate electrode 3 on the substrate 9, a resist pattern is formed and etched to form the gate electrode 3 in a desired shape. Subsequently, the shape of the connection layer 2 can be formed by photolithography and etching. Note that the gate insulating film 4 is formed on the connection layer 2 in the vicinity of these electrodes so that the source / drain electrode 5 and the drain / source electrode 6 do not contact the connection layer 2.

  FIG. 6 is a sectional view showing an organic thin film transistor according to still another embodiment of the present invention, and FIG. 7 is a plan view.

  As shown in FIG. 7, in this embodiment, the portion of the gate electrode 3 in contact with the connection layer 2 covers the connection layer 2 with a width wider than the width of the connection layer 2. For this reason, generation | occurrence | production of the defect by the level | step difference of the connection layer 2 can be reduced. Further, since the bumps are stepped up from three directions and are in contact with the connection layer 2, it is possible to suppress the influence of disconnection and defects due to the positional deviation when forming the gate electrode and the positional deviation of the element on the substrate.

  FIG. 8 is a cross-sectional view showing a manufacturing process of the integrated circuit of one embodiment according to the present invention.

  As shown in FIG. 8E, in the integrated circuit of this embodiment, a planar first thin film transistor 11 and a second thin film transistor 1 having a vertical channel structure according to the present invention are formed. In the first thin film transistor 11, a gate electrode 13 is formed on the substrate 9, a gate insulating film 14 is formed on the gate electrode 13, and source / drain electrodes 15 are formed on both sides of the gate electrode 13, A drain / source electrode 16 is formed, and an organic semiconductor layer 18 made of an organic semiconductor material is formed so as to fill between the source / drain electrode 15 and the drain / source electrode 16.

  The second thin film transistor 1 has the same structure as the organic thin film transistor shown in FIGS. The gate electrode 3 of the second thin film transistor 1 is formed on the connection layer 2 to be electrically connected to the connection layer 2. The end of the drain / source electrode 16 of the first thin film transistor 11 is formed on the connection layer 2 and is electrically connected to the connection layer 2. As shown in the plan view of FIG. 9, the drain / source electrode 16 and the gate electrode 3 are formed on the connection layer 2 so that their positions are shifted.

  In the integrated circuit of this embodiment, a signal from the drain / source electrode 16 of the first thin film transistor 11 can be applied to the gate electrode 3 of the second thin film transistor 1 through the connection layer 2.

  Hereinafter, the manufacturing process of the integrated circuit shown in FIG. 8E will be described with reference to FIGS.

  As shown in FIG. 8A, a connection layer 2 (thickness 0.2 μm) having an Au / Cr laminated structure is formed on a glass substrate 9 by using a sputtering method, a vapor deposition method, or the like. For the connection layer 2, a thin film to be the connection layer 2 is formed on the substrate 9, and then a resist pattern is formed using a photolithography method, and then Au and Cr are used, for example, a potassium iodide solution and a nitric acid-based solution. It can form by etching using etching liquids, such as, and forming in an island-like pattern about 40 micrometers in magnitude | size. Next, an aluminum thin film having a thickness of 1.0 μm is formed by sputtering, vapor deposition, or the like, a resist pattern is formed by photolithography, and then etched using an aluminum etching solution such as phosphoric acid mixed acid. Then, the gate electrode 13 (width 50 μm, length 100 μm) and the gate electrode 3 (width 10 μm, length 300 μm) are formed. As shown in FIG. 8B, the gate electrode 3 is patterned so that a part of the gate electrode 3 is formed on the connection layer 2. Next, a parylene film functioning as a gate insulating film is formed so as to cover the entire surface of the substrate 9 so as to have a thickness of about 0.1 μm. Next, a resist pattern is formed by photolithography, and oxygen plasma treatment is performed using the resist pattern as a mask to remove the parylene film on portions other than the gate electrode 13 and the gate electrode 3. Accordingly, the gate insulating film 14 and the gate insulating film 4 can be formed while leaving the parylene film on the gate electrode 13 and the gate electrode 3. The parylene film only needs to be removed at least in the portion 30 where the connection layer 2 and the drain / source electrode 16 are connected as shown in the plan view of FIG.

  Next, an Au thin film is formed on the entire surface of the substrate 9 by vapor deposition. After etching the surface of the Au thin film by about several tens of nanometers, the source / drain electrode 15 and the drain / source electrode 16 of the first thin film transistor 11, as well as the first, as shown in FIG. A source / drain electrode 5, a drain / source electrode 6 (not shown in FIG. 8), and a floating electrode 7 of the thin film transistor 1 are formed.

  As shown in FIG. 8D, the drain / source electrode 16 is formed on the connection layer 2 and is electrically connected to the connection layer 2. Therefore, the drain / source electrode 16 functions as a signal line for the first thin film transistor 1.

  Next, a semiconductor material made of pentacene, for example, is formed by vapor deposition so as to cover the channel region on the gate electrode 13 and the channel region on the side surface of the gate electrode 3. Pattern formation of the organic semiconductor material can be performed by pattern formation using a vapor deposition mask, dry etching using oxygen plasma using a resist pattern formed by photolithography as a mask after forming a protective film after vapor deposition. it can.

  As described above, the organic semiconductor layers 18 and 8 having a thickness of about 0.1 μm are formed, and the integrated circuit shown in FIG.

  In the integrated circuit of this embodiment, the output from the first thin film transistor 11 is input as a control signal from the drain / source electrode 16 to the gate electrode 3 via the connection layer 2.

  In the present embodiment, the drain / source electrode 16 of the first thin film transistor and the gate electrode 3 of the second thin film transistor 1 are electrically connected using the connection layer 2 that is thinner than the gate electrode 3. For this reason, wiring can be formed in the gate electrode 3 without causing disconnection or the like.

  FIG. 10 is a cross-sectional view showing an integrated circuit according to another embodiment of the present invention, and FIG. 11 is a plan view.

  As shown in FIG. 11, in the present embodiment, the connecting portion between the connection layer 2 and the gate electrode 3 has a width wider than the width of the connection layer 2 as in the embodiment shown in FIG. A part is formed so as to cover the connection layer 2. For this reason, generation | occurrence | production of the disconnection etc. in the connection part of the connection layer 2 and the gate electrode 3 can be suppressed.

  FIG. 12 is a cross-sectional view showing an integrated circuit according to still another embodiment of the present invention, and FIG. 13 is a plan view. 12 is a cross-sectional view taken along the line BB ′ shown in FIG.

  The integrated circuit illustrated in FIGS. 12 and 13 is an integrated circuit that can be used as a pixel driver circuit of a display panel.

  As shown in FIG. 12, in the integrated circuit of this embodiment, the first thin film transistor 11 is composed of an organic thin film transistor having a vertical channel structure.

  As shown in FIG. 13, scanning lines 25 are formed in the horizontal direction, and power supply lines 22 and signal lines 23 are formed in the vertical direction. As shown in FIG. 12, in the first thin film transistor 11, a gate electrode 13 having a thickness of about 1.0 μm is formed on the substrate 9, a gate insulating film 14 is formed thereon, and an upper surface of the gate electrode 13 is formed. The floating electrode 17 is formed through the gate insulating film 14. Further, a source / drain electrode 15 and a drain / source electrode 16 are respectively formed on both sides of the gate electrode 13, and the source / drain electrode 15 is connected to the signal line 23.

  Between the first thin film transistor 11 and the second thin film transistor 1, a conductor film and an insulating film are formed on the substrate 9, and the drain / source electrode 16 is formed thereon, whereby the capacitor portion 21 is formed. ing.

  The drain / source electrode 16 further extends to the connection layer 2 of the first thin film transistor 1 and is electrically connected to the connection layer 2. The connection layer 2 is connected to the gate electrode 3 as in the above embodiments.

  Referring to FIG. 13, the drain / source electrode 6 of the second thin film transistor 1 is connected to the power supply line 22. In accordance with a control signal applied to the gate electrode 3, a voltage from the power supply line 22 is applied to the light emitting unit 31 via the source / drain electrode 5.

  In the above embodiment, the vertical channel structure transistor which is the first thin film transistor 11 may also be an organic thin film transistor according to the present invention. That is, the gate electrode 13 may be connected to the connection layer and connected to the scanning line 25 via the connection layer.

  In the pixel driving circuit of the above embodiment, the first thin film transistor 11 is controlled by the signal of the scanning line 25 and outputs a voltage corresponding to the signal voltage applied to the signal line 23, and this is passed through the drain / source electrode 16. A control signal is applied to the gate electrode 3 of the second thin film transistor 1. The second thin film transistor 1 applies an output current corresponding to the applied signal from the power supply line 22 to the light emitting unit 31, and the light emitting unit 31 emits light with a light emission intensity determined by this current. The output current given to the light emitting unit 31 is determined from the voltage condition between the applied voltage of the scanning line 25 and the signal line 23 and another electrode (not shown) of the light emitting unit 31.

  The organic thin film transistor and the integrated circuit of the present invention are not limited to the above embodiments, and can be appropriately modified and implemented without departing from the scope of the present invention.

Sectional drawing which shows the organic thin-film transistor of one Embodiment according to this invention. The top view which shows the organic thin-film transistor of one Embodiment according to this invention. Sectional drawing which follows the AA 'line shown in FIG. Sectional drawing which shows the organic thin-film transistor of other embodiment according to this invention. The top view which shows the organic thin-film transistor of other embodiment according to this invention. Sectional drawing which shows the organic thin-film transistor of further another embodiment according to this invention. The top view which shows the organic thin-film transistor of further another embodiment according to this invention. Sectional drawing which shows the manufacturing process of the integrated circuit of one Embodiment according to this invention. FIG. 9 is a plan view showing the vicinity of a connection layer in the integrated circuit shown in FIG. 8. Sectional drawing which shows the integrated circuit of other embodiment according to this invention. The top view which shows the integrated circuit of other embodiment according to this invention. Sectional drawing which shows the integrated circuit of further another embodiment according to this invention. The top view which shows the integrated circuit of further another embodiment according to this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... 2nd thin-film transistor 2 ... Connection layer 3 ... Gate electrode 4 ... Gate insulating film 5 ... Source / drain electrode 6 ... Drain / source electrode 7 ... Floating electrode 8 ... Organic-semiconductor layer 9 ... Substrate 10 ... Signal line 11 ... First 1 thin film transistor 13 gate electrode 14 gate insulating film 15 source / drain electrode 16 drain / source electrode 17 floating electrode 18 organic semiconductor layer 21 capacitor portion 22 power line 23 signal line 25 scanning line 30 ... Connection part 31 ... Light emitting part

Claims (5)

A substrate, a gate electrode provided on the substrate, a source electrode, a drain electrode, a gate insulating film covering the gate electrode, and provided on the gate insulating film, the source electrode and the drain electrode; An organic thin film transistor comprising an organic semiconductor layer for forming a channel region between the signal line and a signal line for giving a signal to the gate electrode,
A connection layer thinner than the gate electrode is provided on the substrate, and a part of the gate electrode is formed on the connection layer, whereby the gate electrode is electrically connected to the connection layer. An organic thin film transistor, wherein the signal line is electrically connected to the connection layer, thereby being electrically connected to the gate electrode through the connection layer.   2. The organic thin film transistor according to claim 1, wherein the channel region is formed in a thickness direction of the gate electrode.   The source electrode thinner than the gate electrode is provided on the substrate on one side of the gate electrode, and the drain electrode thinner than the gate electrode is provided on the substrate on the other side. The organic thin film transistor according to claim 2, wherein a floating electrode is provided on an upper surface of the gate electrode with the gate insulating film interposed therebetween.   4. The organic thin film transistor according to claim 1, wherein a part of the gate electrode is formed to cover the connection layer with a width wider than that of the connection layer. An integrated circuit comprising at least a first thin film transistor and a second thin film transistor,
5. The organic thin film transistor according to claim 1, wherein an output signal from the first thin film transistor is transmitted to the gate of the second thin film transistor via the connection layer. An integrated circuit characterized by being applied to an electrode.

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