JP2008176093A - Electro-optical device, control method of electro-optical device, and electronic apparatus - Google Patents

Abstract

Power consumption and heat generation of a drive circuit that drives a plurality of electro-optic elements are suppressed.
A light emitting device includes a drive circuit that drives N electro-optic elements based on gradation data D1 to DN. The determination unit 322 determines whether or not all the gradation data D1 to DN of one line are zero (instruction to turn off the electro-optical element E). The timing control circuit 324 controls the drive circuit 20 by supplying a control signal SC including the clock signal CLK. When the determination unit 322 determines that the gradation data D1 to DN is zero, the stop control unit 50 supplies the clock signal CLK during the period in which the gradation data D1 to DN is supplied to the drive circuit 20. The drive circuit 20 is stopped by stopping.
[Selection] Figure 1

Description

  The present invention relates to a technique for driving various electro-optical elements such as organic light-emitting diode elements.

An electro-optical device in which a large number of electro-optical elements are arranged is employed in various electronic apparatuses as a display device for displaying an image or an exposure device (line head) for image formation of an electrophotographic system. For example, as disclosed in Patent Document 1, an electro-optical device includes a driving circuit (data line driving circuit) that drives each electro-optical element based on gradation data that specifies the gradation of each pixel constituting an image. It has.
JP 2001-194645 A

  However, the driving circuit in the conventional technique basically continues to operate from turning on and off the electro-optical device. Therefore, there is a problem that it is difficult to reduce power consumption and heat generation in the drive circuit. In view of the above circumstances, an object of the present invention is to solve the problem of suppressing power consumption and heat generation of a drive circuit that drives a plurality of electro-optical elements.

  In order to solve the above-described problems, an electro-optical device according to the present invention includes a plurality of electro-optical elements, a drive circuit that drives the plurality of electro-optical elements based on each gradation data, and a predetermined number of gradations. A determination circuit that determines whether or not the data instructs to turn off the electro-optical element, and a driving circuit that executes the predetermined number of gradation data when the determination means determines that the predetermined number of gradation data instructs to turn off Stop control means for stopping the operation to be performed. In the above configuration, since the operation of the drive circuit stops when a predetermined number of gradation data instructs to turn off, the drive circuit is driven as compared with the configuration in which the drive circuit continues to operate regardless of the content of the gradation data. Power consumption and heat generation in the circuit are suppressed.

  In the configuration in which the drive circuit operates in synchronization with the clock signal, the stop control unit stops the supply of the clock signal to the drive circuit when the determination unit determines that a predetermined number of gradation data instructs to turn off. Is preferred. According to this aspect, the effect of suppressing power consumption and heat generation in the drive circuit becomes significant. For example, by shifting the start pulse of a plurality of sampling signals that define the timing of developing gradation data of one system into a plurality of systems in synchronization with the first clock signal (for example, the clock signal CLK in FIG. 2). In the configuration in which the drive circuit includes the shift register to be generated, the stop control unit stops the supply of the first clock signal or the start pulse to the shift register when the determination unit determines that a predetermined number of gradation data is instructed to be turned off. To do. In addition, the drive circuit includes an output circuit that outputs to each electro-optical element a drive signal adjusted to a pulse width corresponding to the gradation data with a step size defined by the second clock signal (for example, the clock signal PCK in FIG. 2). In the configuration, the stop control unit stops the supply of the second clock signal to the output circuit when the determination unit determines that the predetermined number of gradation data instructs to turn off.

  Although the predetermined number of gradation data to be determined by the determination unit is arbitrary, the determination unit according to a preferred aspect of the present invention is one of lines that are an array of a plurality of pixels corresponding to a plurality of electro-optic elements, or For a plurality, it is determined whether or not the gradation data instructs to turn off the electro-optic element.

  An electro-optical device according to a preferred aspect of the present invention includes a plurality of unit units each including a plurality of electro-optical elements and a drive circuit, and the determination unit includes a unit unit for each of the plurality of unit units. It is determined whether or not the corresponding predetermined number of gradation data instructs to turn off the electro-optic element, and the stop control means determines that the predetermined number of gradation data among the plurality of unit parts instructs to turn off. The operation performed by the drive circuit in the unit unit with respect to the predetermined number of gradation data is selectively stopped. According to the above aspect, since each of the plurality of drive circuits is selectively stopped, the power consumption in each drive circuit is compared with a configuration in which whether the operation of all the drive circuits is controlled collectively. Consumption and heat generation can be efficiently suppressed.

  An electro-optical device according to a preferred aspect of the present invention includes a storage circuit that stores gradation data of each electro-optical element, and the determination unit executes determination when a predetermined number of gradation data is stored in the storage circuit. . According to the above aspect, since determination by the determination unit is not required at the time of reading gradation data, each electro-optical element can be driven quickly based on the gradation data read from the storage circuit. Note that “execute determination at the time of storing gradation data” includes a case where determination is executed in parallel with storage of gradation data and a case where determination is executed prior to storage of gradation data.

  In a more specific aspect, the determination means includes a detection circuit that sequentially detects that each gradation data instructs to turn off the electro-optic element, a count circuit that counts the number of times of detection by the detection circuit, and a count by the count circuit. The stop control means determines whether or not the operation executed by the drive circuit with respect to the predetermined number of gradation data can be stopped based on the result of the comparison. According to this aspect, the determination unit can be realized with a simple configuration.

  The electro-optical device according to the invention is used in various electronic apparatuses. A typical example of the electronic apparatus according to the present invention is an electrophotographic image forming apparatus in which the electro-optical device according to each of the above embodiments is used for exposure of an image carrier such as a photosensitive drum. The image forming apparatus includes an image carrier (for example, a photosensitive drum) on which a latent image is formed by exposure, the electro-optical device of the present invention that exposes the image carrier, and a developer (for example, toner) for the latent image on the image carrier. ) To form a visible image.

  The present invention is also specified as a method of controlling the electro-optical device according to each of the above aspects. In other words, a control method according to one aspect of the present invention is a method for driving an electro-optical device including a plurality of electro-optical elements and a drive circuit that drives the plurality of electro-optical elements based on each gradation data. In this case, it is determined whether or not the predetermined number of gradation data instructs to turn off the electro-optic element, and when it is determined that the predetermined number of gradation data instructs to turn off, the predetermined number of gradation data is driven. Stops the operation performed by the circuit. Also by the above method, the same operation and effect as the electro-optical device according to the invention can be obtained.

<A: First Embodiment>
FIG. 1 is a block diagram illustrating an electrical configuration of the electro-optical device according to the first embodiment of the invention. The electro-optical device 100 is employed in an electrophotographic image forming apparatus as an exposure device (line head) that exposes a photosensitive drum. In this embodiment, it is assumed that an image (latent image) in which pixels are arranged in N horizontal columns × M vertical rows is formed on the photosensitive surface of the photosensitive drum (M and N are natural numbers). A set of N pixels arranged in the main scanning direction in one image is hereinafter referred to as “line”.

  As shown in FIG. 1, the electro-optical device 100 includes a light emitting device 10 and a control board 30. The light emitting device 10 is a means for emitting a light beam according to a desired image to the surface of the photosensitive drum. The light emitting device 10 includes an element array unit 15 and a drive circuit 20.

  The element array unit 15 is a portion in which N electro-optical elements E corresponding to the number of pixels belonging to one line are arranged along the main scanning direction. The electro-optical element E is a light-emitting element (organic light-emitting diode element) in which a light-emitting layer formed of an organic EL material is interposed between an anode and a cathode. The electro-optical element E is controlled to a gradation (light emission amount) corresponding to the amount of current supplied to the light emitting layer. A configuration in which N electro-optical elements E are arranged in a plurality of rows (for example, two rows and staggered) is also employed.

  The drive circuit 20 drives each of the N electro-optical elements E by the output of the drive signals X1 to XN to the element array unit 15. The drive signal Xj supplied to the jth (j = 1 to N) electro-optical element E is generated based on the gradation data Dj. The gradation data Dj is data that designates the gradation of the jth pixel belonging to one line (the gradation of the jth electro-optic element E). When the gradation data Dj is zero, the jth electro-optic element E is instructed to be turned off, and when the gradation data Dj is other than zero, the electro-optic element E with a light emission amount corresponding to the numerical value. Is turned on.

  The drive circuit 20 controls the light emission amount of each electro-optical element E by changing the pulse width of the drive signal Xj according to the gradation data Dj (gradation control by a pulse width modulation method). As described above, by rotating the photosensitive drum in the sub-scanning direction while controlling the light emission amount of each electro-optical element E, an image for one page of N horizontal rows × vertical M rows is formed on the surface of the photosensitive drum. Is done. The drive circuit 20 may be mounted in the form of an IC chip, or may be configured by a thin film transistor formed on the substrate together with each electro-optic element E.

  A control circuit 32 and two memory circuits 34 and 36 are mounted on the control board 30. The control circuit 32 is a circuit for controlling the drive circuit 20 by the output of the gradation data D (D1 to DN) and the control signal SC (CLK, SP, LE, PCK). The control circuit 32 is supplied with gradation data D from the host device 60 together with various control signals such as a horizontal synchronization signal and a vertical synchronization signal. The host device 60 is, for example, a CPU (Central Processing Unit) of an image forming apparatus in which the light emitting device 10 is mounted. Each unit constituting the control circuit 32 may be realized by hardware such as a DSP (Digital Signal Processor), or may be realized by a computer such as a CPU executing a program. A configuration in which a part or all of the control circuit 32, the storage circuits 34 and 36, and the drive circuit 20 are mounted on one IC chip is also employed.

  Each of the storage circuits 34 and 36 is means (line memory) for storing the gradation data D1 to DN of N pixels belonging to one line. The control circuit 32 alternately writes the gradation data D sequentially supplied from the host device 60 to the storage circuits 34 and 36 for each line, and alternately reads the gradation data D of each line from the storage circuits 34 and 36. . That is, the control circuit 32 stores the odd-numbered line gradation data D1 to DN in the storage circuit 34, the even-numbered line gradation data D1 to DN from the storage circuit 36, and the odd-numbered line gradation data D1 to DN. The operation of acquiring the gradation data D1 to DN of the second line from the storage circuit 34 and the operation of storing the gradation data D1 to DN of the even-numbered line in the storage circuit 36 are alternately executed at the period of the horizontal synchronizing signal. . The control circuit 32 sequentially outputs the gradation data D1 to DN acquired from the storage circuit 34 or 36 to the drive circuit 20.

  Next, FIG. 2 is a block diagram showing a specific configuration of the drive circuit 20. FIG. 3 is a timing chart for explaining the operation of the drive circuit 20. As shown in FIG. 2, the drive circuit 20 includes a shift register 22, latch circuits 24 and 25, and an output circuit 27. The shift register 22 and the latch circuits 24 and 25 develop the gradation data D1 to DN serially supplied from the control circuit 32 into N systems corresponding to the total number of electro-optic elements E. As shown in FIG. 3, the shift register 22 sequentially shifts the start pulse SP supplied for each horizontal scanning period in synchronization with the clock signal CLK, thereby outputting N sampling signals S1 to SN. The sampling signals S1 to SN are sequentially set to the active level every cycle of the clock signal CLK.

  As shown in FIG. 2, the gradation data D 1 to DN output from the control circuit 32 is supplied to the latch circuit 24. The latch circuit 24 samples the gradation data Dj when the sampling signal Sj transitions to the active level. That is, the sampling signals S1 to SN are signals that define the timing at which one system of gradation data D is developed into N systems. When the latch circuit 24 holds up to the last gradation data DN of one line, the gradation data D1 to DN are simultaneously output from the latch circuit 25 by supplying a latch pulse LE as shown in FIG.

  The output circuit 27 includes N unit circuits 28. The j-th stage unit circuit 28 is means for generating and outputting a drive signal Xj having a pulse width corresponding to the gradation data Dj supplied from the latch circuit 25. Each unit circuit 28 is supplied with a clock signal PCK in common. The clock signal PCK is a signal that defines the timing at which the current value of the drive signal Xj fluctuates (that is, the timing of the leading edge and the trailing edge of the driving signal Xj). That is, the minimum unit (step size) in which the pulse width of the drive signal Xj varies according to the gradation data Dj is a time length specified by the clock signal PCK (for example, one cycle of the clock signal PCK).

  As shown in FIG. 1, the control circuit 32 includes a determination unit 322 and a timing control unit 324. The determination unit 322 is a means for determining, for each line of the image, whether or not all of the gradation data D1 to DN of N pixels belonging to one line are zero (turned off). FIG. 4 is a flowchart showing the contents of processing by the determination unit 322. The process of FIG. 4 is executed for each horizontal scanning period defined by the horizontal synchronization signal. More specifically, the determination unit 322 executes the processing of FIG. 4 in parallel with the operation of sequentially storing the gradation data D1 to DN supplied from the host device 60 in the storage circuit 34 or 36.

  The determination unit 322 selects one gradation data Dj from the gradation data D1 to DN sequentially supplied from the host device 60 (step S1). Next, the determination unit 322 determines whether or not the gradation data Dj selected in step S1 is zero (step S2). When the determination result in step S2 is negative (that is, when at least one gradation data Dj of one line is a numerical value other than zero), the determination unit 322 generates a stop flag F generated for the current line. Is set to "0" (step S4).

  On the other hand, when the result of the determination in step S2 is affirmative, the determination unit 322 determines whether or not the determination in step S2 has been executed for all N pixels belonging to one line (step S3). When the result of step S3 is negative, the determination unit 322 performs the determination of step S2 after newly selecting the gradation data D of the next pixel in step S1. When the result of step S3 is affirmative (that is, when all of the gradation data D1 to DN are zero), the determination unit 322 sets the stop flag F generated for the current line to “1” (step 1). S5).

  1 generates a control signal SC (clock signal CLK, start pulse SP, latch pulse LE, clock signal PCK) and outputs it to the drive circuit 20. As shown in FIG. 1, the timing control unit 324 includes a stop control unit 50. The stop control unit 50 performs processing executed by the drive circuit 20 for the gradation data D1 to DN of the line in which the stop flag F is set to “1” (that is, a line in which all of the gradation data D1 to DN are zero). Means to stop. More specifically, the stop control unit 50 stops the supply of the clock signal CLK to the shift register 22 within a period in which the gradation data D1 to DN of the line whose stop flag F is “1” is developed into N systems. To do.

  FIG. 3 illustrates a case where the gradation data D1 to DN of the (m + 1) th line is zero. Since the stop flag F of the (m + 1) th line is set to “1” by the processing of FIG. 4, the stop control unit 50 supplies the grayscale data D1 to DN of the line to the drive circuit 20. The clock signal CLK is fixed to the low level during the period Tm + 1. Therefore, within the period Tm + 1, the shift of the start pulse SP by the shift register 22 (and the output of the sampling signals S1 to SN) is stopped. On the other hand, for the m-th line and the (m + 2) -th line, since at least one gradation data D is a numerical value other than zero, each stop flag F is set to “0”. Therefore, in the period Tm in which the mth line grayscale data D1 to DN is supplied and the period (m + 2) th grayscale data D1 to DN in the period Tm + 2, the shift register is used. By supplying the clock signal CLK to 22, the gradation data D1 to DN are developed into N systems (that is, a normal operation is executed).

  As described above, in this embodiment, the operation of the drive circuit 20 is stopped when all of the gradation data D1 to DN are zero, so that the operation of the drive circuit 20 is performed regardless of the content of the gradation data D. As compared with the conventional configuration in which the current is continued, power consumption and heat generation in the drive circuit 20 are suppressed.

<B: Second Embodiment>
Next, a second embodiment of the present invention will be described. In addition, about the element which an effect | action and function are common in 1st Embodiment in this form, the same code | symbol as the above is attached | subjected and each detailed description is abbreviate | omitted suitably.

  FIG. 5 is a block diagram illustrating a configuration of the electro-optical device 100. As shown in the figure, the stop control unit 50 in this embodiment is installed in the light emitting device 10. The stop control unit 50 may be mounted on one IC chip together with the drive circuit 20 or may be a separate circuit from the drive circuit 20.

  The determination unit 322 in FIG. 5 controls the level of the stop control signal SENB depending on whether or not all the gradation data D1 to DN of one line are zero (lights off). More specifically, when all of the gradation data D1 to DN of one line are zero (step S3 in FIG. 4: YES), the determination unit 322 outputs the gradation data D1 to DN to the drive circuit 20. During this period, the stop control signal SENB is set to a high level (active level) (step S5). On the other hand, when at least one of the gradation data D1 to DN is other than zero (step S2 in FIG. 4: NO), the determination unit 322 stops during the period in which the gradation data D1 to DN is output to the drive circuit 20. The control signal SENB is set to a low level (inactive level) (step S4). The stop control signal SENB is supplied to the stop control unit 50. The timing control unit 324 continues to supply the control signal SC (clock signal CLK, start pulse SP, latch pulse LE, clock signal PCK) to the stop control unit 50 regardless of the result of determination by the determination unit 322.

  FIG. 6 is a timing chart for explaining the operation of this embodiment. In the figure, as in FIG. 3, the case where the gradation data D1 to DN of the (m + 1) th line is zero is shown. Accordingly, the stop control signal SENB is set to a high level in the period Tm + 1, and is set to a low level in the period Tm and the period Tm + 2 in which the gradation data D1 to DN include numerical values other than zero.

  The stop control unit 50 passes the control signal SC and supplies it to the drive circuit 20 during the period when the stop control signal SENB is at a low level (period Tm and period Tm + 2 in FIG. 6). On the other hand, in the period Tm + 1 during which the stop control signal SENB is at a high level, the stop control unit 50 cuts off the supply of the clock signal CLK to the drive circuit 20 as shown in FIG. Therefore, the operation of the drive circuit 20 (shift register 22) is stopped in the period Tm + 1.

  As described above, also in this embodiment, since the operation of the drive circuit 20 is stopped when the gradation data D1 to DN of one line is zero, the same operations and effects as those in the first embodiment are achieved. Is done. In this embodiment, a wiring for supplying the stop control signal SENB from the control circuit 32 to the light emitting device 10 is required. On the other hand, according to the first embodiment, whether or not the control signal SC can be supplied to the drive circuit 20 is controlled in the control circuit 32, so that no wiring for supplying the stop control signal SENB to the light emitting device 10 is required. There is an advantage of being.

<C: Modification>
Various modifications can be made to each of the above embodiments. An example of a specific modification is as follows. In addition, you may combine each following aspect suitably.

(1) Modification 1
The method for stopping the drive circuit 20 is appropriately changed. For example, instead of or in addition to the configuration in which the clock signal CLK is stopped, a configuration in which the supply of the start pulse SP to the shift register 22 is stopped when the grayscale data D1 to DN of one line is zero. It may be adopted. Similarly, the operation of the drive circuit 20 may be stopped by stopping the supply of the latch pulse LE to the latch circuit 25 and the supply of the clock signal PCK to the output circuit 27. A configuration in which the supply of a plurality of signals to the drive circuit 20 is stopped is also employed. For example, a configuration in which the supply of the clock signal CLK to the shift register 22 and the supply of the clock signal PCK to the output circuit 27 are stopped is also employed. Note that the expected effects of suppressing power consumption and heat generation in the drive circuit 20 are more effective in the configuration in which the supply of the clock signal CLK and the clock signal PCK is stopped than in the configuration in which the supply of the start pulse SP and the latch pulse LE is stopped. Especially noticeable. Therefore, in a specific aspect of the present invention, a configuration in which the supply of the clock signals (CLK, PCK) that defines the operation of the drive circuit 20 is stopped is preferable.

(2) Modification 2
The configuration of the determination unit 322 is arbitrary. For example, as illustrated in FIG. 7, the determination unit 322 may be configured by the detection circuit 41, the counting circuit 43, and the comparison circuit 45. The detection circuit 41 is a circuit that sequentially detects that each of the gradation data D1 to DN is zero. As illustrated in FIG. 7, the detection circuit 41 is realized by an OR circuit that calculates a logical sum of all the bits of one gradation data Dj. In other words, when the gradation data Dj is zero, the output of the detection circuit 41 is “0”, and when the gradation data Dj is a numerical value other than zero (when any bit is “1”), the detection is performed. The output of the circuit 41 is “1”. The counting circuit 43 counts the number of times C that the detection circuit 41 has detected that the gradation data Dj is zero (that is, the number of times that the output of the detection circuit 41 has become “0”) C. The comparison circuit 45 is a means for comparing the count value C by the counting circuit 43 with the number N of pixels in one line.

  If all of the gradation data D1 to DN are zero, the count value C of the counting circuit 43 reaches the number of pixels N at the end of the horizontal scanning period. Therefore, when the count value C is equal to the number N of pixels at the end point of the horizontal scanning period, the comparison circuit 45 controls the stop control unit 50 so that the operation of the drive circuit 20 stops. On the other hand, when the count value C is less than the number N of pixels at the end of the horizontal scanning period (that is, when any one of the gradation data D1 to DN is a numerical value other than zero), the comparison circuit 45 includes the drive circuit 20. The stop control unit 50 is not instructed to stop the operation. Also with the above configuration, the same operations and effects as the first embodiment and the second embodiment are exhibited.

(3) Modification 3
A configuration in which the light emitting device 10 includes a plurality of drive circuits 20 is also employed. The electro-optical device 100 shown in FIG. 8 includes K unit units (U1 to UK), each of which includes an element array unit 15 (N electro-optical elements E) and a drive circuit 20 (K is an integer of 2 or more). It comprises. One line of the image is composed of (N × K) pixels. That is, the gradation data D1 to DN corresponding to each of the K unit parts U are supplied from the host device 60 for forming one line.

  The determination unit 322 determines, for each of the unit parts U1 to UK, whether or not the N pieces of gradation data D1 to DN corresponding to the unit part U are zero (determination in FIG. 4). The stop control unit 50 selectively stops the drive circuit 20 of one or more unit units U in which the gradation data D1 to DN are determined to be zero among the unit units U1 to UK (for example, the clock signal CLK Stop supplying). That is, in one horizontal scanning period, the drive circuit 20 of the unit unit U in which at least one of the gradation data D1 to DN is a numerical value other than zero operates, while all of the gradation data D1 to DN are zero. The drive circuit 20 of a certain unit U is stopped. As described above, in the configuration of FIG. 8, the plurality of drive circuits 20 are partially stopped, so that power consumption and heat generation in each drive circuit 20 can be efficiently suppressed.

(4) Modification 4
In each of the above embodiments, the configuration for determining whether or not the gradation data D1 to DN of one line is zero is exemplified. However, whether or not the gradation data D1 to DN is zero over a plurality of lines. Accordingly, a configuration for determining whether or not the operation of the drive circuit 20 can be stopped is also adopted. For example, the determination unit 322 determines whether or not the gradation data D1 to DN for two adjacent lines are all zero, and if the determination result is affirmative, the gradation for the two lines. The operation performed by the drive circuit 20 for the data D1 to DN is stopped. For example, the supply of the clock signal CLK is stopped over two horizontal scanning periods.

(5) Modification 5
The organic light emitting diode element is merely an example of an electro-optical element. The electro-optic element applied to the present invention is distinguished from a self-light-emitting type that emits light itself and a non-light-emitting type (for example, a liquid crystal element) that changes the transmittance of external light, or a current-driven type that is driven by supplying current And the voltage driven type driven by voltage application are unquestionable. For example, inorganic EL elements, field emission (FE) elements, surface-conduction electron (SE) elements, ballistic electron surface emitting (BS) elements, and light emitting diode (LED) elements Various electro-optical elements such as a liquid crystal element, an electrophoretic element, and an electrochromic element can be used in the present invention.

<D: Application example>
The form of the electronic apparatus (image forming apparatus) using the electro-optical device 100 according to each of the above forms will be described.
FIG. 9 is a cross-sectional view illustrating a configuration of an image forming apparatus that employs the electro-optical device 100. The image forming apparatus is a tandem type full-color image forming apparatus, and the four electro-optical devices 100 (100K, 100C, 100M, and 100Y) according to the above-described form and four photosensitive devices corresponding to the electro-optical devices 100 are used. Body drum 70 (70K, 70C, 70M, 70Y). One electro-optical device 100 is disposed so as to face the image forming surface (outer peripheral surface) of the corresponding photosensitive drum 70. Note that the subscripts “K”, “C”, “M”, and “Y” of each symbol are used for forming each visible image of black (K), cyan (C), magenta (M), and yellow (Y). Means.

  As shown in FIG. 9, an endless intermediate transfer belt 72 is wound around the driving roller 711 and the driven roller 712. The four photosensitive drums 70 are arranged around the intermediate transfer belt 72 at a predetermined interval from each other. Each photosensitive drum 70 rotates in synchronization with driving of the intermediate transfer belt 72.

  In addition to the electro-optical device 100, a corona charger 731 (731K, 731C, 731M, 731Y) and a developing device 732 (732K, 732C, 732M, 732Y) are disposed around each photosensitive drum 70. The corona charger 731 uniformly charges the image forming surface of the photosensitive drum 70 corresponding thereto. An electrostatic latent image is formed when each electro-optical device 100 exposes this charged image forming surface. Each developing device 732 forms a visible image (visible image) on the photosensitive drum 70 by attaching a developer (toner) to the electrostatic latent image.

  As described above, the visible images of the respective colors (black, cyan, magenta, yellow) formed on the photosensitive drum 70 are sequentially transferred (primary transfer) to the surface of the intermediate transfer belt 72 to form a full-color visible image. Is done. Four primary transfer corotrons (transfer devices) 74 (74K, 74C, 74M, and 74Y) are arranged inside the intermediate transfer belt 72. Each primary transfer corotron 74 electrostatically attracts a visible image from the corresponding photosensitive drum 70, thereby developing a visible image on the intermediate transfer belt 72 that passes through the gap between the photosensitive drum 70 and the primary transfer corotron 74. Transcript.

  The sheets (recording material) 75 are fed one by one from the paper feed cassette 762 by the pickup roller 761 and conveyed to the nip between the intermediate transfer belt 72 and the secondary transfer roller 77. The full-color visible image formed on the surface of the intermediate transfer belt 72 is transferred (secondary transfer) to one side of the sheet 75 by the secondary transfer roller 77 and is fixed to the sheet 75 by passing through the fixing roller pair 78. . The paper discharge roller pair 79 discharges the sheet 75 on which the visible image is fixed through the above steps.

  Since the image forming apparatus exemplified above uses an organic light emitting diode element as a light source (electro-optical element E), the apparatus is made smaller than a configuration using a laser scanning optical system. Note that the electro-optical device 100 can be applied to an image forming apparatus having a configuration other than those exemplified above. For example, a rotary development type image forming apparatus, an image forming apparatus that directly transfers a visible image from a photosensitive drum to a sheet without using an intermediate transfer belt, or an image forming that forms a monochrome image The electro-optical device 100 can also be used as the device.

1 is a block diagram illustrating a configuration of an electro-optical device according to a first embodiment. It is a block diagram which shows the structure of a drive circuit. 6 is a timing chart for explaining the operation of the drive circuit. It is a flowchart for demonstrating operation | movement of a determination part. FIG. 6 is a block diagram illustrating a configuration of an electro-optical device according to a second embodiment. 6 is a timing chart for explaining the operation of the drive circuit. It is a block diagram which shows the structure of the determination part which concerns on a modification. FIG. 10 is a block diagram illustrating a configuration of an electro-optical device according to a modification. It is sectional drawing which shows the specific form (image forming apparatus) of the electronic device which concerns on this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... Electro-optical device, 10 ... Light-emitting device, 15 ... Element array part, 20 ... Drive circuit, 22 ... Shift register, 24, 25 ... Latch circuit, 27 ... Output circuit, 30 ... Control Substrate, 32... Control circuit, 322... Judgment unit, 324... Timing control unit, 34 and 36... Storage circuit, 50 .. Stop control unit, D (D1 to DN). ... Unit, CLK, PCK ... Clock signal, SP ... Start pulse, LE ... Latch pulse, X1 to XN ... Drive signal.

Claims (10)

A plurality of electro-optic elements;
A drive circuit for driving the plurality of electro-optic elements based on each gradation data;
Determining means for determining whether or not a predetermined number of gradation data instructs the electro-optical element to be turned off;
An electro-optical device comprising: a stop control unit that stops an operation performed by the drive circuit with respect to the predetermined number of gradation data when the determination unit determines that the predetermined number of gradation data instructs to turn off. The drive circuit operates in synchronization with a clock signal,
The electro-optical device according to claim 1, wherein the stop control unit stops the supply of the clock signal to the drive circuit when the determination unit determines that the predetermined number of pieces of gradation data instructs to turn off. The drive circuit includes a shift register that generates a plurality of sampling signals that define timing for developing gradation data of one system in a plurality of systems by shifting a start pulse in synchronization with the first clock signal. ,
2. The stop control unit stops the supply of the first clock signal or the start pulse to the shift register when the determination unit determines that the predetermined number of gradation data instructs to turn off. Electro-optic device. The drive circuit includes an output circuit that outputs a drive signal adjusted to a pulse width corresponding to gradation data at a step size defined by a second clock signal to each electro-optical element,
2. The electro-optical device according to claim 1, wherein the stop control unit stops the supply of the second clock signal to the output circuit when the determination unit determines that the predetermined number of gradation data is instructed to be turned off. . The determination unit determines whether or not the gradation data instructs to turn off the electro-optical element for one or a plurality of lines that are an array of a plurality of pixels corresponding to the plurality of electro-optical elements. Item 5. The electro-optical device according to any one of items 4. A plurality of unit portions each including the plurality of electro-optic elements and the drive circuit;
The determination unit determines, for each of the plurality of unit parts, whether or not the predetermined number of gradation data corresponding to the unit part instructs to turn off the electro-optic element,
The stop control means performs an operation that the drive circuit in the unit part determined by the determination means performs with respect to the predetermined number of gradation data when the predetermined number of gradation data instructed to turn off among the plurality of unit parts. The electro-optical device according to any one of claims 1 to 5, wherein the electro-optical device is selectively stopped. A storage circuit for storing gradation data of each electro-optic element;
The electro-optical device according to any one of claims 1 to 6, wherein the determination unit performs the determination when the predetermined number of pieces of gradation data are stored in the storage circuit. The determination means includes
A detection circuit that sequentially detects that each gradation data instructs to turn off the electro-optic element;
A counting circuit for counting the number of times of detection by the detection circuit;
A comparison circuit for comparing the count value by the count circuit with a predetermined value,
The electrical stop according to any one of claims 1 to 7, wherein the stop control means determines whether or not to stop the operation executed by the drive circuit with respect to the predetermined number of gradation data based on the result of the comparison. Optical device.   An electronic apparatus comprising the electro-optical device according to claim 1. A method of driving an electro-optical device comprising: a plurality of electro-optical elements; and a drive circuit that drives the plurality of electro-optical elements based on respective gradation data,
It is determined whether or not a predetermined number of gradation data instructs to turn off the electro-optic element,
An electro-optical device control method for stopping an operation performed by the drive circuit with respect to the predetermined number of gradation data when it is determined that the predetermined number of gradation data instructs to turn off.

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