JP2008153352A - SEMICONDUCTOR DEVICE, ITS MANUFACTURING METHOD, AND ELECTRONIC DEVICE - Google Patents

Abstract

A semiconductor device including a through electrode with high connection reliability without reducing productivity, a manufacturing method thereof, and an electronic device are provided.
Electrode pads (5, 6) formed on an active surface (3) of a substrate (2) and through electrodes (8, 9) formed from the back surface (7) of the substrate (2) toward the electrode pads (5, 6) , 6 to the through electrodes 8 and 9 are electrically connected via tapered plugs 15 and 16 erected.
[Selection] Figure 1

Description

  The present invention relates to a semiconductor device, a manufacturing method thereof, and an electronic device.

  Portable electronic devices such as mobile phones, notebook personal computers, and PDAs (Personal Data Assistance) are required to be smaller and lighter, and various electronic components such as semiconductor chips provided in the interior in accordance with this requirement. The size is reduced. For example, in a semiconductor chip, the packaging method has been devised, and now ultra-small packaging called CSP (Chip Scale Package) has been devised. A semiconductor chip manufactured using this CSP technology can be mounted at a high density because the mounting area may be approximately the same as the area of the semiconductor chip.

As one means for meeting such a demand for higher density, a semiconductor device having a through electrode on a base and a manufacturing method thereof have been known. For example, it is known that an electrode pad connected to a through electrode is provided separately from an electrode pad connected to a probe pin, and these are connected by a plug to improve the reliability and yield of a semiconductor device (Patent Document) 1). Further, there has been disclosed an electrode in which the through electrode is formed of a small-diameter plug and a large-diameter plug so that the performance as an electrode and the manufacturing stability can be improved (see Patent Document 2).
JP 2006-128352 A JP 2005-294577 A

  However, the conventional semiconductor device has a problem in that the state of the hole varies when the hole for forming the through electrode is formed in the substrate by etching or the like. For example, depending on the etching conditions, the etching rate at the center of the substrate may be higher than the etching rate at the peripheral edge of the substrate. In such a case, as shown in FIG. 14, when a hole is formed from the back surface of the substrate toward the electrode pad formed on the active surface, the hole close to the central portion of the substrate is close to the peripheral portion even if it penetrates the substrate. The hole does not penetrate the substrate.

  The state of the hole to be formed depends not only on the etching rate but also on the dimensional error of the thickness dimension of the substrate. A dimensional error in the thickness dimension of the base occurs, for example, by thinning the base. When holes are formed in the base in which such a dimensional error has occurred, as shown in FIG. 14, even if the hole formed in a portion where the thickness of the base is small penetrates the base, The hole formed in the location with a large dimension does not penetrate the substrate.

In such a case, if etching is performed until the hole that does not penetrate the base reaches the insulating film, the hole that has already penetrated the base and reached the insulating film on the back surface of the electrode pad, as shown in FIG. Side etching proceeds in the direction along the insulating film, and so-called notches are generated on the sidewalls of the holes. In this case, the side wall of the hole cannot be covered by a subsequent insulating film forming process, sputtering process, or the like, or bubbles are generated when the constituent material of the through electrode is filled, resulting in poor conduction. Thereby, there exists a subject that the connection reliability of a penetration electrode will fall.
Moreover, there is a problem that productivity is lowered when an attempt is made to suppress the variation in the state of the holes by reducing the etching rate and prevent the occurrence of notches.

  The present invention has been made in view of the above circumstances, and an object thereof is to provide a semiconductor device including a through electrode with high connection reliability, a manufacturing method thereof, and an electronic device without reducing productivity.

In order to solve the above problems, a semiconductor device according to the present invention includes an electrode pad formed on an active surface of a substrate and a through electrode formed from the back surface of the substrate toward the electrode pad. It is electrically connected through a tapered plug standing from the pad toward the through electrode.
With this configuration, when the hole for forming the through electrode is formed from the back surface of the base, the tip of the plug standing on the electrode pad protrudes from the terminal end of the hole, and the through electrode is inserted through the plug. And the electrode pad can be electrically connected. This eliminates the need for the through electrode to reach the electrode pad, thereby preventing the occurrence of notches due to excessive etching. Further, even when the hole state varies, that is, when the distance from the through electrode to the electrode pad varies, the variation can be absorbed by the height of the plug. The electrode pad can be reliably electrically connected. This also makes it possible to increase the etching rate. Further, since the plug is formed in a tapered shape, even when an insulating film or the like is formed on the surface of the plug, the insulating film or the like on the surface of the plug can be easily removed by etching or the like.
Therefore, according to the semiconductor device of the present invention, it is possible to obtain a semiconductor device provided with a through electrode having high connection reliability by preventing the generation of a notch when forming the through electrode. In addition, since the etching rate can be increased, productivity can be improved. In addition, since the plug is formed in a tapered shape and the insulating film or the like can be easily removed, a connection area between the through electrode and the plug can be secured and productivity can be improved.

In addition, a plurality of the electrode pads and the through electrodes may be formed on the base.
With this configuration, even when the distance from the electrode pad to the through electrode varies among the plurality of through electrodes, the variation in the distance is absorbed within the height of the plug. be able to.

The height of the plug is preferably equal to or greater than the maximum distance from the electrode pad to the through electrode.
With such a configuration, the plug can be inserted into the through electrode even at a position where the distance from the electrode pad to the through electrode is maximized, and the through electrode and the electrode pad can be reliably connected via the plug.

Further, the height of the plug is calculated by subtracting the depth dimension of the hole formed in the base body to form the through electrode from the thickness dimension after the thinning process of the base body. It is desirable that the distance is not less than the maximum distance to the through electrode.
With this configuration, the maximum distance from the electrode pad to the through electrode is considered in consideration of variations in hole depth due to hole etching and substrate thickness due to substrate thinning. A value can be calculated. Furthermore, by setting the height of the plug above the maximum value, variations in these dimensions can be absorbed depending on the height of the plug. As a result, the plug can be reliably inserted into the through electrode even at the position where the distance from the electrode pad to the through electrode is maximum, and the through electrode and the electrode pad can be reliably connected via the plug.

The plug may be formed by disposing a conductor layer around a core made of an electrically insulating material.
With such a configuration, it can function in the same manner as a plug formed of only a conductor, and the number of conductor materials for forming the plug can be reduced. Thereby, productivity can be improved and material cost can be reduced.

Further, it is desirable that the width of the through electrode is larger than the maximum width of the plug and smaller than the width of the electrode pad.
With this configuration, when the hole for forming the through electrode is formed in the base, the plug formed on the electrode pad is accommodated inside the hole, and the entire height of the plug is adjusted to the height of the hole. It can be a margin for absorbing the variation. Therefore, the plug can be used efficiently and the material of the plug can be reduced. Further, even if the through electrode reaches the back surface of the electrode pad, it does not deviate from the electrode pad formation region. Therefore, the through electrode does not affect the electronic circuit around the electrode pad. Thereby, the connection reliability of the through electrode can be improved.

A plurality of the plugs may be erected from one electrode pad.
With this configuration, the plug and the through electrode can be electrically connected at a plurality of points, so that the contact area between the plug and the through electrode can be increased as compared with the case where one plug is erected. At the same time, connection reliability can be improved. Further, since the volume of each plug can be reduced, the formation of the plug can be facilitated, and the productivity can be improved and the cost can be reduced.

In addition, a method for manufacturing a semiconductor device according to the present invention includes a method for manufacturing a semiconductor device including an electrode pad formed on an active surface of a substrate and a through electrode formed from the back surface of the substrate toward the electrode pad. And forming a taper-shaped plug from the formation region of the electrode pad toward the back surface, forming the electrode pad, and forming a hole from the back surface toward the electrode pad, And a step of exposing the tip of the plug, and a step of filling the hole with a conductive material to form the through electrode.
According to such a manufacturing method, even when the distance from the electrode pad to the through electrode varies due to the difference in the etching rate at the time of hole formation, this variation is absorbed by the height of the plug, and the plug is The through electrode and the electrode pad can be electrically connected to each other. In addition, since the through electrode does not have to be in direct contact with the electrode pad, it is possible to prevent the occurrence of a notch due to the difference in the etching rate when forming the hole. Moreover, since the variation in the distance from the electrode pad to the through electrode can be absorbed by the plug, the etching rate can be improved as compared with the conventional case.
Therefore, according to the method for manufacturing a semiconductor device of the present invention, it is possible to improve the productivity and obtain a semiconductor device provided with a through electrode having high connection reliability.

Moreover, you may have the process of grind | polishing the said back surface and thinning the said base | substrate before the process of forming the said plug.
According to such a manufacturing method, even if a dimensional error occurs in the thickness dimension of the base body due to the thinning process of the base body, thereby causing a variation in the distance between the electrode pad and the through electrode, this variation is caused by the plug. The through electrode and the electrode pad can be electrically connected through the plug.

Further, in the step of forming the holes, the substrate is etched to form a plurality of the holes simultaneously toward the plurality of electrode pads. In the etching process, any one of the holes forms the substrate. It is desirable to stop when penetrating or before.
According to such a manufacturing method, it is possible to prevent the holes penetrating the base body in the shortest time from being excessively processed until another hole penetrates the base body. Therefore, it is possible to prevent the notch from being generated on the side wall of the hole.

In addition, an electronic device according to the present invention includes the above-described semiconductor device.
With such a configuration, a semiconductor device with high electrical connection reliability can be provided, so that an electronic device with high electrical connection reliability can be obtained.

[First embodiment]
Next, a first embodiment of the present invention will be described based on the drawings.
FIG. 1 is a cross-sectional view of the main part of the semiconductor device 1. As shown in FIG. 1, a first insulating film 4 is formed on the active surface 3 of the base 2 of the semiconductor device 1. The base 2 is made of, for example, silicon, and the first insulating film 4 is made of, for example, SiO ₂ . A plurality of electrode pads 5 and 6 are formed on the first insulating film 4 on the active surface 3 of the substrate 2. The electrode pads 5 and 6 are made of a conductive material such as Al, and have, for example, a square shape in plan view. These electrode pads 5 and 6 are connected to an integrated circuit (not shown) made of transistors, memory elements, and other electronic elements formed on the active surface 3.

  A plurality of holes 10 and 11 for forming the through electrodes 8 and 9 are formed from the back surface 7 of the substrate 2 toward the electrode pads 5 and 6, and the through electrodes 8 and 9 are formed inside the holes 10 and 11. ing. The through electrodes 8 and 9 are made of a conductive material such as Cu, and have a cylindrical shape, for example. Among the plurality of through electrodes 8 and 9, the first through electrode 8 provided corresponding to the first electrode pad 5 reaches the back surface 12 of the first electrode pad 5 from the back surface 7 of the base 2. The second through electrode 9 provided corresponding to the second electrode pad 6 is formed in a state where a distance d is left between the second electrode pad 6 and the second through electrode 9. The through electrodes 8 and 9 are expanded in diameter along the second insulating film 14 formed on the back surface 7 of the base 2, and lands 21 and 22 are formed. The surfaces of the lands 21 and 22 may be plated with Sn—Ag, Sn, or the like in order to mount the base 2 three-dimensionally.

The second insulating film 14 is formed of, for example, SiN, SiO ₂ or the like, and is also formed between the through electrodes 8 and 9 and the side walls of the holes 10 and 11. A base film (not shown) is formed between the second insulating film 14 and the through electrodes 8 and 9.
The base film is composed of a barrier layer (barrier metal) formed on the surface of the insulating film 14 and a seed layer formed on the surface of the barrier layer. The barrier layer is for preventing the conductive material for forming the through electrodes 8 and 9 from diffusing into the base 2 and is formed of TiW (titanium tungsten), TiN (titanium nitride) or the like. On the other hand, the seed layer serves as an electrode when the through electrodes 8 and 9 are formed by plating, and is formed of Cu, Au, Ag, or the like.

  On the back surfaces 12 and 13 of the electrode pads 5 and 6, for example, conical taper-shaped plugs 15 and 16 whose vertical cross-sections form an inverted triangle electrically connect the bottom surfaces to the electrode pads 5 and 6. , With the apex facing the through electrodes 8 and 9. Similarly to the electrode pads 5 and 6, the plugs 15 and 16 are made of a conductor material such as Al. Here, the first plug 15 connected to the first electrode pad 5 is included in the first through electrode 8 and is electrically connected to the first through electrode 8. The tip including the apex of the second plug 16 connected to the second electrode pad 6 enters the second through electrode 9 and is electrically connected to the second through electrode 9. It has become. As a result, the through electrodes 8 and 9 are electrically connected to the electrode pads 5 and 6 through the plugs 15 and 16.

At this time, the substrate 2 has a variation in the thickness dimensions T ₁ and T ₂ due to a processing error caused by the thinning process. In addition, the depth dimensions D ₁ and D ₂ of the holes 10 and 11 vary due to the difference in the etching rate for forming the holes 10 and 11. In order to absorb this variation, the height H of each plug 15, 16 is set so that the electrode pad 5, 6 between the plurality of through electrodes 8, 9 formed on the base 2 extends to the end 17 of the through electrodes 8, 9. The distance d up to 18 is greater than the maximum value.

That is, the maximum value T ₂ of the thickness dimension is estimated, and further, the minimum value D ₂ of the depth dimension is estimated from the variation in etching processing of the holes 10 and 11, and the maximum distance d from the electrode pad 6 to the through electrode 9 is estimated. Calculate the value. And the height H of the plug 16 is set higher than the maximum value.
Here, the distance d from the electrode pads 5, 6 to the ends 17, 18 of the through electrodes 8, 9 is the thickness dimension T ₁ of the base 2 at the location where the holes 10, 11 are formed after the base 2 is thinned. , T ₂ , and a distance d calculated by subtracting the depth dimensions D ₁ and D ₂ of the holes 10 and 11. Note that the thickness dimensions T ₁ and T ₂ of the base 2 include the thickness of the first insulating film 4.
The through electrodes 8 and 9 and the plugs and electrode pads 5 and 6 have a size relationship that the diameters R ₁ and R ₂ of the through electrodes 8 and 9 are larger than the maximum diameters R ₃ and R _{4 of the} plug, and the electrode pad 5 , 6 width W ₁ , W ₂ and the depth smaller than the depth perpendicular to the paper surface.

(Method for manufacturing semiconductor device)
Next, a method for manufacturing the semiconductor device of the present embodiment will be described. It is assumed that the following steps are simultaneously performed on the formation regions of a plurality of semiconductor devices on the silicon wafer.
As shown in FIG. 2, first, recesses 17 and 18 for forming plugs 15 and 16 are formed on the active surface 3 of the base 2 by etching. For etching the substrate 2, dry etching such as RIE (Reactive Ion Etching) or wet etching can be used. The recesses 17 and 18 are formed in a funnel-shaped tapered shape in which the diameter of the opening is large and the diameter decreases as the depth of the recesses 17 and 18 increases. The recesses 17 and 18 are formed from the formation region of the electrode pads 5 and 6 formed in the subsequent process on the active surface 3 of the substrate toward the back surface 7 of the substrate 2. Further, an integrated circuit or the like (not shown) composed of transistors, memory elements, and other electronic elements is formed on the active surface 3 of the base 2.

Next, as shown in FIG. 3, an insulating film 4 such as SiO ₂ is formed on the active surface 3 of the substrate 2 by forming an oxide film using a thermal oxidation furnace, or by CVD (Chemical Vapor Deposition). At this time, the insulating film 4 is also formed inside the recesses 17 and 18 along the shape of the recesses 17 and 18. Further, a conductor material is filled inside the recesses 17 and 18 by sputtering or the like to form tapered plugs 15 and 16 as shown in FIG.

  Next, a conductive film made of a conductive material such as Al is formed on the entire active surface 3, and is planarized by CMP (Chemical Mechanical Polishing) if necessary. Then, through steps such as photolithography and etching, electrode pads 5 and 6 electrically connected to the bottom surfaces of the plugs 15 and 16 are formed, and the electrode pads 5 and 6 are further formed into transistors, memory elements, and the like. It is connected to an integrated circuit made up of electronic elements. At this time, a wafer level CSP layer (not shown) made of a rearrangement wiring (not shown) or the like may be formed on the active surface.

  Next, as shown in FIG. 5, an adhesive 19 is applied to the active surface 3 of the base 2 and a support substrate 20 is bonded. Here, as the adhesive 19, for example, a resin that can be peeled off by irradiation with light such as ultraviolet rays is used. Further, as the support substrate 20, for example, a glass substrate or the like that transmits light for peeling the adhesive 19 is used. The support substrate 20 is preferably the same size as the base 2 or a size close thereto. For example, when the base 2 is circular in plan view, it is desirable to use a support substrate 20 having the same diameter as the base or a diameter close thereto.

  Next, the substrate 2 is thinned. The substrate 2 is thinned by grinding from the back surface 7 ′ of the substrate 2. Thereafter, the crushed layer formed on the back surface 7 of the substrate 2 by grinding is removed by spin etching, dry polishing, or the like. Thereby, the thickness dimension T of the base 2 is reduced to, for example, about 100 μm. 6 to 8 described later, the support substrate 20 and the adhesive 19 are omitted.

Subsequently, as shown in FIG. 6, through electrodes 8 and 9 are formed from the back surface 7 of the substrate 2 toward the electrode pads 5 and 6 formed on the active surface 3 by dry etching such as RIE. Holes 10 and 11 are formed. At this time, the etching is stopped when any of the holes 10 and 11 penetrates the base 2 or before that. That is, in consideration of the dimensional error of the thickness dimension T due to the thinning process of the base 2 and the etching speed distribution on the entire back surface 7 of the base 2, the hole 10 that penetrates the base 2 and reaches the insulating film 4 in the shortest time. Find the processing time. Then, the etching amount (time) is set to the calculated processing time or a shorter time. Thereafter, the insulating film 4 on the surfaces of the plugs 15 and 16 protruding from the terminal portions of the formed holes 10 and 11 and the insulating film 4 on the back surface 12 of the electrode pad 5 exposed at the terminal portions of the holes 10 are removed by etching. For example, the insulating film 4 formed of SiO ₂ can be removed by oxide film etching.

Next, as shown in FIG. 7, a second insulating film 14 is formed on the side walls of the holes 10 and 11 and the back surface 7 of the base 2 by a CVD method or the like. For example, the second insulating film 14 is formed of SiO ₂ , SiN, or the like. Subsequently, as shown in FIG. 8, the second insulating film 14 formed on the surfaces of the plugs 15 and 16 is removed by oxide film etching or the like. Here, in the first hole 10 that has reached the first insulating film 4 on the back surface 12 of the electrode pad 5, the first insulating film 14 on the back surface 12 of the electrode pad 5 is also removed. At this time, in order to protect the second insulating film 14 on the back surface 7 of the base 2, the entire surface except the holes 10 and 11 on the back surface 7 of the base 2 is coated with a resist (not shown).

  Next, a conductor material is filled into the holes 10 and 11. First, the natural oxide film on the back surface 12 of the electrode pad 5 and the surfaces of the plugs 15 and 16 is removed by reverse sputtering. Thereafter, a base film is formed on the sidewalls of the holes 10 and 11. First, a barrier layer made of TiW, TiN or the like is formed by sputtering. Further, a seed layer made of Cu, Au, Ag or the like is formed by sputtering.

  Subsequently, using the seed layer as an electrode, the holes 10 and 11 are filled with a conductive material by electroplating, and at the same time, lands 21 and 22 are formed on the back surface 7 of the base 2. Thereafter, the support substrate 20 and the substrate 2 are peeled off by irradiating the adhesive 19 with ultraviolet rays or the like from the support substrate 20 side. And the formation area of the several semiconductor device in a silicon wafer is separated into pieces by dicing. Thus, the semiconductor device 1 shown in FIG. 1 can be obtained.

Next, the operation of this embodiment will be described.
When the back surface 7 ′ of the substrate 2 is polished to reduce the thickness of the substrate 2, a dimensional error of the thickness dimension T occurs in the substrate 2. Further, when the support substrate 20 is bonded, the base 2 is warped. In addition, when the plurality of holes 10 and 11 are formed from the back surface 7 of the substrate 2 by etching, it is difficult to keep the etching conditions uniform on the entire back surface 7 of the substrate 2. This produces a velocity distribution.

  The holes 10 and 11 formed from the back surface 7 of the substrate 2 are formed on the electrode pads 5 and 6 of the active surface 3 of the substrate 2 due to the influence of variations in the thickness dimension T, the warp of the substrate 2 and the etching rate. There is also a variation in the time required to reach the insulating film 4 on the back surfaces 12 and 13. For this reason, conventionally, as shown in FIG. 14, the first hole 10 that has reached the insulating film 4 is excessively etched until the other second hole 11 reaches the insulating film 4. It was. As a result, as shown in FIG. 15, the side wall of the first hole 10 in the vicinity of the insulating film 4 is eroded in the direction along the insulating film 4, causing a notch N to be generated on the side wall of the first hole 10. It was.

  However, in the present embodiment, when the holes 10 and 11 for forming the through electrodes 8 and 9 are formed from the back surface 7 of the base 2, the insulating film 4 formed on the back surface 12 of the electrode pad 5 is formed in the shortest time. Etching is performed by determining the processing time of the first hole 10 to be reached and setting the etching amount (time) to the determined processing time. Therefore, when any of the holes 10 and 11 penetrates the base 2, that is, when the insulating film 4 formed on the back surfaces 12 and 13 of the electrode pads 5 and 6 is exposed, the etching is stopped to thereby insulate first. It is possible to prevent the first hole 10 reaching the film 4 from being etched excessively and to prevent the generation of the notch N.

  Further, the second hole 11 does not penetrate the base body, and the second penetration electrode does not reach the second electrode pad 6, but the height H of the plugs 15 and 16 penetrates from the electrode pads 5 and 6. By setting the distance d to the electrodes 8 and 9 to be not less than the maximum value d, a part of the plug 16 including the tip of the plug 16 can be reliably projected from the terminal end of the second hole 11. Thereby, the second through electrode 9 formed in the second hole 11 can be electrically connected to the electrode pad 6 through the plug 16 without reaching the electrode pad 6.

Also, to estimate the maximum value T ₂ of the thickness from the dispersion of the thinning processing of a substrate 2, it was estimated minimum value D ₂ of the depth from the variation in the etched holes. Then, the minimum value D ₂ of the depth dimension of the holes 10 and 11 formed in the base 2 to form the through electrodes 8 and 9 is subtracted from the maximum thickness T _{2 of} the base 2 after the thinning process. Thus, the maximum value of the distance d from the electrode pad 6 to the through electrode 9 was calculated. And the height H of the plug 16 was set higher than the maximum value.
Thereby, the height H of the plugs 15 and 16 can be made equal to or greater than the maximum value of the distance d from the electrode pads 5 and 6 to the through electrodes 8 and 9. Therefore, even at the portion where the distance d from the second electrode pad 6 to the second through electrode 9 is the maximum, the second plug 16 is inserted into the second through electrode 9 and the second plug 16 is inserted through the second plug 16. Thus, the second through electrode 9 and the second electrode pad 6 can be reliably connected.

  Since the plugs 15 and 16 are formed in a tapered shape, even if the insulating film 4 is formed on the surfaces of the plugs 15 and 16 when the semiconductor device 1 is manufactured, as shown in FIG. The surfaces of 15, 16 can be crossed with respect to the etching direction. Therefore, the insulating film 4 formed on the surfaces of the plugs 15 and 16 can be easily removed by anisotropic etching or the like. Therefore, the productivity is improved and the connection area between the through electrodes 8 and 9 and the plugs 15 and 16 is easily increased as compared with the case where a plug having a uniform width (diameter) between the base end and the distal end is used. Can be made. In addition, the volume of the plugs 15 and 16 can be reduced, and the conductive material can be reduced. Therefore, the plugs 15 and 16 can be easily formed to improve productivity, and the cost of the conductor material can be reduced.

Further, the width _(diameter) R 1, _{R 2} of the through electrodes 8 and 9 the maximum width of the plug (maximum _diameter) R 3, _R greater than _4, the hole for forming a through electrode 8 and 9 to the substrate 2 When forming 10 and 11, the plugs 15 and 16 can be accommodated inside the holes 10 and 11 from the periphery of the bottom surface having the maximum diameter to the apex. Therefore, the entire height H of the plugs 15 and 16 can be used as a margin for absorbing variations in the holes 10 and 11. Further, since the widths (diameters) R ₁ and R ₂ of the through electrodes 8 and 9 are smaller than the widths W ₁ and W _{2 of the} electrode pads 5 and 6, the holes 10 and 11 for forming the through electrodes 8 and 9 are electrode pads. Even when reaching 5 and 6, the through-electrodes 8 and 9 are within the formation region of the electrode pads 5 and 6. Therefore, the integrated circuit formed on the active surface 3 is not adversely affected.

  Therefore, according to the present embodiment, even when the distance d from the electrode pads 5 and 6 to the through electrodes 8 and 9 varies, the variation is absorbed by the height H of the plugs 15 and 16. The through electrodes 8 and 9 and the electrode pads 5 and 6 can be reliably connected. Therefore, the semiconductor device 1 including the through electrodes 8 and 9 with high connection reliability can be obtained. Moreover, since the variation in the distance d from the through electrodes 8 and 9 to the electrode pads 5 and 6 can be absorbed by the height H of the plugs 15 and 16, the etching speed can be increased. Therefore, the productivity of the semiconductor device 1 can be improved.

[Second Embodiment]
Next, a second embodiment of the present invention will be described with reference to FIGS. 9 and 10 with reference to FIGS. 2, 3, and 5 to 8. In the present embodiment, as shown in FIGS. 9 and 10, the plugs 15 and 16 are formed in such a manner that conductor layers 25 and 26 are disposed around cores 23 and 24 made of an electrically insulating material. It is different from the embodiment. Others are the same as in the first embodiment, and thus the same parts are denoted by the same reference numerals and description thereof is omitted.

  As shown in FIG. 9, the back surfaces 12 and 13 of the electrode pads 5 and 6 are provided with cores 23 and 24 of an electrically insulating material inside, and the shape of the vertical section forms an inverted triangle, for example, a conical tapered shape. The plugs 15 and 16 are erected with the apexes facing the through electrodes 8 and 9. The conductor layers 25 and 26 around the cores 23 and 24 are formed of a conductor material such as Al, for example, similarly to the electrode pads 5 and 6, and are electrically connected to the electrode pads 5 and 6 on the bottom surfaces of the plugs 15 and 16. Connected.

  As a method for manufacturing such plugs 15 and 16, after the same process as that of the first embodiment, the insulating film 4 is formed on the active surface 3 of the substrate 2, and then, as shown in FIG. The conductor layers 25 and 26 are formed inside the layers 17 and 18, and the cores 23 and 24 are formed by filling the conductor layers 25 and 26 with an electrically insulating material, and the tapered plugs 15 and 16 are formed. Form.

  Therefore, according to the present embodiment, the conductor layers 25 and 26 around the cores 23 and 24 of the plugs 15 and 16 are electrically connected to the electrode pads 5 and 6, and the shapes of the plugs 15 and 16 are the first. Since it is the same as that of embodiment, the effect similar to 1st embodiment can be acquired. In addition, the conductor material for forming the plugs 15 and 16 can be reduced, and the productivity can be improved and the cost of the conductor material can be reduced.

[Third embodiment]
Next, a third embodiment of the present invention will be described with reference to FIGS. 11 and 12 with reference to FIGS. 2, 3 and 5 to 8. This embodiment is different from the first embodiment in that a plurality of plugs 15a to 15c and 16a to 16c are erected from the electrode pads 5 and 6, as shown in FIGS. Others are the same as in the first embodiment, and thus the same parts are denoted by the same reference numerals and description thereof is omitted.

  As shown in FIG. 11, the back surfaces 12 and 13 of the electrode pads 5 and 6 have, for example, conical taper-shaped plugs 15 to c and 16 a to c, each having a vertical cross-sectional shape forming an inverted triangle. A plurality of the pads are erected in a state of being electrically connected to the electrode pads 5 and 6 and having apexes facing the through electrodes 8 and 9. Similarly to the electrode pads 5 and 6, the plugs 15a to 15c and 16a to 16c are formed of a conductive material such as Al.

  As a method of manufacturing such plugs 15a to 15c and 16a to 16c, the plugs 15a to 15c and 16a to 15c are formed on the active surface 3 by dry etching or wet etching such as RIE as in the first embodiment. A plurality of recesses 17a-c and 18a-c are formed. And after forming the insulating film 4 in the active surface 3 of the base | substrate 2 similarly to 1st embodiment, a conductor layer is formed in the active surface 3 of the base | substrate 2 by sputtering etc. Furthermore, recessed part 17a-c, 18a- A plurality of tapered plugs 15a to 15c and 16a to 16c are formed by filling the inside of c with a conductive material.

  Therefore, according to this embodiment, since the through electrodes 8 and 9 are electrically connected via the plurality of plugs 15a to 15c and 16a to 16c, the same effect as that of the first embodiment is obtained. be able to. In addition, the plugs 15a to 15c and 16a to 15c are electrically connected to the through electrodes 8 and 9 at a plurality of positions. Therefore, the contact area between the plugs 15a to 15c and 16a to 16c and the through electrodes 8 and 9 can be increased and the connection reliability can be improved as compared with the case where one plug 15 and 16 is erected. Moreover, the volume of each plug 15a-c and 16a-c can be reduced compared with the case where one plug 15 and 16 is standingly arranged. Therefore, the plugs 15a to 15c and 16a to 16c can be easily formed, and the conductor material to be used can be reduced. Thereby, productivity can be improved and material cost can be reduced.

[Electronics]
Next, an electronic apparatus including the semiconductor device according to the above-described embodiment will be described.
As shown in FIG. 13, a mobile phone 300 is one in which the above-described semiconductor device 1 is disposed inside a casing. Since the mobile phone 300 (electronic device) having such a configuration includes a semiconductor device with high connection reliability, the wiring connection has high reliability.

  The technical scope of the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention. The layer configuration is merely an example, and can be changed as appropriate.

  The electronic device is not limited to the above-described mobile phone, and can be applied to various electronic devices. For example, notebook computers, liquid crystal projectors, multimedia-compatible personal computers (PCs) and engineering workstations (EWS), pagers, word processors, televisions, viewfinder type or monitor direct view type video tape recorders, electronic notebooks, electronic desks The present invention can be applied to electronic devices such as a computer, a car navigation device, a POS terminal, and a device having a touch panel.

  In addition, the constituent material of the electrode pad can be appropriately changed according to the electrical characteristics, physical characteristics, and chemical characteristics required for the electrode pad. For example, the electrode pad may be formed using only copper with low electrical resistance. The electrode pads are, for example, a first layer made of Ti (titanium) or the like, a second layer made of TiN (titanium nitride) or the like, a third layer made of AlCu (aluminum / copper) or the like, a fourth layer made of TiN or the like. A laminated structure in which (cap layers) are laminated in this order may be employed.

  The shape of the electrode pad in plan view is not limited to a quadrangle, and may be a circle or a polygon other than a quadrangle. Further, the through electrode is not limited to a cylindrical shape, and may be a polygonal column shape having a polygonal cross section. Moreover, if a plug is a taper shape, it will not be restricted to a cone shape. For example, the cone may have a polygonal shape, or may have a tapered shape having a stepped step.

  Also, after the hole for forming the through electrode is formed in the base, the step of removing the insulating film formed on the surface of the plug is omitted, and the plug after the step of covering the side wall and back surface of the hole with the insulating film A process of removing the insulating film on the surface may be substituted. In this case, the manufacturing process can be simplified and productivity can be improved.

  Further, not only when the distance between the electrode pad and the through electrode varies among a plurality of through electrodes of each semiconductor device, but also the distance between the electrode pad and the through electrode varies between one through electrode of each semiconductor device or between different lots. Needless to say, the present invention can also be applied to cases.

It is an expanded sectional view of the important section of the semiconductor device in a first embodiment of the present invention. FIG. 2 is an explanatory diagram of a manufacturing process of the semiconductor device of FIG. 1. FIG. 2 is an explanatory diagram of a manufacturing process of the semiconductor device of FIG. 1. FIG. 2 is an explanatory diagram of a manufacturing process of the semiconductor device of FIG. 1. FIG. 2 is an explanatory diagram of a manufacturing process of the semiconductor device of FIG. 1. FIG. 2 is an explanatory diagram of a manufacturing process of the semiconductor device of FIG. 1. FIG. 2 is an explanatory diagram of a manufacturing process of the semiconductor device of FIG. 1. FIG. 2 is an explanatory diagram of a manufacturing process of the semiconductor device of FIG. 1. It is an expanded sectional view of the important section of the semiconductor device in a second embodiment of the present invention. FIG. 10 is an explanatory diagram of a manufacturing process of the semiconductor device of FIG. 9. It is an expanded sectional view of the important section of the semiconductor device in a third embodiment of the present invention. FIG. 12 is an explanatory diagram of a manufacturing process of the semiconductor device of FIG. 11. It is a perspective view of one embodiment of the electronic device of the present invention. It is an expanded sectional view of the principal part of the conventional semiconductor device. It is an enlarged view of the A section of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor device, 2 base | substrate, 3 active surface, 5 electrode pad, 6 electrode pad, 7 back surface, 8 through electrode, 9 through electrode, 10 hole, 11 hole, 15 plug, 16 plug, 15a-c plug, 16a-c Plug, 23 core, 24 core, 25 conductor layer, 26 conductor layer, 300 mobile phone (electronic device), d distance, D ₁ hole depth, D ₂ hole depth, H plug height , T ₁ thickness dimension, T ₂ thickness dimension, W ₁ electrode pad width, W ₂ electrode pad width,

Claims (11)

  A tapered plug in which an electrode pad formed on an active surface of a base and a through electrode formed from the back surface of the base toward the electrode pad are erected from the electrode pad toward the through electrode A semiconductor device characterized in that it is electrically connected via a pin.   2. The semiconductor device according to claim 1, wherein a plurality of the electrode pads and the through electrodes are formed on the base.   3. The semiconductor device according to claim 1, wherein a height of the plug is equal to or greater than a maximum value of a distance from the electrode pad to the through electrode.   The height of the plug was calculated by subtracting the depth dimension of the hole formed in the base body to form the through electrode from the thickness dimension after the thinning process of the base body. 3. The semiconductor device according to claim 1, wherein the semiconductor device is equal to or greater than a maximum value of a distance to the electrode.   5. The semiconductor device according to claim 1, wherein the plug is formed by disposing a conductor layer around a core made of an electrically insulating material.   6. The semiconductor device according to claim 1, wherein a width of the through electrode is larger than a maximum width of the plug and smaller than a width of the electrode pad.   The semiconductor device according to claim 1, wherein a plurality of the plugs are erected from one electrode pad. A method of manufacturing a semiconductor device comprising: an electrode pad formed on an active surface of a base; and a through electrode formed from the back surface of the base toward the electrode pad,
Forming a tapered plug from the formation region of the electrode pad toward the back surface, and forming the electrode pad;
Forming a hole from the back surface toward the electrode pad, and exposing at least a tip of the plug;
Filling the holes with a conductive material to form the through electrodes;
A method for manufacturing a semiconductor device, comprising:   9. The method of manufacturing a semiconductor device according to claim 8, further comprising a step of thinning the base by polishing the back surface before the step of forming the plug. In the step of forming the holes, a plurality of the holes are simultaneously formed toward the plurality of electrode pads by etching the substrate.
10. The method of manufacturing a semiconductor device according to claim 8, wherein the etching process is stopped when any of the holes penetrates the base body or before that. 11.   An electronic apparatus comprising the semiconductor device according to claim 1.

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