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JP2008147469A - Semiconductor device - Google Patents

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JP2008147469A
JP2008147469A JP2006333941A JP2006333941A JP2008147469A JP 2008147469 A JP2008147469 A JP 2008147469A JP 2006333941 A JP2006333941 A JP 2006333941A JP 2006333941 A JP2006333941 A JP 2006333941A JP 2008147469 A JP2008147469 A JP 2008147469A
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buffer plate
bonding material
stress buffer
chip
joining
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Shinji Hiramitsu
真二 平光
Koji Sasaki
康二 佐々木
Masato Nakamura
真人 中村
Yasushi Ikeda
靖 池田
Satoshi Matsuyoshi
聡 松吉
Ryoichi Kajiwara
良一 梶原
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Hitachi Ltd
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Hitachi Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device which uses a lead-free material as a joining material, assures sufficient performance, connection strength and resistance to thermal fatigue under a high temperature environment during use, and does not have a Si chip damaged by thermal stress. <P>SOLUTION: Ag nano paste which is slightly poor in resistance to thermal fatigue but is excellent in heat resistance is employed as joining materials 4 and 5 for joining the Si chip 1 and buffer plates 2 and 3. Sn-Cu-based solder which is slightly poor in the heat resistance but excellent in the resistance to thermal fatigue is employed as joining materials 8 and 9 for joining the buffer plates 2 and 3 and the electrodes 6 and 7. Use of the materials suitable for the place of the joining materials can assure the sufficient performance, connection strength and resistance to thermal fatigue and also achieve a lead-free semiconductor device which does not have the Si chip damaged by thermal stress. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、半導体装置、特に自動車等のオルタネータに用いられるダイオードに関する。   The present invention relates to a diode used for an alternator of a semiconductor device, particularly an automobile.

自動車用オルタネータは、エンジンによって得られた回転力から発電してバッテリーに給電する3相交流式の発電機であり、オルタネータダイオードは、発電機によって得られた3相交流を、バッテリーに供給するために直流に整流する機能を持っている。オルタネータダイオードは、整流機能を持つSiチップと、通電機能を持つリード電極及びベース電極と、これらを接合するはんだからなり、ベース電極の内側にシリコーンゴムなどの樹脂を充填した構造である。   The alternator for automobiles is a three-phase AC generator that generates electric power from the rotational force obtained by the engine and feeds the battery, and the alternator diode is used to supply the three-phase AC obtained by the generator to the battery. Has the function of rectifying to direct current. The alternator diode is composed of a Si chip having a rectifying function, a lead electrode and a base electrode having a current-carrying function, and solder for joining them, and a resin such as silicone rubber is filled inside the base electrode.

オルタネータ動作時には、オルタネータダイオードには大電流が流れるため、損失によりSiチップが発熱し、Siチップと、周辺のはんだ,リード電極及びベース電極は最高で200℃以上の高温になる。オルタネータが停止すると電流も停止し、オルタネータダイオードは周囲環境温度まで冷却される。オルタネータは長期にわたって動作と停止を繰り返すため、オルタネータダイオードは加熱による膨張と冷却による収縮を繰り返す。このとき、Siチップとリード電極,ベース電極の線膨張係数が異なるため熱変形量に差が生じることから、これらを接合するはんだには熱応力が発生し、この熱応力が原因ではんだが疲労破壊する恐れがある。   At the time of alternator operation, since a large current flows through the alternator diode, the Si chip generates heat due to loss, and the Si chip, peripheral solder, lead electrode and base electrode reach a high temperature of 200 ° C. or more at the maximum. When the alternator stops, the current stops and the alternator diode is cooled to the ambient temperature. Since the alternator repeats operation and stop for a long time, the alternator diode repeats expansion by heating and contraction by cooling. At this time, since the thermal expansion amounts differ because the linear expansion coefficients of the Si chip, the lead electrode, and the base electrode are different, thermal stress is generated in the solder that joins them, and the solder is fatigued due to this thermal stress. There is a risk of destruction.

このため、例えば特許文献1に示すような、Siチップとリード電極の間、Siチップとベース電極の間に、線膨張係数がSiの線膨張係数より大きく、かつ、リード電極,ベース電極材料の線膨張係数よりも小さい材料からなる応力緩衝板を設けたダイオードが提案されている。   For this reason, for example, as shown in Patent Document 1, between the Si chip and the lead electrode, between the Si chip and the base electrode, the linear expansion coefficient is larger than the linear expansion coefficient of Si, and the lead electrode and the base electrode material A diode provided with a stress buffer plate made of a material having a smaller coefficient of linear expansion has been proposed.

特開昭56−50542号公報JP-A-56-50542

近年、鉛が環境に及ぼす影響が明らかになるにつれて、電子部品への鉛の使用が規制される傾向が強まっており、2006年7月には欧州でRoHS規定が施行された。この
RoHS規定に対応し、電子部品から鉛を排除するために、これまでにSn−Ag系,
Sn−Bi系はんだ等、多種多様な鉛非含有のはんだが開発されてきた。
In recent years, as the impact of lead on the environment has become clear, there is an increasing tendency to restrict the use of lead in electronic components. In July 2006, the RoHS regulations were enforced in Europe. In order to comply with this RoHS regulation and eliminate lead from electronic parts, Sn-Ag series,
A wide variety of lead-free solders such as Sn-Bi solders have been developed.

しかし、オルタネータダイオードにおいては、その温度は200℃以上の高温に達することもある。このため、接合材として融点が低いはんだは使用できない。さらに、オルタネータダイオードの特性,信頼性を確保するために、その接合材には、導電性,熱伝導性,接続強度,耐熱疲労性および低い降伏応力・硬度が要求される。しかし、これらの要求される全ての特性を十分に兼ね備えた鉛非含有のはんだは見つかっていない。   However, in the alternator diode, the temperature may reach a high temperature of 200 ° C. or higher. For this reason, a solder with a low melting point cannot be used as a bonding material. Furthermore, in order to ensure the characteristics and reliability of the alternator diode, the bonding material is required to have conductivity, thermal conductivity, connection strength, heat fatigue resistance, and low yield stress / hardness. However, no lead-free solder has been found that has all these required characteristics.

本発明は前記のような問題点を解決するためになされたものであり、その目的は、接続材として鉛非含有の材料を使用し、かつ、使用時の高温環境においても十分な性能,接続強度および耐熱疲労性を確保し、かつ、熱応力によりSiチップに破損を生じることのない半導体装置を提供することである。   The present invention has been made to solve the above-described problems, and its purpose is to use a lead-free material as a connection material and to provide sufficient performance and connection even in a high-temperature environment at the time of use. An object of the present invention is to provide a semiconductor device that ensures strength and thermal fatigue resistance and that does not cause damage to the Si chip due to thermal stress.

本発明では、前記目的を達成するために、Siチップ上下の接合材に比べ、上側応力緩衝板の上側の接合材および下側応力緩衝板の下側の接合材の方が、使用時の温度で20℃程度低いことに着目した。Siチップの上下に応力緩衝板を設けた半導体装置構成とし、Siチップ上下の接合材には、融点が200℃以上である銀のナノ粒子と有機材料の混合材の接合材を用い、上側応力緩衝板の上側の接合材および下側応力緩衝板の下側の接合材には、180℃程度あれば十分な接続強度および耐熱疲労性を有するSnとCuからなる合金の一部ないし全部からなる接合材を用いる。一方で、応力緩衝板には、線膨張係数がリード電極やベース電極の線膨張係数よりもSiチップの線膨張係数に近いものを用いる。これによって、Siチップ・応力緩衝板間の線膨張係数は、比較的小さくなるので、降伏応力や硬度が比較的高い銀のナノ粒子と有機材料の混合材の接合材でも対応することができる。また、応力緩衝板・リード電極ベース電極間の線膨張係数は、比較的大きくなるが、ここを接合するSn−Cu系はんだは、十分な接続強度を有している。   In the present invention, in order to achieve the object, the bonding material on the upper side of the upper stress buffer plate and the bonding material on the lower side of the lower stress buffer plate are used at a higher temperature during use than the bonding material on the upper and lower sides of the Si chip. It was noted that the temperature was about 20 ° C. lower. The semiconductor device has a structure in which stress buffer plates are provided above and below the Si chip. As the bonding material above and below the Si chip, a bonding material composed of a mixture of silver nanoparticles and an organic material having a melting point of 200 ° C. or higher is used. The bonding material on the upper side of the buffer plate and the bonding material on the lower side of the lower stress buffer plate are made of a part or all of an alloy composed of Sn and Cu having sufficient connection strength and heat fatigue resistance at about 180 ° C. A bonding material is used. On the other hand, a stress buffer plate having a linear expansion coefficient closer to that of the Si chip than that of the lead electrode or the base electrode is used. As a result, the linear expansion coefficient between the Si chip and the stress buffer plate is relatively small, so that a bonding material composed of a mixture of silver nanoparticles having a relatively high yield stress and hardness and an organic material can be used. In addition, the coefficient of linear expansion between the stress buffer plate and the lead electrode base electrode is relatively large, but the Sn—Cu solder that joins the stress buffer plate and the lead electrode base electrode has sufficient connection strength.

本発明によれば、接続材として鉛非含有の材料を使用し、かつ、使用時の熱応力によりSiチップに破損を生じず、かつ、十分な接続強度および耐熱疲労性を確保した半導体装置を得ることができる。   According to the present invention, there is provided a semiconductor device that uses a lead-free material as a connection material, does not cause damage to the Si chip due to thermal stress during use, and has sufficient connection strength and heat fatigue resistance. Obtainable.

以下本発明の実施例を図面を用いて説明する。   Embodiments of the present invention will be described below with reference to the drawings.

図1は本発明の実施例による半導体装置の断面を表す。本実施例では、Siチップ1の上下に応力緩衝板2,3を設け、Siチップと応力緩衝板の間を厚さ0.05mm の接合材4,接合材5で接合している。また、応力緩衝板2,3の上下にはCuリード電極6及びCuベース電極7を設け、応力緩衝板2とリード電極6の間、及び応力緩衝板3とベース電極7の間を厚さ0.2mm の接合材8,接合材9で接合している。また、ベース電極の内側は封止樹脂10で封止している。接合材4,5には銀のナノ粒子と有機材料の混合材を用いており、かつ、接合材8,9にはSn−Cu系はんだを用いている。応力緩衝板2,3は、その線膨張係数がSiチップ(3×10-6/℃)に近いものが好ましく、ここではMo(モリブデン,線膨張係数4.9×10-6/℃ )を用いている。他にW(タングステン,線膨張係数4.5×10-6/℃ ),Fe−42%Ni合金(通称42アロイ,線膨張係数5×10-6/℃),CIC(Cu−Invar−Cuの積層材,Invar(Fe−Ni合金)線膨張係数2.8×10-6/℃,Cu線膨張係数16.5×10-6/℃),Cu−Mo合金,Cu−Mo焼結体(等価線膨張係数7.3×10-6/℃) 等を用いても同様の効果を得る事ができる。 FIG. 1 shows a cross section of a semiconductor device according to an embodiment of the present invention. In this embodiment, stress buffer plates 2 and 3 are provided above and below the Si chip 1, and the Si chip and the stress buffer plate are bonded by a bonding material 4 and a bonding material 5 having a thickness of 0.05 mm. Cu lead electrodes 6 and Cu base electrodes 7 are provided above and below the stress buffer plates 2 and 3, and the thickness between the stress buffer plates 2 and 6 and between the stress buffer plates 3 and the base electrode 7 is 0. It is joined with a joining material 8 and a joining material 9 of 2 mm. The inner side of the base electrode is sealed with a sealing resin 10. The bonding materials 4 and 5 are made of a mixture of silver nanoparticles and an organic material, and the bonding materials 8 and 9 are made of Sn—Cu solder. It is preferable that the stress buffer plates 2 and 3 have a linear expansion coefficient close to that of a Si chip (3 × 10 −6 / ° C.). Here, Mo (molybdenum, linear expansion coefficient 4.9 × 10 −6 / ° C.) is used. Used. In addition, W (tungsten, linear expansion coefficient 4.5 × 10 −6 / ° C.), Fe-42% Ni alloy (common name 42 alloy, linear expansion coefficient 5 × 10 −6 / ° C.), CIC (Cu-Invar-Cu Laminated material, Invar (Fe—Ni alloy) linear expansion coefficient 2.8 × 10 −6 / ° C., Cu linear expansion coefficient 16.5 × 10 −6 / ° C.), Cu—Mo alloy, Cu—Mo sintered body (Equivalent linear expansion coefficient 7.3 × 10 −6 / ° C.) or the like can be used to obtain the same effect.

ここで、本発明が上記の接合部材を用いる理由を説明する。近年、鉛が環境に及ぼす影響が明らかになるにつれて、電子部品への鉛の使用が規制される傾向が強まっており、
2006年7月には欧州でRoHS規定が施行された。このRoHS規定に対応し、電子部品から鉛を排除するために、これまでにSn−Ag系,Sn−Bi系はんだ等、多種多様な鉛非含有のはんだが開発されてきた。
Here, the reason why the present invention uses the above-described joining member will be described. In recent years, as the impact of lead on the environment has become clear, there is an increasing tendency to restrict the use of lead in electronic components,
In July 2006, the RoHS regulations were enforced in Europe. A wide variety of lead-free solders such as Sn-Ag series and Sn-Bi series solders have been developed so far in order to eliminate lead from electronic components in response to this RoHS regulation.

これらの鉛非含有のはんだは、比較的低温で用いられる弱電機器用のはんだとしては有効である。しかし、オルタネータダイオードにおいては、大電流を流すために発熱量が大きいこと、自動車のエンジン近くに取り付けられるため周囲環境温度が高いことから、その温度は200℃以上に達することもある。このため、融点が低いSn−Ag系,Sn−Bi系等の鉛非含有のはんだは使用できず、従来はPb−5Sn等の高融点はんだを用いてきた。つまり、オルタネータダイオードの接合材には、融点が少なくとも200℃以上であることが要求される。
さらに、オルタネータダイオードの特性,信頼性を確保するために、その接合材には、導電性,熱伝導性,接続強度,耐熱疲労性および降伏応力・硬度が低いことが要求される。
These lead-free solders are effective as solders for weak electrical devices used at relatively low temperatures. However, in the alternator diode, the temperature may reach 200 ° C. or more because the calorific value is large for flowing a large current and the ambient temperature is high because it is mounted near the engine of an automobile. For this reason, lead-free solders such as Sn—Ag and Sn—Bi, which have a low melting point, cannot be used, and conventionally high melting point solders such as Pb-5Sn have been used. That is, the joining material of the alternator diode is required to have a melting point of at least 200 ° C. or higher.
Furthermore, in order to ensure the characteristics and reliability of the alternator diode, the bonding material is required to have low conductivity, thermal conductivity, connection strength, heat fatigue resistance, and yield stress / hardness.

一般的に、亜鉛,銀などの融点が高い鉛非含有のはんだは、降伏応力や硬度が高く、マウント時や使用時の熱応力によりSiチップに破損が生じる恐れがある。Bi−Ag系はんだのように融点が高く、降伏応力や硬度が低い鉛非含有のはんだも存在するが、低温での接続強度に難があるなど、要求される全ての特性を十分に兼ね備えた高融点で鉛非含有のはんだは見つかっていない。そのため、鉛非含有のオルタネータダイオードは実用化されていない。   In general, a lead-free solder having a high melting point such as zinc or silver has high yield stress and hardness, and there is a risk that the Si chip may be damaged by thermal stress during mounting or use. There are also lead-free solders with high melting points and low yield stress and hardness, such as Bi-Ag solders, but they have all the required characteristics such as low connection strength at low temperatures. No high melting point lead-free solder has been found. Therefore, a lead-free alternator diode has not been put into practical use.

図2に、鉛非含有のオルタネータダイオードの実現にあたり、接合材に要求される仕様と各材料の特性の関係を示す。どの接合材料も何れかの項目が適合しておらず、現在知られている単一材料では鉛非含有の前記半導体装置は実現できないことが分かる。   FIG. 2 shows the relationship between the specifications required for the bonding material and the characteristics of each material in realizing a lead-free alternator diode. None of the bonding materials meet any of the items, and it can be seen that the lead-free semiconductor device cannot be realized with a currently known single material.

次に、前記半導体装置における接合材の位置によって要求される仕様を分けて考える。図3にSiチップ上下の接合材に要求される仕様と各材料の特性の関係を、図4に上側応力緩衝板の上側の接合材および下側応力緩衝板の下側の接合材に要求される仕様と各材料の特性の関係を示す。   Next, the specifications required according to the position of the bonding material in the semiconductor device will be considered separately. FIG. 3 shows the relationship between the specifications required for the upper and lower Si chip bonding materials and the characteristics of each material. FIG. 4 shows the upper bonding material for the upper stress buffer plate and the lower bonding material for the lower stress buffer plate. The relationship between the specifications and the characteristics of each material is shown.

図3においては、図2と比べて、耐熱疲労性と電極からの力を緩和の項目が削除されている。Siチップ1上下の接合材4,5は、Siチップ1と応力緩衝板2,3に挟まれており、Siチップ1と応力緩衝板2,3との線膨張係数差は応力緩衝板2,3と電極6,7との線膨張係数差よりも小さくしており、大きな熱応力がかからないため、耐熱疲労性の項目は不要となる。また、電極6,7と直に接していないため、電極6,7からの力を緩和の項目も不要となる。よって、銀のナノ粒子と有機材料の混合材であるAgナノペーストから形成した接合材は全項目で適合することとなる。   In FIG. 3, compared with FIG. 2, the items of thermal fatigue resistance and relaxation of the force from the electrode are deleted. The bonding materials 4 and 5 above and below the Si chip 1 are sandwiched between the Si chip 1 and the stress buffer plates 2 and 3, and the difference in linear expansion coefficient between the Si chip 1 and the stress buffer plates 2 and 3 is the stress buffer plate 2. 3 is smaller than the linear expansion coefficient difference between the electrode 6 and the electrode 7, and a large thermal stress is not applied, so that the item of heat fatigue resistance becomes unnecessary. In addition, since the electrodes 6 and 7 are not in direct contact with each other, an item for reducing the force from the electrodes 6 and 7 is not necessary. Therefore, the bonding material formed from Ag nanopaste, which is a mixture of silver nanoparticles and an organic material, is suitable for all items.

図4においては、図2と比べて耐熱性が200℃から180℃へ低温化し、Siチップ割れ防止の項目が削除されている。上側応力緩衝板2の上側の接合材8および下側応力緩衝板3の下側の接合材9は、Siチップ1から離れているため、使用時の温度が比較的低くなり、要求される耐熱性も低くなる。Sn−Cu系はんだは180℃に対する耐熱性は有しており、結果、耐熱性の項目で適合となる。また、Siチップ1と直に接していないため、Siチップ割れ防止の項目も不要となる。よって、Sn−Cu系はんだは全項目で適合することとなる。   In FIG. 4, the heat resistance is lowered from 200.degree. C. to 180.degree. C. as compared with FIG. Since the bonding material 8 on the upper side of the upper stress buffer plate 2 and the bonding material 9 on the lower side of the lower stress buffer plate 3 are separated from the Si chip 1, the temperature during use becomes relatively low, and the required heat resistance The nature is also lowered. Sn-Cu solder has heat resistance to 180 ° C., and as a result, it is suitable in terms of heat resistance. In addition, since it is not in direct contact with the Si chip 1, the item for preventing Si chip cracking is also unnecessary. Therefore, Sn—Cu based solder is suitable for all items.

図3,図4より、Siチップ上下の接合材には銀のナノ粒子と有機材料の混合材が、上側応力緩衝板の上側の接合材および下側応力緩衝板の下側の接合材にはSn−Cu系はんだが適していることが分かる。   3 and 4, a mixture of silver nanoparticles and an organic material is used for the bonding material above and below the Si chip, and the bonding material on the upper side of the upper stress buffer plate and the lower side of the lower stress buffer plate. It turns out that Sn-Cu type solder is suitable.

ここで銀のナノ粒子と有機材料の混合材とは、例えば銀ナノ粒子の表面を有機物の保護層で被覆した独立分散ナノ粒子であり、加熱することで有機物が除去され、銀粒子が結合し接合材の役割を果たす。このため、接合温度は有機物が除去される300℃付近であるのに対し、接合後の溶融温度は銀の融点と同じ900℃以上となる特性を持っている。つまり、銀のナノ粒子と有機材料の混合材による接合は、銀はんだと同様の高い耐熱性を確保でき、さらにマウント温度が低いことにより、Siチップと応力緩衝板を接合する際のSiチップの熱応力を小さくできる効果も有している。   Here, the mixture of silver nanoparticles and organic material is, for example, an independently dispersed nanoparticle in which the surface of silver nanoparticles is coated with a protective layer of organic matter, and the organic matter is removed by heating and the silver particles are combined. Plays the role of bonding material. For this reason, the bonding temperature is about 300 ° C. from which organic substances are removed, whereas the melting temperature after bonding has a characteristic of being 900 ° C. or more which is the same as the melting point of silver. In other words, joining with a mixture of silver nanoparticles and an organic material can ensure the same high heat resistance as silver solder, and the mounting temperature is low, so that the Si chip can be bonded to the stress buffer plate. It also has the effect of reducing thermal stress.

本発明の一実施形態になる半導体装置を示す断面図である。It is sectional drawing which shows the semiconductor device which becomes one Embodiment of this invention. 鉛非含有のオルタネータダイオードの実現にあたり、接合材に要求される仕様と各材料の特性の関係を示す図である。It is a figure which shows the relationship between the specification requested | required of a joining material, and the characteristic of each material in the implementation | achievement of the alternator diode which does not contain lead. 本発明の一実施形態においてSiチップ上接合材4およびSiチップ下接合材5に要求される仕様と各材料の特性の関係を示す図である。It is a figure which shows the relationship between the specification requested | required of the bonding material 4 on Si chip | tip and the bonding material 5 under Si chip | tip, and the characteristic of each material in one Embodiment of this invention. 本発明の一実施形態において応力緩衝板上接合材8および応力緩衝板下接合材9に要求される仕様と各材料の特性の関係を示す図である。It is a figure which shows the relationship of the specification requested | required of the stress buffer board upper joining material 8 and the stress buffer board lower joining material 9, and the characteristic of each material in one Embodiment of this invention.

符号の説明Explanation of symbols

1 Siチップ
2 Siチップ上側の応力緩衝板
3 Siチップ下側の応力緩衝板
4 Siチップ上側接合材
5 Siチップ下側接合材
6 リード電極
7 ベース電極
8 応力緩衝板上接合材
9 応力緩衝板下接合材
10 封止樹脂
DESCRIPTION OF SYMBOLS 1 Si chip 2 Stress buffer plate of Si chip upper side 3 Stress buffer plate of Si chip lower side 4 Si chip upper side bonding material 5 Si chip lower side bonding material 6 Lead electrode 7 Base electrode 8 Stress buffer plate upper bonding material 9 Stress buffer plate Lower bonding material 10 Sealing resin

Claims (3)

整流機能を有する半導体チップと、
前記半導体チップの上に第一の接合材を介して接合された上側応力緩衝板と、
前記上側応力緩衝板の上に第二の接合材を介して接合されたリード電極と、
前記半導体チップの下に第三の接合材を介して接合された下側応力緩衝板と、
前記下側緩衝板の下に第四の接合材を介して接合されたベース電極とを備え、
前記第一の接合材及び前記第三の接合材は、前記第二の接合材及び前記第四の接合材とは、材料が異なっていることを特徴とする半導体装置。
A semiconductor chip having a rectifying function;
An upper stress buffer plate bonded via a first bonding material on the semiconductor chip;
A lead electrode joined to the upper stress buffer plate via a second joining material;
A lower stress buffer plate bonded via a third bonding material under the semiconductor chip;
A base electrode joined via a fourth joining material under the lower buffer plate,
The semiconductor device, wherein the first bonding material and the third bonding material are different in material from the second bonding material and the fourth bonding material.
整流機能を有する半導体チップと、
前記半導体チップの上に第一の接合材を介して接合された上側応力緩衝板と、
前記上側応力緩衝板の上に第二の接合材を介して接合されたリード電極と、
前記半導体チップの下に第三の接合材を介して接合された下側応力緩衝板と、
前記下側緩衝板の下に第四の接合材を介して接合されたベース電極とを備え、
前記半導体チップと前記上側応力緩衝板との線膨張係数の差は、前記上側応力緩衝板と前記リード電極との線膨張係数の差よりも小さく、
前記半導体チップと前記下側応力緩衝板との線膨張係数の差は、前記下側応力緩衝板と前記ベース電極との線膨張係数の差よりも小さく、
前記第一の接合材及び前記第三の接合材は、銀ナノペーストから形成した接合材であり、前記第二の接合材及び前記第四の接合材は、Sn−Cu系であることを特徴とする半導体装置。
A semiconductor chip having a rectifying function;
An upper stress buffer plate bonded via a first bonding material on the semiconductor chip;
A lead electrode joined to the upper stress buffer plate via a second joining material;
A lower stress buffer plate bonded via a third bonding material under the semiconductor chip;
A base electrode joined via a fourth joining material under the lower buffer plate,
The difference in linear expansion coefficient between the semiconductor chip and the upper stress buffer plate is smaller than the difference in linear expansion coefficient between the upper stress buffer plate and the lead electrode,
The difference in linear expansion coefficient between the semiconductor chip and the lower stress buffer plate is smaller than the difference in linear expansion coefficient between the lower stress buffer plate and the base electrode,
The first bonding material and the third bonding material are bonding materials formed from silver nanopaste, and the second bonding material and the fourth bonding material are Sn-Cu based. A semiconductor device.
前記上側応力緩衝板及び前記下側応力緩衝板が、Mo,W,Fe−Ni合金,Fe−
Ni合金とCuからなる積層板、またはMoとCuからなる合金あるいは焼結体であることを特徴とする請求項2項に記載の半導体装置。
The upper stress buffer plate and the lower stress buffer plate are Mo, W, Fe—Ni alloy, Fe—
The semiconductor device according to claim 2, wherein the semiconductor device is a laminated plate made of Ni alloy and Cu, or an alloy or sintered body made of Mo and Cu.
JP2006333941A 2006-12-12 2006-12-12 Semiconductor device Pending JP2008147469A (en)

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* Cited by examiner, † Cited by third party
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CN101859735A (en) * 2009-04-01 2010-10-13 罗伯特.博世有限公司 Electrical components
CN101859735B (en) * 2009-04-01 2016-11-23 罗伯特.博世有限公司 Electrical equipment
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