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JP2008039398A - Pulse radar equipment - Google Patents

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JP2008039398A
JP2008039398A JP2006209560A JP2006209560A JP2008039398A JP 2008039398 A JP2008039398 A JP 2008039398A JP 2006209560 A JP2006209560 A JP 2006209560A JP 2006209560 A JP2006209560 A JP 2006209560A JP 2008039398 A JP2008039398 A JP 2008039398A
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signal
circuit
pulse
power distribution
frequency
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Tomotsugu Sekine
友嗣 関根
Kenichi Tajima
賢一 田島
Kenji Kawakami
憲司 川上
Masaki Hanya
政毅 半谷
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Abstract

【課題】従来の受信部保護回路は受信信号の検出レベルで動作するので大電力信号受信後、動作までに時間があり、その間、アナログベースバンド回路以降に大電力信号が入力され、素子破損に至らずとも当該回路以降特性が劣化する。また受信信号レベル低下に伴い受信時の雑音指数が劣化する。
【解決手段】発振器からの高周波信号でRFパルス生成回路がRFパルス信号を生成し、第1の信号端子から外部に出力し、第2の信号端子で入力した外部の受信信号を受信ミクサにより前記高周波信号で周波数変換信号にし、アナログベースバンド回路で高周波成分を抑圧して信号レベル調整をし、信号処理部で信号処理を行うものであり、前記RFパルス信号をレベル検出して検出信号を出力する検波回路と、第2の信号端子からの受信信号を検波回路の検波信号でレベル変更し、受信ミクサに出力する信号通過/信号遮断切替回路を備える。
【選択図】図1
Since a conventional receiver protection circuit operates at a detection level of a received signal, there is a time until operation after receiving a high-power signal. During that time, a high-power signal is input after an analog baseband circuit, causing damage to elements. Even if not, the characteristics of the circuit and thereafter deteriorate. In addition, the noise figure at the time of reception deteriorates as the received signal level decreases.
An RF pulse generation circuit generates an RF pulse signal from a high-frequency signal from an oscillator, outputs the RF pulse signal from a first signal terminal, and an external reception signal input from a second signal terminal is received by the reception mixer. A high-frequency signal is converted into a frequency conversion signal, a high-frequency component is suppressed by an analog baseband circuit, signal level adjustment is performed, and signal processing is performed by a signal processing unit. And a signal passage / signal cutoff switching circuit that changes the level of the received signal from the second signal terminal with the detection signal of the detection circuit and outputs the signal to the reception mixer.
[Selection] Figure 1

Description

この発明はパルスレーダ装置に関し、特にアナログベースバンド回路以降の回路の保護を図り、特性劣化を抑制する技術に関する。   The present invention relates to a pulse radar device, and more particularly to a technique for protecting circuits after an analog baseband circuit and suppressing characteristic deterioration.

図17に従来のパルスレーダ装置の構成の一例を示す。1は発振器、2は第1の電力分配回路、3はRFパルス生成回路、4は受信ミクサ、6は第2の電力分配回路、7は第1の信号端子、8は検波回路、9は第2の信号端子、10は信号通過/信号遮断切替回路、11はアナログベースバンド回路、12は信号処理部、101は受信回路保護回路である。   FIG. 17 shows an example of the configuration of a conventional pulse radar device. 1 is an oscillator, 2 is a first power distribution circuit, 3 is an RF pulse generation circuit, 4 is a reception mixer, 6 is a second power distribution circuit, 7 is a first signal terminal, 8 is a detection circuit, and 9 is a first Reference numeral 2 denotes a signal terminal, 10 denotes a signal passing / signal cutoff switching circuit, 11 denotes an analog baseband circuit, 12 denotes a signal processing unit, and 101 denotes a receiving circuit protection circuit.

この従来のパルスレーダ装置は第2の信号端子9と受信ミクサ4の間に、特許文献1記載の受信部保護回路101を設けている。受信部保護回路101は、第2の電力分配回路6、検波回路8、信号通過/信号遮断切替回路10で構成されている。検波回路8で受信ミクサ4への入力電力を検出し、信号通過/信号遮断切替回路10で第2の信号端子9からの受信信号の通過または遮断を行う。設定する閾値より大きい電力を検波回路8で検出した場合、受信ミクサ4以降の回路を保護するため、信号通過/信号遮断切替回路10では受信信号を遮断する。設定する閾値より小さい電力の場合は、受信信号は信号通過/信号遮断切替回路10を通過する。   This conventional pulse radar apparatus is provided with a receiving portion protection circuit 101 described in Patent Document 1 between the second signal terminal 9 and the receiving mixer 4. The reception unit protection circuit 101 includes a second power distribution circuit 6, a detection circuit 8, and a signal passing / signal cutoff switching circuit 10. The detection circuit 8 detects the input power to the reception mixer 4, and the signal passing / signal cutoff switching circuit 10 passes or blocks the received signal from the second signal terminal 9. When the detection circuit 8 detects power larger than the set threshold value, the signal passing / signal cutoff switching circuit 10 cuts off the received signal in order to protect the circuits after the reception mixer 4. When the power is smaller than the set threshold value, the received signal passes through the signal passing / signal cutoff switching circuit 10.

図18に従来のパルスレーダ装置の別の構成の一例を示す。図17と同じ番号である部分は説明を省略する。102は従来の別の受信部保護回路、103は高周波増幅器である。受信部保護回路102は、信号通過/信号遮断切替回路10と高周波増幅器103で構成されており、図18では、特許文献1記載の別の受信部保護回路102を用いている。高周波増幅器103では、飽和時に、高周波増幅器103に用いている電界効果トランジスタのゲート端子、ソース端子、ドレイン端子のいずれかからパルス状の電圧を出力する。このパルス状の電圧の有無により、第2の信号端子9からの受信信号のレベルを検出することが可能となる。すなわち受信部保護回路102における高周波増幅器103は、受信部保護回路101における検波回路と電力分配回路の役割を果たしていることとなる。   FIG. 18 shows an example of another configuration of a conventional pulse radar apparatus. Description of parts having the same numbers as in FIG. 17 is omitted. Reference numeral 102 denotes another conventional receiver protection circuit, and reference numeral 103 denotes a high-frequency amplifier. The receiver protection circuit 102 includes a signal pass / signal cutoff switching circuit 10 and a high-frequency amplifier 103. In FIG. 18, another receiver protection circuit 102 described in Patent Document 1 is used. The high frequency amplifier 103 outputs a pulsed voltage from any one of the gate terminal, the source terminal, and the drain terminal of the field effect transistor used in the high frequency amplifier 103 at the time of saturation. The level of the received signal from the second signal terminal 9 can be detected based on the presence or absence of the pulse voltage. That is, the high-frequency amplifier 103 in the receiving unit protection circuit 102 serves as a detection circuit and a power distribution circuit in the receiving unit protection circuit 101.

パルスレーダ装置で主に受信する信号は、(1)距離測定の対象物からの反射信号、(2)他のパルスレーダ装置からの送信信号、(3)自パルスレーダ装置の送信信号の回り込み信号である。特に(3)の回り込み信号は、パルスレーダ装置内部やレドームなど至近距離の配置物からの反射によるもので、(1)の反射信号や(2)の他装置からの送信信号と比較してレベルが大きい。
図19に従来技術を用いたパルスレーダ装置における受信部保護回路の動作を示す。図19において(a)は送信するRF(Radio Frequency)パルス信号、(b)は受信したRFパルス信号、(c)は検波回路の出力、(d)は信号通過/信号遮断切替回路の状態、(e)は信号通過/信号遮断切替回路通過後の受信信号である。
The signals mainly received by the pulse radar device are: (1) a reflection signal from the object of distance measurement, (2) a transmission signal from another pulse radar device, and (3) a wraparound signal of the transmission signal of the own pulse radar device. It is. In particular, the sneak signal of (3) is due to reflection from an object located at a close distance such as the inside of the pulse radar device or radome, and is compared with the reflected signal of (1) and (2) the transmission signal from other devices. Is big.
FIG. 19 shows the operation of the receiver protection circuit in the pulse radar device using the prior art. 19, (a) is an RF (Radio Frequency) pulse signal to be transmitted, (b) is a received RF pulse signal, (c) is an output of a detection circuit, (d) is a state of a signal passing / signal cutoff switching circuit, (E) is a received signal after passing the signal passing / signal cutoff switching circuit.

従来技術を用いたパルスレーダ装置は、検波回路の出力が設定する閾値Thを超えたとき信号通過/信号遮断切替回路10が動作して受信信号を遮断し、受信ミクサ4以降の回路を保護する。信号通過/信号遮断切替回路10では検波回路の出力が設定する閾値Thより小さい電力の場合は、受信信号は信号通過/信号遮断切替回路10を通過する。   In the pulse radar device using the prior art, when the output of the detection circuit exceeds a set threshold value Th, the signal passing / signal cutoff switching circuit 10 operates to cut off the received signal and protect the circuits after the receiving mixer 4. . In the signal passing / signal cutoff switching circuit 10, the received signal passes through the signal passing / signal cutoff switching circuit 10 when the output of the detection circuit is lower than the set threshold Th.

特開平5−27010号公報JP-A-5-27010

従来技術を用いたパルスレーダ装置では、受信部保護回路の動作が送信タイミングと同期しておらず、大きなレベルの信号を受信してから検波回路の出力が所定の閾値Thとなるまでに時間・を要する。このため、時間・の期間だけアナログベースバンド回路以降に大きな電力の信号が入力されることとなる。結果、素子破損には至らないものの、アナログベースバンド回路以降の特性が劣化する。   In the pulse radar device using the conventional technology, the operation of the receiver protection circuit is not synchronized with the transmission timing, and it takes time / time until the output of the detection circuit reaches a predetermined threshold Th after receiving a large level signal. Cost. For this reason, a signal with a large electric power is input after the analog baseband circuit only during the time period. As a result, although the element is not damaged, the characteristics after the analog baseband circuit are deteriorated.

また、従来技術では、受信信号の一部を用いて受信信号のレベル検出を行うので、受信信号レベルの低下に伴い受信時の雑音指数が劣化する。   In the prior art, since the level of the received signal is detected using a part of the received signal, the noise figure at the time of reception deteriorates as the received signal level decreases.

この発明は上記のような問題点を解決するためになされたもので、アナログベースバンド回路以降の回路の特性劣化を抑制するとともに、雑音指数の劣化を防ぐことを目的とする。   The present invention has been made to solve the above-described problems, and an object of the present invention is to suppress deterioration of circuit characteristics after an analog baseband circuit and to prevent deterioration of a noise figure.

この発明に係るパルスレーダ装置は、
高周波信号を生成し出力する発振器と、この発振器の高周波信号を複数に分配する第1の電力分配回路と、第1の電力分配回路で分配された一方の高周波信号を一定の周期でオン・オフしてRFパルス信号を生成するRFパルス生成回路と、RFパルス生成回路のRFパルス信号を複数に分配する第2の電力分配回路と、第2の電力分配回路により分配された前記RFパルス信号の一方を外部に出力する第1の信号端子と、前記第2の電力分配回路により分配された他方の前記RFパルス信号のレベル検出を行い、検出信号を出力する検波回路と、外部からの受信信号を入力する第2の信号端子と、前記第2の信号端子からの受信信号を前記検波回路からの検波信号に応じてレベルを変更し、レベル変更後の受信信号を出力する信号通過/信号遮断切替回路と、第1の電力分配回路により分配された前記発振器の他方の出力と、前記信号通過/信号遮断切替回路の出力を入力し、受信信号の周波数変換信号を出力する受信ミクサと、前記受信ミクサからの周波数変換信号の高周波成分を抑圧し、さらに信号レベルの調整を行う前記アナログベースバンド回路と、前記アナログベースバンド回路の出力信号をもとに、信号の処理を行う信号処理部とを備える。
The pulse radar device according to the present invention is
An oscillator that generates and outputs a high-frequency signal, a first power distribution circuit that distributes the high-frequency signal of the oscillator to a plurality, and one of the high-frequency signals distributed by the first power distribution circuit is turned on and off at a constant cycle An RF pulse generation circuit that generates an RF pulse signal, a second power distribution circuit that distributes the RF pulse signal of the RF pulse generation circuit into a plurality, and the RF pulse signal distributed by the second power distribution circuit A first signal terminal for outputting one to the outside, a detection circuit for detecting the level of the other RF pulse signal distributed by the second power distribution circuit and outputting a detection signal, and a received signal from the outside A second signal terminal for inputting a signal, and a signal passing / signal cutoff for changing the level of the received signal from the second signal terminal according to the detected signal from the detecting circuit and outputting the received signal after the level change A switching circuit; The other output of the oscillator distributed by the first power distribution circuit, the output of the signal passing / signal cutoff switching circuit, and a reception mixer that outputs a frequency conversion signal of a reception signal; The analog baseband circuit that suppresses high-frequency components of the frequency conversion signal and further adjusts the signal level, and a signal processing unit that performs signal processing based on an output signal of the analog baseband circuit.

この発明に係るパルスレーダ装置は、
受信側の回路を保護するための信号通過/信号遮断切替回路を動作させる検波回路には、従来の受信回路保護回路のようにパルスレーダ装置で受信した信号を入力するのではなく、RFパルス生成回路で生成された送信するRFパルス信号を入力する。したがって、送信したRFパルス信号を検波することで、受信側に過大なレベルの受信信号が入力される場合、信号通過/信号遮断切替回路を遮断するまでの時間を短縮することができ、結果、過大なレベルの信号が受信側に入力された場合に受信ミクサ以降の回路に大きな電力の信号が入力されるのを防ぐことができる。
The pulse radar device according to the present invention is
The detection circuit that operates the signal passing / signal cutoff switching circuit for protecting the circuit on the receiving side does not input the signal received by the pulse radar device as in the conventional receiving circuit protection circuit, but generates an RF pulse. The RF pulse signal to be transmitted generated by the circuit is input. Therefore, by detecting the transmitted RF pulse signal, when an excessive level of received signal is input to the receiving side, the time until the signal passing / signal cutoff switching circuit is cut off can be shortened. When an excessively high level signal is input to the receiving side, it is possible to prevent a large power signal from being input to a circuit after the receiving mixer.

実施の形態1.
図1はこの発明の実施の形態1を示すパルスレーダ装置の構成図である。図1において、1は発振器、2は第1の電力分配回路、3はRFパルス生成回路、4は受信ミクサ、6は第2の電力分配回路、7は第1の信号端子、8は検波回路、9は第2の信号端子、10は信号通過/信号遮断切替回路、11はアナログベースバンド回路、12は信号処理部である。
Embodiment 1 FIG.
FIG. 1 is a block diagram of a pulse radar apparatus showing Embodiment 1 of the present invention. In FIG. 1, 1 is an oscillator, 2 is a first power distribution circuit, 3 is an RF pulse generation circuit, 4 is a reception mixer, 6 is a second power distribution circuit, 7 is a first signal terminal, and 8 is a detection circuit. , 9 are second signal terminals, 10 is a signal pass / signal cutoff switching circuit, 11 is an analog baseband circuit, and 12 is a signal processing unit.

次に動作を説明する。
発振器1で生成する高周波信号を、第1の電力分配回路2に入力する。第1の電力分配回路2は入力した高周波信号を電力分配して、RFパルス生成回路3と受信ミクサ4に出力する。RFパルス生成回路3は、入力した高周波信号をRFパルス信号に変換し、第2の電力分配回路6に出力する。第2の電力分配回路6は入力したRFパルス信号を電力分配し、第1の信号端子7と検波回路8に出力する。第1の信号端子7は入力したRFパルス信号を送信信号として外部に出力する。
Next, the operation will be described.
A high-frequency signal generated by the oscillator 1 is input to the first power distribution circuit 2. The first power distribution circuit 2 distributes the power of the input high frequency signal and outputs it to the RF pulse generation circuit 3 and the reception mixer 4. The RF pulse generation circuit 3 converts the input high frequency signal into an RF pulse signal and outputs it to the second power distribution circuit 6. The second power distribution circuit 6 distributes the input RF pulse signal to the first signal terminal 7 and the detection circuit 8. The first signal terminal 7 outputs the input RF pulse signal to the outside as a transmission signal.

第2の信号端子9は、外部からの入力信号を受信信号として信号通過/信号遮断切替回路10に出力する。信号通過/信号遮断切替回路10は検波回路8の出力信号に応じて信号レベルを変更した受信信号を受信ミクサ4に出力する。受信ミクサ4は信号通過/信号遮断切替回路10からの出力信号を第1の電力分配回路2の出力信号を用いて周波数変換し、変換した周波数変換信号をアナログベースバンド回路11を介して信号処理部12に出力する。信号処理部12は入力信号をもとに対象物の相対距離、相対速度、相対角度などを計算する。   The second signal terminal 9 outputs an input signal from the outside to the signal passing / signal cutoff switching circuit 10 as a received signal. The signal passing / signal cutoff switching circuit 10 outputs a reception signal whose signal level is changed according to the output signal of the detection circuit 8 to the reception mixer 4. The reception mixer 4 converts the frequency of the output signal from the signal passing / signal cutoff switching circuit 10 using the output signal of the first power distribution circuit 2, and processes the converted frequency converted signal via the analog baseband circuit 11. To the unit 12. The signal processing unit 12 calculates the relative distance, relative speed, relative angle, etc. of the object based on the input signal.

検波回路8は第2の電力分配回路6の出力を入力信号とし、この入力信号のレベル検出を行い、検出信号を信号通過/信号遮断切替回路10に出力する。
ここで図2に実施の形態1によるパルスレーダ装置における検波回路8および信号通過/信号遮断切替回路10の動作を示す。(a)は送信したRFパルス信号、(b)は受信したRFパルス信号、(c)は検波回路8の出力、(d)は信号通過/信号遮断切替回路10の状態、(e)は信号通過/信号遮断切替回路10を通過後の受信信号である。
The detection circuit 8 uses the output of the second power distribution circuit 6 as an input signal, detects the level of this input signal, and outputs the detection signal to the signal passing / signal cutoff switching circuit 10.
FIG. 2 shows operations of the detection circuit 8 and the signal passing / signal cutoff switching circuit 10 in the pulse radar device according to the first embodiment. (A) is the transmitted RF pulse signal, (b) is the received RF pulse signal, (c) is the output of the detection circuit 8, (d) is the state of the signal passing / signal cutoff switching circuit 10, and (e) is the signal. The received signal after passing through the passage / signal cutoff switching circuit 10.

ここで検波回路8には、従来の受信部保護回路101あるいは102のようにパルスレーダ装置で受信した信号を入力するのではなく、第2の電力分配回路6から電力分配されたRFパルス信号、すなわち送信するRFパルス信号を入力する。したがって、図19(c)に示すように過大なレベルの信号が検波回路8に入力され、検波回路8の出力が閾値Thとなるまでを待たずとも、図2(c)のように送信したRFパルス信号を検波することで、信号通過/信号遮断切替回路10を遮断するまでの時間を短縮することができ、結果、図2(e)に示すように過大なレベルの信号が受信側に入力された場合に受信ミクサ4以降の回路に大きな電力の信号が入力されるのを防ぐことができる。   Here, the detection circuit 8 does not input the signal received by the pulse radar device as in the conventional receiver protection circuit 101 or 102, but the RF pulse signal distributed from the second power distribution circuit 6, That is, an RF pulse signal to be transmitted is input. Accordingly, as shown in FIG. 19 (c), an excessive level signal is input to the detection circuit 8, and the signal is transmitted as shown in FIG. 2 (c) without waiting for the output of the detection circuit 8 to reach the threshold Th. By detecting the RF pulse signal, it is possible to shorten the time until the signal passing / signal cutoff switching circuit 10 is cut off. As a result, an excessive level signal is transmitted to the receiving side as shown in FIG. When the signal is input, it is possible to prevent a signal having a large power from being input to the circuits after the reception mixer 4.

この発明の構成では、送信信号を電力分配して検波を行うため、従来技術を用いた回路構成と比較して、受信時の雑音指数の劣化を防ぐことができる。一方、送信時の雑音指数は、従来技術を用いた回路構成と比較して劣化する。しかし、一般的に送信機のSN比は十分高いため、送信時の雑音指数の劣化がレーダ性能に与える影響は小さい。   According to the configuration of the present invention, since the transmission signal is distributed by performing power detection, it is possible to prevent deterioration of the noise figure at the time of reception as compared with the circuit configuration using the conventional technique. On the other hand, the noise figure at the time of transmission deteriorates as compared with the circuit configuration using the conventional technique. However, since the signal-to-noise ratio of the transmitter is generally sufficiently high, the influence of the deterioration of the noise figure during transmission on the radar performance is small.

ここで検波回路8の構成についてその一例を図3に基づき説明する。図3において、8は検波回路、32は検波回路の入力端子、33は検波用ダイオード、34はチョーク用λ/4波長線路、35は検波回路の出力端子である。
なお、既に説明済みの番号は説明を省略する。
検波回路8は、第2の電力分配回路6により電力分配された送信用のRFパルス信号を入力端子32から入力し、一定レベル以上のRFパルス信号であった場合、検波用ダイオード33で信号通過/信号遮断切替回路10を信号遮断にする直流電圧をチョーク用λ/4波長線路34に出力する。チョーク用λ/4波長線路34は、検波用ダイオード33からの直流電圧を検波回路の出力端子35に出力する一方で、信号通過/信号遮断切替回路10から受信信号が検波用ダイオード33側へ回り込むのを防ぐ。ここでλ/4波長線路34で回り込むのを防ぐことができる信号は、特定の周波数であるが、ミリ波帯などの非常に高い周波数の信号まで適用が可能である。
An example of the configuration of the detection circuit 8 will be described with reference to FIG. In FIG. 3, 8 is a detection circuit, 32 is an input terminal of the detection circuit, 33 is a detection diode, 34 is a λ / 4 wavelength line for choke, and 35 is an output terminal of the detection circuit.
The description of the already explained numbers is omitted.
The detection circuit 8 inputs the RF pulse signal for transmission distributed by the second power distribution circuit 6 from the input terminal 32. When the RF pulse signal is a certain level or higher, the detection circuit 33 passes the signal through the detection diode 33. A DC voltage that causes the signal cut-off switching circuit 10 to cut off the signal is output to the λ / 4 wavelength line 34 for choke. The λ / 4 wavelength line 34 for choke outputs the DC voltage from the detection diode 33 to the output terminal 35 of the detection circuit, while the reception signal passes from the signal passing / signal cutoff switching circuit 10 to the detection diode 33 side. To prevent. Here, the signal that can be prevented from wrapping around the λ / 4 wavelength line 34 is a specific frequency, but it can be applied up to a very high frequency signal such as a millimeter wave band.

また検波回路8は、図4に示す別の検波回路であってもよく、同様の効果を奏する。図4において既に説明済みの番号は説明を省略する。8は検波回路、44はチョーク用コイルである。チョーク用コイルは、検波用ダイオード33からの直流電圧を検波回路の出力端子35に出力する一方で、信号通過/信号遮断切替回路10から受信信号が検波用ダイオード33側へ回り込むのを防ぐ。ここでチョーク用コイル44で回り込むのを防ぐことができる信号は特定の周波数よりも高い周波数の信号であり、非常に高い周波数の信号の回り込みを防ぐことは難しいが、比較的低い周波数帯で受信する信号が複数の周波数成分を持つ場合や、広い周波数範囲をもつ場合に適用が可能である。   Further, the detection circuit 8 may be another detection circuit shown in FIG. 4 and has the same effect. The description of the numbers already described in FIG. 4 is omitted. 8 is a detection circuit, and 44 is a choke coil. The choke coil outputs the DC voltage from the detection diode 33 to the output terminal 35 of the detection circuit, while preventing the received signal from flowing into the detection diode 33 side from the signal passing / signal cutoff switching circuit 10. Here, the signal that can be prevented from wrapping around by the choke coil 44 is a signal having a frequency higher than a specific frequency, and it is difficult to prevent the wrapping of a signal having a very high frequency, but it is received in a relatively low frequency band. This is applicable when the signal to be processed has a plurality of frequency components or has a wide frequency range.

また検波回路8では、検波用ダイオード33を用いているが、同様の効果が得られる回路、例えばRSSI(Receiver Signal Strength Indicator)回路、ログアンプ回路等でも良く、検波回路は図3、図4に示す検波回路に限定されない。   The detection circuit 8 uses the detection diode 33. However, a circuit that can obtain the same effect, for example, an RSSI (Receiver Signal Strength Indicator) circuit, a log amplifier circuit, or the like may be used. The detection circuit is shown in FIGS. It is not limited to the detection circuit shown.

信号通過/信号遮断切替回路10の詳細について図5により説明する。図5において既に説明済みの番号は説明を省略する。図5において10は信号通過/信号遮断切替回路、52、53はDCカットコンデンサ、54は信号通過/信号遮断切替用リミッタダイオードである。DCカットコンデンサ52および53は検波回路によって直流電圧を信号通過/信号遮断切替用リミッタダイオード54に印加する際、第2の信号端子9および受信ミクサ4に直流電圧が印加されるのを防ぐ。信号通過/信号遮断切替用リミッタダイオード54は、検波回路8よりある一定以上の電圧が印加された場合、インピーダンスが低くなり、第2の信号端子9からの受信信号を高周波的に接地する。一方、検波回路8より印加される電圧が一定未満である場合、信号通過/信号遮断切替用リミッタダイオード54のインピーダンスは高く、第2の信号端子9からの受信信号をDCカットコンデンサ52、53を介して受信ミクサ4へ出力する。   Details of the signal pass / signal cutoff switching circuit 10 will be described with reference to FIG. The description of the numbers already described in FIG. 5 is omitted. In FIG. 5, 10 is a signal passing / signal cutoff switching circuit, 52 and 53 are DC cut capacitors, and 54 is a signal passing / signal cutoff switching limiter diode. The DC cut capacitors 52 and 53 prevent the DC voltage from being applied to the second signal terminal 9 and the reception mixer 4 when a DC voltage is applied to the signal passing / signal cutoff switching limiter diode 54 by the detection circuit. When a voltage higher than a certain level is applied from the detection circuit 8, the signal pass / signal cut-off switching limiter diode 54 has a low impedance and grounds the received signal from the second signal terminal 9 in a high frequency manner. On the other hand, when the voltage applied from the detection circuit 8 is less than a certain level, the impedance of the signal passing / signal cutoff switching limiter diode 54 is high, and the received signal from the second signal terminal 9 is passed through the DC cut capacitors 52 and 53. To the reception mixer 4 via

また信号通過/信号遮断切替回路10は図6に示す別の信号通過/信号遮断切替回路であってもよく、図5の信号通過/信号遮断切替回路10と同様の効果を奏する。図6において既に説明済みの番号は説明を省略する。図6において10は信号通過/信号遮断切替回路、62は信号入力端子、63は信号出力端子、64は制御信号入力端子、65は可変減衰回路である。信号通過/信号遮断切替回路10は、検波回路8より制御信号入力端子64に印加される制御信号の電圧に応じて可変減衰回路65の減衰量を変化させ、第2の信号端子9より入力端子62に入力された受信信号を減衰させ、出力端子63から受信ミクサ4へ減衰した受信信号を出力する。ここで検波回路8より印加される制御信号の電圧レベルが大きい場合、可変減衰回路の減衰量を大きくとることで、図6に示す信号通過/信号遮断切替回路10は図5に示した信号通過/信号遮断切替回路10と同様の効果を奏する。   Further, the signal passing / signal cutoff switching circuit 10 may be another signal passing / signal cutoff switching circuit shown in FIG. 6, and has the same effect as the signal passing / signal cutoff switching circuit 10 of FIG. The description of the numbers already described in FIG. 6 is omitted. In FIG. 6, 10 is a signal passing / signal cutoff switching circuit, 62 is a signal input terminal, 63 is a signal output terminal, 64 is a control signal input terminal, and 65 is a variable attenuation circuit. The signal passage / signal cutoff switching circuit 10 changes the attenuation amount of the variable attenuation circuit 65 in accordance with the voltage of the control signal applied to the control signal input terminal 64 from the detection circuit 8, and the input terminal from the second signal terminal 9. The reception signal input to 62 is attenuated and the reception signal attenuated from the output terminal 63 to the reception mixer 4 is output. Here, when the voltage level of the control signal applied from the detection circuit 8 is large, the signal passing / signal cutoff switching circuit 10 shown in FIG. 6 is made to pass the signal shown in FIG. / Same effect as the signal cutoff switching circuit 10 is obtained.

また、図1に示したパルスレーダ装置の信号通過/信号遮断切替回路10は図5、図6で示した信号通過/信号遮断切替回路以外にスイッチ回路、AM変調回路などを用いても良く、信号通過/信号遮断切替回路10は図5、図6に示した信号通過/信号遮断切替回路に限定されない。   In addition to the signal passing / signal cutoff switching circuit shown in FIGS. 5 and 6, the signal passing / signal cutoff switching circuit 10 of the pulse radar apparatus shown in FIG. The signal passing / signal cutoff switching circuit 10 is not limited to the signal passing / signal cutoff switching circuit shown in FIGS.

実施の形態2.
図7はこの発明の実施の形態2を示すパルスレーダ装置の構成図である。既に説明済みの番号と同じ番号である部分は説明を省略する。図1と異なり、信号通過/信号遮断切替回路10の位置が第1の電力分配回路2と受信ミクサ4の間である。ここで、信号通過/信号遮断切替回路10の位置が図1と異なっているが、検波回路8は第2の電力分配回路6の出力を入力信号とし、入力信号のレベル検出を行い、検出信号を信号通過/信号遮断切替回路10に出力することで、受信ミクサ4のオンオフを制御することができる。したがって、RFパルス信号を送信するタイミングに受信ミクサ4をオフにすることができ、受信ミクサ4に対しては大きなレベルの信号が入力されるが、アナログベースバンド回路11、信号処理部12に対しては図1に示す実施の形態1と同様の効果を得ることができる。
Embodiment 2. FIG.
FIG. 7 is a block diagram of a pulse radar apparatus showing Embodiment 2 of the present invention. The description of the parts having the same numbers as those already described is omitted. Unlike FIG. 1, the position of the signal passing / signal cutoff switching circuit 10 is between the first power distribution circuit 2 and the reception mixer 4. Here, although the position of the signal passing / signal cutoff switching circuit 10 is different from that in FIG. 1, the detection circuit 8 uses the output of the second power distribution circuit 6 as an input signal, detects the level of the input signal, and detects the detection signal. Is output to the signal pass / signal cut-off switching circuit 10, the on / off state of the reception mixer 4 can be controlled. Therefore, the reception mixer 4 can be turned off at the timing of transmitting the RF pulse signal, and a large level signal is input to the reception mixer 4, but the analog baseband circuit 11 and the signal processing unit 12 are input. Thus, the same effects as those of the first embodiment shown in FIG. 1 can be obtained.

実施の形態3.
図8はこの発明の実施の形態3を示すパルスレーダ装置の構成図である。既に説明済みの番号と同じ番号である部分は説明を省略する。この実施の形態は図1、図7に示す実施の形態とは異なり、信号通過/信号遮断切替回路10の位置が受信ミクサ4とアナログベースバンド回路11の間である。ここで、信号通過/信号遮断切替回路10の位置が図1、図7と異なっているが、検波回路8は第2の電力分配回路6の出力を入力信号とし、入力信号のレベル検出を行い、検出信号を信号通過/信号遮断切替回路10に出力することで、RFパルス信号を送信するタイミングに受信ミクサ4の出力信号を遮断することができる。
したがって、受信ミクサ4に対しては大きなレベルの信号が入力されるが、アナログベースバンド回路11、信号処理部12に対しては図1に示す実施の形態1と同様の効果を得ることができる。
Embodiment 3 FIG.
FIG. 8 is a block diagram of a pulse radar apparatus showing Embodiment 3 of the present invention. The description of the parts having the same numbers as those already described is omitted. This embodiment differs from the embodiment shown in FIGS. 1 and 7 in that the signal passing / signal cutoff switching circuit 10 is positioned between the reception mixer 4 and the analog baseband circuit 11. Here, although the position of the signal passing / signal cutoff switching circuit 10 is different from those in FIGS. 1 and 7, the detection circuit 8 uses the output of the second power distribution circuit 6 as an input signal to detect the level of the input signal. By outputting the detection signal to the signal passage / signal cutoff switching circuit 10, the output signal of the reception mixer 4 can be cut off at the timing of transmitting the RF pulse signal.
Therefore, a large level signal is input to the reception mixer 4, but the same effect as that of the first embodiment shown in FIG. 1 can be obtained for the analog baseband circuit 11 and the signal processing unit 12. .

実施の形態4.
図9はこの発明の実施の形態4を示すパルスレーダ装置の構成図である。既に説明済みの番号と同じ番号である部分は説明を省略する。この実施の形態4によるパルスレーダ装置の構成は、信号通過/信号遮断切替回路10を複数箇所に設けたものである。即ち、図1、図7、図8に示した信号通過/信号遮断切替回路10の設置箇所のうちの複数箇所、あるいは全てに箇所信号通過/信号遮断切替回路10を設けるものである。図9に示す実施の形態4は図1、図7、図8に示した信号通過/信号遮断切替回路10の設置箇所全てに信号通過/信号遮断切替回路10を設けた例である。図1、図7、図8に示したパルスレーダ装置の構成よりも、アナログベースバンド回路に入力される送信信号の回り込み信号を強力に遮断することができる。
Embodiment 4 FIG.
FIG. 9 is a block diagram of a pulse radar apparatus showing Embodiment 4 of the present invention. The description of the parts having the same numbers as those already described is omitted. The configuration of the pulse radar device according to the fourth embodiment is such that the signal passage / signal cutoff switching circuit 10 is provided at a plurality of locations. That is, the location signal passing / signal cutoff switching circuit 10 is provided at a plurality of locations or all of the locations where the signal passing / signal cutoff switching circuit 10 shown in FIGS. 1, 7, and 8 is installed. The fourth embodiment shown in FIG. 9 is an example in which the signal pass / signal cut-off switching circuit 10 is provided in all the places where the signal pass / signal cut-off switching circuit 10 shown in FIGS. 1, 7, and 8 is installed. The sneak signal of the transmission signal input to the analog baseband circuit can be blocked more strongly than the configuration of the pulse radar device shown in FIGS.

実施の形態5.
図10はこの発明の実施の形態5を示すパルスレーダ装置の構成図である。既に説明済みの部分は説明済み番号と同じ番号であり説明を省略する。図10において13は遅延回路であり、図1に示したパルスレーダ装置の検波回路8と信号通過/信号遮断回路10の間に追加したものである。
Embodiment 5. FIG.
FIG. 10 is a block diagram of a pulse radar apparatus showing Embodiment 5 of the present invention. The parts already described are the same as the already described numbers, and the description thereof is omitted. In FIG. 10, 13 is a delay circuit, which is added between the detection circuit 8 and the signal passing / signal blocking circuit 10 of the pulse radar apparatus shown in FIG.

パルスレーダ装置による検波回路8と信号通過/信号遮断切替回路10の動作が図11(a)から(f)のような場合は、図10に示す適切な遅延時間をもつ遅延回路13を設けたパルスレーダ装置により信号通過/信号遮断切替回路10が遮断の状態になるタイミングを遅らせ、図11(g)から(l)のようにすることで、送信側から受信回路側へ回り込んだ受信信号を効果的に遮断する。   When the operation of the detection circuit 8 and the signal passing / signal cutoff switching circuit 10 by the pulse radar device is as shown in FIGS. 11A to 11F, the delay circuit 13 having an appropriate delay time shown in FIG. 10 is provided. By delaying the timing at which the signal passing / signal cut-off switching circuit 10 is turned off by the pulse radar device, as shown in FIGS. 11 (g) to 11 (l), the received signal sneak from the transmitting side to the receiving circuit side. Effectively cut off.

ここで遅延回路13の位置は検波回路8と信号通過/信号遮断回路10の間ではなく、第2の電力分配回路6と検波回路8の間であってもよく、同様の効果を奏する。   Here, the position of the delay circuit 13 may be between the second power distribution circuit 6 and the detection circuit 8 instead of between the detection circuit 8 and the signal passing / signal cutoff circuit 10, and the same effect is obtained.

ここでパルスレーダ装置によっては、図12の(a)から(f)のように信号通過/信号遮断切替回路10が遮断の状態になるタイミングが遅すぎて、送信側から受信回路側へ回り込んだ受信信号を遮断できない場合がある。図12において(a)から(f)は信号通過/信号遮断切替回路10が遮断の状態になるタイミングが遅すぎる場合、(g)から(l)は遅延回路13によって信号通過/信号遮断切替回路10が遮断になるタイミングが適切な場合を仮定しており、(a)、(g)はRFパルス信号生成回路3の出力、(b)、(h)は送信するRFパルス信号、(c)、(i)は検波回路8の出力信号、(d)、(j)は信号通過/信号遮断切替回路10の状態、(e)、(k)は送信側から受信回路側へ回り込んだ受信パルス信号、(f)、(l)は信号通過/信号遮断切替回路10通過後の受信信号である。   Here, depending on the pulse radar device, as shown in FIGS. 12A to 12F, the timing at which the signal passing / signal cutoff switching circuit 10 is in the cutoff state is too late, and the transmission side wraps around to the reception circuit side. However, it may not be possible to block the received signal. In FIGS. 12A to 12F, when the signal passing / signal cutoff switching circuit 10 is cut off too late, (g) to (l) are the signal passing / signal cutoff switching circuit by the delay circuit 13. It is assumed that the timing at which 10 is cut off is appropriate, (a) and (g) are outputs of the RF pulse signal generation circuit 3, (b) and (h) are RF pulse signals to be transmitted, and (c). , (I) is the output signal of the detection circuit 8, (d), (j) is the state of the signal passing / signal cutoff switching circuit 10, and (e), (k) are receptions that wrap around from the transmitting side to the receiving circuit side. Pulse signals (f) and (l) are received signals after passing through the signal passing / signal cutoff switching circuit 10.

実施の形態6.
図13はこの発明の実施の形態6を示すパルスレーダ装置の構成図である。すでに説明した部分は同じ番号を付して説明を省略する。この実施の形態6は、図10に示す実施の形態5と異なり、遅延回路13の位置が第2の電力分配回路6と第1の信号端子7の間である。
Embodiment 6 FIG.
FIG. 13 is a block diagram of a pulse radar apparatus showing Embodiment 6 of the present invention. The parts that have already been described are assigned the same reference numerals and the description thereof is omitted. In the sixth embodiment, unlike the fifth embodiment shown in FIG. 10, the position of the delay circuit 13 is between the second power distribution circuit 6 and the first signal terminal 7.

図12(a)から(f)のような場合は適切な遅延時間をもつ遅延回路を用いることで送信するRFパルス信号の送信タイミングを遅らせ、(g)から(l)のようにする。ここで検波回路8に対してはRFパルス生成回路3から遅延回路を介さずに直接RFパルス信号を入力するので、信号通過/信号遮断切替回路10が信号遮断となるタイミングは変わりない。しかし、第1の信号端子7からの送信信号が適切な遅延時間をもって送信される。したがって、信号通過/信号遮断切替回路10が信号遮断となるタイミングに対して、送信信号の回り込み信号が受信回路側へ回りこむタイミングが相対的に遅くなり、送信側から受信回路側へ回り込んだ受信信号を効果的に遮断することができる。   In the cases shown in FIGS. 12A to 12F, the transmission timing of the RF pulse signal to be transmitted is delayed by using a delay circuit having an appropriate delay time, so that the transmission timing is changed from (g) to (l). Here, since the RF pulse signal is directly input from the RF pulse generation circuit 3 to the detection circuit 8 without going through the delay circuit, the timing at which the signal passing / signal cutoff switching circuit 10 becomes the signal cutoff does not change. However, the transmission signal from the first signal terminal 7 is transmitted with an appropriate delay time. Therefore, the timing at which the sneak signal of the transmission signal wraps around to the receiving circuit side is relatively delayed with respect to the timing at which the signal passing / signal cutoff switching circuit 10 is severed, and the sneak around the transmitting circuit slew from the transmitting side to the receiving circuit side. The received signal can be effectively blocked.

ここで図10、図13で示した遅延回路13の一例を図14に示す。図14において70は遅延回路、71は遅延回路の入力端子、72は遅延回路の出力端子である。また、図10、図13で示した遅延回路13はSAW(surface acoustic wave:)遅延線、プログラマブル遅延線路等でもよく、図14に示す遅延回路70に限定されない。   An example of the delay circuit 13 shown in FIGS. 10 and 13 is shown in FIG. In FIG. 14, 70 is a delay circuit, 71 is an input terminal of the delay circuit, and 72 is an output terminal of the delay circuit. 10 and 13 may be a SAW (surface acoustic wave :) delay line, a programmable delay line, or the like, and is not limited to the delay circuit 70 shown in FIG.

ここで図1、図7、図8、図9、図10、図13に示したパルスレーダ装置の第1の信号端子7はRFパルス信号を送信信号として出力し、第2の信号端子9はRFパルス信号を受信信号として入力するものであるが、それぞれの信号端子と送信アンテナ、受信アンテナとの接続は図15のように送受一体となっているアンテナと接続しても良い。図15において、81は送受一体となっているアンテナ、82は送信信号入力端子、83は受信信号出力端子、84はサーキュレータである。サーキュレータ84は、パルスレーダ装置の第1の信号端子7より送信信号入力端子82を介して入力した送信信号を送受一体となっているアンテナ81に出力し、送受一体となっているアンテナ81から受信した信号を受信信号出力端子83に出力し、パルスレーダ装置の第2の信号端子9に受信信号を出力する役割を持つ。図15の送受一体となっているアンテナによれば、パルスレーダ装置に必要なアンテナが1つで済む。   Here, the first signal terminal 7 of the pulse radar apparatus shown in FIGS. 1, 7, 8, 9, 10, and 13 outputs an RF pulse signal as a transmission signal, and the second signal terminal 9 The RF pulse signal is input as a reception signal. However, the connection between each signal terminal, the transmission antenna, and the reception antenna may be connected to an antenna integrated with transmission and reception as shown in FIG. In FIG. 15, 81 is an antenna integrated with transmission / reception, 82 is a transmission signal input terminal, 83 is a reception signal output terminal, and 84 is a circulator. The circulator 84 outputs the transmission signal input from the first signal terminal 7 of the pulse radar device via the transmission signal input terminal 82 to the antenna 81 integrated with transmission / reception, and received from the antenna 81 integrated with transmission / reception. The output signal is output to the reception signal output terminal 83, and the reception signal is output to the second signal terminal 9 of the pulse radar device. According to the antenna integrated with transmission and reception in FIG. 15, only one antenna is required for the pulse radar device.

ここで図1、図7、図8、図9、図10、図14に示したパルスレーダ装置の第1の信号端子7と送信アンテナ、パルスレーダ装置の第2の信号端子9と受信アンテナの接続は図16のように送信、受信で分離されたアンテナと接続しても良い。図16において90は送信アンテナ、91は送信信号入力端子、92は受信アンテナ、93は受信信号出力端子であり、送信信号入力端子91をパルスレーダ装置の第1の信号端子7と接続し、受信信号出力端子93をパルスレーダ装置の第2の信号端子9と接続する。図16の送信、受信で分離されたアンテナによれば、パルスレーダ装置に必要なアンテナが2つとなるが、送信信号が受信側へ回りこむ量を抑圧できる。   Here, the first signal terminal 7 and the transmission antenna of the pulse radar device shown in FIGS. 1, 7, 8, 9, 10 and 14 are connected to the second signal terminal 9 and the reception antenna of the pulse radar device. The connection may be made with an antenna separated for transmission and reception as shown in FIG. In FIG. 16, 90 is a transmission antenna, 91 is a transmission signal input terminal, 92 is a reception antenna, 93 is a reception signal output terminal, and the transmission signal input terminal 91 is connected to the first signal terminal 7 of the pulse radar device to receive the signal. The signal output terminal 93 is connected to the second signal terminal 9 of the pulse radar device. According to the antennas separated by transmission and reception in FIG. 16, two antennas are required for the pulse radar device, but the amount of transmission signal that wraps around to the reception side can be suppressed.

この発明は車載レーダ等のパルスレーダ装置に適用され、受信信号レベル低下に伴う受信時の雑音指数劣化を防ぎ、大電力信号受信時の受信側回路保護が図れる。   The present invention is applied to a pulse radar device such as an on-vehicle radar, and can prevent noise figure degradation at the time of reception accompanying reception signal level lowering, and can protect a receiving side circuit at the time of receiving a high power signal.

この発明の実施の形態1によるパルスレーダ装置の構成図である。BRIEF DESCRIPTION OF THE DRAWINGS It is a block diagram of the pulse radar apparatus by Embodiment 1 of this invention. 実施の形態1における受信部保護回路の動作説明図である。6 is an operation explanatory diagram of a reception unit protection circuit in Embodiment 1. FIG. 実施の形態1における検波回路の構成回路図である。FIG. 2 is a configuration circuit diagram of a detection circuit in the first embodiment. 実施の形態1における検波回路の他の実施例の構成回路図である。FIG. 6 is a configuration circuit diagram of another example of the detection circuit according to the first embodiment. 実施の形態1における信号通過/信号遮断切替回路の構成回路図である。FIG. 3 is a configuration circuit diagram of a signal passing / signal cutoff switching circuit in the first embodiment. 実施の形態1における信号通過/信号遮断切替回路の他の実施例の構成回路図である。FIG. 7 is a configuration circuit diagram of another example of the signal passing / signal cutoff switching circuit according to the first embodiment. この発明の実施の形態2によるパルスレーダ装置の構成図である。It is a block diagram of the pulse radar apparatus by Embodiment 2 of this invention. この発明の実施の形態3によるパルスレーダ装置の構成図である。It is a block diagram of the pulse radar apparatus by Embodiment 3 of this invention. この発明の実施の形態4によるパルスレーダ装置の構成図である。It is a block diagram of the pulse radar apparatus by Embodiment 4 of this invention. この発明の実施の形態5によるパルスレーダ装置の構成図である。It is a block diagram of the pulse radar apparatus by Embodiment 5 of this invention. 信号通過/信号遮断切替回路の遮断状態タイミングが早すぎる場合の遅延回路の動作説明図である。It is operation | movement explanatory drawing of a delay circuit when the interruption | blocking state timing of a signal passage / signal interruption | blocking switching circuit is too early. 信号通過/信号遮断切替回路の遮断状態タイミングが遅すぎる場合の遅延回路の動作説明図である。It is operation | movement explanatory drawing of a delay circuit when the interruption | blocking state timing of a signal passage / signal interruption | blocking switching circuit is too late. この発明の実施の形態6によるパルスレーダ装置の構成図である。It is a block diagram of the pulse radar apparatus by Embodiment 6 of this invention. 遅延回路の一例を示す構成図である。It is a block diagram which shows an example of a delay circuit. 送受一体アンテナと各信号端子との関係を示す構成図である。It is a block diagram which shows the relationship between a transmission / reception integrated antenna and each signal terminal. 送信アンテナと受信アンテナが別々の場合の各信号端子との関係を示す構成図である。It is a block diagram which shows the relationship between each signal terminal in case a transmitting antenna and a receiving antenna are separate. 従来のパルスレーダ装置の一例を示す構成図である。It is a block diagram which shows an example of the conventional pulse radar apparatus. 従来のパルスレーダ装置の別な例を示す構成図である。It is a block diagram which shows another example of the conventional pulse radar apparatus. 従来のパルスレーダ装置における受信部保護回路の動作説明図である。It is operation | movement explanatory drawing of the receiving part protection circuit in the conventional pulse radar apparatus.

符号の説明Explanation of symbols

1;発振器、2;第1の電力分配回路、3;RFパルス生成回路、4;受信ミクサ、6;第2の電力分配回路、7;第1の信号端子、8;検波回路、9;第2の信号端子、10;信号通過/信号遮断切替回路、11;アナログベースバンド回路、12;信号処理部、13;遅延回路、32;検波回路の入力端子、33;検波用ダイオード、34;チョーク用λ/4波長線路、35;検波回路の出力端子、44;チョーク用コイル、52、53;DCカットコンデンサ、54;信号通過/信号遮断切替用リミッタダイオード、62;信号入力端子、63;信号出力端子、64;制御信号入力端子、65;可変減衰回路、81;送受一体アンテナ、82;送信信号入力端子、83;受信信号出力端子、84;サーキュレータ、101、102;受信部保護回路。   DESCRIPTION OF SYMBOLS 1; Oscillator, 2; 1st power distribution circuit, 3; RF pulse generation circuit, 4; Reception mixer, 6; 2nd power distribution circuit, 7: 1st signal terminal, 8; Detection circuit, 9; 2 signal terminals, 10; signal passing / signal cutoff switching circuit, 11; analog baseband circuit, 12; signal processing unit, 13; delay circuit, 32; detection circuit input terminal, 33; Λ / 4 wavelength line, 35; output terminal of detection circuit, 44; choke coil, 52 and 53; DC cut capacitor, 54; limiter diode for switching signal passing / shut-off, 62; signal input terminal, 63; signal Output terminal 64; control signal input terminal 65; variable attenuation circuit 81; transmission / reception integrated antenna 82; transmission signal input terminal 83; reception signal output terminal 84; circulator 101, 102; Circuit.

Claims (6)

高周波信号を生成し出力する発振器と、この発振器の高周波信号を複数に分配する第1の電力分配回路と、第1の電力分配回路で分配された一方の高周波信号を一定の周期でオン・オフしてRFパルス信号を生成するRFパルス生成回路と、RFパルス生成回路のRFパルス信号を複数に分配する第2の電力分配回路と、第2の電力分配回路により分配された前記RFパルス信号の一方を外部に出力する第1の信号端子と、前記第2の電力分配回路により分配された他方の前記RFパルス信号のレベル検出を行い、検出信号を出力する検波回路と、外部からの受信信号を入力する第2の信号端子と、前記第2の信号端子からの受信信号を前記検波回路からの検波信号に応じてレベルを変更し、レベル変更後の受信信号を出力する信号通過/信号遮断切替回路と、第1の電力分配回路により分配された前記発振器の他方の出力と、前記信号通過/信号遮断切替回路の出力を入力し、受信信号の周波数変換信号を出力する受信ミクサと、前記受信ミクサからの周波数変換信号の高周波成分を抑圧し、さらに信号レベルの調整を行う前記アナログベースバンド回路と、前記アナログベースバンド回路の出力信号をもとに信号の処理を行う信号処理部とを備えることを特徴とするパルスレーダ装置。   An oscillator that generates and outputs a high-frequency signal, a first power distribution circuit that distributes the high-frequency signal of the oscillator to a plurality, and one of the high-frequency signals distributed by the first power distribution circuit is turned on and off at a constant cycle An RF pulse generation circuit that generates an RF pulse signal, a second power distribution circuit that distributes the RF pulse signal of the RF pulse generation circuit into a plurality, and the RF pulse signal distributed by the second power distribution circuit A first signal terminal for outputting one to the outside, a detection circuit for detecting the level of the other RF pulse signal distributed by the second power distribution circuit and outputting a detection signal, and a received signal from the outside A second signal terminal for inputting a signal, and a signal passing / signal cutoff for changing the level of the received signal from the second signal terminal according to the detected signal from the detecting circuit and outputting the received signal after the level change A switching circuit; The other output of the oscillator distributed by the first power distribution circuit, the output of the signal passing / signal cutoff switching circuit, and a reception mixer that outputs a frequency conversion signal of a reception signal; The analog baseband circuit that suppresses high-frequency components of the frequency conversion signal and further adjusts the signal level, and a signal processing unit that performs signal processing based on the output signal of the analog baseband circuit. A pulse radar device. 高周波信号を生成し出力する発振器と、この発振器の高周波信号を複数に分配する第1の電力分配回路と、第1の電力分配回路で分配された一方の高周波信号を一定の周期でオン・オフしてRFパルス信号を生成するRFパルス生成回路と、RFパルス生成回路のRFパルス信号を複数に分配する第2の電力分配回路と、第2の電力分配回路により分配された前記RFパルス信号の一方を外部に出力する第1の信号端子と、前記第2の電力分配回路により分配された他方の前記RFパルス信号のレベル検出を行い、検出信号を出力する検波回路と、第1の電力分配回路により分配された前記発振器の他方の出力と、前記検波回路からの検出信号を入力し、オンーオフ信号を出力する信号通過/信号遮断切替回路と、外部からの受信信号を入力する第2の信号端子と、前記第2の信号端子からの受信信号を入力し、前記信号通過/信号遮断切替回路のオンーオフ信号に応じて受信信号のレベルを変更し、レベル変更された受信信号の周波数変換信号を出力する受信ミクサと、前記受信ミクサからの周波数変換信号の高周波成分を抑圧し、さらに信号レベルの調整を行う前記アナログベースバンド回路と、前記アナログベースバンド回路の出力信号をもとに、信号の処理を行う信号処理部とを備えることを特徴とするパルスレーダ装置。   An oscillator that generates and outputs a high-frequency signal, a first power distribution circuit that distributes the high-frequency signal of the oscillator to a plurality, and one of the high-frequency signals distributed by the first power distribution circuit is turned on and off at a constant cycle An RF pulse generation circuit that generates an RF pulse signal, a second power distribution circuit that distributes the RF pulse signal of the RF pulse generation circuit into a plurality, and the RF pulse signal distributed by the second power distribution circuit A first signal terminal for outputting one to the outside, a detection circuit for detecting the level of the other RF pulse signal distributed by the second power distribution circuit and outputting a detection signal, and a first power distribution The other output of the oscillator distributed by the circuit, the detection signal from the detection circuit, a signal passing / signal cutoff switching circuit for outputting an on / off signal, and a second signal for inputting a reception signal from the outside Terminal And the received signal from the second signal terminal is input, the level of the received signal is changed according to the on / off signal of the signal passing / signal cutoff switching circuit, and the frequency conversion signal of the received signal whose level is changed is output. Signal processing based on the output signal of the analog baseband circuit, the analog baseband circuit that suppresses the high frequency component of the frequency conversion signal from the reception mixer, and further adjusts the signal level A pulse radar device comprising: a signal processing unit that performs the operation. 高周波信号を生成し出力する発振器と、この発振器の高周波信号を複数に分配する第1の電力分配回路と、第1の電力分配回路で分配された一方の高周波信号を一定の周期でオン・オフしてRFパルス信号を生成するRFパルス生成回路と、RFパルス生成回路のRFパルス信号を複数に分配する第2の電力分配回路と、第2の電力分配回路により分配された前記RFパルス信号の一方を外部に出力する第1の信号端子と、前記第2の電力分配回路により分配された他方の前記RFパルス信号のレベル検出を行い、検出信号を出力する検波回路と、外部からの受信信号を入力する第2の信号端子と、前記第2の信号端子からの受信信号と、第1の電力分配回路により分配された前記発振器の他方の出力を入力し、受信信号の周波数変換信号を出力する受信ミクサと、前記受信ミクサからの周波数変換信号を前記検波回路からの検波信号に応じてレベルを変更し、レベル変更後の周波数変換信号を出力する信号通過/信号遮断切替回路と、前記信号通過/信号遮断切替回路からのレベル変更後の周波数変換信号の高周波成分を抑圧し、さらに信号レベルの調整を行う前記アナログベースバンド回路と、前記アナログベースバンド回路の出力信号をもとに、信号の処理を行う信号処理部とを備えることを特徴とするパルスレーダ装置。   An oscillator that generates and outputs a high-frequency signal, a first power distribution circuit that distributes the high-frequency signal of the oscillator to a plurality, and one of the high-frequency signals distributed by the first power distribution circuit is turned on and off at a constant cycle An RF pulse generation circuit that generates an RF pulse signal, a second power distribution circuit that distributes the RF pulse signal of the RF pulse generation circuit into a plurality, and the RF pulse signal distributed by the second power distribution circuit A first signal terminal for outputting one to the outside, a detection circuit for detecting the level of the other RF pulse signal distributed by the second power distribution circuit and outputting a detection signal, and a received signal from the outside Is input to the second signal terminal, the received signal from the second signal terminal, and the other output of the oscillator distributed by the first power distribution circuit, and outputs the frequency conversion signal of the received signal Receive Miku A signal passing / signal cutoff switching circuit that changes the level of the frequency conversion signal from the reception mixer according to the detection signal from the detection circuit, and outputs the frequency conversion signal after the level change, and the signal passing / signal The analog baseband circuit that suppresses the high frequency component of the frequency conversion signal after the level change from the cutoff switching circuit and further adjusts the signal level, and the signal processing based on the output signal of the analog baseband circuit A pulse radar device comprising: a signal processing unit for performing. 高周波信号を生成し出力する発振器と、この発振器の高周波信号を複数に分配する第1の電力分配回路と、第1の電力分配回路で分配された一方の高周波信号を一定の周期でオン・オフしてRFパルス信号を生成するRFパルス生成回路と、RFパルス生成回路のRFパルス信号を複数に分配する第2の電力分配回路と、第2の電力分配回路により分配された前記RFパルス信号の一方をRFパルス信号を外部に出力する第1の信号端子と、外部からの受信信号を入力する第2の信号端子と、前記第2の信号端子からの受信信号と、第1の電力分配回路により分配された前記発振器の他方の出力を入力し、受信信号の周波数変換信号を出力する受信ミクサと、前記受信ミクサからの周波数変換信号の高周波成分を抑圧し、さらに信号レベルの調整を行う前記アナログベースバンド回路と、前記アナログベースバンド回路の出力信号をもとに、信号の処理を行う信号処理部と、第2の電力分配回路により分配された他方の前記RFパルス信号のレベル検出を行い、検出信号を出力する検波回路と、検波回路からの検波信号に応じて受信信号レベルを変更するための信号通過/信号遮断切替回路を、前記第2の信号端子と受信ミクサの間、受信ミクサと第1の電力分配回路の間および受信ミクサとアナログベースバンド回路との間の何れか複数または全てに設けたことを特徴とするパルスレーダ装置。   An oscillator that generates and outputs a high-frequency signal, a first power distribution circuit that distributes the high-frequency signal of the oscillator to a plurality, and one of the high-frequency signals distributed by the first power distribution circuit is turned on and off at a constant cycle An RF pulse generation circuit that generates an RF pulse signal, a second power distribution circuit that distributes the RF pulse signal of the RF pulse generation circuit into a plurality, and the RF pulse signal distributed by the second power distribution circuit One of them is a first signal terminal for outputting an RF pulse signal to the outside, a second signal terminal for inputting a reception signal from the outside, a reception signal from the second signal terminal, and a first power distribution circuit The other output of the oscillator distributed by the input is input, the reception mixer that outputs the frequency conversion signal of the reception signal, the high frequency component of the frequency conversion signal from the reception mixer is suppressed, and the signal level is further adjusted A Based on the output signal of the log baseband circuit, the analog baseband circuit, the signal processing unit for processing the signal, and the level detection of the other RF pulse signal distributed by the second power distribution circuit A detection circuit for outputting a detection signal, and a signal passing / signal cutoff switching circuit for changing a reception signal level in accordance with the detection signal from the detection circuit, a reception mixer between the second signal terminal and the reception mixer And a first power distribution circuit and a plurality of or all of them between a reception mixer and an analog baseband circuit. 信号通過/信号遮断切替回路に入力される検波回路の出力信号を、RFパルス生成回路からのRFパルス信号より遅延させる遅延回路が設けられたことを特徴とする請求項1乃至4の何れか1項に記載のパルスレーダ装置。   The delay circuit which delays the output signal of the detection circuit input into the signal passage / signal cutoff switching circuit from the RF pulse signal from the RF pulse generation circuit is provided. The radar device according to item. 第1の信号端子から出力されるRFパルス信号を遅延させる遅延回路が設けられたことを特徴とする請求項1乃至4の何れか1項に記載のパルスレーダ装置。   5. The pulse radar device according to claim 1, further comprising a delay circuit that delays an RF pulse signal output from the first signal terminal. 6.
JP2006209560A 2006-08-01 2006-08-01 Pulse radar equipment Pending JP2008039398A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012195676A (en) * 2011-03-15 2012-10-11 Shimada Phys & Chem Ind Co Ltd Limiter device and radar system
JP2018124158A (en) * 2017-01-31 2018-08-09 株式会社東芝 Transmitter-receiver, transmission-reception module, and radar system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012195676A (en) * 2011-03-15 2012-10-11 Shimada Phys & Chem Ind Co Ltd Limiter device and radar system
JP2018124158A (en) * 2017-01-31 2018-08-09 株式会社東芝 Transmitter-receiver, transmission-reception module, and radar system

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